Asus X542UN, X542URV Schematics

SYSTEM PAGE REF.

PAGE

001_Block Diagram

002_System Setting

003_CPU_DISPLAY

004_CPU_DDR3

005_CPU_LPC,SPI,SMB,CLINK

006_CPU_POEWR

007_

008_CPU_MISC,JTAG

009_CPU_CFG,RSVD

010_CPU_POWER_CAP

011_

012_

013_DDR3L_TERMINATION

014_DDR3L_ON-BOARD_A(1)

015_DDR3L_ON-BOARD_A(2)

016_DDR3L SO-DIMM_B

017_

018_

019_DDR3L_CA_DQ_VOLTAGE

020_CPU_PCH_CSI2,EMMC

021_CPU_PCH_CGPIO, LPIO, MISC

022_CPU_PCH_AUDIO,SDIO,SDXC

023_CPU_PCH_PCIE,USB,SATA

024_CPU_PCH_CLOCK SIGNALS,RTC

025_CPU_PCH_SYS_POWER

026_CPU_PCH_POEWR,GND

027_CPU_PCH_POEWR,GND

028_PCH-SPI ROM,OTH

029_

030_KBC_IT8995E/AX

031_KB, TouchPad & FingerPrint

032_RST_Reset Circuit

033_LAN_RTL8111GUX-CG

034_LAN RJ45

035_

036_AUD_CODEC ALC3288

037_AUD_Smart Amp. 5766L & SKP

038_

039_

040_

041_

042_

043_

044_

045_eDP_LVDS

046_

047_eDP to VGA & CRT D-SUB

048_HDMI-type A

049_

050_FAN_Thermal Sensor

051_SATA_ODD & HDD B to B CONN.

052_USB 3.0 port1/port2

053_MINICARD(WLAN)

054_SSD_key M

055_USB 3.1 MB Type-C

056_

057_DSG_Discharge

058_PRO_Protect

059_Power & LID

060_DC_DC & BAT IN

061_

062_

063_

064_DB_SATA HDD

065_ME_Conn & Skew Hole

066_DB_IO_USB & CR & LED & JACK

067_

068_IO_FPC_CONN.

069_EMI

070_VGA_nVIDIA_N16V/S_PCIE

071_VGA_nVIDIA_N16V/S_FB-IF

072_VGA_nVIDIA_N16V/S_FB-DDR3

073_VGA_nVIDIA_N16V/S_VDD

074_VGA_nVIDIA_N16V/S_DISPLAY

075_VGA_nVIDIA_N16V/S_ROM,XTAL

076_VGA_nVIDIA_N16V/S_GPIO

077_VGA_nVIDIA_N16V/S_POWER

078_VGA_

079_VGA_

080_PW_SKYLAKE-U (1)
081_PW_SKYLAKE-U (2)
082_PW_
083_PW_+1.0VSUS/+1.8VSUS
084_PW_
084_PW_
086_PW_+1.2V/+VTT/+2.5V
087_PW_+3VADSW/+5VSUS
088_PW_LOAD SWITCH
089_PW_CHARGER
090_PW_PROTECTION
091_PW_+NVVDD (1)
092_PW_
093_PW_+FBVDDQ
094_PW_
095_PW_
096_PW_
097_PW_
098_PW_
099_PW_FLOW CHART

100_Power On Timing--AC mode

101_Power On Timing--DC mode

102_History

Content

X542UN/URV SCHEMATIC Revision 1.0

（N16：DGPU = Nvidia N16S-GMR, 930MX）
（N17：DGPU = Nvidia N17S-G1, MX150）

eDP

eDP Panel

Page 45

DDI_2

DDI_2

HDMI type A

DDI_1

Page 48

DDI to VGA

D-SUB

Page 47

RTD2166-VAS-CG

Finger Print

Touchpad

Keyboard

Charger

CPU
Thermal Sensor

DIMM
Thermal Sensor

M.2 SSD

INT. DMIC

Page 45

INT. AMIC

Page 45

SMART AMP

Speaker L/R

Page 37

TI_TAS5766L

Page 47

PS2

Debug Conn.

Page 31

EC

Page 31

SMB0

IT8995E

Page 88

SPI SPI

SMB1

Page 50

Page 14

SATA_2

Gen3

Page 54

SATA_1

ODD

Gen3

Page 51

Audio Codec

ALC3288

Page 36

I2S

Page 37

CPU XDP

KabeLaker-R-U

SML1

DDI_1

2 lans

SPI

I2C1

LPC

Page 28

Page 30

PCH

SPI ROM

Wildcat_Point

W25Q64FVSSIQ

Page 28

SATA

iSST

Azalia

HDA

HP & MIC

SATA_0

Gen3

20 Pin

20 Pin

BtoB Conn.

BtoB Conn.

To HDD DB.

To MB

Page 64

Page 52

Discharge Circuit

Page 57

Page 7

Reset Circuit

Page 32

Non Connected Standby

DDR4 so-dimm

DDR4
2100MHz

DDR4 so-dimm

DDR4

CPU

2100MHz

Page 13~15, 19

SMB

Page 3~9

PCIE

PCIE_1~4

USB 2.0

MCP

USB 3.0

Page 20~28

HDD

Audio Jack

SATA_1

CardReader

AU6465RB63-GCF-GR

USB 2.0 Conn.

HDD DB.

DC & BATT. Conn.

PWM Fan

Page 60

Skew Holes

Page 65

Nvidia

930M/1040

N16V-GMR1

Page 70~ 79

PCIE_5

GigaLAN

RJ45

RTL8402

Page 34

Page 33

PCIE_6

WLAN + BT

USB 2.0_8

Page 53

USB 2.0_6

CMOS Camera

Page 45

USB 3.0_1

USB 3.0 Standard Conn.

USB 2.0_1

Port 1

Page 52

USB 3.0_4

USB 3.0 Type-A

USB 2.0_3

Port 2

Page 53

USB 3.0_2
USB 3.0_3

USB 3.1 Type-C

USB 2.0_2

Page 55

USB 2.0_3

30 Pin
FPC Conn.

USB 2.0_4

To IO BD.

Page 68

FPC

30 Pin
FPC Conn.
To MB

USB 2.0_7

Page 66

USB 2.0_4

IO DB.

Page 50

BLOCK DIAGRAM

Power

+VCCGT
+VCCCORE
+VCCSA

+1.0VSUS / +1.8VSUS

+1.35V / +0.675VS

+3VADSW/+5VSUS

Load Switch

Charger

+NVVDD

+FBVDDQ

BOM

Project Name

Title :

Block Diagram

Size

Dept.:

NB2_RD1_EE1

Custom

Date: Sheet

Tuesday, June 20, 2017

Page 80 & 81

Page 83

Page 86

Page 87

Page 88

Page 89

Page 91

Page 93

Rev

R1.0X542UN/URV

Engineer:

Andy_Tang

102

of

1

PCH_CPT
GPIO

綠色:
新增function

紅色:
待再確認

藍色:
額外標示

灰色:
預留不上件

For FingerPrint

For FingerPrint

For FingerPrint

For FingerPrint

For FingerPrint

For FingerPrint

Int.& Ext

Power on

PCH_IBEX GPIO

Signal NameUse As

RC_IN#

Native1

GPP_A0

LPC_AD0

Native1

GPP_A1

LPC_AD1

Native1

GPP_A2

LPC_AD2

Native1

GPP_A3

LPC_AD3

Native1

GPP_A4

LPC_FRAME#

Native1

GPP_A5

INT_SERIRQ

Native1

GPP_A6

NA

GPO

GPP_A7

PM_CLKRUN#

Native

GPP_A8

CLK_KBCPCI_PCH

Native1

GPP_A9

CLK_DEBUG

Native

GPP_A10

NA

GPP_A11

GPO

NA

GPP_A12

GPO

SUSWARN#

Native1

GPP_A13

PCH_SUS_STAT#

Native1

GPP_A14

PCH_SUSACK#

Native1

GPP_A15

NA

GPP_A16

GPO

NA

GPP_A17

GPO

NA

GPP_A18

GPO

NA

GPP_A19

GPO

NA

GPP_A20

GPO

NA

GPP_A21

GPO

NA

GPP_A22

GPO

NA

GPP_A23

GPO

VCCPRIM_VID0

GPP_B0

Native

VCCPRIM_VID1

GPP_B1

Native

NA

GPP_B2

GPO

NA

GPP_B3

GPO

NA

GPP_B4

GPO

CK_REQ_P0#

GPP_B5

Native

CK_REQ_P1#

GPP_B6

Native

CK_REQ_P2#

GPP_B7

Native

CK_REQ_P3#

GPP_B8

Native

CK_REQ_P4#

GPP_B9

Native

CK_REQ_P5#

GPP_B10

Native

MPHY_PWREN

GPP_B11

Native

PCH_SLP_S0#

GPP_B12

Native

PLT_RST#

GPP_B13

Native

NA

GPP_B14

GPO

FP_GSPI0_CS#

GPP_B15

GPO

FP_GSPI0_CLK

GPP_B16

GPO

FP_GSPI0_MISO

GPP_B17

GPO

FP_GSPI0_MOSI

GPP_B18

GPI

BT_ON/OFF#

GPP_B19

GPO

GPU_EVENT#

GPP_B20

GPO

DGPU_FB_CLAMP_GPIO

GPP_B21

GPI

NA

GPP_B22

GPO

SML1ALERT#

Native

GPP_B23

SMB_CK

GPP_C0

Native

SMB_DATA

GPP_C1

Native

NA

GPP_C2

GPO

SML0_CK

GPP_C3

Native

SML0_DATA

GPP_C4

Native

NA

GPO

GPP_C5

SML1_CK

GPP_C6

Native

SML1_DATA

GPP_C7

Native

NA

GPP_C8

GPO

NA

GPP_C9

GPO

NA

GPP_C10

GPO

NA

GPP_C11

GPO

DIMM_SEL0

GPP_C12

GPI

DIMM_SEL1

GPP_C13

GPI

DIMM_SEL2

GPP_C14

GPI

NA

GPP_C15

GPO

NA

GPP_C16

GPO

NA

GPP_C17

GPO

I2C1_SDA_TCH_PAD

GPP_C18

Native

I2C1_SCL_TCH_PAD

GPP_C19

Native

DGPU_PWROK

GPP_C20

GPI

GPU_RST#

GPP_C21

GPO

DGPU_PWR_EN#

GPP_C22

GPO

N/A

GPP_C23

GPO

N/A

GPP_D0

GPO

N/A

GPP_D1

GPO

N/A

GPP_D2

GPO

N/A

GPP_D3

GPO

N/A

GPP_D4

GPO

SATA_ODD_PWRGT

GPP_D5

GPO

SATA_ODD_DA#

GPP_D6

GPI

FP_RST#

GPP_D7

GPI

FP_INT#

GPP_D8

GPO

PCB_ID0

GPI

GPP_D9

PCB_ID1

GPI

GPP_D10

N/A

GPP_D11

GPO

N/A

GPP_D12

GPO

TOUCHPAD_INTR#

GPP_D13

GPI

WLAN_LED_R

GPP_D14

GPO

N/A

GPP_D15

GPO

N/A

GPP_D16

GPO

N/A

GPP_D17

GPO

N/A

GPP_D18

GPO

N/A

GPP_D19

GPO

N/A

GPP_D20

GPO

N/A

GPP_D21

GPO

N/A

GPP_D22

GPO

Power

Pull up / down

Default States

NA

NA

DGPU

NA

GLAN

WLAN

NA

DIMM & TP

DIMM & TP

PCH_IBEX GPIO

EXT PU 10K

+3VS

GPP_D23

PU at EC

GPP_E0

GPP_E1

For SSD +3VS

GPP_E2

GPP_E3

EXT PU 10K

EXT PU 8.2K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10KNANA

EXT PU 10K

EXT PU 10K

EXT PU 20K

Check PU can be removed?

EXT PU 49.9K

EXT PU 49.9K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PD 10K

EXT PU 10K +3VSG

EXT PU 150K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 2.2K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 4.7K

EXT PU 4.7K

EXT PU 10K

EXT PD 10K

EXT PU 10K +3VS

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PD 10K

EXT PD 10K

EXT PU 10K +3VS

EXT PU 10K

EXT PD 10K

EXT PU 10K

EXT PU 10K

EXT PD 10K
EXT PU 10K

GPP_E4

+3VS

GPP_E5

GPP_E6

+3VS

GPP_E7

GPP_E8

GPP_E9

GPP_E10

GPP_E11

GPP_E12

+3VSUS

GPP_E13

GPP_E14

GPP_E15

GPP_E16

GPP_E17

GPP_E18

GPP_E19

GPP_E20

GPP_E21

GPP_E22

GPP_E23

+3VS

GPP_F0

+3VS

GPP_F1

GPP_F2

GPP_F3

GPP_F4

+3VS

GPP_F5

+3VS

GPP_F6

+3VS

GPP_F7

+3VS

GPP_F8

+3VS

GPP_F9

+3VS

GPP_F10

+3VSUS

GPP_F11

GPP_F12

GPP_F13

GPP_F14

+3VS

GPP_F15

+3VS

GPP_F16

+3VS

GPP_F17

+3VS

GPP_F18

GPP_F19

+3VSG

GPP_F20

PD at DGPU

GPP_F21

GPP_F22

+3VSUS

GPP_F23

+3VSUS

GPP_G0

+3VSUS

GPP_G1

GPP_G2

+3VSUS

GPP_G3

+3VSUS

GPP_G4

GPP_G5

+3VSUS

GPP_G6

+3VSUS

GPP_G7

GPD0

GPD1

GPD2

+3VSUS

GPD3

+3VSUS

GPD4

+3VSUS

GPD5

GPD6

GPD7

GPD8

GPD9

+3VS

GPD10

+3VS

+3VS

GPD11

PU at DGPU

+3VSUS

+3VS

PU at ODD

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

at LED
+3VSUS

Use As Signal Name

N/A

GPO

N/A

GPO

N/A

GPO

MSATA_MPCIE_DET#

GPI

N/A

GPO

SATA0_DEVSLP

GPO

SATA1_PHYSLP

GPO

SATA2_DEVSLP

GPO

N/A

GPO

SATA_LED#

NATIVE

USB_OC_1_2# EXT PU 10K

NATIVE

USB_OC_3_4#

GPI

USB_OC_5_6#

GPI

USB_OC_7_8#

GPI

DDPB_HPD_PCH

NATIVE

HDMI_HP

NATIVE

EXT_SMI# EXT PU 10K

GPO

EXT_SCI#

GPI

EDP_HPD_CON

NATIVE

DDPB_SCL_PCH

NATIVE

DDPB_SDA_PCH

NATIVE

DDPC_SCL_PCH

NATIVE

DDPC_SDA_PCH

NATIVE

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

N/A

GPO

SDIO_CMD

GPO

SDIO_D0

GPO

SDIO_D1

GPO

SDIO_D2

GPO

SDIO_D3

GPO

SDIO_CD#

GPO

SDIO_CLK

GPO

SDIO_WP

GPO

PM_BATLOW_R#

Native

ME_AC_PRESENT_PCH

Native

PCH_GPD2#

GPI

PM_PWRBTN#

Native

PM_SUSB#

Native

PM_SUSC#

Native

PM_SLP_A_R#

Native

WLAN_ON#

GPO

SUS_CK

Native

PCH_SLP_WLAN#

Native

SLP_S5#

Native

LAN_PWREN

Native

Power on

Int.& Ext

Default States

Pull up / down

EXT PU 10K

REF: UX390 no PU

EXT PU 10K

HDD

EXT PU 10K

NA +3VS

EXT PU 10K

SSD

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PU 10K

EXT PD 100K PD at DDI to VGA

EXT PU 1M

EXT PU 10K

EXT PD 100K

EXT PU 10K +3VS

EXT PU 10K

EXT PU 10K

EXT PU 2.2K

EXT PU 2.2K

N/A

N/A

N/A

N/A

N/A

N/A

N/A

N/A

EXT PU 8.2K

EXT PU 100K

EXT PU 10K

EXT PU 10K

EXT PD 100K

EXT PD 100K PD at EC

N/A

EXT PU 10K

EXT PD 1K

N/A

N/A

N/A

Signal Name

Pin Name

Config

Power

EC

PWR_LED

IT8995

GPA0

O

CHG_LED#

GPIO

GPA1

OD

GPA2

OD

FAN_PWM_GPU(N/A)

GPA3

Alt

CLICK_WAKE#/WLAN_WAKE#_EC(N/A)

GPA4

O

FAN0_PWM

GPA5

Alt

+3VS

+3VS

+3VS

+3VSUS

+3VSUS

+3VSUS

+3VSUS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VS

+3VA_DSW

+3VA_DSW

+3VA_DSW

+3VSUS

+3VA_DSW

KB_LED_PWM

GPA6

Alt

OS_LED# (N/A)

GPA7

O

GPB0

Alt

LID_SW#

GPB1

I

(N/A)

GPB2

OD

PWR_SW#

GPB3

I

PS_ON

GPB4

O

A20GATE (N/A)

GPB5

O

GPB6

OD

(N/A)

PU at HDMI conn

GPC0

O

GPC1

Alt

GPC2

Alt

PD at LVDS conn

GPC3

O

GPC4

I

GPC5

I

BAT1_IN_OC#

GPC6

Alt

PU at HDMI conn

(N/A)

PU at HDMI conn

I

GPC7

PCH_SLP_S0#

I

GPD0

ME_AC_PRESENT

O

GPD1

BUF_PLT_RST#

Alt

GPD2

EXT_SCI#

OD

GPD3

EXT_SMI#

OD

GPD4

OP_SD#

O

GPD5

FAN0_TACH

Alt

GPD6

(N/A)

Alt

GPD7

GPE0

O

SUSC_EC#

GPE1

O

1.2V_ON

GPE2

O

(N/A)

GPE3

O

(N/A)

GPE4

O

GPE5

I

CAP_LED#

GPE6

OD

GPE7

OD

O

GPF0

O

GPF1

Alt

GPF2

Alt

GPF3

Alt

GPF4

Alt

GPF5

PECI_EC

Alt

GPF6

PCH_SPI_OV

O

GPF7

DGPU_LIMIT

GPG0

O

PCH_SUSACK#

GPG1

O

PWRLIMIT_EC#

GPG2

I

(N/A)

GPG6

O

PM_CLKRUN#

Alt

GPH0

SMB3_CLK

N/A

Alt

GPH1

SMB3_DAT

N/A

Alt

GPH2

O

GPH3

DPWROK_EC

O

GPH4

PM_PWROK

O

GPH5

PM_SYSPWROK

O

GPH6

LCD_BACKOFF#

O

GPH7

PM_SLP_SUS#

GPI0

I

3VSUS_PWRGD

GPI1

I

ALL_SYSTEM_PWRGD

PD at EC

GPI2

I

IMVP8_PWRGD

GPI3

I

3VA_DSW_PWRGD

GPI4

I

ME_SusPwrDnAck_EC

GPI5

I

A/D_MAX_POWER

GPI6

Alt

MB_MAX_POWER

GPI7

Alt

EC_WAKE_SCI

N/A

I

GPJ0

O

GPJ1

REST_AMP#

Alt

For Smart Amp.

GPJ2

PCH_SUS_STAT#

N/A

O

GPJ3

AMP_SLEEP#

Alt

For Smart Amp.

GPJ4

EC_GPJ5

N/A

I

GPJ5

N/A

I

GPJ6

N/A

OGPJ7

*1: EC config GPI; Function output

Power

Ext Pull up / down

Default status

Design IP Source:

LOW

EXT 10K PU

+3VA_EC

HIGH

SM_BUS ADDRESS :

EXT 10K PUCHG_FULL_LED#

+3VA_EC

EXT 10K PU +3VA_EC

EXT 10K PU

EXT 4.7K PUSMB1_DAT

EXT 10K PUPM_PWRBTN#

EXT 10K PDDGPU_FB_CLAMP_GPIO

EXT 100K PDPM_SUSC#

EXT 10K PD

EXT 100K PD

EXT 10K PU +3VS

EXT 10K PU +3VS

EXT 10K PU

EXT 10K PU

EXT 10K PDSUSB_EC#

EXT 10K PD

EXT 100K PDPM_SUSB#

EXT 1K PUTHRO_CPU#

EXT 10K PU/ 1M PD5VSUS_ON

EXT 100K PU

EXT 4.7K PU +3VSTP_CLK

EXT 8.2K PU

EXT 10K PDPM_RSMRST#

EXT 10K PD

EXT 100K PD

EXT 10K PD

EXT 10K PU/ 100K PD +3VA_EC

EXT 10K PU +3VS

EXT 10K PU +3VS

EXT 100K PU +3VA_DSW

EXT 0 PD

EXT 100K PU/93.1K PD +3VACC

+3VA_ECEXT 10K PU

+3VAEXT 10K PUAC_IN_OC#

+3VAEXT 10K PU

+3VA

+3VSEXT 10K PU

+3VSEXT 10K PURC_IN#

+3VA_ECEXT 4.7K PUSMB1_CLK

+3VA_EC

+3VSUS

PCI Express

PCIE 1

PCIE 2

+3VA_DSWEXT 100K PU

PCIE 3

PCIE 4

PCIE 5

PCIE 6

+3VS

+3VS

PCIE 9

PCIE 10

PCIE 11

PCIE 12

PCI CLK

+VCCSTG

+3VA_EC

+3VA_ECVSUS_ON

+3VA_ECEXT 4.7K PUSMB0_CLK

+3VA_ECEXT 4.7K PUSMB0_DATA

+3VSEXT 4.7K PUTP_DAT

USB Port

USB 1

USB 2

USB 3

USB 4

+3VA_ECEXT 100K PU

USB 5

USB 6

+3VS

USB 7

USB 8

USB 9

USB 10

Device Identification

CPU Thermal Senser

1st

2nd

+3VA_ECEXT 100K PU3VADSW_ON

+3VS

PCH Master

SM-Bus Device

EC Master (SMB1)

SM-Bus Device

CPU Thermal Sensor 90h

DGPU

GLAN

WLAN

SSD PCIE3

SSD PCIE2

SSD PCIE1

SSD PCIE0 SSD SATA

DGPUx4

CLK0

CLK1

SSD

CLK2

CLK3

LAN

CLK4

WLAN

CLK5

USB 2.0 Port

USB 2.0 Port

USB 2.0 Port

USB 2.0 Port

CAMERA

CARD READER

WLAN/BT

06G023123010

NCT7717U

BOM

Title :

System Setting

Size

Dept.:

NB2_RD1_EE1

D

Date: Sheet of

Tuesday, June 20, 2017

SM-Bus Address

SM-Bus Address

9AhDIMM TEMP.

USB3 Port

USB3_1

USB 3.0 Port 0

USB3_2

USB 3.1 Type C

USB3_3

USB 3.1 Type C

USB3_4

USB 3.0 Port 1

SATA Port

SATA 0

HDD

SATA 1

ODD / 2nd HDD

SATA 2

USB 3.0 Port 0

USB 3.1 Type C

USB 3.0 Port 1

USB 2.0

Project Name

Rev

R1.0X542UN/URV

Engineer:

Andy_Tang

102

2

HIGH

LOW

LOW

LOW

HIGH

HIGH

HIGH

HIGH

LOW

HIGH

HIGH

LOW

HIGH

LOW

LOW

LOW

HIGH

HIGH

HIGH

HIGH

LOW

HIGH

LOW

HIGH

HIGH

HIGH

HIGH

LOW

LOW

HIGH

HIGH

LOW

HIGH

HIGH

LOW

HIGH

HIGH

LOW

LOW

HIGH

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

HIGH

LOW

HIGH

HIGH

HIGH

HIGH

LOW

LOW

LOW

HIGH

HIGH

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

LOW

HIGH

Main Board

Display Port

B VGA

CHDMI

VGA_LANE0_DN47
VGA_LANE0_DP47
VGA_LANE1_DN47
VGA_LANE1_DP47

HDMI_DATA2N_PCH48
HDMI_DATA2P_PCH48
HDMI_DATA1N_PCH48
HDMI_DATA1P_PCH48
HDMI_DATA0N_PCH48
HDMI_DATA0P_PCH48
HDMI_CLKN_PCH48
HDMI_CLKP_PCH48

PDG#543016 DDI1 mapping DDPB
DDI2 mapping DDPC

+VCCIO_CPU

R0301

24.9Ohm
1%

12

EDP_COMP

COMPENSATION PU FOR DP

ASUS P/NIntel Version

U0301A

E55

DDI1_TXN[0]

F55

DDI1_TXP[0]

E58

DDI1_TXN[1]

F58

DDI1_TXP[1]

F53

DDI1_TXN[2]

G53

DDI1_TXP[2]

F56

DDI1_TXN[3]

G56

DDI1_TXP[3]

C50

DDI2_TXN[0]

D50

DDI2_TXP[0]

C52

DDI2_TXN[1]

D52

DDI2_TXP[1]

A50

DDI2_TXN[2]

B50

DDI2_TXP[2]

D51

DDI2_TXN[3]

C51

DDI2_TXP[3]

L13

GPP_E18/DDPB_CTRLCLK

L12

GPP_E19/DDPB_CTRLDATA

N7

GPP_E20/DDPC_CTRLCLK

N8

GPP_E21/DDPC_CTRLDATA

N11

GPP_E22/DDPD_CTRLCLK

N12

GPP_E23/DDPD_CTRLDATA

E52

EDP_RCOMP

SKL-ULT

pre-ES

C47

DDI

DISPLAY SIDEBANDS

EDP_TXN[0]

C46

EDP_TXP[0]

D46

EDP_TXN[1]

C45

EDP_TXP[1]

A45

EDP_TXN[2]

B45

EDP_TXP[2]

A47

EDP_TXN[3]

B47

EDP_TXP[3]

E45

EDP_AUXN

EDP

F45

EDP_AUXP

B52

EDP_DISP_UTIL

G50

DDI1_AUXN

F50

DDI1_AUXP

E48

DDI2_AUXN

F48

DDI2_AUXP

G46

DDI3_AUXN

F46

DDI3_AUXP

L9

GPP_E13/DDPB_HPD0

L7

GPP_E14/DDPC_HPD1

L6

GPP_E15/DDPD_HPD2

N9

GPP_E16/DDPE_HPD3

L10

GPP_E17/EDP_HPD

R12

EDP_BKLTEN

R11

EDP_BKLTCTL

U13

EDP_VDDEN

DP_UTIL

DDI2_AUX_DN
DDI2_AUX_DP

EXT_SMI#

EXT_SCI#_X1

EDP_HPD_CON

LCD_BACKEN_PCH_X1
L_BKLTCTL_PCH_X1
L_VDDEN_PCH_X1

R0302 0Ohm@

1
1

SL0304

12

T0301
T0302

SL0301
SL0302
SL0303

EDP_TXN0 45
EDP_TXP0 45
EDP_TXN1 45
EDP_TXP1 45
EDP_TXN2 45
EDP_TXP2 45
EDP_TXN3 45
EDP_TXP3 45

EDP_AUXN 45
EDP_AUXP 45

DDPB_AUXN_PCH 47
DDPB_AUXP_PCH 47

DDPB_HPD_PCH 47
HDMI_HP 48

EXT_SMI# 30

21

EXT_SCI# 30

0402

EDP_HPD_CON 45

0402

0402

0402

21
21
21

eDP_HDP

L_BKLT_EN 45
EDP_BRIGHTNESS 45
L_VDDEN_PCH 45

BOM

Title :

Size

Dept.:

Custom

Date: Sheet

Tuesday, June 20, 2017

VGA

CPU_DISPLAY

EDP_HPD_CON
EXT_SMI#

EXT_SCI#_X1

DDPB_SCL_PCH
DDPB_SDA_PCH

NB2_RD1_EE1

Project Name

R0303 10KOhm@

12

R0305 10KOhm

12

R0306 10KOhm

12

R0304 10KOhm

12

R0307 10KOhm

12

Engineer:

Joach_Wang

3

+3VS

Rev

R2.0X542UA/UV

102

of

EDPA

DDPB_SCL_PCH
DDPB_SDA_PCH

DDPC_SCL_PCH48
DDPC_SDA_PCH48

EDP_COMP

M_A_DQ[63:0]16

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

DDR_VTT_CTRL:
SystemMemoryPowerGateControl:
DisablestheplaormmemoryVTTregulator
inC8anddeeperandS3.
Ref:544924_544924_Skylake_EDS_Vol_1_Rev0.9.pdfP.120

2016/10/11 X542UA_#32, Modify 0401 circuit follow X456U P14. U1405

2017/01/19 X542UA_#11, R0404 modify PU to +3VS & RES 200K

VTT Enable

DDR_VTT_CTRL

R0407 0Ohm@

12

512M x 8bit x 8

For On Board (A)

U0301B

AL71

DDR0_DQ[0]

AL68

DDR0_DQ[1]

AN68

DDR0_DQ[2]

AN69

DDR0_DQ[3]

AL70

DDR0_DQ[4]

AL69

DDR0_DQ[5]

AN70

DDR0_DQ[6]

AN71

DDR0_DQ[7]

AR70

DDR0_DQ[8]

AR68

DDR0_DQ[9]

AU71

DDR0_DQ[10]

AU

8

6

DDR0_DQ[11]

AR71

DDR0_DQ[12]

AR69

DDR0_DQ[13]

AU70

DDR0_DQ[14]

AU69

DDR0_DQ[15]

BB65

DDR0_DQ[16]/DDR0_DQ[32]

AW65

DDR0_DQ[17]/DDR0_DQ[33]

AW63

DDR0_DQ[18]/DDR0_DQ[34]

AY63

DDR0_DQ[19]/DDR0_DQ[35]

BA65

DDR0_DQ[20]/DDR0_DQ[36]

AY65

DDR0_DQ[21]/DDR0_DQ[37]

BA63

DDR0_DQ[22]/DDR0_DQ[38]

BB63

DDR0_DQ[23]/DDR0_DQ[39]

BA61

DDR0_DQ[24]/DDR0_DQ[40]

AW61

DDR0_DQ[25]/DDR0_DQ[41]

BB59

DDR0_DQ[26]/DDR0_DQ[42]

AW59

DDR0_DQ[27]/DDR0_DQ[43]

BB61

DDR0_DQ[28]/DDR0_DQ[44]

AY61

DDR0_DQ[29]/DDR0_DQ[45]

BA59

DDR0_DQ[30]/DDR0_DQ[46]

AY59

DDR0_DQ[31]/DDR0_DQ[47]

AY39

DDR0_DQ[32]/DDR1_DQ[0]

AW39

DDR0_DQ[33]/DDR1_DQ[1]

AY37

DDR0_DQ[34]/DDR1_DQ[2]

AW37

DDR0_DQ[35]/DDR1_DQ[3]

BB39

DDR0_DQ[36]/DDR1_DQ[4]

BA39

DDR0_DQ[37]/DDR1_DQ[5]

BA37

DDR0_DQ[38]/DDR1_DQ[6]

BB37

DDR0_DQ[39]/DDR1_DQ[7]

AY35

DDR0_DQ[40]/DDR1_DQ[8]

AW35

DDR0_DQ[41]/DDR1_DQ[9]

AY33

DDR0_DQ[42]/DDR1_DQ[10]

AW33

DDR0_DQ[43]/DDR1_DQ[11]

BB35

DDR0_DQ[44]/DDR1_DQ[12]

BA35

DDR0_DQ[45]/DDR1_DQ[13]

BA33

DDR0_DQ[46]/DDR1_DQ[14]

BB33

DDR0_DQ[47]/DDR1_DQ[15]

AY31

DDR0_DQ[48]/DDR1_DQ[32]

AW31

DDR0_DQ[49]/DDR1_DQ[33]

AY29

DDR0_DQ[50]/DDR1_DQ[34]

AW29

DDR0_DQ[51]/DDR1_DQ[35]

BB31

DDR0_DQ[52]/DDR1_DQ[36]

BA31

DDR0_DQ[53]/DDR1_DQ[37]

BA29

DDR0_DQ[54]/DDR1_DQ[38]

BB29

DDR0_DQ[55]/DDR1_DQ[39]

AY27

DDR0_DQ[56]/DDR1_DQ[40]

AW27

DDR0_DQ[57]/DDR1_DQ[41]

AY25

DDR0_DQ[58]/DDR1_DQ[42]

AW25

DDR0_DQ[59]/DDR1_DQ[43]

BB27

DDR0_DQ[60]/DDR1_DQ[44]

BA27

DD

_DQ[61]/DDR1_DQ[45]

R0

BA25

DDR0_DQ[62]/DDR1_DQ[46]

BB25

DDR0_DQ[63]/DDR1_DQ[47]

SKL-ULT

IL/NIL

REV=<REV>

21

SL0409

0402

DDR_PG_CTRL_RR

DDR0_MA[5]
DDR0_MA[9]

DDR0_MA[6]

DDR0_MA[8]

DDR0_MA[7]

DDR0_BA[2]

DDR0_MA[12]

DDR0_MA[11]

DDR0_MA[15]

DDR0_MA[14]

DDR0_MA[13]

DDR0_CAS#

DDR0_WE#

DDR0_RAS#

DDR0_BA[0]

DDR0_MA[2]

DDR0_BA[1]

DDR0_MA[10]

DDR0_MA[1]

DDR0_MA[0]

DDR CH - A

U0401

1

NC

2

A

34

GND

74AUP1G07GW

/DDR0_CAA[0]/DDR0_MA[5]
/DDR0_CAA[1]/DDR0_MA[9]
/DDR0_CAA[2]/DDR0_MA[6]
/DDR0_CAA[3]/DDR0_MA[8]
/DDR0_CAA[4]/DDR0_MA[7]
/DDR0_CAA[5]/DDR0_BG[0]
/DDR0_CAA[6]/DDR0_MA[12]
/DDR0_CAA[7]/DDR0_MA[11]
/DDR0_CAA[8]/DDR0_ACT#
/DDR0_CAA[9]/DDR0_BG[1]

/DDR0_CAB[0]/DDR0_MA[13]
/DDR0_CAB[1]/DDR0_MA[15]
/DDR0_CAB[2]/DDR0_MA[14]
/DDR0_CAB[3]/DDR0_MA[16]
/DDR0_CAB[4]/DDR0_BA[0]
/DDR0_CAB[5]/DDR0_MA[2]
/DDR0_CAB[6]/DDR0_BA[1]
/DDR0_CAB[7]/DDR0_MA[10]
/DDR0_CAB[8]/DDR0_MA[1]
/DDR0_CAB[9]/DDR0_MA[0]

DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]

IL/NIL

DDR0_CKN[0]

DDR0_CKP[0]

DDR0_CKN[1]

DDR0_CKP[1]

DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]

DDR0_CS#[0]

DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]

DDR0_MA[3]

DDR0_MA[4]

DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]

DDR0_ALERT#

DDR0_PAR

DDR_VREF_CA

DDR0_VREF_DQ
DDR1_VREF_DQ

DDR_VTT_CNTL

5

VCC

Y

AU53
AT53
AU55
AT55

BA56
BB56

M_A_CKE0

AW56

M_A_CKE1

AY56

M_A_CKE2

M_A_CKE3

AU45
AU43
AT45
AT43

BA51
BB54

M_A_A5

BA52

M_A_A9

AY52

M_A_A6

AW52

M_A_A8

AY55

M_A_A7

AW54
BA54

M_A_A12

BA55

M_A_A11

AY54

AU46
AU48

M_A_A13

AT46
AU50
AU52
AY51
AT48

M_A_A2

AT50
BB50

M_A_A10

AY50

M_A_A1

BA50

M_A_A0

BB52

M_A_A3

M_A_A4

AM70
AM69

M_A_DQS#0

AT69

M_A_DQS0

AT70

M_A_DQS#1

BA64

M_A_DQS1

AY64

M_A_DQS#2

AY60

M_A_DQS2

BA60

M_A_DQS#3

BA38

M_A_DQS3

AY38

M_A_DQS#4

AY34

M_A_DQS4

BA34

M_A_DQS#5

BA30

M_A_DQS5

AY30

M_A_DQS#6

AY26

M_A_DQS6

BA26

M_A_DQS#7

M_A_DQS7

AW50
AT52

AY67
AY68
BA67

AW67

DDR_VTT_CTRL

DDR0_Vref_DQ - Not in use in DDR4 ,
DDR1_Vref_DQ = DDR4_CA_ch1 ,
DDR_Vref_CA = DD4_CA_ch0

+1.2V

12

C0402

0.1UF/16V

+3VS

12

M_A_CLK_DDR#0 16
M_A_CLK_DDR0 16
M_A_CLK_DDR#1 16
M_A_CLK_DDR1 16

M_A_CKE0 16

M_A_CKE1 16

1
1

M_A_CS#0 16

M_A_CS#1 16

M_A_ODT0 16

M_A_ODT1 16

M_A_BG0 16

M_A_ACT# 16
M_A_BG1 16

M_A_CAS# 16
M_A_WE# 16
M_A_RAS# 16
M_A_BA0 16

M_A_BA1 16

M_A_ALERT# 16
M_A_PAR 16

SA_DIMM_VREFCA 18

SB_DIMM_VREFCA 18

R0404

200KOhm

T0403
T0402

M_A_DQS[7:0] 16

M_A_DQS#[7:0] 16

DDR_PG_CTRL 86

For SO-DIMM (B)

Main Board

U0301C

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

DRAMRST#

IL/NIL

AF65

DDR1_DQ[0]/DDR0_DQ[16]

AF64

DDR1_DQ[1]/DDR0_DQ[17]

AK65

DDR1_DQ[2]/DDR0_DQ[18]

AK64

DDR1_DQ[3]/DDR0_DQ[19]

AF66

DDR1_DQ[4]/DDR0_DQ[20]

AF67

DDR1_DQ[5]/DDR0_DQ[21]

AK67

DDR1_DQ[6]/DDR0_DQ[22]

AK66

DDR1_DQ[7]/DDR0_DQ[23]

AF70

DDR1_DQ[8]/DDR0_DQ[24]

AF68

DDR1_DQ[9]/DDR0_DQ[25]

AH71

DDR1_DQ[10]/DDR0_DQ[26]

AH68

DDR1_DQ[11]/DDR0_DQ[27]

AF

1

7

DDR1_DQ[12]/DDR0_DQ[28]

AF69

DDR1_DQ[13]/DDR0_DQ[29]

AH70

DDR1_DQ[14]/DDR0_DQ[30]

AH69

DDR1_DQ[15]/DDR0_DQ[31]

AT66

DDR1_DQ[16]/DDR0_DQ[48]

AU66

DDR1_DQ[17]/DDR0_DQ[49]

AP65

DDR1_DQ[18]/DDR0_DQ[50]

AN65

DDR1_DQ[19]/DDR0_DQ[51]

AN66

DDR1_DQ[20]/DDR0_DQ[52]

AP66

DDR1_DQ[21]/DDR0_DQ[53]

AT65

DDR1_DQ[22]/DDR0_DQ[54]

AU65

DDR1_DQ[23]/DDR0_DQ[55]

AT61

DDR1_DQ[24]/DDR0_DQ[56]

AU61

DDR1_DQ[25]/DDR0_DQ[57]

AP60

DDR1_DQ[26]/DDR0_DQ[58]

AN60

DDR1_DQ[27]/DDR0_DQ[59]

AN61

DDR1_DQ[28]/DDR0_DQ[60]

AP61

DDR1_DQ[29]/DDR0_DQ[61]

AT60

DDR1_DQ[30]/DDR0_DQ[62]

AU60

DDR1_DQ[31]/DDR0_DQ[63]

AU40

DDR1_DQ[32]/DDR1_DQ[16]

AT40

DDR1_DQ[33]/DDR1_DQ[17]

AT37

DDR1_DQ[34]/DDR1_DQ[18]

AU37

DDR1_DQ[35]/DDR1_DQ[19]

AR40

DDR1_DQ[36]/DDR1_DQ[20]

AP40

DDR1_DQ[37]/DDR1_DQ[21]

AP37

DDR1_DQ[38]/DDR1_DQ[22]

AR37

DDR1_DQ[39]/DDR1_DQ[23]

AT33

DDR1_DQ[40]/DDR1_DQ[24]

AU33

DDR1_DQ[41]/DDR1_DQ[25]

AU30

DDR1_DQ[42]/DDR1_DQ[26]

AT30

DDR1_DQ[43]/DDR1_DQ[27]

AR33

DDR1_DQ[44]/DDR1_DQ[28]

AP33

DDR1_DQ[45]/DDR1_DQ[29]

AR30

DDR1_DQ[46]/DDR1_DQ[30]

AP30

DDR1_DQ[47]/DDR1_DQ[31]

AU27

DDR1_DQ[48]

AT27

DDR1_DQ[49]

AT25

DDR1_DQ[50]

AU25

DDR1_DQ[51]

AP27

DDR1_DQ[52]

AN27

DDR1_DQ[53]

AN25

DDR1_DQ[54]

AP25

DDR1_DQ[55]

AT22

DDR1_DQ[56]

AU22

DDR1_DQ[57]

AU21

DDR1_DQ[58]

AT21

DDR1_DQ[59]

AN22

DDR1_DQ[60]

AP22

DDR1_DQ[61]

AP21

DD

_DQ[62]

R1

AN21

DDR1_DQ[63]

SKL-ULT

REV=<REV>

SL0401

21

0402

12

C0401
100PF/50V
/EMI

2017/02/06 X542UA_R1.1 #26, EMI solution

GND

AN45

DDR1_CKN[0]

M_B_CLK_DDR#0 17

AN46

DDR1_CKN[1]

M_B_CLK_DDR#1 17

AP45

DDR1_CKP[0]

M_B_CLK_DDR0 17

AP46

DDR1_CKP[1]

M_B_CLK_DDR1 17

AN56

DDR1_CKE[0]

M_B_CKE0 17

AP55

M_B_CKE0

DDR1_CKE[1]

M_B_CKE1 17

1

AN55

T0401

M_B_CKE1

DDR1_CKE[2]

1

AP53

T0404

M_B_CKE2

DDR1_CKE[3]

M_B_CKE3

BB42

DDR1_CS#[0]

M_B_CS#0 17

AY42

DDR1_CS#[1]

M_B_CS#1 17

BA42

DDR1_ODT[0]

M_B_ODT0 17

AW42

DDR1_ODT[1]

DDR1_MA[3]
DDR1_MA[4]

DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]

DDR1_ALERT#

DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]

AY48
AP50

M_B_A5

BA48

M_B_A9

BB48

M_B_A6

AP48

M_B_A8

AP52

M_B_A7

AN50
AN48

M_B_A12

AN53

M_B_A11

AN52

BA43
AY43

M_B_A13

AY44
AW44
BB44
AY47
BA44

M_B_A2

AW46
AY46

M_B_A10

BA46

M_B_A1

BB46

M_B_A0

BA47

M_B_A3

M_B_A4

AH66
AH65

M_B_DQS#0

AG69

M_B_DQS0

AG70

M_B_DQS#1

AR66

M_B_DQS1

AR65

M_B_DQS#2

AR61

M_B_DQS2

AR60

M_B_DQS#3

AT38

M_B_DQS3

AR38

M_B_DQS#4

AT32

M_B_DQS4

AR32

M_B_DQS#5

AR25

M_B_DQS5

AR27

M_B_DQS#6

AR22

M_B_DQS6

AR21

M_B_DQS#7

M_B_DQS7

AN43
AP43
AT13
AR18

DRAMRST#

AT18

SM_RCOMP_0

AU18

SM_RCOMP_1

SM_RCOMP_2

DDR4 COMPENSATION SIGNALS

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

PDG #543016 P.181

BOM

Title :

Size

C

Date: Sheet

Tuesday, June 20, 2017

M_B_BG0 17

M_B_ACT# 17
M_B_BG1 17

M_B_CAS# 17
M_B_WE# 17
M_B_RAS# 17
M_B_BA0 17

M_B_BA1 17

R0403 121Ohm 1%

R0402 80.6Ohm 1%

R0406 100Ohm 1%

CPU_DDR3

Dept.:

NB2_RD1_EE1

M_B_ODT1 17

M_B_ALERT# 17
M_B_PAR 17

12

12

12

M_B_DQS[7:0] 17

M_B_DQS#[7:0] 17

Project Name

M_B_A[13:0] 17

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

4

DDR3L/LPDDR3/DDR4DDR3L/LPDDR3/DDR4

DDR1_MA[5]

/DDR1_CAA[0]/DDR1_MA[5]
/DDR1_CAA[1]/DDR1_MA[9]

DDR1_MA[9]

/DDR1_CAA[2]/DDR1_MA[6]

DDR1_MA[6]

/DDR1_CAA[3]/DDR1_MA[8]

DDR1_MA[8]

/DDR1_CAA[4]/DDR1_MA[7]

DDR1_MA[7]

/DDR1_CAA[5]/DDR1_BG[0]

DDR1_BA[2]

/DDR1_CAA[6]/DDR1_MA[12]

DDR1_MA[12]

/DDR1_CAA[7]/DDR1_MA[11]

DDR1_MA[11]

/DDR1_CAA[8]/DDR1_ACT#

DDR1_MA[15]

/DDR1_CAA[9]/DDR1_BG[1]

DDR1_MA[14]

DDR1_MA[13]

/DDR1_CAB[0]/DDR1_MA[13]

DDR1_CAS#

/DDR1_CAB[1]/DDR1_MA[15]
/DDR1_CAB[2]/DDR1_MA[14]

DDR1_WE#

DDR1_RAS#

/DDR1_CAB[3]/DDR1_MA[16]

DDR1_BA[0]

/DDR1_CAB[4]/DDR1_BA[0]

DDR1_MA[2]

/DDR1_CAB[5]/DDR1_MA[2]

DDR1_BA[1]

/DDR1_CAB[6]/DDR1_BA[1]

DDR1_MA[10]

/DDR1_CAB[7]/DDR1_MA[10]

DDR1_MA[1]

/DDR1_CAB[8]/DDR1_MA[1]

DDR1_MA[0]

/DDR1_CAB[9]/DDR1_MA[0]

IL/NIL

DDR1_DQSN[0]/DDR0_DQSN[2]
DDR1_DQSP[0]/DDR0_DQSP[2]
DDR1_DQSN[1]/DDR0_DQSN[3]
DDR1_DQSP[1]/DDR0_DQSP[3]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]

DDR CH - B

+1.2V

12

R0401

470Ohm
1%

DDR4_DRAMRST# 16,17

EMI

M_B_DQ[63:0]17

M_A_A[13:0] 16

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13

SPI_CLK_SPI_228
SPI_SO_SPI_228

SPI_SI_SPI_228

PCH_SPI_DQ228

PCH_SPI_DQ328

SPI_CS#0_SPI_228

+3VS

+3VSUS

12

R0503 15Ohm

12

R0510 15Ohm

12

R0509 15Ohm

12

R0539 15Ohm

12

R0540 15Ohm

21

SL0501

0402

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

2016/10/20 X542UA_#50, Add SPI for FingerPrint

RC_IN#30

INT_SERIRQ30

R0522 8.2KOhm

12

12

R0519 10KOhm

12

R0508 150KOHM

34

RN0501B

2.2KOhm

12

RN0501A

2.2KOhm

34

RN0502B

2.2KOhm

12

RN0502A

2.2KOhm

SMB_CK_S3 16,17,47

TO DIMM / VGA

SMB_DATA_S3 16,17,47

Main Board

U0301E

SPI - FLASH

AV2

SPI0_CLK

AW3

SPI_CLK_SPI_2_X1

SPI0_MISO

AV3

SPI_SO_SPI_2_X1

SPI0_MOSI

AW2

SPI_SI_SPI_2_X1

SPI0_IO2

AU4

PCH_SPI_DQ2_X1

SPI0_IO3

AU3

PCH_SPI_DQ3_X1

SPI0_CS0#

AU2

SPI_CS#0_SPI_2_X1

SPI0_CS1#

AU1

SPI0_CS2#

SPI - TOUCH

M2

GPP_D1/SPI1_CLK

M3

GPP_D2/SPI1_MISO

J4

GPP_D3/SPI1_MOSI

V1

GPP_D21/SPI1_IO2

V2

GPP_D22/SPI1_IO3

M1

GPP_D0/SPI1_CS#

C LINK

1

G3

T0502

CL_CLK

1

G2

CL_CK

T0501

CL_DATA

1

G1

CL_DATA

T0503

CL_RST#

CL_RST#

AW13

GPP_A0/RCIN#

AY11

GPP_A6/SERIRQ

INT_SERIRQ

SKL-ULT

REV=<REV>

PM_CLKRUN#

INT_SERIRQ

SML1ALERT#

SML1_CK

SML1_DATA

SML0_CK

SML0_DATA

SMBUS, SMLINK

GPP_B23/SML1ALERT#/PCHHOT#

LPC

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

SMB_CK

SMB_DATA

2016/10/27 X542UA_#58, Remove GPP_C2/GPP_C5 & remove R0506/R0507

R7

GPP_C0/SMBCLK

R8

SMB_CK

GPP_C1/SMBDATA

R10

SMB_DATA

GPP_C2/SMBALERT#

R9

GPP_C3/SML0CLK

W2

SML0_CK

GPP_C4/SML0DATA

W1

SML0_DATA

GPP_C5/SML0ALERT#

W3

GPP_C6/SML1CLK

V3

SML1_CK

GPP_C7/SML1DATA

AM7

SML1_DATA
SML1ALERT#

AY13

GPP_A1/LAD0/ESPI_IO0

GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2

GPP_A4/LAD3/ESPI_IO3

GPP_A10/CLKOUT_LPC1

GPP_A8/CLKRUN#

+3VSUS +3VS

RN0503A

2.2KOhm

LPC_AD0 28,30

BA13

LPC_AD1 28,30

BB13

LPC_AD2 28,30

AY12

LPC_AD3 28,30

BA12

LPC_FRAME# 28,30

BA11

T0506

1

2016/10/27 X542UA_R1.0 #53, Remove PCH_SUS_STAT# & reserve test point for measure

PCH_SUS_STAT#

12

AW9

R0512 33Ohm

12

AY9

CLK_KBCPCI_PCH_X1

R0514 22Ohm

AW11

CLK_TPMPCI_PCH_X1

PM_CLKRUN#

+12VS

34

12

RN0503B

2.2KOhm

2

61

Q0501A

EM6K1-G-T2R

5

34

Q0501B

EM6K1-G-T2R

Transport Layer Security (TLS) C onfidentiality

SMB_CK_S3

SMB_DATA_S3

TO DIMM / VGA / TP

CLK_KBCPCI_PCH 30

CLK_DEBUG 28

PM_CLKRUN# 30

RN0504A

2.2KOhm

12

34

RN0504B

2.2KOhm

GPP_C5: weak internal pull down

PU

SPI BUS

LPC is selected for EC (Default)

PD

GPP_C2: weak internal pull down

PU Enable

Disable Intel ME TLS ipher suite
( no confodentiality)(Default)

PD

BOM

Project Name

Title :

CPU_LPC,SPI,SMB,CLINK

Size

Dept.:

NB2_RD1_EE1

Custom

Date: Sheet

Tuesday, June 20, 2017

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

5

+VCCCORE +VCCCORE

U0301L

CPU POWER 1 OF 4

A30

G32

VCC_A30

VCC_G32

A34

G33

VCC_A34

VCC_G33

A39

G35

VCC_A39

VCC_G35

A44

G37

VCC_A44

VCC_G37

AK33

G38

VCC_AK33

VCC_G38

AK35

G40

VCC_AK35

VCC_G40

AK37

G42

VCC_AK37

VCC_G42

AK38

J30

VCC_AK38

VCC_J30

AK40

J33

VCC_AK40

VCC_J33

AL33

J37

VCC_AL33

VCC_J37

AL37

J40

VCC_AL37

VCC_J40

AL40

K33

VCC_AL40

VCC_K33

AM32

K35

VCC_AM32

VCC_K35

AM33

K37

VCC_AM33

VCC_K37

AM35

K38

VCC_AM35

VCC_K38

AM37

K40

VCC_AM37

VCC_K40

AM38

K42

VCC_AM38

VCC_K42

G30

K43

VCC_G30

VCC_K43

K32

E32

RSVD_K32

VCC_SENSE

E33

VSS_SENSE

AK32

RSVD_AK32

B63

VIDALERT#

AB62

A63

VCCOPC_AB62

VIDSCK

P62

D64

VIDSOUT

VCCOPC_P62

V62

VCCOPC_V62

G2

STG_G20

VCC

H63

VCC_OPC_1P8_H63

G61

VCC_OPC_1P8_G61

REV=<REV>

AC63

VCCOPC_SENSE

AE63

VSSOPC_SENSE

AE62

VCCEOPIO_1

AG62

VCCEOPIO_2

AL63

VCCEOPIO_SENSE

AJ62

VSSEOPIO_SENSE

SKL-ULT

CPU W/OPC

+VCCIO +VCCSTG

21

SL0630

0.04A

0603

Volume Segment
+VCCIO is supplied +1.0VS (shared with +VCCSTG)

+1.0V_VCCST

R1.0-3

R0606

SVID DATA

100Ohm

1%

12

21

SL0609

P_SVID_DATA_50OHM_X2 80

0402

P_SVID_DATA_X3

20151230 LAUOYUT 此3組訊號請將 SVID ALERT 擺中間

+1.0V_VCCST

R0605

SVID ALERT

0

P_SVID_ALERT#_X3
P_SVID_CLK_X3
P_SVID_DATA_X3

P_VCCCORE_VCCSENSE_50OHM 80
P_VCCCORE_VSSSENSE_50OHM 80

+VCCSTG

56Ohm

12

12R0604 220Ohm

P_SVID_ALERT#_X3 U42_CORE_1_U22_GTx

P_SVID_CLK_X3

P_SVID_ALERT#_50OHM_X2 8 0

SVID CLOCK

21

SL0617

P_SVID_CLK_50OHM_X2 80

0402

2016/10/07 X542UA_R1.0 #27, Add R0601/R0602/R0607/R0608 for U42 & U22 Option

2016/10/17 X542UA_R1.0 #47, Modify R0602/R0607/R0608 from 0603 to 0805 for intel suggestion

2017/03/16 X542UA_R2.0 #01, JP0601/02/03/04 change to RSE R0607/08/09/10 (special RES)

KBL-R U42 & U22 co-lay, 在CPU 下方

+VCCGT

1 pin

/U22

12R0607 0Ohm

RES 0 OHM 1/2W(0805) JUMPER

U42_RSVD_U22_GT

10114-00193000

/U22

12

R0608 0Ohm

RES 0 OHM 1/2W(0805) JUMPER

10114-00193000

10 pin

+VCCCORE

U42_CORE_2_U22_GT

/U42

12

R0609 0Ohm

RES 0 OHM 1/2W(0805) JUMPER

10114-00193000

12 pin

/U42

12

R0610 0Ohm

RES 0 OHM 1/2W(0805) JUMPER

U42_CORE_1_U22_GTx

10114-00193000

5A

5A

JP鋼板測試, 共20顆 PR remove

+VCCGT +VCCGT +1.2V

U0301M

CPU POWER 2 OF 4

N70

VCCGT56

A48

N71

VCCGT1

VCCGT57

A53

U42_CORE_2_U22_GT
U42_CORE_2_U22_GT

U42_CORE_2_U22_GT
U42_CORE_2_U22_GT
U42_CORE_2_U22_GT
U42_CORE_2_U22_GT
U42_CORE_2_U22_GT
U42_CORE_2_U22_GT

U42_CORE_2_U22_GT
U42_CORE_2_U22_GT
U42_RSVD_U22_GT

P_VCCGT_VCCSENSE_50OHM80

P_VCCGT_VSSSENSE_50OHM80

2016/12/05 X542UA_R1.0 #96,VCORE sense & VCCGT sense modify

CPU - VCCGT DECAPS- Underneath the package

+VCCGT

31A 2+2

12

12

12

R63

VCCGT2

VCCGT58

A58

R64

VCCGT3

VCCGT59

A62

R65

VCCGT4

VCCGT60

A66

R66

VCCGT5

VCCGT61

AA63

R67

VCCGT6

VCCGT62

AA64

R68

VCCGT7

VCCGT63

AA66

R69

VCCGT8

VCCGT64

AA67

R70

VCCGT9

VCCGT65

AA69

R71

VCCGT10

VCCGT66

AA70

T62

VCCGT11

VCCGT67

AA71

U65

VCCGT12

VCCGT68

AC64

U68

VCCGT13

VCCGT69

AC65

U71

VCCGT14

VCCGT70

AC66

W63

VCCGT15

VCCGT71

AC67

W64

VCCGT16

VCCGT72

AC68

W65

VCCGT17

VCCGT73

AC69

W66

VCCGT18

VCCGT74

AC70

W67

VCCGT19

VCCGT75

AC71

W68

VCCGT20

VCCGT76

J43

W69

VCCGT21

VCCGT77

J45

W70

VCCGT22

VCCGT78

J46

W71

VCCGT23

VCCGT79

J48

Y62

VCCGT24

VCCGT80

J50

VCCGT25

J52

VCCGT26

J53

AK42

VCCGT27

VCCGTX_AK42

J55

AK43

VCCGT28

VCCGTX_AK43

J56

AK45

U42_CORE_1_U22_GTx

VCCGT29

VCCGTX_AK45

J58

AK46

U42_CORE_1_U22_GTx

VCCGT30

VCCGTX_AK46

REV=<REV>

J60

AK48

U42_CORE_1_U22_GTx

VCCGT31

VCCGTX_AK48

K48

AK50

U42_CORE_1_U22_GTx

VCCGT32

VCCGTX_AK50

K50

AK52

U42_CORE_1_U22_GTx

U42_RSVD_U22_GTx, U42 & U22 無使用

VCCGT33

VCCGTX_AK52

K52

AK53

VCCGT34

VCCGTX_AK53

K53

AK55

VCCGT35

VCCGTX_AK55

K55

AK56

VCCGT36

VCCGTX_AK56

K56

AK58

VCCGT37

VCCGTX_AK58

K58

AK60

VCCGT38

VCCGTX_AK60

K60

AK70

VCCGT39

VCCGTX_AK70

L62

AL43

VCCGT40

VCCGTX_AL43

L63

AL46

U42_CORE_1_U22_GTx

VCCGT41

VCCGTX_AL46

L64

AL50

U42_CORE_1_U22_GTx

VCCGT42

VCCGTX_AL50

L65

AL53

U42_CORE_1_U22_GTx

VCCGT43

VCCGTX_AL53

L66

AL56

VCCGT44

VCCGTX_AL56

L67

AL60

VCCGT45

VCCGTX_AL60

L68

AM48

VCCGT46

VCCGTX_AM48

AM50

L69

U42_CORE_1_U22_GTx

V

VCCGT47

CCGTX_AM50

L70

AM52

U42_CORE_1_U22_GTx

VCCGT48

VCCGTX_AM52

L71

AM53

U42_CORE_1_U22_GTx

VCCGT49

VCCGTX_AM53

M62

AM56

VCCGT50

VCCGTX_AM56

N63

AM58

VCCGT51

VCCGTX_AM58

N6

4

AU58

VCCGT52

VCCGTX_AU58

N66

AU63

VCCGT53

VCCGTX_AU63

N67

BB57

VCCGT54

VCCGTX_BB57

N69

BB66

VCCGT55

VCCGTX_BB66

J70

AK62

VCCGT_SENSE

VCCGTX_SENSE

AL61

J69

VSSGTX_SENSE

VSSGT_SENSE

SKL-ULT

12

12

12

12

C0601

10UF/6.3V

12

C0628
1UF/6.3V

@

12

C0640

1UF/6.3V

12

12

12

12

C0608

C0610

C0611

C0604

C0620

C0609

C0607

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

@

@

@

C0629
1UF/6.3V

@

C0613

1UF/6.3V

@

@

@

@

12

12

12

12

12

12

C0630

C0632

C0652

C0631

C0643

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

@

@

@

@

@

12

12

C0656

C0667

1UF/6.3V

1UF/6.3V

2017/01/23 X542UA_R1.1 #19, VccSA Caps modify in list

21

+VDDQ_CPU_CLK

12R0633 0Ohm

@

12

C0615

10UF/6.3V

+1.0V_VCCST

+VCCSTG

+VCCPLL_OC

+1.0V_VCCPLL

12

C0663

1UF/6.3V

+VCCSA

+VCCSA

Simulation team suggestio n
For X542U

+VCCSA

U0301N

CPU POWER 3 OF 4

AU23

VDDQ_AU23

AU28

VDDQ_AU28

AU35

VDDQ_AU35

AU42

VDDQ_AU42

BB23

VDDQ_BB23

BB32

VDDQ_BB32

BB41

VDDQ_BB41

BB47

VDDQ_BB47

BB51

VDDQ_BB51

AM40

VDDQC

+VDDQ_CPU_CLK

A18

VCCST

A22

VCCSTG_A22

AL23

VCCPLL_OC

K20

VCCPLL_K20

K21

VCCPLL_K21

SKL-ULT

REV=<REV>

+1.2V

CPU - VDDQ DECAPS- Place close to the package

2A

12

C0662

10UF/6.3V

+VCCST

+1.0V_VCCST

21

SL0634

120mA 120mA

0603

12

C0616
1UF/6.3V

+VCCIO_CPU+VCCIO

CPU - VCCIO DECAPS- Place close to the package

21

SL0601

3.1A

0805

12

C0619

21SL0603

0805

1UF/6.3V

CPU - VCCSA DECAPS- Underneath the package

5.1A

CPU - VCCSA DECAPS- Place close to the package

12

C0639
22UF/6.3V

nbs_c0805_h57_000s

5.1A

@

12

12

C0627

C0624

C0612

4.7UF/6.3V

1UF/6.3V

10UF/6.3V

12

nbs_c0603_h37_000s

nbs_c0603_h37_000s

@

12

12

12

C0633

C0641

C0661

C0625

1UF/6.3V

1UF/6.3V

4.7UF/6.3V

2.2UF/10V

12

nbs_c0603_h37_000s

AK28

VCCIO1

AK30

VCCIO2

AL30

VCCIO3

AL42

VCCIO4

AM28

VCCIO5

AM30

VCCIO6

AM42

+VCCSA

VCCIO7

AK23

VCCSA1

AK25

VCCSA2

G23

VCCSA3

G25

VCCSA4

G27

VCCSA5

G28

VCCSA6

J22

VCCSA7

J23

VCCSA8

J27

VCCSA9

K23

VCCSA10

K25

VCCSA11

K27

VCCSA12

K28

VCCSA13

K30

VCCSA14

AM23

VCCIO_SENSE

AM22

VSSIO_SENSE

H21

VSSSA_SENSE

P_VCCSA_VSSSENSE_50O HM 80

H20

VCCSA_SENSE

P_VCCSA_VCCSENSE_50O HM 80

12

12

12

12

12

C0618

10UF/6.3V

12

C0605
1UF/6.3V

@

12

C0635

10UF/6.3V

nbs_c0603_h37_000s

C0634

4.7UF/6.3V

12

nbs_c0603_h37_000s

@
C0665

4.7UF/6.3V

12

nbs_c0603_h37_000s

12

@

@

@

C0614

C0606

C0658

C0603

C0648

22UF/6.3V

22UF/6.3V

22UF/6.3V

10UF/6.3V

10UF/6.3V

nbs_c0603_h39_000s

nbs_c0603_h39_000s

nbs_c0603_h39_000s

+1.0V_VCCPLL+VCCST

21

SL0602

0603

12

C0602
1UF/6.3V

12

12

C0621

C0622

1UF/6.3V

1UF/6.3V

12

12

12

C0655

C0637

C0657

0.47UF/6.3V

1UF/6.3V

1UF/6.3V

@

@

@

C0642

C0645

C0644

4.7UF/6.3V

4.7UF/6.3V

4.7UF/6.3V

12

12

12

nbs_c0603_h37_000s

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C0670

C0671

C0669

1UF/6.3V

0.47UF/6.3V

4.7UF/6.3V

12

nbs_c0603_h37_000s

BOM

Project Name

Rev

R2.0X542UA/UV

Title :

CPU_POEWR

Size

Dept.:

Engineer:

NB2_RD1_EE1

Joach_Wang

D

Date: Sheet of

102

6

Tuesday, June 20, 2017

+1.2V

SL0610

0603

+1.2V

nbs_r0603_h24_000s

12

12

12

C0626

C0659

C0617

C0660

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

@

@

12

12

12

C0638

C0636

C0666

C0654

1UF/6.3V

1UF/6.3V

1UF/6.3V

@

1UF/6.3V

@

+VCCIO_CPU

+1.0V_VCCST

12

R0802 1KOhm1%

CPU SIDEBAND SIGNALS

H_PROCHOT_D#

PECI_EC30

T0803
T0804

R0813

49.9Ohm

1%

12

R0808

12

499OHM

1

T0801

1

1

R0812

49.9Ohm

1%

12

H_CATERR#
PECI_EC

H_PROCHOT_D#

THERMTRIP#

XDP_BPM2

XDP_BPM3

R0811

49.9Ohm

1%

12

+VCCSTG

12

R0809
1KOhm

H_PROCHOT_D#_R

12

C0801

43PF/50V

D63

A54

C65

C63
A65

C55
D55

B54

C56

BA5

AY5

AT16
AU16

H66

H65

R0810

49.9Ohm

1%

12

@

U0301D

CATERR#

PECI
PROCHOT#

THERMTRIP#

SKTOCC#

CPU MISC

BPM#[0]

BPM#[1]
BPM#[2]

BPM#[3]

A6

GPP_E3/CPU_GP0

A7

GPP_E7/CPU_GP1

GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

PROC_POPIRCOMP

PCH_OPIRCOMP
OPCE_RCOMP

OPC_RCOMP

SKL-ULT

REV=<REV>

20150108
Checking
SL0801~0803 near device side

21

0402

21

0402

21

0402

SL0802

SL0801

SL0803

JTAG

OD

THRO_CPU# 30

IMVP8_VRHOT# 80

PWRLIMIT#_CPU 89

B61

PROC_TCK

D60

XDP_TCLK_CPU

PROC_TDI

A61

XDP_TDI_CPU

PROC_TDO

C60

XDP_TDO_CPU

PROC_TMS

B59

XDP_TMS_CPU

PROC_TRST#

XDP_TRST_CPU#

B56

PCH_JTAG_TCK

D59

PCH_JTAG_TCK

PCH_JTAG_TDI

A56

PCH_JTAG_TDI

PCH_JTAG_TDO

C59

PCH_JTAG_TDO

PCH_JTAG_TMS

C61

PCH_JTAG_TMS

PCH_TRST#

A59

PCH_TRST#

JTAGX

XDP_TCK_JTAGX

20160218 X541UV
R0803,R0804,R0805,R0807,R0 814,R0820,R0806 unstuff

XDP_TDI_CPU PCH_JTAG_TDI

XDP_TDO_CPU PCH_JTAG_T DO

XDP_TMS_CPU PCH_JTAG_TMS

XDP_TRST_CPU# PCH_TRST#

1

T0802

@

12

R0803 0Ohm

12

R0804 0Ohm@

12

R0805 0Ohm@

12

R0807 0Ohm@

12

R0814 0Ohm@

R0820 51Ohm

XDP_TDO_CPUXDP_TCLK_CPU XDP_TCK_JTAGX

R0806 51Ohm

XDP_TCLK_CPU

BOM

Title :

Size

Dept.:

B

Date: Sheet

Tuesday, June 20, 2017

@

12

@

12

CPU_MISC,JTAG,CLK

NB2_RD1_EE1

Main Board

+VCCSTG

Project Name

Engineer:

Joach_Wang

8

Rev

R2.0X542UA/UV

102

of

CFG STRAPS

CFG4

CFG0

CFG4

R0902

49.9Ohm
1%

12

12

R0901 1KOhm

U0301S

E68

CFG[0]

B67

CFG[1]

D65

CFG[2]

D67

CFG[3]

E70

CFG[4]

C68

CFG4

CFG[5]

D68

CFG[6]

C67

CFG[7]

F71

CFG[8]

G69

CFG[9]

F70

CFG[10]

G68

CFG[11]

REV=<REV>

H70

CFG[12]

G71

CFG[13]

H69

CFG[14]

G70

CFG[15]

E63

CFG[16]

F63

CFG[17]

E66

CFG[18]

F66

CFG[19]

E60

CFG_RCOMP

E8

ITP_PMODE

AY2

RSVD_AY2

AY1

RSVD_AY1

D1

RSVD_D1

D3

RSVD_D3

K46

RSVD_K46

K45

RSVD_K45

AL25

RSVD_AL25

AL27

RSVD_AL27

C71

RSVD_C71

B70

RSVD_B70

F60

RSVD_F60

A52

RSVD_A52

BA70

RSVD_TP_BA70

BA68

RSVD_TP_BA68

J71

RSVD_J71

J68

RSVD_J68

F65

VSS_F65

G65

VSS_G65

F61

RSVD_F61

E61

RSVD_E61

SKL-ULT

01 NOTE

RESERVED SIGNALS-1

STALL RESET SEQUENCE
AFTER PCU PLL LOCK
UNTIL DE-ASSERTEDNO STALL STALL

eDP ENABLEDISABLE ENABLE

RSVD_TP_BB68
RSVD_TP_BB69

RSVD_TP_AK13
RSVD_TP_AK12

RSVD_TP_AW71
RSVD_TP_AW70

PROC_SELECT#

F6
E3
C11
B11
A11
D12
C12
F52

X0901
24Mhz

4

2

CPU_CFG,RSVD

Dept.:

NB2_RD1_EE1

Main Board

XTAL24_IN_U42

C0903

/U42

12

27PF/50V

C0904

/U42

12

27PF/50V

GND

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

9

U0301T

SPARE

BB68
BB69

AK13
AK12

BB2

RSVD_BB2

BA3

RSVD_BA3

AU5

TP5

AT5

TP6

D5

RSVD_D5

D4

RSVD_D4

B2

RSVD_B2

C2

RSVD_C2

B3

RSVD_B3

A3

RSVD_A3

AW1

RSVD_AW1

E1

RSVD_E1

E2

RSVD_E2

BA4

RSVD_BA4

BB4

RSVD_BB4

A4

RSVD_A4

C4

RSVD_C4

BB5

TP4

A69

RSVD_A69

B69

RSVD_B69

AY3

RSVD_AY3

D71

RSVD_D71

C70

RSVD_C70

C54

RSVD_C54

D54

RSVD_D54

AY4

TP1

BB3

TP2

AY71

VSS_AY71

AR56

ZVM#

AW71
AW70

AP56

R0905

@

MSM#

C64

+1.0V_VCCST

12

100KOhm

AW69
AW68
AU56
AW48

C7

U12

XTAL24_OUT_U42

U11
H11

12

12

C0901

C0902

1UF/6.3V

1UF/6.3V

@

@

2016/10/05 X542UA_R1.0 #01, Add 24MHz parts for KBL-R U42

XTAL 24MHz

XTAL24_IN_U42

XTAL24_OUT_U42

2nd source:

0402

SL0901

07009-00062000 (未測)
07009-00063200 (未測)

21

0402

SL0902

21

RSVD_AW69
RSVD_AW68
RSVD_AU56
RSVD_AW48
RSVD_C7
RSVD_U12
RSVD_U11
RSVD_H11

REV=<REV>

SKL-ULT

12

R0903

1MOhm

/U42

/U42

07009-00063100

BOM

Title :

Date: Sheet of

RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52

13

Size

Custom

Tuesday, June 20, 2017

CPU - VCC DECAPS- Underneath the package

+VCCCORE

28A 2+2

CAP above 22UF move to PWR page

12

12

C1030

C1028

C1031

1UF/6.3V

1UF/6.3V

2.2UF/10V

@

CAP above 22UF move to PWR page

12

12

CPU - VCC DECAPS- Place close to the package

+VCCCORE

Simulation team suggestion
For X542U

+VCCCORE

5.1A

12

12

12

nbs_c0603_h37_000s

12

nbs_c0603_h37_000s

12

C1058

C1059

C1060

C1069

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

nbs_c0603_h37_000s

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C1073

C1074

C1071

10UF/6.3V

10UF/6.3V

10UF/6.3V

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C1037

C1038

2.2UF/10V

2.2UF/10V

BOM

Project Name

Rev

Title :

CPU_POWER_CAP

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

10

12

C1057

10UF/6.3V

nbs_c0603_h37_000s

12

C1070

10UF/6.3V

nbs_c0603_h37_000s

12

C1036

C1034

1UF/6.3V

2.2UF/10V

@

2017/01/23 X542UA_R1.1 #20, VCCCORE Caps modify in list

<Variant Name>

Project Name

Title :

DDR4_TERMINATION_A

Size

Dept.:

C

Date: Sheet

Tuesday, June 20, 2017

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

13

2016/11/23 X542UA_#86, Add SO-DIMM (ChA), remove P13, P14 & P15 DRAM

+1.2V

M_A_WE#4
M_A_CAS#4
M_A_RAS#4

R1605

M_A_ACT#4

M_A_VREFCA

240Ohm

12

M_A_PAR4

M_A_ALERT#4

DDR4_DRAMRST#4,17

12

12

C1617

C1612

SMB_DATA_S35,17,47

0.1UF/10V

2.2UF/10V
SMB_CK_S35,17,47

GND GND

Place close to SO-DIMM

J1601A

137

M_A_CLK_DDR04

CK0_T

139

M_A_CLK_DDR#04

CK0_C

138

M_A_CLK_DDR14

CK1_T

140

M_A_CLK_DDR#14

CK1_C

109

M_A_CKE04

CKE0

110

M_A_CKE14

CKE1

149

M_A_CS#04

S0*

157

M_A_CS#14

S1*

155

M_A_ODT04

ODT0

161

M_A_ODT14

ODT1

115

M_A_BG04

BG0

113

M_A_BG14

BG1

150

M_A_BA04

BA0

145

M_A_BA14

BA1

M_A_A[13:0]4

144

A0

133

M_A_A0

A1

132

M_A_A1

A2

131

M_A_A2

A3

128

M_A_A3

A4

126

M_A_A4

A5

127

M_A_A5

A6

122

M_A_A6

A7

125

M_A_A7

A8

121

M_A_A8

A9

146

M_A_A9

A10_AP

120

M_A_A10

A11

119

M_A_A11

A12

158

M_A_A12

A13

151

M_A_A13

A14_WE*

156

A15_CAS*

152

A16_RAS*

114

ACT*

143

PARITY

116

ALERT*

134

EVENT*

108

M_A_DIMM0_EVENT#

RESET*

164

VREFCA

254

SDA

253

SCL

166

SA2

260

M_A_DIMM0_SA2

SA1

256

M_A_DIMM0_SA1

SA0

M_A_DIMM0_SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

+1.2V

12

DM0*/DBI0*

33

D

M1*/DBI1*

54

DM2*/DBI2*

75

DM3*/DBI3*

178

DM4*/DBI4*

199

DM5*/DBI5*

220

DM6*/DBI6*

241

DM7*/DBI7*

96

DM8*/DBI8*

For ECC

162

1

T1601

S2*/C0

165

1

T1602

M_A_DIMM0_S2

S3*/C1

M_A_DIMM0_S3

DDR4_DIMM_260P

12002-00083500

2nd source:
12002-00082100
12002-00082000

'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
NON-ECC DIMM: NOT CONNECTED

EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH

2016/12/05 X542UA_R1.0 #98, DDR SWAP

2016/12/07 X542UA_R1.0 #A3, DDR SWAP

M_A_DQ[63:0] 4

SWAP

8

DQ0

7

M_A_DQ0

DQ1

20

M_A_DQ1

DQ2

21

M_A_DQ2

D0

DQ3

4

M_A_DQ3

DQ4

3

M_A_DQ5

DQ5

16

M_A_DQ4

DQ6

17

M_A_DQ6

DQ7

28

M_A_DQ7

DQ8

29

M_A_DQ12

DQ9

41

M_A_DQ8

DQ10

42

M_A_DQ10

D1

DQ11

24

M_A_DQ14

DQ12

25

M_A_DQ13

DQ13

38

M_A_DQ9

DQ14

37

M_A_DQ11

DQ15

50

M_A_DQ15

DQ16

49

M_A_DQ17

DQ17

62

M_A_DQ21

DQ18

63

M_A_DQ16

D2

DQ19

46

M_A_DQ23

DQ20

45

M_A_DQ18

DQ21

58

M_A_DQ20

DQ22

59

M_A_DQ19

DQ23

70

M_A_DQ22

DQ24

71

M_A_DQ28

DQ25

83

M_A_DQ29

DQ26

84

M_A_DQ31

D3

DQ27

66

M_A_DQ25

DQ28

67

M_A_DQ24

DQ29

79

M_A_DQ27

DQ30

80

M_A_DQ30

DQ31

174

M_A_DQ26

DQ32

173

M_A_DQ35

DQ33

187

M_A_DQ37

DQ34

186

M_A_DQ38

D4

DQ35

170

M_A_DQ34

DQ36

169

M_A_DQ32

DQ37

183

M_A_DQ36

DQ38

182

M_A_DQ39

DQ39

195

M_A_DQ33

DQ

4

0

194

M_A_DQ56

DQ41

207

M_A_DQ60

DQ42

208

M_A_DQ63

D7

DQ43

191

M_A_DQ62

DQ44

190

M_A_DQ61

DQ45

203

M_A_DQ57

DQ46

204

M_A_DQ58

DQ47

216

M_A_DQ59

DQ48

215

M_A_DQ44

DQ49

228

M_A_DQ45

DQ50

229

M_A_DQ47

D5

DQ51

211

M_A_DQ46

DQ52

212

M_A_DQ41

DQ53

224

M_A_DQ40

DQ54

225

M_A_DQ42

DQ55

237

M_A_DQ43

DQ56

236

M_A_DQ52

DQ57

249

M_A_DQ48

DQ58

250

M_A_DQ51

D6

DQ59

232

M_A_DQ55

DQ60

233

M_A_DQ53

DQ61

245

M_A_DQ49

DQ62

246

M_A_DQ54

DQ63

M_A_DQ50

M_A_DQS[7:0] 4

13

DQS0_T

34

M_A_DQS0

DQS1_T

55

M_A_DQS1

20161207 swap

DQS2_T

76

M_A_DQS2

DQS3_T

179

M_A_DQS3

DQS4_T

200

M_A_DQS4

DQS5_T

221

M_A_DQS7

DQS6_T

242

M_A_DQS5

DQS7_T

97

M_A_DQS6

DQS8_T

M_A_DQS#[7:0] 4

11

DQS0_C

32

M_A_DQS#0

DQS1_C

53

M_A_DQS#1

20161207 swap

DQS2_C

74

M_A_DQS#2

DQS3_C

177

M_A_DQS#3

DQS4_C

198

M_A_DQS#4

DQS5_C

219

M_A_DQS#7

DQS6_C

240

M_A_DQS#5

DQS7_C

95

M_A_DQS#6

DQS8_C

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161207 swap

20161207 swap

20161207 swap

J1601B

163

VDD19

160

VDD18

159

VDD17

154

VDD16

153

VDD15

148

VDD14

147

VDD13

142

VDD12

141

VDD11

136

VDD10

135

VDD9

130

VDD8

129

VDD7

124

VDD6

123

VDD5

118

VDD4

117

VDD3

112

VDD2

111

VDD1

251

VSS1

247

VSS2

243

VSS3

239

VSS4

235

VSS5

231

VSS6

227

VSS7

223

VSS8

217

VSS9

213

VSS10

209

VSS11

205

VSS12

201

VSS13

197

VSS14

193

VSS15

189

VSS16

185

VSS17

181

VSS18

175

VSS19

171

VSS20

167

VSS21

107

VSS22

103

VSS23

99

VSS24

93

VSS25

89

VSS26

85

VSS27

81

VSS28

77

VSS29

73

VSS30

69

VSS31

65

VSS32

61

V

57

VSS34

51

VSS35

47

VSS36

43

VSS37

39

VSS38

35

VSS39

31

VSS40

27

VSS41

23

VSS42

19

VSS43

15

VSS44

9

VSS45

5

VSS46

1

VSS47

DDR4_DIMM_260P

GND GND

+2.5V+1.2V

+3VS

+VTT

258

VTT

259

VPP2

257

VPP1

SL1604

255

21

VDDSPD

NP_NC1
NP_NC2

MT1
MT2

VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VS

7

S7
VSS78
VSS79
VSS80

3

SS3

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

12

12

C1628

C1627

0.1UF/10V

2.2UF/10V

GND GND

263
264

261
262

252
248
244
238
234
230
226
222
218
214
210
206
202
196
192
188
184
180
176
172
168
106
102
98
94
90
86
82
78
72
68
64
60
56
52
48
44
40
36
30
26
22
18
14
10
6
2

+VTT

nbs_c0603_h37_000s

12

12

C1603
10UF/6.3V

10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VTT Pin)

+1.2V

12

+

CE1601
330UF/2V

11020-0035Z000

@

GND

12

C1606

10UF/6.3V

nbs_c0603_h37_000s

12

C1616

0.1UF/16V
/EMI

2017/02/06 X542UA_R1.1 #26, EMI solution

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

2017/03/16 X542UA_R2.0 #03, Modify SA0 to pull down

@

12

21

0402

Place close to SO-DIMM

GND GND GN D

12

C1622

C1619

0.1UF/16V
/EMI

@

GND GNDGNDGND GNDGNDGND

Place close to SO-DIMM Socket (VDD Pin)

12

12

C1618
10UF/6.3V

@

GNDGNDGND GND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C1605

0.1UF/16V
/EMI

GNDGNDGND GND GNDGNDGNDGND

+3VS+3VS+3VS

R1602

R1601

R1609

@

@

0Ohm

0Ohm

0Ohm

12

12

M_A_DIMM0_SA2
M_A_DIMM0_SA1
M_A_DIMM0_SA0

21

21

SL1601

SL1602

SL1603

0402

0402

WRITE ADDRESS: 0X

+2.5V

nbs_c0603_h37_000s

12

12

C1608
10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VPP Pin)

2017/02/06 X542UA_R1.1 #26, EMI solution2017/02/06 X542UA_R1.1 #26, EMI solution

12

12

C1626

C1613

C1614

10UF/6.3V

10UF/6.3V

10UF/6.3V

@

GND

GND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

12

C1621

0.1UF/16V

C1625

C1611

/EMI

1UF/6.3V

1UF/6.3V

BOM

Title :

DDR3_ON-BOARD_B_L32

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet of

Tuesday, June 20, 2017

12

12

C1615

C1607

0.1UF/16V

C1604

0.1UF/16V
/EMI

10UF/6.3V

/EMI

@

12

12

12

C1610

C1620

C1602

10UF/6.3V

10UF/6.3V

10UF/6.3V

/EMI

@

GNDGND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C1624

0.1UF/16V

C1609

C1623

/EMI

1UF/6.3V

1UF/6.3V

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

16

2016/11/16 X542UA_#78, Remove R1709

M_B_VREFCA

12

C1704

0.1UF/10V

GND GND

Place close to SO-DIMM

(3895.00 3358.00)

EMI

DDR4_DRAMRST#

+1.2V

R1707

240Ohm

12

12

C1701

2.2UF/10V

12

C1730
100PF/50V
/EMI

2017/02/06 X542UA_R1.1 #26, EMI solution

GND

M_B_WE#4
M_B_CAS#4
M_B_RAS#4

M_B_ACT#4

M_B_PAR4

M_B_ALERT#4

DDR4_DRAMRST#4,16

SMB_DATA_S35,16,47
SMB_CK_S35,16,47

J1701A

137

M_B_CLK_DDR04

CK0_T

139

M_B_CLK_DDR#04

CK0_C

138

M_B_CLK_DDR14

CK1_T

140

M_B_CLK_DDR#14

CK1_C

109

M_B_CKE04

CKE0

110

M_B_CKE14

CKE1

149

M_B_CS#04

S0*

157

M_B_CS#14

S1*

155

M_B_ODT04

ODT0

161

M_B_ODT14

ODT1

115

M_B_BG04

BG0

113

M_B_BG14

BG1

150

M_B_BA04

BA0

145

M_B_BA14

BA1

M_B_A[13:0]4

144

A0

133

M_B_A0

A1

132

M_B_A1

A2

131

M_B_A2

A3

128

M_B_A3

A4

126

M_B_A4

A5

127

M_B_A5

A6

122

M_B_A6

A7

125

M_B_A7

A8

121

M_B_A8

A9

146

M_B_A9

A10_AP

120

M_B_A10

A11

119

M_B_A11

A12

158

M_B_A12

A13

151

M_B_A13

A14_WE*

156

A15_CAS*

152

A16_RAS*

114

ACT*

143

PARITY

116

ALERT*

134

EVENT*

108

M_B_DIMM0_EVENT#

RESET*

164

VREFCA

254

SDA

253

SCL

166

SA2

260

M_B_DIMM0_SA2

SA1

256

M_B_DIMM0_SA1

SA0

M_B_DIMM0_SA0

92

CB0_NC

91

CB1_NC

101

CB2_NC

105

CB3_NC

88

CB4_NC

87

CB5_NC

100

CB6_NC

104

CB7_NC

+1.2V

12

DM0*/DBI0*

33

D

1*

/DBI1*

M

54

DM2*/DBI2*

75

DM3*/DBI3*

178

DM4*/DBI4*

199

DM5*/DBI5*

220

DM6*/DBI6*

241

DM7*/DBI7*

96

DM8*/DBI8*

For ECC

162

1

T1702

S2*/C0

165

1

T1701

M_B_DIMM0_S2

S3*/C1

M_B_DIMM0_S3

DDR4_DIMM_260P

'EVENT_N': INDICATES THERMAL EVENT ON DIMM.
NON-ECC DIMM: NOT CONNECTED

EVENT# ON ECC DIMM: KEEP A PULL UP IF NO PIN IN PCH

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0_T
DQS1_T
DQS2_T
DQS3_T
DQS4_T
DQS5_T
DQS6_T
DQS7_T
DQS8_T

DQS0_C
DQS1_C
DQS2_C
DQS3_C
DQS4_C
DQS5_C
DQS6_C
DQS7_C
DQS8_C

8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195

40

194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246

13
34
55
76
179
200
221
242
97

11
32
53
74
177
198
219
240
95

2016/12/05 X542UA_R1.0 #99, DDR SWAP

SWAP

M_B_DQ10
M_B_DQ12
M_B_DQ13
M_B_DQ11
M_B_DQ15
M_B_DQ8
M_B_DQ9
M_B_DQ14

M_B_DQ1
M_B_DQ5
M_B_DQ7
M_B_DQ2
M_B_DQ0
M_B_DQ4
M_B_DQ3
M_B_DQ6

M_B_DQ21
M_B_DQ20
M_B_DQ18
M_B_DQ22
M_B_DQ16
M_B_DQ17
M_B_DQ19
M_B_DQ23

M_B_DQ30
M_B_DQ24
M_B_DQ26
M_B_DQ27
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ28

M_B_DQ37
M_B_DQ36
M_B_DQ39
M_B_DQ35
M_B_DQ33
M_B_DQ32
M_B_DQ34
M_B_DQ38

M_B_DQ44
M_B_DQ40
M_B_DQ42
M_B_DQ46
M_B_DQ45
M_B_DQ41
M_B_DQ43
M_B_DQ47

M_B_DQ49
M_B_DQ52
M_B_DQ50
M_B_DQ48
M_B_DQ54
M_B_DQ53
M_B_DQ55
M_B_DQ51

M_B_DQ56
M_B_DQ58
M_B_DQ60
M_B_DQ63
M_B_DQ59
M_B_DQ57
M_B_DQ62
M_B_DQ61

M_B_DQS1
M_B_DQS0
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#1
M_B_DQS#0
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQ[63:0] 4

D1

D0

D2

D3

D4

D5

D6

D7

M_B_DQS[7:0] 4

20161205 swap

M_B_DQS#[7:0] 4

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161205 swap

20161205 swap

12002-00082600

2nd source:
12002-00082400
12002-00082500

J1701B

258

163

VTT

VDD19

160

VDD18

159

VDD17

259

154

VPP2

VDD16

257

153

VPP1

VDD15

148

VDD14

147

VDD13

142

VDD12

141

VDD11

255

136

VDDSPD

VDD10

135

VDD9

12

130

C1705

VDD8

129

0.1UF/10V

VDD7

124

VDD6

123

VDD5

118

VDD4

117

GND GND

VDD3

112

VDD2

111

VDD1

263

NP_NC1

264

NP_NC2

261

MT1

262

MT2

252

251

VSS48

VSS1

248

247

VSS49

VSS2

244

243

VSS50

VSS3

238

239

VSS51

VSS4

234

235

VSS52

VSS5

230

231

VSS53

VSS6

226

227

VSS54

VSS7

222

223

VSS55

VSS8

218

217

VSS56

VSS9

214

213

VSS57

VSS10

210

209

VSS58

VSS11

206

205

VSS59

VSS12

202

201

VSS60

VSS13

196

197

VSS61

VSS14

192

193

VSS62

VSS15

188

189

VSS63

VSS16

184

185

VSS64

VSS17

180

181

VSS65

VSS18

176

175

VSS66

VSS19

172

171

VSS67

VSS20

168

167

VSS68

VSS21

106

107

VSS69

VSS22

102

103

VSS70

VSS23

98

99

VSS71

VSS24

94

93

VSS72

VSS25

90

89

VSS73

VSS26

86

85

VSS74

VSS27

82

81

VSS75

VSS28

78

77

VSS76

VSS29

72

73

VS

VSS30

7

S7

69

68

VSS31

VS

S78

65

64

VSS32

VSS79

61

60

VS

VSS80

S33

56

57

VSS81

VSS34

52

51

VSS82

VSS35

48

47

VSS83

VSS36

44

43

VSS84

VSS37

40

39

VSS85

VSS38

36

35

VSS86

VSS39

30

31

VSS87

VSS40

26

27

VSS88

VSS41

22

23

VSS89

VSS42

18

19

VSS90

VSS43

14

15

VSS91

VSS44

10

9

VSS92

VSS45

6

5

VSS93

VSS46

2

1

VSS94

VSS47

DDR4_DIMM_260P

GND GND

+2.5V+1.2V

+3VS

+VTT

SL1704

21

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

12

C1709

2.2UF/10V

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

+3VS+3VS+3VS

21

R1703

SL1702

R1704

@

@

0Ohm

0Ohm

0402

12

12

M_B_DIMM0_SA2
M_B_DIMM0_SA1
M_B_DIMM0_SA0

21

21

SL1703

SL1701

R1701

@

0Ohm

0402

0402

12

Place close to SO-DIMM

GND

GND GND

WRITE ADDRESS: 0XA4

12

C1726

10UF/6.3V

@

GND GNDGNDGND GNDGNDGND

+

CE1701
330UF/2V

11020-0035Z000

@

12

C1712

C1715

10UF/6.3V

/EMI

nbs_c0603_h37_000s

12

C1708
1UF/6.3V
@

+2.5V

C1717

0.1UF/16V
/EMI

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VPP Pin)

Place close to SO-DIMM Socket (VDD Pin)

12

12

C1707

C1722

10UF/6.3V

10UF/6.3V

10UF/6.3V

/EMI

GNDGNDGND GND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

C1718

0.1UF/16V

C1702

C1714

/EMI

1UF/6.3V

1UF/6.3V

GNDGNDGND GND GNDGNDGNDGND

<Variant Name>

Title :

Size

Dept.:

C

Date: Sheet of

Tuesday, June 20, 2017

nbs_c0603_h37_000s

12

C1725
10UF/6.3V

12

C1719
10UF/6.3V

GND

12

C1723

0.1UF/16V
/EMI

DDR4_SO-DIMM_1

nbs_c0603_h37_000s

12

12

12

C1721

C1710

C1727

1UF/6.3V

10UF/6.3V

1UF/6.3V

@

@

@

12

12

12

C1703

C1706

C1716

10UF/6.3V

10UF/6.3V

10UF/6.3V

/EMI

/EMI

GND

GNDGND

nbs_c0603_h37_000s

nbs_c0603_h37_000s

12

12

12

C1724

C1720

C1713

1UF/6.3V

1UF/6.3V

1UF/6.3V

@

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

17

+VTT

nbs_c0603_h37_000s

12

12

C1711
10UF/6.3V

nbs_c0603_h37_000s

Place close to SO-DIMM Socket
(+VTT Pin)

2017/02/06 X542UA_R1.1 #26, EMI solution

+1.2V

12

GND

12

nbs_c0603_h37_000s

12

2017/02/06 X542UA_R1.1 #26, EMI solution

All Vref trace must be 20 mils width

+1.2V M_B_VREFCA

12

C1801

0.022UF/16V

+V_VREF_RC1

12

R1806

24.9Ohm

1%

GND

nbs_r0603_h39_000s

12

R1807 2.2Ohm

1%

Close to SO-DIMM

R1822
1KOhm

1%

12

R1820
1KOhm

1%

12

20160218 X541UV
R1827->SL1827 for cost

SL1827

SB_DIMM_VREFCA4

21

0603

SB_DIMM_VREFCA_C

20160218 X541UV
R1805->SL1805 for cost

SL1805

SA_DIMM_VREFCA4

21

0603

SA_DIMM_VREFCA_C

2017/02/21 X542UA_R1.1 #32, Modify R1812/18/21 to SO-DIMM setting

+1.2V

R1821
1KOhm

1%

12

nbs_r0603_h39_000s

12

R1812 2.2Ohm

1%

12

C1803

0.022UF/16V

R1818
1KOhm

+V_VREF_CA_RC

1%

12

12

R1810

24.9Ohm

1%

Close to SO-DIMM

GND

<Variant Name>

Title :

DDR4 CA VOLTAGE

Size

Dept.:

C

Date: Sheet

Tuesday, June 20, 2017

M_A_VREFCA

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

18

U0301I

CSI-2

A36

CSI2_DN0

B36

CSI2_DP0

C38

CSI2_DN1

D38

CSI2_DP1

C36

CSI2_DN2

D36

CSI2_DP2

A38

CSI2_DN3

B38

CSI2_DP3

C31

CSI2_DN4

D31

CSI2_DP4

C33

CSI2_DN5

D33

CSI2_DP5

A31

CSI2_DN6

B31

CSI2_DP6

A33

CSI2_DN7

B33

CSI2_DP7

A29

CSI2_DN8

B29

CSI2_DP8

C28

CSI2_DN9

D28

CSI2_DP9

A27

REV = <REV>

CSI2_DN10

B27

CSI2_DP10

C27

CSI2_DN11

D27

CSI2_DP11

SKL-ULT

GPP_D4/FLASHTRIG

EMMC

GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7

GPP_F21/EMMC_RCLK

GPP_F22/EMMC_CLK

GPP_F12/EMMC_CMD

CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3

CSI2_COMP

EMMC_RCOMP

C37
D37
C32
D32
C29
D29
B26
A26

E13
B7

AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1

AM2
AM3
AP4

AT1

R2002 100Ohm@

R2001 200Ohm@

12

GND

12

GND

BOM

Date: Sheet

Title :

Size

B

Tuesday, June 20, 2017

CPU_PCH_CSI2,EMMC

Dept.:

NB2_RD1_EE1

Project Name

Engineer:

Joach_Wang

20

Rev

R2.0X542UA/UV

102

of

2016/10/21 X542UA_#52, Add GSPI0 for FingerPrint & PU to +3VS

FP_GSPI0_CS#31

FP_GSPI0_CLK31
FP_GSPI0_MISO31

FingerPrint

FP_GSPI0_MOSI31

BT_ON/OFF#53

GPU_EVENT#76

DGPU_FB_CLAMP_GPIO30,76,77

DGPU_PWROK24,77 TOUCHPAD_INTR# 31,69

GPU_RST#70

DGPU_PWR_EN#69,77

2016/10/27 X542UA_R1.0 #59, Remove TOUCHPAD_ID/TOUCH_PANEL_ID & remove R2111/R2137/R2139/R2140

Touch Panel ID

Touch Pad ID

GPP_D12

GPP_D11

+3VS +3VS

R2120

PCB ID1 GPP_D10

10KOhm

PCB ID0 GPP_D9

@

12

PCB_ID0 PCB_ID1

R2121

10KOhm

12

I2C1 SELECTION

I2C1_SCL_TCH_PAD

I2C1_SDA_TCH_PAD

FOR I2C 1.8V FROM LPSS RA AND
RB SHOULD BE UNSTUFFED AND RC
AND RD SHOULD BE STUFFED

+3VS

12

12

R2155

R2158

4.7KOhm

4.7KOhm

Main Board

U0301F

LPSS ISH

AN8

GPP_B15/GSPI0_CS#

AP7

GPP_B16/GSPI0_CLK

AP8

GPP_B17/GSPI0_MISO

AR7

GPP_B18/GSPI0_MOSI

AM5

21

SL2138

GPP_B19/GSPI1_CS#

0402

AN7

GSPI1_CS_R#

GPP_B20/GSPI1_CLK

AP5

GPP_B21/GSPI1_MISO

AN5

GPP_B22/GSPI1_MOSI

AB1

GPP_C8/UART0_RXD

AB2

GPP_C9/UART0_TXD

W4

GPP_C10/UART0_RTS#

AB3

GPP_C11/UART0_CTS#

AD1

GPP_C20/UART2_RXD

AD2

GPP_C21/UART2_TXD

AD3

GPP_C22/UART2_RTS#

AD4

GPP_C23/UART2_CTS#

U7

GPP_C16/I2C0_SDA

U6

GPP_C17/I2C0_SCL

U8

GPP_C18/I2C1_SDA

U9

I2C1_SDA_TCH_PAD

GPP_C19/I2C1_SCL

I2C1_SCL_TCH_PAD

AH9

GPP_F4/I2C2_SDA

AH10

GPP_F5/I2C2_SCL

R

V = <REV>

E

AH11

GPP_F6/I2C3_SDA

AH12

GPP_F7/I2C3_SCL

AF11

GPP_F8/I2C4_SDA

AF12

GPP_F9/I2C4_SCL

SKL-ULT

NFC ID
GPP_A21

20151223 X541UV
Del NFC ID

H: no NFC

L: NFC

R2123

10KOhm

@

12

R2124

10KOhm

12

12

C2101

1UF/6.3V

I2C1_SCL_TCH_PAD 31

I2C1_SDA_TCH_PAD 31

SEL1 (GPIO19)0SEL0 (GPIO18)

0

0 1

0

0

1

101

0

0

1

0

11

PCB ID

PCB_ID0(GPP_D09)PCB_ID1(GPP_D10)

0

0

0

1

0

1

1

1

No Reboot

+3VSUS

PCH_GPPB18

NOTE: Enable No Reboot

PCH will disable the TCO

Timer system reboot feature.

This function is useful when running ITP/XDP.

PCH_GPPB18: weak internal pull down

PU Enable

PD Disable

MEM ID

12

R2125

10KOhm

@

12

R2149

1KOhm

@

GPP_D13/ISH_UART0_RXD

GPP_D14/ISH_UART0_TXD

SEL2 (GPIO20)

GPP_D16

GPP_C14

GPP_C15

0

0

11

0

111

NOTE

GPP_D9

GPP_D10

GPP_D11
GPP_D12

GPP_D5/ISH_I2C0_SDA

GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA

GPP_D8/ISH_I2C1_SCL

GPP_F10/I2C5_SDA/ISH_I2C2_SDA

GPP_F11/I2C5_SCL/ISH_I2C2_SCL

/SML0BDATA/I2C4B_SDA
/SML0BCLK/I2C4B_SCL

GPP_D15/ISH_UART0_RTS#

/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TX D

/UART1_RTS#/ISH_UART1_RTS#
/UART1_CTS#/ISH_UART1_CTS#

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1

GPP_A20/ISH_GP2

GPP_A21/ISH_GP3
GPP_A22/ISH_GP4

GPP_A23/ISH_GP5

GPP_A12/BM_BUSY#/ISH_GP6

NOTE

03012-00010200
SAMSUNG/K4A4G085WE-BCPB

03012-00010000
HYNIX/H5AN4G8NAFR-TFC

03012-00010300
MICRON/MT40A512M8RH-083E:B

03012-00030000
SAMSUNG/K4A8G085WB-BCPB

03012-00030300
HYNIX/H5AN8G8NMFR-TFC

03012-00030100
MICRON/MT40A1G8WE-083E:B

Boot BIOS Strap Bit BBS

2016/10/27 X542UA_R1.0 #57, Remove PCH_GPPB22 & remove R2160/R2161

PCH_GPPB22: weal internal pull down

PU LPC

PD SPI (Default)

P2

P3

PCB_ID0

P4

PCB_ID1

P1

M4

N3

N1

N2

AD11
AD12

U1

U2
U3

WLAN_LED_R

U4

AC1

AC2

DIMM_SEL0

AC3

DIMM_SEL1

AB4

DIMM_SEL2

AY8

BA8

BB7
BA7

AY7

AW7
AP13

Onboard Memory PCB-ID:
GPP_12 => DIMM_SEL0
GPP_13 => DIMM_SEL1
GPP_14 => DIMM_SEL2

512*8 = 4G

512*8 = 4G

512*8 = 4G

1024*8 = 8G

1024*8 = 8G

1024*8 = 8G

SATA_ODD_PWRGT 51
SATA_ODD_DA# 51

WLAN_LED_R 68

FP_INT# 31

FP_RST#_GPIO 31

R2181

10KOhm

/MEMID_H0

12

R2180

10KOhm

/MEMID_L0

12

R2183

10KOhm

/MEMID_H1

12

DIMM_SEL2DIMM_SEL1DIMM_SEL0

R2182

10KOhm

/MEMID_L1

12

+3VSUS

12

12

R2185

10KOhm

/MEMID_H2

R2184

10KOhm

/MEMID_L2

Near U0301

EMI

GPU_RST# DGPU _PWROK

12

C2102

1000PF/50V

/VGA/EMI

GND GND

2017/01/23 X542UA_R1.1 #16, emove FP_RST#, R2117 PU & unstuff R2119/R2126

R2117 4.7KOhm@/FPrint

12

FP_RST#_GPIO

R2118 10KOhm@/FPrint

12

FP_INT#

R2196 10KOhm

12

SATA_ODD_DA#

R2154 10KOhm

12

TOUCHPAD_INTR#

R2102 10KOhm@/VGA

12

GPU_RST#

R2101 10KOhm/VGA

12

2016/10/11 X542UA_R1.0 #35, R2101 staff follow X456U

R2168 10KOhm@

12

GSPI1_CS_R#

2016/10/27 X542UA_R1.0 #60, Remove SNSR_HUB_PWREN & remove R2153

R2150 10KOhm@

12

WLAN_LED_R

R2122 10KOhm@/VGA

12

DGPU_PWR_EN#

Boundary Scan TP (PCH)

DIMM_SEL2
TOUCHPAD_INTR#

12

C2103

1000PF/50V

/VGA/EMI

<Variant Name>

Title :

CPU_CFG,RSVD,GND

Size

Dept.:

NB2_RD1_EE1

Custom

Date: Sheet

Tuesday, June 20, 2017

+3VS

+3VS

+3VSUS

1

T2110

1

T2111

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

21

ACZ_BCLK_AUD and ACZ_SDOUT_AUD
Total Trace match < 500 mile

HD Audio

RN2201 near PCH

56

33OHM

ACZ_BCLK_AUD36

34

33OHM

ACZ_SYNC_AUD36

12

33OHM

ACZ_RST#_AUD36

78

33OHM

ACZ_SDOUT_AUD36

C2201 10PF/50V

ACZ_BCLK_AUD

C2202 15PF/50V

ACZ_SDIN0_AUD

RF requirement

ACZ_SDOUT:(1) PCH: Internal PD 20k
ohm, VIL=0.35V, VIH=0.65~3.3 V (2)
ALC269:VIL<0.35*3.3V, VIH>0. 65*3.3V

ACZ_SDOUT is a signal used for Flash
Descriptor security Override/ME debug mode
HIGH : get overrideen, LOW : disable override

U0301G

AUDIO

BA22

HDA_SYNC/I2S0_SFRM

AY22

+3VSUS

@

1

G

GND

12

R2201
1KOhm

ACZ_SDOUT_AUD_X1

20160113 X541UV modify net

12

Q2201_D

32

D

Q2201
2N7002K

S

ACZ_SYNC_AUD_X1
ACZ_BCLK_AUD_X1
ACZ_SDOUT_AUD_X1

ACZ_SDIN0_AUD36

ACZ_RST#_AUD_X1

T2209

DMIC_CLK_PCH45
DMIC_DAT_PCH45

2016/12/05 X542UA_R1.0 #A1, Reserve DMIC_CODEC & DMIC_PCH

RN2201C
RN2201B

ACZ_BCLK_AUD_X1

RN2201A

ACZ_SYNC_AUD_X1

RN2201D

ACZ_RST#_AUD_X1
ACZ_SDOUT_AUD_X1

@

12

@

12

GND

UX303 0809

+VCCPAZIO

12

R2202

3.3KOHM

R2203
330Ohm

PCH_SPI_OV30

HDA_BLK/I2S0_SCLK

BB22

HDA_SDO/I2S0_TXD

BA21

HDA_SDI0/I2S0_RXD

AY21

HDA_SDI1/I2S1_RXD

AW22

HDA_RST#/I2S1_SCLK

J5

GPP_D23/I2S_MCLK

AY20

I2S1_SFRM

AW20

1

I2S1_TXD

I2S_SDO_BT

AK7

GPP_F1/I2S2_SFRM

AK6

GPP_F0/I2S2_SCLK

AK9

GPP_F2/I2S2_TXD

AK10

GPP_F3/I2S2_RXD

H5

GPP_D19/DMIC_CLK0

D7

GPP_D20/DMIC_DATA0

D8

GPP_D17/DMIC_CLK1

C8

GPP_D18/DMIC_DATA1

AW5

REV = <REV>

GPP_B14/SPKR

SKL-ULT

Top Swap Override

2016/10/27 X542UA_R1.0 #56, Remove PCH_GPPB14 & remove R2210/R2211

PCH_GPPB14: weak internal pull down

PU Enable

PD Disable ( default)

SDIO/SDXC

GPP_A17/SD_PWR_EN#/ISH_GP7

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G5/SD_CD#

GPP_G6/SD_CLK

GPP_A16/SD_1P8_SEL

AB11
AB13
AB12
W12
W11
W10
W8
W7

GPP_G7/SD_WP

BA9
BB9

AB7

SD_RCOMP

AF13

GPP_F23

BOM

Project Name

Rev

Title :

CPU_PCH_AUDIO,SDIO,SDXC

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet of

Tuesday, June 20, 2017

R2.0X542UA/UV

Engineer:

Joach_Wang

102

22

PCIEG_RXN0

PCIENB_RXN[3:0]70

PCIEG_RXN1

PCIENB_RXP[3:0]70

PCIEG_RXP1 PCIENB_TXP1

PCIEG_RXN[3:0]70

PCIEG_RXN2

PCIEG_RXP[3:0]70

PCIEG_RXN3 PCIENB_TXN3
PCIEG_RXP3

PCIE_RXN_GLAN_C33
PCIE_RXP_GLAN_C33

PCIE_TXN_GLAN33
PCIE_TXP_GLAN33

PCIE_RXN_WLAN53
PCIE_RXP_WLAN53

PCIE_TXN_WLAN53
PCIE_TXP_WLAN53

2016/11/30 X542UA_R1.0 #93, Remove PCIE to SSD

2016/10/27 X542UA_R1.0 #65, Mo dify PCIE CAPs to P54 & add SATA RX CA Ps

SATA2_SSD_RX_DN54

PCIE12_RX, For SATA, DP/DN & For PCIE, Revirse

SATA2_SSD_RX_DP54

SATA2_SSD_TX_DN54
SATA2_SSD_TX_DP54

PCIE USAGE
DEFAULT/OPTION

DGPU

PCIE 1

DGPU

PCIE 2

DGPU

PCIE 3

DGPU

PCIE 4

GLAN

PCIE 5

WLAN

PCIE 6

HDD

PCIE 7/SATA 0

ODD & 2nd HDD

PCIE 8/SATA 1A

SSD PCIE3

PCIE 9

SSD PCIE2

PCIE 10

SSD PCIE1

PCIE 11/SATA 1B

SSD PCIE0 & SATA Port1

PCIE 12/SATA 2

SATA USAGE

SATA PORT

DEFAULT/OPTION

HDD

PORT 0

PORT 1

ODD & 2nd HDD

N/A

PORT 2

SSD

PORT 3

CX2304 0.22UF/6.3V
CX2303 0.22UF/6.3V

CX2306 0.22UF/6.3V
CX2310 0.22UF/6.3V

CX2308 0.22UF/6.3V
CX2305 0.22UF/6.3V

CX2309 0.22UF/6.3V
CX2307 0.22UF/6.3V

C2309 0.1UF/16V

12

C2310 0.1UF/16V

12

C2301 0 .1UF/10V

12

C2302 0 .1UF/10V

12

SATA0_HDD_RX_DN51
SATA0_HDD_RX_DP51

SATA0_HDD_TX_DN51
SATA0_HDD_TX_DP51

SATA1_ODD_RX_DN51
SATA1_ODD_RX_DP51

SATA1_ODD_TX_DN51
SATA1_ODD_TX_DP51

12

R2316 100Ohm

PCIE RCOMP 100 OHM 1%

OPTION PCIE

OPTION PCIE

U0301H

PCIE/USB3/SATA

H13

PCIE1_RXN/USB3_5_RXN

G13

/VGA

PCIENB_RXN0

PCIE1_RXP/USB3_5_RXP

12

B17

PCIENB_RXP0

PCIE1_TXN/USB3_5_TXN

A17

12

PCIENB_TXN0

PCIE1_TXP/USB3_5_TXP

PCIENB_TXP0PCIEG_RXP0

G11

/VGA

PCIE2_RXN/USB3_6_RXN

F11

PCIENB_RXN1

/VGA

PCIE2_RXP/USB3_6_RXP

D16

12

PCIENB_RXP1

PCIE2_TXN/USB3_6_TXN

C16

12

PCIENB_TXN1

PCIE2_TXP/USB3_6_TXP

H16

/VGA

PCIE3_RXN

G16

/VGA

PCIENB_RXN2

PCIE3_RXP

D17

12

PCIENB_RXP2

PCIE3_TXN

C17

12

PCIENB_TXN2

PCIE3_TXP

PCIENB_TXP2PCIEG_RXP2

/VGA

G15

PCIE4_RXN

F15

/VGA

PCIENB_RXN3

PCIE4_RXP

B19

12

PCIENB_RXP3

PCIE4_TXN

A19

12

PCIE4_TXP

PCIENB_TXP3

/VGA

F16

REV = <REV>

PCIE5_RXN

E16

PCIE5_RXP

C19

PCIE5_TXN

D19

PCIE_TXN_GLAN_C

PCIE5_TXP

PCIE_TXP_GLAN_C

G18

PCIE6_RXN

F18

PCIE6_RXP

D20

PCIE6_TXN

C20

PCIE_TXN_WLAN_C

PCIE6_TXP

PCIE_TXP_WLAN_C

F20

PCIE7_RXN/SATA0_RXN

E20

PCIE7_RXP/SATA0_RXP

B21

PCIE7_TXN/SATA0_TXN

A21

PCIE7_TXP/SATA0_TXP

G21

PCIE8_RXN/SATA1A_RXN

F21

PCIE8_RXP/SATA1A_RXP

D21

PCIE8_TXN/SATA1A_TXN

C21

PCIE8_TXP/SATA1A_TXP

E22

PCIE9_RXN

E23

PCIE9_RXP

B23

PCIE9_TXN

A23

PCIE9_TXP

F25

PCIE10_RXN

E25

PCIE10_RXP

D23

PCIE10_TXN

C23

PCIE10_TXP

F5

PCIE_RCOMPN

E5

PCIE_RCOMPN

PCIE_RCOMPP

PCIE_RCOMPP

D56

PROC_PRDY#

D61

PROC_PREQ#

BB11

GPP_A7/PIRQA#

E28

PCIE11_RXN/SATA1B_RXN

E27

PCIE11_RXP/SATA1B_RXP

D24

PCIE11_TXN/SATA1B_TXN

C24

PCIE11_TXP/SATA1B_TXP

E30

PCIE12_RXN/SATA2_RXN

F30

PCIE12_RXP/SATA2_RXP

A2

5

IE12_TXN/SATA2_TXN

PC

B25

PCIE12_TXP/SATA2_TXP

SKL-ULT

Co-layPCI-E* X1

Clock

Port0

Port4

Port5

SSIC / USB3

H8

USB3_1_RXN

U3_U3RXDN1 52

G8

USB3_1_RXP

U3_U3RXDP1 52

C13

USB3_1_TXN

D13

USB3_1_TXP

J6

USB3_2_RXN/SSIC_1_RXN

H6

USB3_2_RXP/SSIC_1_RXP

B13

USB3_2_TXN/SSIC_1_TXN

A13

USB3_2_TXP/SSIC_1_TXP

J10

USB3_3_RXN/SSIC_2_RXN

H10

USB3_3_RXP/SSIC_2_RXP

B15

USB3_3_TXN/SSIC_2_TXN

A15

USB3_3_TXP/SSIC_2_TXP

E10

USB3_4_RXN

F10

USB3_4_RXP

C15

USB3_4_TXN

D15

USB3_4_TXP

AB9

USB2N_1

AB10

USB2P_1

AD6

USB2N_2

AD7

USB2P_2

AH3

USB2N_3

AJ3

USB2P_3

AD9

USB2N_4

AD10

USB2P_4

AJ1

USB2N_5

AJ2

USB2P_5

USB2

AF6

USB2N_6

AF7

USB2P_6

AH1

USB2N_7

AH2

USB2P_7

AF8

USB2N_8

AF9

USB2P_8

AG1

USB2N_9

AG2

USB2P_9

AH7

USB2N_10

AH8

USB2P_10

AB6

USB2_COMP

AG3

USB2_ID

AG4

USB2_VBUSSENSE

A9

GPP_E9/USB2_OC0#

C9

GPP_E10/USB2_OC1#

D9

GPP_E11/USB2_OC2#

B9

GPP_E12/USB2_OC3#

J1

GPP_E4/DEVSLP0

J2

GPP_E5/DEVSLP1

J3

GPP_E6/DEVSLP2

H2

GPP_E0/SATAXPCIE0/SATAGP0

H3

GPP_E1/SATAXPCIE1/SATAGP1

G4

G

PP_E2/SATAXPCIE2/SATAGP2

H1

GPP_E8/SATALED#

USB_OC_1_2#
USB_OC_3_4#
USB_OC_5_6#
USB_OC_7_8#

USBCOMP
USB2_ID
USB2_VBUSSENSE

SATA0_DEVSLP
SATA1_PHYSLP
SATA2_DEVSLP

MSATA_MPCIE_DET#

SATA_LED#

U3_U3TXDN1 52
U3_U3TXDP1 52

U3_U3RXDN2 55
U3_U3RXDP2 55

U3_U3TXDN2 55
U3_U3TXDP2 55

U3_U3RXDN3 55
U3_U3RXDP3 55

U3_U3TXDN3 55
U3_U3TXDP3 55

U3_U3RXDN4 52
U3_U3RXDP4 52

U3_U3TXDN4 52
U3_U3TXDP4 52

USB_PN1 52
USB_PP1 52

USB_PN2 55
USB_PP2 55

USB_PN3 52
USB_PP3 52

USB_PN4 68
USB_PP4 68

USB_PN6 45
USB_PP6 45

USB_PN7 68
USB_PP7 68

USB_PN8 53
USB_PP8 53

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

12

R2315 113Ohm
SL2301

0402

12

R2322 1KOhm

SATA0_DEVSLP 51

SATA2_DEVSLP 54

MSATA_MPCIE_DET# 54

SATA_LED# 68

USB 3.0 Port0

USB 3.0 Port1

USB 3.0 Port0

USB 3.0 Type C

USB 3.0 Port1

USB 2.0 Port

CAMERA

SD CARD

WLAN / BT combo

21

USB 3.0 Type C

USB 2.0

Mapping

1

USB 2.0 Port

2

USB 2.0 Port

3

USB 2.0 Port

4

5

6

CAMERA

7

SD CARD

8

WLAN / BT combo

USB2_ID R2321
PD 1K: OTG
PD 0ohm: non OTG

USB_OC_1_2#
USB_OC_3_4#
USB_OC_5_6#
USB_OC_7_8#

請BIOS 設定MSATA_MPCIE_DET# Control PCIE12/SATA2
Follow M.2 device SATA→GND & PCIE→NC

UX303 0823 UX303C1 0520

R2310 10KOhm@

SATA0_DEVSLP

R2308 10KOhm@

SATA1_PHYSLP

R2309 10KOhm@

SATA2_DEVSLP

R2307 10KOhm

SATA_LED#

56
34
78
12

20161207_SWAP

12

12

12
12

10KOHM
10KOHM
10KOHM
10KOHM

+3VSUS

RN2301C
RN2301B
RN2301D
RN2301A

+3VS

1

2

3

4

BOM

Title :

Size

C

Date: Sheet

Tuesday, June 20, 2017

USB 3.0

USB 3.0 Port0

USB 3.0 Port1 Type-C

USB 3.0 Port2 Type-C

USB 3.0 Port1USB 2.0 Port

CPU_PCH_PCIE,USB,SATA

Dept.:

Project Name

Rev

NB2_RD1_EE1

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

23

DGPU

2016/11/30 X542UA_#93, Remo ve PCIE to SSD

GLAN

WLAN

CHECK PCIEG CLK

+3VS

2016/10/19 X542UA_R1.0 #49, Modify CK_REQ_Px# setting P2 & P3 same group
According to checklist：
Any un-used, disabled, and non-mapped SRCCLKREQ# signal must be left as no connects at the PCH side on the platform.

+3VA_RTC

JA - SRTC RST_N
SAVE ME RTC REGISTER -(1-X) DEFAULT
CLEAR ME RTC REGISTER - (1-2)

JB - RTC REST_N
CLEAR CMOS - (1-2)
SAVE CMOS - (1-X) DEFAULT

SRC0

12

RN2401A

10KOHM

CK_REQ_P0#

SRC1

34

RN2401B

10KOHM

CK_REQ_P1#

SRC4

56

RN2401C

10KOHM

CK_REQ_P4#

SRC5

78

RN2401D

10KOHM

CK_REQ_P5# CK_REQ_P0#

SRC2

12

RN2402A

10KOHM

CK_REQ_P2#

SRC3

34

RN2402B

10KOHM

CK_REQ_P3#

12

R2421

20KOhm 1%

R2420

nbs_r0402_h16_000s

nbs_r0402_h16_000s

20KOhm 1%

12

C2407

1UF/6.3V

GND GND

12

12

C2406

1UF/6.3V

U0301J

CLOCK SIGNALS

D42

1

G

GND

20150325
R1.1 modify to port 0

CK_REQ_P0#

32

Q2401

D

2N7002K
/VGA/N16

S

CK_REQ_P0#

CK_REQ_P1#

CK_REQ_P2#

CK_REQ_P3#

CK_REQ_P4#

CK_REQ_P5#

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

AR10

GPP_B5/SRCCLKREQ0#

B42

CLKOUT_PCIE_N1

A42

CLKOUT_PCIE_P1

AT7

GPP_B6/SRCCLKREQ1#

D41

CLKOUT_PCIE_N2

C41

CLKOUT_PCIE_P2

AT8

GPP_B7/SRCCLKREQ2#

D40

CLKOUT_PCIE_N3

C40

CLKOUT_PCIE_P3

AT10

GPP_B8/SRCCLKREQ3#

B40

CLKOUT_PCIE_N4

A40

CLKOUT_PCIE_P4

AU8

GPP_B9/SRCCLKREQ4#

E40

CLKOUT_PCIE_N5

E38

CLKOUT_PCIE_P5

AU7

GPP_B10/SRCCLKREQ5#

SKL-ULT

REV=<REV>

An RC delay circuit with a
time delay in the range of
18 ms to 25 ms should be
provided.

+FBVDDQ_PWRGD77,93

PEX_CLKREQ#70

CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P

GPD8/SUSCLK

XTAL24_IN
XTAL24_OUT

XCLK_BIASREF

RTCX1
RTCX2

SRTCRST#

RTCRST#

5

34

UM6K1N

Q2402B

2

61

Q2402A

UM6K1N

2016/10/06 X542UA_R1.0 #15, Modify RTC circuit follow X456U

20150409
R1.1 R2426 由45K改成45.3K

F43
E43

CLK_ITP_BCLK_PCH#
CLK_ITP_BCLK_PCH

BA17

SUS_CK

E37
E35

XTAL24_IN

XTAL24_OUT

E42

XCLK_BIASREF

AM18
AM20

AN18
AM16

12

12

GND

CLK_PCIE_PEG#_PCH70
CLK_PCIE_PEG_PCH70

CLK_PCIE_GLAN#33
CLK_PCIE_GLAN33

CLKREQ_GLAN#33

CLK_PCIE_WLAN#53
CLK_PCIE_WLAN53

CLKREQ_WLAN#53

UX303 0826

DGPU_PWROK21,77

SRTC_RST#

1

JRST2401

1

SGL_JUMP

2

@

2

JA

RTC_RST#

1

JRST2402

1

SGL_JUMP

2

@

2

JB

GNDGND

RTC_X1
RTC_X2

SRTC_RST#
RTC_RST#

RTC CRYSTAL 32.768KHz

RTC_X1

5%

RTC_X2

2nd source:
07009-00110100 (未測)
07009-00113600
07009-00112500

R2401

1.5KOhm
1%

3.3A_RTC_D

R2432

45.3KOhm
1%

12

R2418

10MOhm

07009-00112000

+3VA_DSW+3VA

1
1

SUS_CK 53

SUS_CK

12

R2423 1KOhm@

T2402
T2403

Close E42

12

X2402

32.768Khz

R2402

+3VA_RTC

0Ohm@

D2401

1

3

2

BAT54CW

+V3.3A_RTC GENERATION

12

+1.0VSUS_PCH

R2417

12

change 2.71k ohm 0.5%/ 接1V check

2.7KOhm

2017/01/13 X542UA_R1.1 #06, C2401&C2402 modify to 27pF for X542UQ SR PCB

XTAL 24MHz

12

XTAL24_IN

GND

C2404

15PF/50V

C2405

15PF/50V

12

XTAL24_OUT

GND

2nd source:
07009-00062000
07009-00063200 (未測)

12

C2403
1UF/10V

GND

12

R2407

1MOhm

/U22

/U22

07009-00063100

13

BOM

Title :

CPU_PCH_CLOCK SIGNALS,RTC

Size

Dept.:

C

Date: Sheet

Tuesday, June 20, 2017

C2401

/U22

12

X2401

27PF/50V

24Mhz

4

2

C2402

/U22

12

27PF/50V

GND

Project Name

Rev

NB2_RD1_EE1

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

24

2016/10/27 X542UA_R1.0 #55 , Remove reserve RES R2514 & R2554

2016/10/11 X542UA_R1.0 #36, U2502 cir cuit BOM follow X456U

U2502

1

INB

2

INA

3

PLT_RST#

GND4OUTY

74LVC1G08GW

GND

12

@

R2518 0Ohm

PLT_RST# 32

PM_SYSPWROK30

ALL_SYSTEM_PWRGD30,58,80

ALL_SYSTEM_PWRGD

PM_PWROK30

PM_RSMRST#30

ME_AC_PRESENT30

D2207: Prevent EC drive hign,
SUS_PWRGD sink low in S5-->G3.

2014/04/09-1

Power failure solution (S0-->G3,S5-->G3):

ALL_SYSTEM_PWRGD

3VA_DSW_PWRGD

PM_PWROK_PCH

Close D2501

+3V

5

VCC

R2530 0OHM@

R2552 1KOhm

12

12

R2538

R2539

10KOhm

100KOhm

GND

GND

UX303C1 0620

3VA_DSW_PWRGD30,58,87

/EMI

C2501 1000PF/ 50V

12

2017/02/06 X542UA_R1.1 #26, EMI solut ion

/EMI

C2502 1000PF/ 50V

12

2017/02/06 X542UA_R1.1 #26, EMI solut ion

/EMI

C2503 1000PF/ 50V

12

2017/02/06 X542UA_R1.1 #26, EMI solut ion

2013/03/15 Paul :For EMI re severed

12

12

R2501
100KOhm

GND

12

IMVP8_PWRGD30,80

VCCST_PWRGD_PCH58

DPWROK_EC30,58

PCH_SUSACK#30

PCIE_WAKE#33,53,54

BUF_PLT_RST# 30,33,53,54,68,70

UX303CN 0311

12

R2540 1KOhm

12

R2542 1KOhm

12

@

R2541 10KOhm

12

D2505 1N4148WS

3VA_DSW_PWRGD

D2503 1N4148WS

DPWROK_R

3VA_DSW_PWRGD

GND

U0301K

SYSTEM POWER MANAGEMENT

AN10

GPP_B13/PLTRST#

B5

PLT_RST#

SYS_RESET#

AY17

PM_SYSRST_R#

RSMRST#

PM_RSMRST#_PCH

1

A68

T2505

R2507 60.4Ohm

0402

SUSWARN#30

0402

0402

0402

T2503

WLAN_ON#53

+3VSUS +3VA_DSW

R2505

R2504

12

10KOhm

12

10KOhm

@

@

D2501

1

3

2

BAT54AW

12

D2502

2

3

1

BAT54CW

21

SL2553

21

SL2512

21

SL2501

21

SL2517

1

R2502

R2503100KO hm

12

10KOhm

12

@

PM_SYSPWROK_PCH

EMI solution

12

09'MoW04:

Optional if ME FW is
Ignition FW

H_CPUPWRGD_R
VCCST_PWRGD_R

PM_SYSPWROK_PCH
PM_PWROK_PCH
DPWROK_R

ME_SusPwrDnAck_R
SUSACK_R#

PCIE_WAKE#_R
PCH_GPD2#
LAN_PWREN

PM_SYSPWROK_PCH

PM_PWROK_PCH

PM_RSMRST#_PCH

ME_AC_PRESENT_PCH

C2504 1000PF/50V

2017/02/06 X542UA_R1.1 #26, EMI solution

PROCPWRGD

B65

VCCST_PWRGD

B6

SYS_PWROK

BA20

PCH_PWROK

BB20

DSW_PWROK

AR13

GPP_A13/SUSWARN#/SUSPWRDN ACK

AP11

GPP_A15/SUSACK#

BB15

WAKE#

AM15

GPD2/LAN_WAKE#

AW17

GPD11/LANPHYPC

AT15

GPD7/RSVD

SKL-ULT

REV=<REV>

/EMI

12

GPD1/ACPRESENT

GPP_B11/EXT_PWR_GATE#

GPP_B2/VRALERT#

GPP_B12/SLP_S0#

GPD9/SLP_WLAN#

AT11

21

SL2513

0402

AP15

21

SL2514

PCH_SLP_S0_R#

GPD4/SLP_S3#

0402

BA16

21

SL2515

SLP_S3_R#

GPD5/SLP_S4#

0402

AY16

1

SLP_S4_R#

T2502

GPD10/SLP_S5#

SLP_S5#

AN15

SLP_SUS#

AW15

1

T2506

SLP_LAN#

BB17

1

SLP_LAN#

T2501

AN16

1

T2507

PCH_SLP_WLAN#

GPD6/SLP_A#

PM_SLP_A_R#

BA15

GPD3/PWRBTN#

AY15
AU13

ME_AC_PRESENT_PCH

GPD0/BATLOW#

PM_BATLOW_R#

AU11

1

AP16

AM10
AM11

PCI_PME#
SM_INTRUDER#

MPHY_PWREN

T2508

Check: R2506 can be remove?

GPP_A11/PME#

INTRUDER#

Main Board

PCH_SLP_S0# 30
PM_SUSB# 30,58,88
PM_SUSC# 30,57,86

PM_SLP_SUS# 30

21

SL2518

PM_PWRBTN# 30

0402

BOM

Title :

CPU_PCH_SYS_POWER

Size

Dept.:

C

Date: Sheet

Tuesday, June 20, 2017

SLP_LAN#

SUSWARN#

PM_SYSRST_R#

MPHY_PWREN

SM_INTRUDER#

PM_BATLOW_R#

PCIE_WAKE#

PCH_GPD2#

LAN_PWREN

WLAN_ON#

PM_RSMRST#_PCH

DPWROK_EC

PM_PWROK_PCH

+3VSUS

12

R2527 10KOhm@

12

RN2501A

10KOhm

34

RN2501B

10KOhm

12

R2506 20KOhm

+3VA_RTC

12

R2559 1MOhm

+3VA_DSW

R2512 8.2KOhm

12

R2523 1KOhm

12

56

RN2501C

10KOhm

78

RN2501D

10KOhm

Intel Review 1221

R2555 10KOhm@

12

12

RN2502A

10KOHM

34

RN2502B

10KOHM

12

R2534 10KOhm@

UX303 0809

Project Name

Rev

NB2_RD1_EE1

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

25

+1.0VSUS

+1.0VSUS_VCCAPLL

+3VDSW_VCCPDSW

2017/01/11 X542UA_R1.1 #03, +3VSUS_VCCPAZIO
modify to +VCCPAZIO & change from +3VS to +1.8VSUS

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

2017/03/20 X542UA_R2.0 #05, VCCHDA change to +1.8VS

+VCCMPHYG

SL2623

Checking
20150318

12

C2609

0.1UF/16V

Place close to the AK19

+3VS

21

0402

@
C2612
22UF/6.3V

nbs_c0603_h39_000s

cost 考量被改SL
如果用eSPI 要移除

+3VSUS

SL2607

+3VSUS +VCCPGPP

+1.8VSUS

0.48A

+1.0VSUS +VCCMPHYG

3.5A

SL2632

12

12

C2603

C2615

1UF/6.3V

1UF/6.3V

@

21

0603

SL2603

0603

SL2608

12

C2605
1UF/6.3V

Place close to the AA1

21

0603

+VCCPGPPA

21

12

12

C2622

C2628

1UF/6.3V

1UF/6.3V

@

@

+VCCPGPPF

21

0603

+1.0VM_VCCAMPHYPLL+VCCMPHYG

12

C2614
1UF/6.3V

@

R2606 0Ohm

@/eSPI

12

nbs_r0603_h24_000s

12

C2613
1UF/6.3V
@

BOM

Title :

CPU_PCH_POEWR,GND

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet of

Tuesday, June 20, 2017

+1.8VSUS

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

26

U0301O

+1.0VSUS_PCH

CPU POWER 4 OF 4

AB19

VCCPRIM_1P0_1

AB20

VCCPRIM_1P0_2

P18

C2602
1UF/6.3V

+1.0VM_VCCAMPHYPLL

0603

+1.0VSUS_PCH+1.0VSUS

VCCPRIM_1P0_3

AF18

VCCPRIM_CORE1

AF19

VCCPRIM_CORE2

V20

VCCPRIM_CORE3

V21

VCCPRIM_CORE4

AL1

+1.0VSUS_PCH

DCPDSW_1P0

K17

VCCMPHYAON_1P0_1

L1

+VCCMPHYG

VCCMPHYAON_1P0_2

N15

VCCMPHYGT_1P0_N15

N16

VCCMPHYGT_1P0_N16

N17

VCCMPHYGT_1P0_N17

P15

VCCMPHYGT_1P0_P15

P16

VCCMPHYGT_1P0_P16

K15

VCCAMPHYPLL_1P0_1

L15

VCCAMPHYPLL_1P0_2

V15

VCCAPLL_1P0

+1.0VSUS_PCH

AB17

VCCPRIM_1P0_AB17

Y18

VCCPRIM_1P0_Y18

AD17

VCCDSW_3P3_AD17

AD18

VCCDSW_3P3_AD18

AJ17

VCCDSW_3P3_AJ17

REV=<REV>

+VCCPAZIO

AJ19

21

VCCHDA

+3VSUS

AJ16

VCCSPI

+VCCMPHYG

AF20

VCCSRAM_1P0_1

AF

1

2

V

CCSRAM_1P0_2

T19

VCCSRAM_1P0_3

T20

+3VSUS

VCCSRAM_1P0_4

AJ21

VCCPRIM_3P3_AJ21

AK20

VCCPRIM_1P0_AK20

N18

VCCAPLLEBB

SKL-ULT

12

12

C2601

C2611

1UF/6.3V

1UF/6.3V
@

+1.0VSUS_VCCDTS

21

SL2609

0603

+1.0VSUS_VCCAPLL

21

SL2613

0603

12

C2623
22UF/6.3V

+1.0VSUS_VCCCLK6

21

SL2622

0603

12

C2616
1UF/6.3V
@

+1.0VSUS_PCH +1.0VSUS_VCCCLK5

+1.0VSUS_VCCCLK2

21

SL2629

0603

12

C2624
22UF/6.3V
@

+1.0VSUS_VCCCLK4

21

SL2630

0603

12

C2625
22UF/6.3V
@

2.6A

12

C2617
1UF/6.3V

DCPDSW

@

12

+1.8VS

SL2602

+1.0VSUS_PCH

12

C2604
1UF/6.3V

21

0805

+VCCPGPPA

+VCCPGPP

AK15

+VCCPGPP

VCCPGPPA

AG15

VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF

VCCPGPPG

VCCPRIM_3P3_V19

VCCPRIM_1P0_T1

VCCATS_1P8

VCCRTCPRIM_3P3

VCCRTC_AK19
VCCRTC_BB14

VCCCLK1

VCCCLK2

VCCCLK3

VCCCLK4

VCCCLK5

VCCCLK6

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

SL2614

0603

12

12

C2606

C2607

1UF/6.3V

0.1UF/16V

SL2631

0603

+VCCPGPP

Y16

+VCCPGPP

Y15
T16
AF16
AD15

V19

T1

AA1

AK17

AK19
BB14

BB10

DCPRTC

A14

K19

L21

N20

L19

A10

AN11
AN13

+3VDSW_VCCPDSW+3VA_DSW

0.09A

21

+3VSUS

0.46A

12

C2618
1UF/6.3V
@

21

12

+VCCPGPPF

+1.0VSUS_PCH

+1.0VSUS_VCCCLK2

+1.0VSUS_PCH

R2601 10KOhm@
R2602 10KOhm@

+1.0VSUS_VCCDTS

+1.0VSUS_VCCCLK4

+1.0VSUS_VCCCLK5

+1.0VSUS_VCCCLK6

12
12

+VCCPGPP

+1.8VSUS

+3VSUS

+3VA_RTC

12

12

C2608

C2610

1UF/6.3V

0.1UF/16V

SL2601

12

+3VSUS

DCPRTC

VCCPRIM_VID0
VCCPRIM_VID1

C2626
22UF/6.3V
@

U0301P

GND 1 OF 3

REV=<REV>

AL65

VSS71

VSS1

AL66

VSS72

VSS2

AM13

VSS73

VSS3

AM21

VSS74

VSS4

AM25

VSS75

VSS5

AM27

VSS76

VSS6

AM43

VSS77

VSS7

AM45

VSS78

VSS8

AM46

VSS79

VSS9

AM55

VSS80

VSS10

AM60

VSS81

VSS11

AM61

VSS82

VSS12

AM68

VSS83

VSS13

AM71

VSS84

VSS14

AM8

VSS85

VSS15

AN20

VSS86

VSS16

AN23

VSS87

VSS17

AN28

VSS88

VSS18

AN30

VSS89

VSS19

AN32

VSS90

VSS20

AN33

VSS91

VSS21

AN35

VSS92

VSS22

AN37

VSS93

VSS23

AN38

VSS94

VSS24

AN40

VSS95

VSS25

AN42

VSS96

VSS26

AN58

VSS97

VSS27

AN63

VSS98

VSS28

AP10

VSS99

VSS29

AP18

SKL-ULT

VSS100

VSS30

AP20

VSS101

VSS31

AP23

VSS1

VSS32

0

2

AP28

VSS33

VSS103

AP32

VSS34

VSS104

AP35

VSS35

VSS105

AP38

VSS36

VSS106

AP42

VSS37

VSS107

AP58

VSS38

VSS108

AP63

VSS39

VSS109

AP68

VSS40

VSS110

AP70

VSS41

VSS111

AR11

VSS42

VSS112

AR15

VSS43

VSS113

AR16

VSS44

VSS114

AR20

VSS45

VSS115

AR23

VSS46

VSS116

AR28

VSS47

VSS117

AR35

VSS48

VSS118

AR42

VSS49

VSS119

AR43

VSS50

VSS120

AR45

VSS51

VSS121

AR46

VSS122

S52

VS

AR48

VSS123

VSS53

AR5

VSS124

VSS54

AR50

VSS125

VSS55

AR52

VSS126

VSS56

AR53

VSS127

VSS57

AR55

VSS128

VSS58

AR58

VSS129

VSS59

AR63

VSS130

VSS60

AR8

VSS131

VSS61

AT2

VSS132

VSS62

AT20

VSS133

VSS63

AT23

VSS134

VSS64

AT28

VSS135

VSS65

AT35

VSS136

VSS66

AT4

VSS137

VSS67

AT42

VSS138

VSS68

AT56

VSS139

VSS69

AT58

VSS140

VSS70

A5
A67
A70
AA2
AA4
AA65
AA68
AB15
AB16
AB18
AB21
AB8

AD13
AD16
AD19
AD20
AD21
AD62
AD8
AE64
AE65
AE66
AE67
AE68
AE69
AF1
AF10
AF15

AF17
AF2
AF4
AF63
AG16
AG17
AG18
AG19
AG20
AG21
AG71
AH13
AH6
AH63
AH64
AH67

AJ15
AJ18
AJ20
AJ4
AK11
AK16
AK18
AK2

1
AK22
AK27
AK63
AK68
AK69
AK8
AL2
AL28

AL32
AL35
AL38
AL4
AL45
AL48
AL52
AL55
AL58
AL64

U0301Q

GND 2 OF 3

REV=<REV>

BA49

VSS209

VSS141

BA53

VSS210

VSS142

BA57

VSS211

VSS143

BA6

VSS212

VSS144

BA62

VSS213

VSS145

BA66

VSS214

VSS146

BA71

VSS215

VSS147

BB18

VSS216

VSS148

BB26

VSS217

VSS149

BB30

VSS218

VSS150

BB34

VSS219

VSS151

BB38

VSS220

VSS152

BB43

VSS221

VSS153

BB55

VSS222

VSS154

BB6

VSS223

VSS155

BB60

VSS224

VSS156

BB64

VSS225

VSS157

BB67

VSS226

VSS158

BB70

VSS227

VSS159

C1

VSS228

VSS160

C25

VSS229

VSS161

C5

VSS230

VSS162

D10

VSS231

VSS163

D11

VSS232

VSS164

D14

VSS233

VSS165

D18

VSS234

VSS166

D22

VSS235

VSS167

D25

VSS236

VSS168

D26

VSS237

VSS169

D30

VSS238

VSS170

D34

SKL-ULT

VSS239

VSS171

D39

VSS240

VSS172

D44

VSS241

VSS173

D45

VSS2

VSS174

2

4

D47

VSS175

VSS243

D48

VSS176

VSS244

D53

VSS177

VSS245

D58

VSS178

VSS246

D6

VSS179

VSS247

D62

VSS180

VSS248

D66

VSS181

VSS249

D69

VSS182

VSS250

E11

VSS183

VSS251

E15

VSS184

VSS252

E18

VSS185

VSS253

E21

VSS186

VSS254

E46

VSS187

VSS255

E50

VSS188

VSS256

E53

VSS189

VSS257

E56

VSS190

VSS258

E6

VSS191

VSS259

E65

VSS260

192

VSS

E71

VSS261

VSS193

F1

VSS262

VSS194

F13

VSS263

VSS195

F2

VSS264

VSS196

F22

VSS265

VSS197

F23

VSS266

VSS198

F27

VSS267

VSS199

F28

VSS268

VSS200

F32

VSS269

VSS201

F33

VSS270

VSS202

F35

VSS271

VSS203

F37

VSS272

VSS204

F38

VSS273

VSS205

F4

VSS274

VSS206

F40

VSS207

VSS275

F42

VSS276

VSS208

BA41

VSS277

AT63
AT68
AT71
AU10
AU15
AU20
AU32
AU38

AV1
AV68
AV69
AV70

AV71

AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41

AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57

AW6

AW60
AW62
AW64
AW66

AW8
AY66

B10

B14

B18

B22

B30

B34

B39

B44

B4

8
B53
B58
B62
B66
B71
BA1

BA10
BA14

BA18

BA2

BA23
BA28
BA32
BA36

F68

BA45

U0301R

GND 3 OF 3

F8

VSS319

VSS278

G10

VSS320

VSS279

G22

VSS321

VSS280

G43

VSS322

VSS281

G45

VSS323

VSS282

G48

VSS324

VSS283

G5

VSS325

VSS284

G52

VSS326

VSS285

G55

VSS327

VSS286

G58

VSS328

VSS287

G6

VSS288

VS

S329

G60

VSS289

VSS330

G63

VSS290

VSS331

G66

VSS291

VSS332

H15

VSS292

VSS333

H18

VSS293

VSS334

H71

VSS294

VSS335

J11

VSS295

VSS336

J13

VSS296

VSS337

J25

VSS297

VSS338

J28

VSS298

VSS339

J32

VSS299

VSS340

J35

VSS300

VSS341

J38

VSS301

VSS342

J42

VSS302

VSS343

J8

VSS303

VSS344

K16

VSS304

VSS345

K18

VSS305

VSS346

K22

VSS306

VSS347

K61

VSS307

VSS348

K63

SKL-ULT

VSS308

VSS349

K64

VSS309

VSS350

K65

VSS310

VSS351

K66

VSS311

VSS352

K67

VSS312

VSS353

K68

VSS313

VSS354

K70

VSS314

VSS355

K71

VSS315

VSS356

L11

VSS316

VSS357

L16

VSS317

VSS358

L17

VSS318

VSS359

BOM

REV=<REV>

Title :

CPU_PCH_POEWR,GND

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

Project Name

L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N6

5
N68

P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66

U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

27

SPI PCH Power

2nd PCH SPI

PCH_SPI_DQ25

R2834
1KOhm

12

SPI_CS#0_SPI_2_CON
SPI_SO_SPI_2_CON

SPI_WP# SPI_CLK_SPI_2_CON

21

SL2807

SPI_CS#0_SPI_25

0402

21

SL2808

EC_SCE#_PCH30

0402

21

SL2803

SPI_SO_SPI_25

0402

21

SL2804

EC_SO_PCH30

0402

2016/10/07 X542UA_#28, Modify SPI PCH power follow X456U

+3VSUS +3VSUS_SPI

U2801

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND5DI(IO0)

W25Q64FVSSIQ

05006-00010500

GND

(64Mb)

2nd :
05006-00012700
05006-00013400

SPI_CS#0_SPI_2_CON

SPI_SO_SPI_2_CON

System Management Interface

D2801

1

3

2

BAT54CW

12

R2816 0Ohm@

+3VSUS_SPI

12

R2832

C2802

1KOhm

0.1UF/10V

12

8

GND

VCC

7

HOLD#(IO3)

6

CLK

PCH_SPI_DQ3 5

SPI_SI_SPI_2_CON

12

C2803

10PF/50V
@/EMI

GND

21

SL2805

SPI_CLK_SPI_25

0402

SPI_CLK_SPI_2_CON

21

SL2806

EC_SCK_PCH30

0402

21

SL2801

SPI_SI_SPI_25

0402

SPI_SI_SPI_2_CON

21

SL2802

EC_SI_PCH30

0402

SMB1_CLK30,78, 90

SMB1_DAT30,78,90

SMB3_CLK30

SMB3_DAT30

LPC Debug Port

+12VS +3VS

Q2802A

2

UM6K1N

61

5

34

+5VSUS

Q2803A
UM6K1N

2

/SMAP

61

5

34

20151225
12G183301208-->12018-00102700
更換Debug port 樣式 FFC 正/正

LPC_AD05,30

LPC_AD15,30

LPC_AD25,30

LPC_AD35,30

LPC_FRAME#5,30

CLK_DEBUG5

12

12

R2815

R2814

4.7KOhm

4.7KOhm

Q2802B
UM6K1N

+3VA_DSW

12

12

R2817

R2818

4.7KOhm

4.7KOhm

/SMAP

/SMAP

Q2803B

UM6K1N

/SMAP

<Variant Name>

Title :

28_PCH-SPI ROM,OTH

Size

Dept.:

C

Date: Sheet of

Tuesday, June 20, 2017

SMB1_CLK_S 50,76

Thermal SensorEC

SMB1_DAT_S 50,76

+3VA_DSW

SMB1_CLK_SA 37

Smart Amp

SMB1_DAT_SA 37

+3V

12

C2801

0.1UF/10V

/DEBUG

GND

JDEBUG2801

1

1

2

SIDE1

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

SIDE2

11

12

12

FPC_CON_12P

GND GND

/DEBUG

12018-00102700

Project Name

NB2_RD1_EE1

Engineer:

13

14

Rev

R2.0X542UA/UV

Joach_Wang

102

28

SPI PCH Power

2nd PCH SPI

PCH_SPI_DQ25

R2834
1KOhm

12

SPI_CS#0_SPI_2_CON
SPI_SO_SPI_2_CON

SPI_WP# SPI_CLK_SPI_2_CON

21

SL2807

SPI_CS#0_SPI_25

0402

21

SL2808

EC_SCE#_PCH30

0402

21

SL2803

SPI_SO_SPI_25

0402

21

SL2804

EC_SO_PCH30

0402

2016/10/07 X542UA_#28, Modify SPI PCH power follow X456U

+3VSUS +3VSUS_SPI

U2801

1

CS#

2

DO(IO1)

3

WP#(IO2)

4

GND5DI(IO0)

W25Q64FVSSIQ

05006-00010500

GND

(64Mb)

2nd :
05006-00012700
05006-00013400

SPI_CS#0_SPI_2_CON

SPI_SO_SPI_2_CON

System Management Interface

D2801

1

3

2

BAT54CW

12

R2816 0Ohm@

+3VSUS_SPI

12

R2832

C2802

1KOhm

0.1UF/10V

12

8

GND

VCC

7

HOLD#(IO3)

6

CLK

PCH_SPI_DQ3 5

SPI_SI_SPI_2_CON

12

C2803

10PF/50V
@/EMI

GND

21

SL2805

SPI_CLK_SPI_25

0402

SPI_CLK_SPI_2_CON

21

SL2806

EC_SCK_PCH30

0402

21

SL2801

SPI_SI_SPI_25

0402

SPI_SI_SPI_2_CON

21

SL2802

EC_SI_PCH30

0402

SMB1_CLK30,78, 90

SMB1_DAT30,78,90

SMB3_CLK30

SMB3_DAT30

LPC Debug Port

+12VS +3VS

Q2802A

2

UM6K1N

61

5

34

+5VSUS

Q2803A
UM6K1N

2

/SMAP

61

5

34

20151225
12G183301208-->12018-00102700
更換Debug port 樣式 FFC 正/正

LPC_AD05,30

LPC_AD15,30

LPC_AD25,30

LPC_AD35,30

LPC_FRAME#5,30

CLK_DEBUG5

12

12

R2815

R2814

4.7KOhm

4.7KOhm

Q2802B
UM6K1N

+3VA_DSW

12

12

R2817

R2818

4.7KOhm

4.7KOhm

/SMAP

/SMAP

Q2803B

UM6K1N

/SMAP

<Variant Name>

Title :

28_PCH-SPI ROM,OTH

Size

Dept.:

C

Date: Sheet of

Tuesday, June 20, 2017

SMB1_CLK_S 50,76

Thermal SensorEC

SMB1_DAT_S 50,76

+3VA_DSW

SMB1_CLK_SA 37

Smart Amp

SMB1_DAT_SA 37

+3V

12

C2801

0.1UF/10V

/DEBUG

GND

JDEBUG2801

1

1

2

SIDE1

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

SIDE2

11

12

12

FPC_CON_12P

GND GND

/DEBUG

12018-00102700

Project Name

NB2_RD1_EE1

13

14

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

28

EC 8585

Only 3V Torlence

GPB[0,1,2,3,4,5,6]
GPC[3,4,5,6,7]
GPD[0,4,6,7]
GPE[4]
GPF[6,7]
GPH[7]
GPI [0 :7]
GPJ[0:7]

Can be adjusted to
Open-Drain for port:

GPA0~GPA3
GPB0~GPB7
GPD0~GPD7
GPE0~GPE7
GPF0~GPF7
GPH0~GPH6
GPJ0~GPJ5

EC Require

C3022

12

EC_RST#

1000PF/50V

/EMI

2013/03/15 Paul :For EMI resevered

ITE Version ASUS P/N

06037-00050400

IT8995E/AX

IT8995E-128/CX 06037-00050500

Thermal sensor

C3019 15PF/50V

12

EC_SCK_PCH

C3020 33PF/50V

12

EC_SI_PCH

C3021 33PF/50V

12

EC_SCE#_PCH

CLK_KBCPCI_PCH

BAT1_IN_OC#

UX303 1002

PWR_SW#

BUF_PLT_RST#

Battery

@

@

@

@

C3018 10PF/50V

12

@

C3011 0.01UF/16V

12

C3012 0.01UF/16V

12

/EMI

C3009 1000PF/50V

12

2017/02/06 X542UA_R1.1 #26, EMI solution

Power

+3VA_EC

12

12

C3003

C3002

10UF/6.3V

0.1UF/16V
nbs_c0603_h37_000s

12

RN3001A

LPC_AD05,28

47OHM

34

RN3001B

KSI031
KSI131
KSI231
KSI331
KSI431
KSI531
KSI631
KSI731

KSO031
KSO131
KSO231
KSO331
KSO431
KSO531
KSO631
KSO731
KSO831
KSO931

47OHM

56

47OHM

78

47OHM

12

R3024 15Ohm

12

R3028 15Ohm

12

R3010 15Ohm

21

SL3025

0402

21

SL3016

0402

21

0402

12

R3033 43Ohm

LPC_AD0_R

RN3001C

LPC_AD1_R

RN3001D

LPC_AD2_R
LPC_AD3_R

CLK_KBCPCI_PCH

1

T3005

A20GATE

1

T3009

EC_SCK_PCH_X1

EC_GPG6

EC_SO_PCH_X1
EC_SI_PCH_X1
EC_SCE#_PCH_X1

EC_GPG2

1

T3024

1

T3008

EC_GPJ6
EC_GPJ7

SL3008

EC_GPB3

PECI_EC_R

LPC_AD15,28
LPC_AD25,28
LPC_AD35,28

CLK_KBCPCI_PCH5

LPC_FRAME#5,28

BUF_PLT_RST#25, 33,53,54,68,70

INT_SERIRQ5

EXT_SMI#3
EXT_SCI#3

RC_IN#5

EC_RST#32

DGPU_LIMIT76

EC_SCK_PCH28

EC_SO_PCH28

EC_SI_PCH28

EC_SCE#_PCH28

PWRLIMIT_EC#89

KSO1031
KSO1131
KSO1231
KSO1331
KSO1431
KSO1531

PM_PWRBTN#25

PM_SUSC#25,57,86

5VSUS_ON57,87

VSUS_ON57,83,88
SMB0_CLK60,89
SMB0_DAT60,89

TP_CLK31
TP_DAT31

PWR_SW#31,32,59

PS_ON_EC32
SMB1_CLK28,78,90
SMB1_DAT28,78,90

PECI_EC8

PCH_SPI_OV22

06037-00050500

10

13

22

15
23
126

14

125
105
119
103
102
101
100

58
59
60
61
62
63
64
65

36
37
38
39
40
41
42
43
44
45
46
51
52
53
54
55
56
57

128

85
86
87
88
89
90

110
111
115
116
117
118

12

C3006
10UF/6.3V
nbs_c0603_h37_000s

U3001

EIO0/LAD0/GPM0

9

EIO1/LAD1/GPM1

8

EIO2/LAD2/GPM2

7

EIO3/LAD3/GPM3
ESCK/LPCCLK/GPM4

6

ECS#/LFRAME#/GPM5
ERST#/LPCRST#/GPD2

5

ALERT#/SERIRQ/GPM6
ECSMI#/GPD4
ECSCI#/GPD3
GA20/GPB5

4

KBRST#/GPB6
WRST#

SSCE1#/GPG0
FSCK/GPG7
DSR0#/GPG6
FMISO/GPG5
FMOSI/GPG4
FSCE#/GPG3
SSCE0#/GPG2

KSI0/STB#
KSI1/AFD#
KSI2/INIT#
KSI3/SLIN#
KSI4
KSI5
KSI6
KSI7

KSO0/PD0
KSO1/PD1
KSO2/PD2
KSO3/PD3
KSO4/PD4
KSO5/PD5
KSO6/PD6
KSO7/PD7
KSO8/ACK#
KSO9/BUSY
KSO10/PE
KSO11/ERR#
KSO12/SLCT
KSO13
KSO14
KSO15
KSO16/SMOSI/GPC3
KSO17/SMISO/GPC5

GPJ6

2

GPJ7

PS2CLK0/TMB0/CEC/GPF0
PS
SMCLK0/GPF2
SMDAT0/GPF3
PS2CLK2/GPF4
PS2DAT2/GPF5

PWRSW/GPB3
XLP_OUT/GPB4
SMCLK1/GPC1
SMDAT1/GPC2
SMCLK2/PECI/GPF6
SMDAT2/PECIRQT#/GPF7

IT8995E-128/CX

SL3005

0603

12

12

C3004

C3005

0.1UF/16V

0.1UF/16V

+3VS

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

0402

SL3004

+3VPLL

21

+3VA_EC

26

114

121

127

3

11

74

VCC

GPH7

AVCC

VSTBY150VSTBY292VSTBY3

VSTBY4

VSTBY5

VSTBY(PLL)

LPC

FLASH ROM

/PWUREQ#/BBO/SMCLK2ALT/GPC7

RXD/SIN0

TACH1A/TMA1/GPD7

L80HLAT/BAO/GPE0

KBMX

GPIO

TXD/SOUT0/LPCPD#/GPE 6

DTR1#/SBUSY/GPG1/ID7

CLKRUN#/GPH0/ID0

CRX1/SIN1/SMCLK3/GPH1/ID1

CTX1/SOUT1/SMDAT3/GPH2/ID2

DAT0/TMB1/GPF1

2

SMBusPS/2

DAC2/TACH0B/GPJ2
DAC3/TACH1B/GPJ3

VSS249VSS391VSS4

VSS512VCORE75AVSS

VSS1

1

27

104

EC_12

EC_AGND

12

C3008

0.1UF/16V

UX303 1202 EMI

SUSB_EC#

SUSC_EC#

LID_SW#

+3VA_EC+3VPLL

SL3006

21

12

SHORTPIN

12

C3007

nbs_r0603_shorted_000s

0.1UF/16V
SL3007

12

SHORTPIN

nbs_r0603_shorted_000s

LCD_BACKOFF# 45

+3VACC

24

PWM0/GPA0

25

PWM1/GPA1

28

CHG_LED#

PWM2/GPA2

29

1

PWM3/GPA3

30

1

EC_GPA3

PWM4/GPA4

31

EC_GPA4

PWM5/GPA5

32

PWM6/SSCK/GPA6

34

1

PWM7/RIG1#/GPA7

EC_GPA7

108

AC_IN#/GPB0

109

LID_SW#/GPB1

123

1

CTX0/TMA0/GPB2

112

EC_GPB2

VSTBY0

3VA_ALW

113

1

CRX0/GPC0

EC_GPC0

2016/11/16 X542UA_R1.0 #79, Remove PM_EXTTS#0 & R3091

120

TMRI0/GPC4

EC_GPC4

2016/11/16 X542UA_R1.0 #77, Add DGPU_FB_CLAMP_GPIO to GPC4 (GC6_EN to EC)

124

TMRI1/GPC6

16

1

EC_GPC6
EC_GPC7

18

RI1#/GPD0

21

EC_GPD0

RI2#/GPD1

33

EC_GPD1

GINT/CTS0#/GPD5

47

EC_GPD5

TACH0A/G P D 6

48

1

EC_GPD7

19
82

EC_GPE0

EGAD/GPE1

84

EC_GPE1

EGCLK/GPE3

83

EGCS#/GPE2

107

1

BTN#/GPE4

35

EC_GPE4

RTS1#/GPE5

17

1

20

CAP_LED#

L80LLAT/GPE7

122

106

VFSPI

93

2017/02/22 X542UA_R2.0 #01, Add SMB3 for Samrt Amp & contact to P28 Q2803

94
95

SMB3_CLK

96

SMB3_DAT

GPH3/ID3

97

GPH4/ID4

98

GPH5/ID5

99

GPH6/ID6

66

ADC0/GPI0

67

PM_SLP_SUS#

ADC1/GPI1

68

ADC2/GPI2

69

ADC3/GPI3

70

IMVP8_PWRGD

ADC4/GPI4

71

ADC5/DCD1#/GPI5

72

ME_SusPwrDnAck_EC

ADC6/DSR1#/GPI6

73

ADC7/CTS1#/GPI7

76

1

TACH2/GPJ0

77

EC_GPJ0

GPJ1

78

1

79

1

EC_GPJ2

80

1

EC_GPJ3

DAC4/DCD0#/GPJ4

81

1

EC_GPJ4

DAC5/RIG0#/GPJ5

EC_GPJ5

C3013

12

1000PF/50V

/EMI

C3014 0.1UF/16V

12

@/EMI

C3015 0.1UF/16V

12

@/EMI

+3VACC+3VS

12

C3001

0.1UF/16V

EC_AGND

T3010
T3011

T3013

T3003

21

SL3017

0402

T3016

21

SL3002

0402

21

SL3018

0402

T3018

21

SL3009

0402

21

SL3010

0402

21

SL3013

0402

T3019

21

SL3003

0402

21

SL3012

0402

T3020

T3017

SL3019

0402

SL3001

0402

T3023

T3012
T3015

2016/10/27 X542UA_R1.0 #54, Remove PCH_SUS_STAT#

T3007
T3014

EMI solution

PWR_LED 68
CHG_LED# 68
CHG_FULL_LED# 68

FAN0_PWM 50
KB_LED_PWM 31

AC_IN_OC# 76,89
LID_SW# 59

+3VA

DGPU_FB_CLAMP_GPI O 21,7 6,77

BAT1_IN_OC# 89

PCH_SLP_S0# 25
ME_AC_PRESENT 25
OP_SD# 36

FAN0_TACH 50

SUSB_EC# 57,77,88
SUSC_EC# 52,57,68,88

1.2V_ON 86

PM_SUSB# 25,58,88

THRO_CPU# 8

PCH_SUSACK# 25

21

+3VA_EC

PM_RSMRST# 25
DPWROK_EC 25,58
PM_PWROK 25
PM_SYSPWROK 25

PM_SLP_SUS# 25
3VSUS_PWRGD 58
ALL_SYSTEM_PWRGD 25,58,80
IMVP8_PWRGD 25,80
3VA_DSW_PWRGD 25,58,87

21

SUSWARN# 25

A/D_MAX_POWER 89
MB_MAX_POWER 89

3VADSW_ON 87

PM_SYSPWROK

PM_PWROK

DPWROK_EC

ALL_SYSTEM_PWRGD

3VSUS_PWRGD

PM_CLKRUN# 5
SMB3_CLK 28
SMB3_DAT 28

AC_IN_OC#

TP_DAT
TP_CLK

SMB1_DAT
SMB1_CLK
SMB0_DAT
SMB0_CLK

SMB3_DAT

0324 SWAP

SMB3_CLK

PWRLIMIT_EC#

UX303 0809

C3026

1000PF/50V

/EMI

C3027

1000PF/50V

/EMI

Near U3001

UX303 1003

R1.0-6

UX303 0918

BAT1_IN_OC#

EMI

EC_GPB2

3VADSW_ON

5VSUS_ON

VSUS_ON

2017/01/16 X542UA_R1.1 #09, Stuff R3036, DC S0 to
S5, EC powr latch VSUS_ON will floating & VSUS will turn on

CHG_FULL_LED#
CHG_LED#
THRO_CPU#

PM_SLP_SUS#

PM_PWRBTN#

IMVP8_PWRGD

A20GATE

RC_IN#

PM_RSMRST#

SUSB_EC#
SUSC_EC#

EC_SCK_PCH_X1
EC_SCE#_PCH_X1
EC_SO_PCH_X1
EC_SI_PCH_X1

MB_MAX_POWER

PM_SUSC#
PM_SUSB#

12

R3047 10KOhm@/in-BAT

12

R3048 10KOhm

/in-BAT

IMVP8_PWRGD3VA_DSW_PWRGD RC_IN#

12

C3028
1000PF/50V
@/EMI

BOM

Title :

Size

C

Date: Sheet of

Tuesday, June 20, 2017

Need external PU

Need external PU

12

C3023

0.1UF/6.3V
@/EMI

12

C3024

0.1UF/6.3V
@/EMI

12

C3025

0.1UF/6.3V
@/EMI

12

12

RN3002B
RN3002A

RN3004A
RN3004B

RN3003B
RN3003A
RN3003C
RN3003D
RN3005A
RN3005B

R3063 100KOhm

R3001 10KOhm

UX303 0926

R3017 100KOhm

12
12

R3015 10KOhm

12

R3061 1MOhm

R3060 100KOhm

R3036 1MOhm

R3021 10KOhm@
R3022 10KOhm@
R3016 10KOhm@
R3018 10KOhm@

R3020 100KOhm@

UX303C1 0718

UX303C1 0520

R3032 10KOhm@

R3065 10KOhm
R3066 10KOhm

R3069 10KOhm@
R3068 10KOhm@
R3030 10KOhm@
R3031 10KOhm@

R3006 100KOhm@

R3002 100KOhm
R3003 100KOhm

+3VA_EC

12

C3029
1000PF/50V
@/EMI

GNDGND GND

IT8995E-128/CX

Dept.:

NB2_RD1_EE1

@

4.7KOhm

34

@

4.7KOhm

12
12

4.7KOhm

34

4.7KOhm

34

4.7KOHM

12

4.7KOHM

56

4.7KOHM

78

4.7KOHM

12

4.7KOhm

34

4.7KOhm

12
12

12
12

12
12
12
12

12

12

R3019 10KOhm@

12

R3085 10KOhm

12

R3074 10KOhm@

12

R3075 10KOhm

12

12
12

12
12
12
12

12
12
12

Checking
BAT1_IN_OC#

可拆→接到BAT
不可拆→PD

for X455
internal battery always PD

12

C3030
1000PF/50V
@/EMI

Project Name

X542UA/UV

Engineer:

+5VS

+3VS

+3VA_EC

+3VSUS

+3VS

Rev

R2.0

Joach_Wang

102

30

+3VA

12

R3007 10KOhm

12

PWR_SW#

R3008 10KOhm

12

LID_SW#

R3009 10KOhm

Internal Keyboard

J3101

1

1

27

2

GND1

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

28

25

GND2

25

26

26

FPC_CON_26P

12018-00200600

2nd source:
12018-00200700
12018-00200500

Touch PAD

2016/11/22 X542UA_#85, J31 02 (Touch Pad) modif y pin define to STD

J3102

1

1

2

SIDE1

2

9

3

3

4

4

5

5

6

6

7

SIDE2

7

10

8

8

FPC_CON_8P

12018-00212200

2nd source:
12018-00211200
12018-00212400

Fingerprint

2016/10/20 X542UA_R1.0 #51, Add J3 103 for FingerPrint

J3103

8

8

10

7

SIDE2

7

6

6

5

5

4

4

3

3

9

2

SIDE1

2

1

1

FPC_CON_8P

12018-00212200

2nd source:
12018-00211200
12018-00212400

KSO7
KSO0

KSI1 30

KSI1

KSI7 30

KSI7
KSO9

KSI6 30

KSI6

KSI5 30

KSI5
KSO3

KSI4 30

KSI4

KSI2 30

KSI2
KSO1

KSI3 30

KSI3

KSI0 30

KSI0
KSO13
KSO5
KSO2
KSO4
KSO8
KSO6
KSO11
KSO10
KSO12
KSO14
KSO15

20150602 X540UJ DEL

TP_CLK_C

TP_DAT_C

I2C1_SDA_TCH_C
I2C1_CLK_TCH_C

GND

+3VS_FP

FP_RST#

FP_CS#

GND

KSO7 30
KSO0 30

KSO9 30

KSO3 30

KSO1 30

KSO13 30
KSO5 30
KSO2 30
KSO4 30
KSO8 30
KSO6 30
KSO11 30
KSO10 30
KSO12 30
KSO14 30
KSO15 30

PWR_SW# 30,32,59

請將測點至於TOP面
R2.0 新增_Tim_20150820

12

R3101 0Ohm@

12

R3102 0Ohm@

21

SL3104

0402

21

SL3105

0402

2017/01/23 X542UA_R1.1 #17 , FP power modfiy fr om +3VS to +3VSUS

+3VS_FP+3VS

21

0402

SL3102

12

C3107

0.1UF/16V
@/EMI

GND

12

R3103 0Ohm/FPrint

FP_RST#_GPIO 21
FP_GSPI0_MOSI 21

FP_INT# 21
FP_GSPI0_MISO 21

FP_GSPI0_CLK 21

EMI

KSO7
KSO0
KSI1
KSI7

KSO9
KSI6
KSI5
KSO3

KSI4
KSI2
KSO1
KSI3

KSI0
KSO13
KSO5
KSO2

KSO4
KSO8
KSO6
KSO11

KSO10
KSO12
KSO14
KSO15

12

CN3101A

@/EMI

33PF/50V

34

CN3101B

@/EMI

33PF/50V

56

CN3101C

@/EMI

33PF/50V

78

CN3101D

@/EMI

33PF/50V

12

CN3102A

@/EMI

33PF/50V

34

CN3102B

@/EMI

33PF/50V

56

CN3102C

@/EMI

33PF/50V

78

CN3102D

@/EMI

33PF/50V

12

CN3103A

@/EMI

33PF/50V

34

CN3103B

@/EMI

33PF/50V

56

CN3103C

@/EMI

33PF/50V

78

CN3103D

@/EMI

33PF/50V

12

CN3104A

@/EMI

33PF/50V

34

CN3104B

@/EMI

33PF/50V

56

CN3104C

@/EMI

33PF/50V

78

CN3104D

@/EMI

33PF/50V

12

CN3105A

@/EMI

33PF/50V

34

CN3105B

@/EMI

33PF/50V

56

CN3105C

@/EMI

33PF/50V

78

CN3105D

@/EMI

33PF/50V

12

CN3106A

@/EMI

33PF/50V

34

CN3106B

@/EMI

33PF/50V

56

CN3106C

@/EMI

33PF/50V

78

CN3106D

@/EMI

33PF/50V

GND

1

+3VS_TP

1

TP_CLK_C

1

TP_DAT_C

1

I2C1_SDA_TCH_C

1

I2C1_CLK_TCH_C

1

TOUCHPAD_INTR#

TP_CLK 30
TP_DAT 30

I2C1_SDA_TCH_PAD 21

I2C1_SCL_TCH_PAD 21

TOUCHPAD_INTR# 21,69

2017/01/23 X542UA_R1.1 #18, Remo ve reserve RES & add curcrit for RST#

+5VS

2

61

Q3102A

UM6K1N

12

R3108 0Ohm@/FPrint

5

34

Q3102B

UM6K1N

T3101

T3103

T3104

T3106

T3107

T3108

+3VS_TP

12

C3102

0.1UF/16V
@/EMI

GND

2017/02/16 X542UA_R1.1 #31, For AW FP reserve G PIO for reset pin

FP_GSPI0_CS# 21

+3VS

SL3101

12

C3103
10PF/50V
@/EMI

GND GND

+3VS_TP

21

0402

TP_DATTP_CLK

Close J3103

FP_GSPI0_CS#

FP_GSPI0_CLK

FP_GSPI0_MISO

FP_GSPI0_MOSI

2016/10/28 X542UA_#66, Add BL CONN. J3 104 & circuit

KB BL CON

12

C3101

0.1UF/16V
@/EMI

TP_CLK_C

GND

TP_DAT_C

12

C3104
10PF/50V
@/EMI

R3106 49.9KOHM@/FPrint

R3107 49.9KOHM@/FPrint

R3104 4.7KOhm@/FPrint

R3105 4.7KOhm@/FPrint

D3101

1

I/O1

2

GND

34

I/O2 I /O3

AZC099-04SP

07024-00200200

@/EMI

+3VS_FP

12

12

12

12

6

5

I/O4

VDD

2nd source:
07G022006330

/KL

J3104

SIDE1

SIDE2

6

FPC_CON_4P

12018-00081800

I2C1_SDA_TCH_C

I2C1_CLK_TCH_C

343mA

+5VS

無提供KBL pin define, 預留SL 做為預防跳線用

25 mils

21

SL3106

0603

115

2

21

2

SL3107

3

0603

3

4

12

4

@/EMI

@/KL

C3108

C3105

0.1UF/16V

12

10UF/6.3V

/KL

56712

D

Q3101
RF4E080BNTB

3

KB_LED_PWM 30

GS

07005-01430000

4

8

+3VSGND

BOM

Project Name

Rev

Title :

EC-IT8995_KB,TP

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

31

Thermal Policy

2016/10/07 X542UA_#29, Modify GPU_THERM# follow X456U

GPU_THERM#

SL3201

CPU_THERM#50

PLT_RST#25

T3201

+VDD_AON

12

R3209
0Ohm

@/VGA

R3210

12

DGPU_PEX_RST#70,76

0Ohm

Q3203B

/VGA

5

UM6K1N

GPU_THERM#_GPU76,77

34

GPU_THERM#

battery embedded (press pwr_sw 10sec, then reset ec )

R3203
1KOhm

12

61

Q3202A

2

PWR_SW#30,31,59

UM6K1N

1

5

R3206
0Ohm
/VGA

12

21

0402

34

Q3201B
UM6K1N

+3VA_EC

12

R3204
2MOhm

12

C3203
10UF/6.3V
nbs_c0603_h37_000s

GND GN DGND

+3VS

12

R3207
10KOhm
@

2

Q3203A
UM6K1N

61

2

GND

5

+3VA_EC

12

C3201
1UF/6.3V
nbs_c0603_h37_000s

GND

R3211 0Ohm

12

61

Q3201A
UM6K1N

2016/11/11 X542UA_R1.0 #72, Modify reference Design IP IT8995 KABYLAKE_EC_RST

D3202

EC_RST#_R

34

Q3202B
UM6K1N

R3208 10KOhm

R3202
100KOhm

12

D3201

1N4148WS

BAT54CTB

3

@

12

12

12

C3202

0.1UF/10V

GND

1

2

IT8752 has built-in level detection for
power-on reset circuit

1

EC_RST#

PS_ON_EC 30

PS_ON 57,88

T3202

EC_RST# 30

Output Signal

<Variant Name>

Project Name

X542UA/UV

32_RST_Reset Circuit

Title :

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

Engineer:

Joach_Wang

32

Rev

R2.0

102

of

The distance from u3301.36 to L3301 within 200 mil.

The distance from L3301 to +1.05V_LAN_C within 200 mil.

12

12

@

@

@

C3326

C3327

C3343

0.1UF/16V

0.1UF/16V

0.1UF/16V

The distance from U3301.34, U3301.35 , VDD_REG net to
SL3303 within 200 mil.

wider>40 mil

VDD_REG

12

12

C3348

4.7UF/6.3V

nbs_c0603_h37_000s

GND

12

12

12

@

@

C3337

C3338

0.1UF/16V

0.1UF/16V

GND

C3310

0.1UF/16V

@
C3339

0.1UF/16V

12

GND

wider:60 mil

@
C3328

0.1UF/16V

12

4.7UF/6.3V

nbs_c0603_h37_000s

SL3303

0805

SHORTPIN

@
C3340

0.1UF/16V

2017/01/13 X542UA_R1.1 #07, C3344&C3345 modify to 12pF for X542UQ SR PCB

+3VSUS_LAN

12

R33211KOhm

24
23

+1.05V_LAN

22

VDD_REG

21

+1.05V_LAN_C

20
19

LAN_ISOLATE

18
17

PCIE_RXN3_GLAN

PCIE_RXP3_GLAN

PCIE Tx,Rx方向是以南橋為觀點

chip pin Tx,Rx是以chip為觀點

BOM

Date: Sheet of

Title :

Size

B

Tuesday, June 20, 2017

X2_LAN

X1_LAN

C3345

12PF/50V

SL3301

SL3312

LAN_RTL8111

Dept.:

X3301

13

2

4

25.00MHZ

12

GND GND

07G010272501

2nd source:
07G010952500
07G010X92501

21

PCIE_WAKE# 25,53,54

0402

21

BUF_PLT_RST# 25,30,53,54,68,70

0402

PCIE_RXN_GLAN_C 23

12

C33340.1UF/16V

PCIE_RXP_GLAN_C 23

12

C33350.1UF/16V

LAN_ISOLATE

Project Name

Engineer:

NB2_RD1_EE1

1KOhm

15KOhm

R3307

R3322

12

C3311

12PF/50V

+3VS

12

1%

12

GND

Joach_Wang

33

Rev

R2.0X542UA/UV

102

L3301

4.7UH

21

+1.05V_LAN

wider:60 mil

12

12

C3347

C3309

0.1UF/16V

2016/10/06 X542UA_R1.0 #17, LAN chip change solution to RTL8411 follow X456U

GND

+1.05V_LAN_C

12

12

12

@

@

C3332

C3331

C3333

0.1UF/16V

0.1UF/16V

0.1UF/16V

21

L_TRDP034

L_TRDM034

12

+1.05V_LAN_C

L_TRDP134

L_TRDM134
L_TRDP234
L_TRDM234

+1.05V_LAN_C

L_TRDP334

L_TRDM334

CLKREQ_GLAN#24

PCIE_TXP_GLAN23
PCIE_TXN_GLAN23

CLK_PCIE_GLAN24
CLK_PCIE_GLAN#24

GND

12

R3305

2.49KOhm
1%

+1.05V_LAN_C

X1_LAN

X2_LAN

+3VSUS_LAN

GND

U3301

1
2
3

4
5
6

7
8

RTL8111GUX-CG

+3VSUS_LAN

25

26

27

28

30

31

32

33

LED2

LED0

RSET

GND134GND2

CKXTAL129CKXTAL2

AVDD10_3

AVDD33_2

LED1/GPO

REGOUT

MDIP0

VDDREG

MDIN0

DVDD10

AVDD10_1

MDIP1

LANWAKEB

MDIN1

ISOLATEB

MDIP2

PERSTB

MDIN2

HSON

AVDD10_2

HSOP

MDIP310MDIN311AVDD33_112CLKREQB13HSIP14HSIN15REFCLK_P16REFCLK_N

9

RTK建議3V_LAN raise time >0.5ms

+3VSUS_LAN

12

12

@

C3341

C3342

0.1UF/16V

0.1UF/16V

+3VSUS +3VSUS_LAN

JP3301

1MM_OPEN_5MIL

112

2

Q3304

PMN45EN

1

6

D

235

S

4

G

@

12

12

R3331

C3355

@

200KOhm @

0.1UF/16V

GNDGND

R3328
100KOhm

12

1%

@

+12VSUS

RJ45 con.

2016/10/06 X542UA_R1.0 #18, Transformer & RJ45 follow X456U

12

12

C3405

C3406

0.1UF/10V

1UF/10V

@

GNDGND

GND

L_TRDP1 L_TRDP2L_TRDP3

L_TRDM1

L_TRDP033
L_TRDM033

L_TRDP133
L_TRDM133

L_TRDP233
L_TRDM233

L_TRDP333
L_TRDM333

Place near chassis GND

+3VSUS +3VSUS

L_TRDP0

VDD

I/O4

5

6

D3401
AZC099-04SP

/EMI

07024-00200200

1234

GND

I/O2 I/O3

I/O1

L_TRDM0 L_TRDM3

GND GND

U3401

25

GND

24

1

NC4

TCT1

23

2

LAN_VDDCT

C3403

0.1UF/16V

12

C3402

@

0.1UF/16V

12

TD1+

3

L_TRDP0

TD1-

4

L_TRDM0

TC2

5

TD2+

6

L_TRDP1

TD2-

7

L_TRDM1

TC3

8

TD3+

9

L_TRDP2

TD3-

10

L_TRDM2

TC4

11

TD4+

12

L_TRDP3

TD4-13MX4-

L_TRDM3

N-1020G

R2.2 [Chip]
U3401 change to 25pin footprint

LAN_GND

MX1+

22

MX1-

21

NC3

20

MX2+

19

MX2-

18

NC2

17

MX3+

16

MX3-

15

NC1

14

MX4+

0619 C3407 mount for EA LAN common voltage Andy

FOR EMI

C3407

0.1UF/16V

12

/EMI

12

C3408

0.1UF/16V

@/EMI

GND

Place near chassis GND

VDD

I/O4

5

6

D3402
AZC099-04SP

/EMI

07024-00200200

1234

GND

I/O2 I/O3

I/O1

L_TRDM2

L_CMT0
L_TRLP0

L_TRLM0

GND

L_CMT1
L_TRLP1
L_TRLM1

L_CMT2
L_TRLP2

L_TRLM2

L_CMT3
L_TRLP3
L_TRLM3

實掛料是FCE 的料
非AJOHO09200-00050900

09200-00050500

2nd source:
09G051059A20

C3409

0.1UF/16V

12

@/EMI

12

(142,1682)

C3410

(464,1934)

0.1UF/16V

(328,2482)

@/EMI

12

C3411

LAN_GND

0.1UF/16V

@/EMI

LAN_GND

GND

R2.2 [Chip]
Del R3401 for 非繞線式Transformer 1020G

12

RN3401A

34

L_CMT1

RN3401B

56

L_CMT0

RN3401C

78

L_CMT2

RN3401D

L_CMT3

GND_LAN_T 上禁止加任何零件

34

SL3401B

2R4P

L_TRLP0

14

L_TRLM0

12

SL3401A

2R4P

34

SL3402B

2R4P

L_TRLP1

14

L_TRLM1

12

SL3402A

2R4P

12

SL3403A

2R4P

L_TRLM2

14

L_TRLP2

34

SL3403B

2R4P

34

SL3404B

2R4P

L_TRLM3

14

L_TRLP3

12

SL3404A

2R4P

75Ohm
75Ohm
75Ohm

75Ohm

23

90Ohm/100Mhz

L3401

23

90Ohm/100Mhz

L3402

23

23

@/EMI

@/EMI

@/EMI
90Ohm/100Mhz
L3403

20161207_SWAP

L3404
90Ohm/100Mhz

@/EMI

GND_LAN_T

12

C3404

1000PF/2KV

LAN_GND

L_TRLP0_C

L_TRLM0_C

L_TRLP1_C

TOP、In1、In2、In2、In3、Bottom層需鋪Lan-Gnd

L_TRLM1_C

L_TRLM2_C

L_TRLP2_C

L_TRLM3_C

BOM

L_TRLP3_C

J3401

1

1

2

L_TRLP0_C

2

3

L_TRLM0_C

3

4

L_TRLP1_C

4

5

L_TRLP2_C

5

6

L_TRLM2_C

6

7

L_TRLM1_C

7

8

L_TRLP3_C

8

L_TRLM3_C

LAN_JACK_8P

12014-00363100

Project Name

Title :

LAN_AR8171_RJ45

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

Engineer:

9

P_GND1

10

P_GND2

11

P_GND3

12

P_GND4

LAN_GND

Rev

R2.0

Joach_Wang

102

of

34

MOAT

MOAT

12

R3621 0Ohm

12

R3625 0Ohm

GND GND_AUDIO

12

R3633 33Ohm

DIN37

MUTE CONTROL

ACZ_RST#_AUD22

FROM PCH

OP_SD#30

FROM EC

+5VS_AUDIO+5VS

AnalogDigital

SL3616

21

0603

+1.8VS_AUDIO+1. 8VS

AnalogDigital

SL3614

21

0603

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

2016/11/10 X542UA_R1.0 #70, Reserve R3526/R3627/R3631/R3632 for Smart Amp. SPK co-lay

2017/03/22 X542UA_R2.0 #06, R3626/27/31/32 change to 0603 & RC filter

2017/04/13 X542URV_R1.1 R3626/27/31/32 change to 0603 BEAD 09G013120114

2016/12/05 X542UA_R1.0 #97, Add DIN to P37 Smart Amp

DOUT37
I2S_BCLK37

12

I2S_MCLK37

C3609

I2S_LRCLK37

22PF/50V

GND

ACZ_BCLK_AUD22

ACZ_SYNC_AUD22

ACZ_SDIN0_AUD22

ACZ_SDOUT_AUD22

FOR ICH ACZ BUS =1.8V

AUD_DVDD_IO

12

E

FOR ICH ACZ BUS =3.3V

12

R36120Ohm @

+5VS

SL3618

12

12

C3613

C3614

0.1UF/10V

10UF/6.3V

GND GND

+1.8VS

12

R3607 0Ohm@

+3VS

nbs_r0603_h24_000s

21

SL3615

0603

+1.8VS AUD_DVDD_IO

21

SL3617

0603

+3VS

12

R3619 0Ohm@

nbs_r0603_h24_000s

H_SPKL+_CON37
H_SPKL-_CON37
H_SPKR-_CON37
H_SPKR+_CON37

12

C3637
1000PF/50V
@/nonSMAP

12

C3638
1000PF/50V
@/nonSMAP

GNDGND GNDGND

DLY_OP_SD#

12

12

12

C3633

C3632

C3634

22PF/50V

22PF/50V

22PF/50V

@

@

@

12

R3603 22Ohm

12

R3604 22Ohm

R3609
10KOhm

B

Q3602
PMBS3904

AUD_DVDD

C

R3608
10KOhm

D3601

1

12

3

2

DLY_OP_SD#

BAT54AW

R3610
10KOhm
@

12

GND

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

21

0603

PVDD

12

12

C3615

0.1UF/10V

closepin41 closepin46

AUD_DVDD

12

12

C3603

C3606

0.1UF/10V

10UF/6.3V

GND

2017/01/11 X542UA_R1.1 #02, AUD_VDD_IO modify to +1.8VS

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

12

12

C3604

C3607

0.1UF/10V

10UF/6.3V

GND

21

L3601 120Ohm/100Mhz N/A

21

L3602 120Ohm/100Mhz N/A

21

L3603 120Ohm/100Mhz N/A

21

L3604 120Ohm/100Mhz N/A

12

C3635
1000PF/50V
@/nonSMAP

12

C3636
1000PF/50V
@/nonSMAP

AUD_DVDD

12

GND

T3611

T3601
T3607

12

R3629 22Ohm

12

R3628 22Ohm

12

R3616 22Ohm

12

R3630 22Ohm

12

C3631

22PF/50V
@

GNDGNDGND GND

C3629 10PF/50V@

12

DLY_OP_SD# 37

12

12

C3617

C3616

C3623

0.1UF/10V

10UF/6.3V

10UF/6.3V

+5VS_AUDIO

12

12

C3621

C3622

10UF/6.3V

0.1UF/6.3V
nbs_r0201_h12_000s

nbs_c0201_h13_000s,c0201

GND_AUDIO

PVDD
H_SPKL+_C
H_SPKL-_C
H_SPKR-_C
H_SPKR+_C

PVDD

HPOUT_JD

LINE2_L

U3601

I2S-EN/SPDIF-OUT/DMIC-DATA34

PDB

DVDD

GPIO0/DMIC-DATA12

GPIO1/DMIC-CLK

I2C-DATA

I2C-CLK

I2S-IN

I2S-OUT1

I2S-BCLK

I2S-MCLK/I2S-OUT2

I2S-LRCK

ALC3288-CG

06103-00360000

AUD_DVDD_IO

45

46

47

48

49

PVSS150PVSS2

PVDD2

HP/LINE1-JD(JD1)

I2S-IN/I2S-OUT-JD(JD3)

AUDIOLINK_BCLK14AUDIOLINK_SYNC15AUDIOLINK_SDATA-IN16AUDIOLINK_SDATA-OUT17DVDD-IO18LDO3-CAP19CPVDD/AVDD220LDO2-CAP21AVSS222CBP23CBN24CPVEE

13

44

SPK-OUT-R+

/EAPD/DMIC-CLK-IN

GND

LINE2_R

37

38

39

40

41

42

43

AVDD1

PVDD1

LDO1-CAP

SPK-OUT-L-

SPK-OUT-R-

SPK-OUT-L+

LINE2-L(PORT-E-L)

LINE2-R(PORT-E-R)

MIC2-R(PORT-F-R)/SLEEVE

12

C3601

2.2UF/10V

12

C3611

10UF/6.3V

GND_AUDIO

12

+1.8VS_AUDIO

C3602

10UF/6.3V

12

C3618

0.1UF/10V

GND_AUDIO

GND

C3610

0.1UF/10V

1

1
2

I2C1_EN

3
4
5

DMIC_DATA

6

1

DMIC_CLK

7

1

I2C1_SDA_AUD

8

I2C1_SCL_AUD

9

I2C1_IN

10

DOUT_C

11

I2S_BCLK_C

12

I2S_MCLK_C
I2S_LRCLK_C

ACZ_BCLK_AUD_C

GND

ACZ_SDIN0_AUD_C

Audio Cdeco ALC3288

2016/12/15 X542UA_R1.0 #A4, Modify Codec from ALC295 to ALC3288

LDO1_CAP

12

R3602

C3619

100KOhm

10UF/6.3V

12

GND_AUDIO

Analog

Digital

12

C3612

2.2UF/10V

+3VA

36

GND_AUDIO

VREF

35

AVSS1

34

LINE1-L(PORT-C-L)

33

LINE1_L

LINE1-R(PORT-C-R)

32

LINE1_R

5VSTB/AUX_MODE

31

MIC2-CAP

30
29

MIC2_R_SLEEVE

MIC2-L(PORT-F-L)/RING2

HPOUT-L(PORT-I-L)

HPOUT-R(PORT-I-R)

12

C3605

10UF/6.3V

12

28

MIC2_L_RING2

MIC2-VREFO-R

27

C3608

MIC2_VREFO_R

MIC2-VREFO-L

26

MIC2_VREFO_L

10UF/6.3V

25

HPOUT_L
HPOUT_R

GND_AUDIO

TO INTERNAL MIC(Port C)

12

C3620

2.2UF/10V

GND_AUDIO

LINE2_R

2016/12/05 X542UA_R1.0 #A1, Reserve DMIC_CODEC & DMIC_PCH

TOIODMIC

R3646 22Ohm @/DMIC_CODEC
R3601 0Ohm @/DMIC_CODEC

DMIC_CLK
DMIC_DATA

HP Detection

AUD_DVDD

HPOUT_JD

GND

HP Jack Signal

MIC2_VREFO_L
MIC2_VREFO_R

2016/12/05 X542UA_R1.0 #A2, Modify int. AMIC & Audio Jack MIC

MIC2_R_SLEEVE

MIC2_L_RING2
HPOUT_R
HPOUT_L

LINE1_L
LINE1_R

12

C3625 2.2UF/10V

/AMIC

12

C3624 2.2UF/10V

/AMIC

12
12

12

C3627
10PF/50V

ForEMIrequest

@/DMIC_CODEC

GND

R3611

100KOhm

R3605

1%

12

HP_JD1 68

12

12

200KOhm

C3626

1%

0.1UF/10V

12

12

12

R3635

R3623

R3622

2.2kOHM

2.2kOHM

2.2kOHM

@

N/A

N/A

12

R36170Ohm

12

R36180Ohm

C3628 4.7UF/10V

12

PCBtracewidthof

12

Ring2&SLEEVEatleast40mil

C3630 4.7UF/10V

2016/12/15 X542U5_R1.0 #A7, Reserve R3635 / R3637 / C3631 / C3632 / C3633 / C3634

LDO1_CAP

/AMIC

12

R3614

4.7KOhm
nbs_r0201_h12_000s

/AMIC
R3615

12

AMIC_CLK_IO2LINE2_L

2016/12/05 X542UA_R1.0 #A2, Modify int. AMIC & Audio Jack MIC

12

1KOhm

12

/AMIC

R3634

nbs_r0201_h12_000s

C3648

6.2KOhm

1000PF/16V

@/AMIC

nbs_c0201_h13_000s

GND_AUDIO

GND_AUDIO

<Variant Name>

NB2_RD1_EE1

Size Project Name

C

Date: S heet of

DMIC_CLK_B 45

DMIC_DAT_B 45

MIC2_R_SLEEVE 68

MIC2_L_RING2 68
HP_R_2 68

HP_L_2 68

MIC2_VREFO_R

@

12

R3637

4.7KOhm
nbs_r0201_h12_000s

AMIC_L 45

12

R3613 0Ohm

AMIC_GND 45

/AMIC

GND_AUDIO

Title :

AUD_ALC3288

Engineer:

Joach_Wang

Rev

R2.0X542UA/UV

36 102Tuesday, June 20, 2017

SMART AMP. & SPK

+3VA_DSW

65mA

/SMAP

L3701

21

120Ohm/100Mhz
nbs_l0402_h22_000s

C3745

10UF/6.3V

/SMAP

12

nbs_c0603_h37_000s

GND

AC_BAT_SYS

/SMAP

60mils

Close PIN13/14

L3705

21

120Ohm/100Mhz

Irat=3A

12

12

C3711

C3701

10UF/25V

10UF/25V

nbs_l0603_h26_ 000s

/SMAP

/SMAP

nbs_c0603_h39_000s

nbs_c0603_h39_000s

Max = 4W / Channel = 8W
Power Efficiency:85% -> 9.5 W
I=1.05A@9V 0.8 A@12V 0.5A@19V

/SMAP

/SMAP

C3717

C3715

12

12

CAPM

CAPP

DACL INP L

1UF/6.3V

1UF/6.3V

/SMAP

C3716

12

INPRDACR

1UF/6.3V

VNEG INNL

INNR

12

12

12

C3718

C3720

C3719

1UF/6.3V

1UF/6.3V

1UF/6.3V

/SMAP

/SMAP

/SMAP

GND

GND GND GND

+3VA_AMP

12

C3746

0.1UF/10V

/SMAP

60mils

12

12

C3707
1UF/25V

/SMAP

nbs_c0603_h37_000s

GND

LDOO

12

C3721

1UF/6.3V

/SMAP

DIN36

DLY_OP_SD#36

2017/03/22 X542UA_R2.0 #06, Add Q370 1 for DIN & DLY_OP_SD# leakage

DIN 預防漏電 (X542UQ ER 沒問題)，參考EC Ray 提供B9440 設計
DLY_OP_SD# 在X542UQ ER 有漏電(EC code 001)，故留相同設計防S4/S5 漏電

PVCC

C3708
1UF/25V

/SMAP

nbs_c0603_h37_000s

Fixed by TI

GVDD

12

R3722
51KOhm

Rb

/SMAP

12

C3747

GAIN/FSW

1UF/6.3V

/SMAP

12

R3719
51KOhm

Ra

/SMAP

GND

靠近Amp

/SMAP

/SMAP

H_SPKL+

H_SPKL-

H_SPKR-

H_SPKR+

+5VS

2

61

DIN_GPIO3

Q3701A

UM6K1N

+5VS

5

34

DLY_OP_SD#_L

Q3701B

UM6K1N

TI_TAS5766L

+3VA_AMP

GND

12

C3743
1UF/6.3V

/SMAP

GND

GND

MLCC 0.22UF/25V (0603) X7 R 10%

L3702/L3702/L3704/L3706

與R3626/R3627/R3631/R3632 co-l ay
請近量靠近或少殘線

2017/03/23 X542UA_R2.0 #08, Remove SPK EMI rese rve RES & CAPs

/SMAP

21

L3702 30Ohm/100Mhz
Irat=5A nbs_l0603_h37_000s

/SMAP

21

L3703 30Ohm/100Mhz
Irat=5A nbs_l0603_h37_000s

/SMAP

21

L3704 30Ohm/100Mhz
Irat=5A nbs_l0603_h37_000s

/SMAP

21

L3706 30Ohm/100Mhz
Irat=5A nbs_l0603_h37_000s

I2S_MCLK36

I2S_BCLK36

DOUT36

I2S_LRCLK36

U3701

CAPP

CAPM
VNEG
DACL
INPL
INNL

DLY_OP_SD#
PVCC

/SMAP

06040-01160100

12

C3722

1000PF/2KV

12

C3723

1000PF/2KV

12

C3724

1000PF/2KV

12

C3729

1000PF/2KV

2016/12/05 X542UA_R1.0 #97, Add DIN to P3 7 Smart Amp

LDOO

ADR1

GND

43

44

45

46

47

48

49

50

ADR1

GND9

LDOO

LRCLK

GND11

GND10

XSMT/UVP

1

DVDD

2

CPVDD

3

CAPP

4

GND1

5

CAPM

6

VNEG

7

DACL

8

INPL

9

INNL

10

GND2

11

FAULT#

12

AVCC

13

PVCC1

14

GND3

GND416OUTPL17BSPL18OUTNL19BSNL20BSNR21OUTNR22BSPR23OUTPR24GND5

TAS5766L

15

C37020.22UF/6.3V

C37030.22UF/6.3V

12

12

/SMAP

/SMAP

C37040.22UF/6.3V

C37050.22UF/6.3V

H_SPKL+

H_SPKL-

H_SPKR-

12

/SMAP

12

/SMAP

GND

40mils

/SMAP

GND

/SMAP

40mils

40mils

/SMAP

GND

/SMAP

40mils

2016/12/01 X542UA_R1.0#95, Add Q3 701 circuit for SKP protectin & modif y Ra & Rb for Switching lossR3723 reserve base on #95

+3VA_AMP

12

R3723
100KOhm

/SMAP

ADR1

R3724
0Ohm
@/SMAP

12

21

SMB1_CLK_SA 28

0402

21

SMB1_DAT_SA 28

0402

+3VA_AMP

12

C3710
1UF/6.3V

/SMAP

Max = 4W / Channel
I = 0.7 A (@Speaker : 8 Ohm)

2016/11/10 X542UA_R1.0 #69, Updat e SPK CONN. pin define ADR1 & GND pin

2016/12/19 X542UA_R1.0 #A8, J3701 Pin define mo dify: R+, R-, L+, L-

GND

H_SPKL-_CON36
H_SPKL+_CON36
H_SPKR-_CON36
H_SPKR+_CON36

SPK L+ L- R+ R- trace width
Speaker 4 ohm ==> 60mils

2017/01/19 X542UA_R1.1 #10, Remove Q3701 & modi fy

DLY_OP_SD#

12

R3730
1KOhm

/SMAP

GPIO1

12

R3729
100KOhm

/SMAP

GND

INTERNAL SPK Conn.

Check

ADR1

H_SPKL-_CON
H_SPKL+_CON
H_SPKR-_CON
H_SPKR+_CON

N/A

<Variant Name>

Title :

Date: Sheet

C

6
5
4
3
2
117

Size

J3701

6
5
4
3
2

WtoB_CON_6P

12G17100006F

2nd source:

Tuesday, June 20, 2017

SIDE2

SIDE1

Dept.:

AUD_AMP & SPKR

8

GND

Project Name

Rev

NB2_RD1_EE1

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

37

+3VA_AMP

12

R3720
100KOhm
@/SMAP

ADR2

R3721
0Ohm

/SMAP

ADR2

12

I2C Slave Address:
1001 100X (98)

39

40

41

0X98 (ADDR2/ADDR1=0)
0X9A (ADDR2=0/ADDR1=1)

DIN

SCLK42BCLK

ADR2

GPIO3

38

GPIO2

37

GPIO1

36

SL3701

GPIO1

SCL

35

SL3703

SMB_CLK_SA

SDA

34

SMB_DAT_SA

GND

GND8

33

AVDD

32

DACR

31

DACR

INPR

30

INPR

INNR

29

INNR

GND

GND7

28

GAIN/FSW

27

GAIN/FSW

GVDD

26

GND

GVDD

PVCC2

25

PVCC

GND6

12

C3714
1UF/25V

/SMAP

nbs_c0603_h37_000s

GND

H_SPKR+

H_SPKL+_CON

H_SPKL-_CON

H_SPKR-_CON

H_SPKR+_CON

eDP (LVDS) Panel

L_VDDEN_PCH3

2017/01/20 X542UA_R1.1 #13 , R4566 modify to 150K ohm for Panel sequence

eDP Panel 3V power

+3V_EDP +3VA_DSW

12

R4566 150Ohm

UX303 1009

U4503

1

R4503

VOUT

2

1KOhm

GND

3

12

EN/FLAG#4DSG

12

UX303C1 0520

NCT3527U

C4507

12

4.7UF/6.3V

R4581

nbs_c0603_h37_000s

100KOhm

GND

GND

GND

AC_BAT_SYS

L4506

21

1

T4504@

80Ohm/100Mhz

1

T4502@

TPC26T

1

T4503@

TPC26T

1

T4501@

TPC26T

2016/12/01 X542UA_R1.0 #94, Del Q4501 circuit.

TPC26T

eDP Panel differential signals

C4504 0.1UF/16V
EDP_TXN03
EDP_TXP03

EDP_TXN13
EDP_TXP13

EDP_AUXN3
EDP_AUXP3

EDP_TXN23
EDP_TXP23

EDP_TXN33
EDP_TXP33

12

C4505 0.1UF/16V

12

C4585 0.1UF/16V

12

C4586 0.1UF/16V

12

C4506 0.1UF/16V

12

C4508 0.1UF/16V

12

C4587 0.1UF/16V

12

C4588 0.1UF/16V

12

C4589 0.1UF/16V

12

C4590 0.1UF/16V

12

6

VIN

5

ILIM

12

R4510

12

10KOhm

C4555

UX303C1 0520

1UF/6.3V

GND

GND

+LED_VCC_INV

+LED_VCC_INV

34

SLN4502B

2R4P

12

SLN4502A

EDP_L0_N_R

2R4P

EDP_L0_P_R

14

23

L4509
90Ohm/100Mhz
@/EMI

34

SLN4503B

2R4P

12

SLN4503A

EDP_L1_N_R

2R4P

EDP_L1_P_R EDP_L1_P_C

14

23

L4510
90Ohm/100Mhz
@/EMI

12

SLN4501A

2R4P

34

SLN4501B

EDP_AUXN_R

2R4P

EDP_AUXP_R

L4504

90Ohm/100Mhz
@/EMI

14

23

34

SLN4505B

2R4P

12

SLN4505A

EDP_L2_N_R

2R4P

EDP_L2_P_R

14

23

L4511
90Ohm/100Mhz
@/EMI

34

SLN4506B

2R4P

12

SLN4506A

EDP_L3_N_R EDP_L3_N_C

2R4P

EDP_L3_P_R

@/EMI

14

23

90Ohm/100Mhz
L4512

20161207_SWAP

+3V_EDP

12

12

C4576

0.1UF/6.3V

CHECK HPD WITH P20

UX303 0830

EDP_HPD_CON3

EDP_L0_N_C
EDP_L0_P_C

EDP_L1_N_C

EDP_AUXN_C
EDP_AUXP_C

EDP_L2_N_C
EDP_L2_P_C

EDP_L3_P_C

@
C4550
1UF/6.3V

12

C4568

@

5PF/50V

GND

R4510 is selected by Panel spec

SL4503

21

0402

EDP_HPD_CON_X1

12

R4521
100KOhm

Camera USB Port

USB_PP623
USB_PN623

Near J4501

EMI

BL_EN_C EDP_BRIGHTNESS_CON

12

GND GND

SLN4504A
SLN4504B

C4511
10PF/50V
@/EMI

LCD Backlight Ctrl

EDP_BRIGHTNESS3

DMIC to Codec

DMIC_CLK_B36
DMIC_DAT_B36

DMIC_CLK_PCH22
DMIC_DAT_PCH22

DMIC to PCH

12

2R4P

34

2R4P

L4501

90Ohm/100Mhz
@/EMI

14

23

2016/10/06 X542UA_R1.0 #11, Del Touch Panel R4582~R4595/SLN4507/L4502 & C4517

2016/10/06 X542UA_R1.0 #12, Del EMI reserve C4591/C4592/C4593

12

C4512
10PF/50V
@/EMI

L_BKLT_EN3

LCD_BACKOFF#30

R4515 & R4533 pin 1 盡量靠近
R4516 & R4532 pin 1 盡量靠近
(AMIC/DMIC 只會選一組上件)

R4506 33Ohm @/DMIC_CODEC
R4507 0Ohm @/DMIC_CODEC

R4518 33Ohm @/DMIC_PCH
R4517 33Ohm @/DMIC_PCH

USB_PP6_R

USB_PN6_R

SL4506

12

R4505
100KOhm

GND

+3VS

SL4502

0603

21

0402

EDP_BRIGHTNESS_CON

20160218 X541UV
R4506->SL4506 for cost

+3V_EDP

12

R4504
1KOhm

D4501

1

3

2

BL_EN_C

BAT54AW

12

R4533 0Ohm@/DMIC

12

R4532 0Ohm@/DMIC

12

12

2016/12/05 X542UA_#A1, Reserve DMIC_CODEC & DMIC_PCH

12
12

2016/10/05 X542UA_#10, Del DMIC R457/R4518 & Modify AMIC Option: N/A & Modify netname

A/D Codec

R4515 0Ohm /AMIC

AMIC_GND36

12

12

R4516 33Ohm /AMIC

AMIC_L36

21

12

C4574
10UF/6.3V
@

GND

C4573

12

10PF/50V

@/RF

GND

+3V_EDP

12

12

@

@

C4502

C4501

0.1UF/16V

0.1UF/16V

GNDGND

+3V_CAM

USB_PN6_R
USB_PP6_R

DMIC_DATA_AMIC_L
DMIC_CLK_AMIC_AGND

EDP_L3_N_C
EDP_L3_P_C

EDP_L2_N_C
EDP_L2_P_C

EDP_L1_N_C
EDP_L1_P_C

EDP_L0_N_C
EDP_L0_P_C

EDP_AUXP_C
EDP_AUXN_C

EDP_HPD_CON_X1

BL_EN_C
EDP_BRIGHTNESS_CON

+LED_VCC_INV

12017-00181800

GND

2nd source:
12017-00181600

BOM

Project Name

Title :

LCD Panel_CMOS_DMIC

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

DMIC_CLK_AMIC_AGND
DMIC_DATA_AMIC_L

DMIC_CLK_AMIC_AGND
DMIC_DATA_AMIC_L

J4501

SIDE1

41

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

SIDE2

42

WTOB_CON_40P

SIDE3

43

SIDE4

44

GND

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

45

eDP to VGA

2016/10/12 X542UA_#43, Change DP to VGA solution from RTD2168 to RTD2166

C4729 0.1UF/16V

DDPB_AUXN_PCH3

12

C4736 0.1UF/16V

DDPB_AUXP_PCH3

12

C4737 0.1UF/16V

VGA_LANE0_DP3

12

C4731 0.1UF/16V

VGA_LANE0_DN3

12

C4714 0.1UF/16V

VGA_LANE1_DP3

12

C4713 0.1UF/16V

VGA_LANE1_DN3

12

DDPB_HPD_PCH3

12

R4708

100KOhm

GND

SMB_DATA_S35,16,17

SMB_CK_S35,16,17

AVCC33
RXAUX_DP
RXAUX_DN
VCCK_V12
DPRX0P

12

C4726

DPRX0N

DPRX1P

0.1UF/16V

DPRX1N

06106-00330000

GND

FOR EMI

CRT_R_PCH CRT_G_PCH CRT_B_PCH

12

C4734

10PF/50V

@/EMI

GND GND GND

+5VS_HDMI_CRT

+5VS

CRT D-SUB

20150105
Checking
L4704 & L4705 change to R4718 & R4720

+3VS

RXAUX_DN

RXAUX_DP

DDPB_HPD_PCH

21

0402

21

0402

U4701

GND

1

AVCC_33

2

AUX_P

3

AUX_N

4

AVCC_12

5

LANE0_P

6

LANE0_N

7

LANE1_P

8

LANE1_N

RTD2166-VAS-CG

+3VS

12

R4709

4.7KOhm

POL2_SCL
POL1_SDA

12

R4712

4.7KOhm

GND

12

C4728

10PF/50V

@/EMI

12

SL4704
nbs_r0603_shorted_000s

AVCC33

DPRX0P

DPRX0N

DPRX1P

DPRX1N

SL4708

SL4702

4.7KOhm

SHORTPIN

+3VS

12

SL4705
nbs_r0603_shorted_000s

VDD_DAC_33

SHORTPIN

+3VS

12

C4727

0.1UF/16V

GND

12

12

C4723

C4722

0.1UF/16V

2.2UF/10V

VCCK_V12

CFG_SCL

CFG_SDA

DDPB_HPD_PCH

25

27

28

29

30

31

32

33

GND

HPD
GND234GND3

24

GND1

VCCK_1226PVCC_33

23

SMB_SCL

SMB_SDA

RED_P

LDO_RSTB

22

EXT_CLK_IN

CRT_R_PCH

GREEN_P

EXT1.2V_CTRL

21

CRT_G_PCH

BLUE_P

20

CRT_B_PCH

VDD_DAC_33

19

VDD_DAC_33

HSYNC

+5VS

18

CRT_HSYNC_PCH

VSYNC

17

CRT_VSYNC_PCH

HVSYNC_PWR

12

12

C4725

C4715

0.1UF/16V

4.7UF/6.3V

POL210POL1/SPI_CEB11GPI1/SPI_CLK12GPI2/SPI_SI13GPI3/SPI_SO14VCC_3315VGA_SCL16VGA_SDA

nbs_c0603_h37_000s

9

GND GND

+3VS

CRT_CLK_PCH

CRT_DATA_PCH

+3VS

12

@
R4717

12

C4719

10PF/50V

@/EMI

CRT_DATA_PCH
CRT_CLK_PCH

12

GND

CRT_HSYNC_PCH

C4717

0.1UF/16V

GND

To VGA

CRT_VSYNC_PCH

CRT_R_PCH
CRT_G_PCH
CRT_B_PCH

+3VS

+5VS_HDMI_CRT

L4701

0.082UH

12

12

R4723

C4701

75Ohm

1%

10PF/50V

GND

GND

L4702

CRT_G_PCH

0.082UH

12

12

R4719

C4703

75Ohm

1%

10PF/50V

GND

GND

L4703

CRT_B_PCH CRT_BLUE_L

0.082UH

12

12

R4721

C4705

75Ohm

1%

10PF/50V

GND

GND

12

R4704 36Ohm

CRT_HSYNC_PCH

12

R4705 36Ohm

CRT_VSYNC_PCH VSYNC_CON

Q4701A
UM6K1N

61

CRT_DATA_PCH

2

+3VS

5

34

CRT_CLK_PCH DDC_CLK_CON

Q4701B

UM6K1N

34

RN4701B

2.2KOHM

CRT_DATA_PCH

12

RN4701A

2.2KOHM

CRT_CLK_PCH

56

RN4701C

2.2KOHM

DDC_DATA_CON

78

RN4701D

2.2KOHM

DDC_CLK_CON

Checking
For RTD2168 modify PU to 2.2K

+5VS_CRT_CON

0314-3 EMI ADD SL4703, SL5201, SL5202

21

CRT_RED_LCRT_R_PCH

12

C4702

10PF/50V

GND

+5VS_CRT_CON

21

CRT_GREEN_L

12

C4704

10PF/50V

GND

21

12

C4706

10PF/50V

GND

HSYNC_CON

12

C4708

10PF/50V

GND

12

C4709

10PF/50V

GND

DDC_DATA_CON

12

C4710
22PF/25V
@

12

C4711
22PF/25V
@

SL4703

21

0805

+5VS_CRT

CRT Connector

CRT_RED_L

CRT_GREEN_L

CRT_BLUE_L HSYNC_CON

12

C4712

0.1UF/16V
@/EMI

D_SUB_CON_15P

GND

D4702

1

I/O1

CRT_GREEN_L

2

GND

34

I/O2 I/O3

CRT_RED_L

TVLST2304AD0

@/EMI

0428-1 EMI D3401, D3402, D4702, D5201, PD6001
change P/N to 07G028176010

D4703

1

I/O1

DDC_CLK_CON

2

GND

34

I/O2 I/O3

VSYNC_CON HSYNC_CON

TVLST2304AD0

@/EMI

Dean, 0217

0307-7 Dean change D4708 pin5 to +5VS

12

D4701
SS0540
@

F4701

12

@

1.5A/6V

J4701

1617

6
1
7

12112
8
3

13
9

14

4

10

15

5

12010-00143200

2nd source:
12010-00144100

GND

6

I/O4

CRT_BLUE_L

5

VDD

6

I/O4

DDC_DATA_CON

5

VDD

BOM

Title :

CRT D-SUB

Size

Dept.:

Custom

Date: Sheet

Tuesday, June 20, 2017

12

C4707

0.1UF/16V
@

GND

DDC_DATA_CON

VSYNC_CON

DDC_CLK_CON

+3VS

+5VS

Project Name

Rev

R2.0X542UA/UV

NB2_RD1_EE1

Engineer:

Joach_Wang

102

47

of

HDMI type-A

Close to CONNECTOR

Near CON J4801

2017/02/14 X542UA_R1.1 #30, RN4801/02/03/04 modify to SLN4801/02/03/04

HDMI_DATA2N_PCH3

12

C4801 0.1UF/16V

HDMI_DATA2N_PCH_X1

HDMI_DATA2P_PCH3

12

C4802 0.1UF/16V

HDMI_DATA2P_PCH_X1

HDMI_DATA1N_PCH3

12

C4803 0.1UF/16V

HDMI_DATA1N_PCH_X1

HDMI_DATA1P_PCH3

12

C4804 0.1UF/16V

HDMI_DATA1P_PCH_X1

HDMI_DATA0N_PCH3

12

C4810 0.1UF/16V

HDMI_DATA0N_PCH_X1

HDMI_DATA0P_PCH3

12

C4811 0.1UF/16V

HDMI_DATA0P_PCH_X1

HDMI_CLKN_PCH3

12

HDMI_CLKN_PCH_X1

C4812 0.1UF/16V

HDMI_CLKP_PCH3

12

HDMI_CLKP_PCH_X1

C4813 0.1UF/16V

12

R4831 470Ohm1%

12

R4836 470Ohm1%

HDMI_DATA2P_PCH_X1
HDMI_DATA2N_PCH_X1

12

R4832 470Ohm1%

12

HDMI_DATA1P_PCH_X1

R4833 470Ohm1%

HDMI_DATA1N_PCH_X1

12

R4834 470Ohm1%

12

R4835 470Ohm1%

HDMI_DATA0P_PCH_X1
HDMI_DATA0N_PCH_X1

12

R4838 470Ohm1%

12

R4837 470Ohm1%

HDMI_CLKP_PCH_X1
HDMI_CLKN_PCH_X1

32

D

+3VS

Q4801
2N7002K

1

G

S

UX303 0917 follow design guide R2.2

GND

12

10OHM

14

23

34

10OHM

12

10OHM

14

23

34

10OHM

12

10OHM

14

23

34

10OHM

12

10OHM

14

23

34

10OHM

RN4801A

20161207_SWAP

L4801
@
90Ohm/100Mhz

RN4801B

RN4802A

20161207_SWAP

L4802
@
90Ohm/100Mhz

RN4802B

RN4803A

20161207_SWAP

L4803
@
90Ohm/100Mhz

RN4803B

RN4804A

20161207_SWAP

L4804
@
90Ohm/100Mhz

RN4804B

R1.2_對GND電容,修改為GS電容預留

UX303 0917
Close J4801

HDMI_DATA2N_PCH_X2

R4803

180Ohm

12

HDMI_DATA2P_PCH_X2

HDMI_DATA1N_PCH_X2

R4804

180Ohm

12

HDMI_DATA1P_PCH_X2

HDMI_DATA0N_PCH_X2

R4805

180Ohm

12

HDMI_DATA0P_PCH_X2

HDMI_CLKN_PCH_X2

R4806

180Ohm

12

HDMI_CLKP_PCH_X2

2017/02/06 X542UA_R1.1 #25, U4802/03/U5202/03/U5506/07 add 07G028076030

UX303 1016 SWAP

U4802

1

Line-1

9

2

HDMI_DATA2P_PCH_X2

NC4

Line-2

8

3

HDMI_DATA2N_PCH_X2

HDMI_DATA0P_PCH_X2
HDMI_DATA0N_PCH_X2 HDMI_DATA0N_PCH_X2

HDMI_DATA1P_PCH_X2

HDMI_CLKP_PCH_X2 HDMI_CLKP_PCH_X2
HDMI_CLKN_PCH_X2 HDMI_CLKN_PCH_X2

HDMI_DATA2P_PCH_X2

NC3

GND

7

4

HDMI_DATA2N_PCH_X2

NC2

Line-3

6

HDMI_DATA0P_PCH_X2

NC15Line-4

AZ1045-04F

/EMI

2nd source:
07024-00760000

07G028076030

GND

07024-00960000

U4803

1

Line-1

9

2

NC4

Line-2

8

3

HDMI_DATA1P_PCH_X2HDMI_DATA1N_PCH_X2

NC3

GND

7

4

HDMI_DATA1N_PCH_X2

NC2

Line-3

6

NC15Line-4

AZ1045-04F

/EMI

2nd source:
07024-00760000

07G028076030

GND

07024-00960000

+12VS

12

R4801

C4814

100KOhm

0.01UF/25V
@

+5VS_HDMI_CRT

12

+5VS

Q4802

1

1

2N7002

G

F4801 1.5A/6V

3

2

12

32

D

S

07013-00220000

12

C4815

4.7UF/6.3V

2nd source

@

07013-00220100

nbs_c0603_h37_000s

+3VS+3VS

34

12

RN4810B

RN4810A

2.2KOhm

2.2KOhm

DDPC_SCL_PCH3

DDPC_SDA_PCH3

12

21

SL4802

HDMI_HP3

0402

HDMI HPD

Q4807A

2

UM6K31N

61

DDPC_SCL_PCH_X1

Q4807B

5

UM6K31N

34

DDPC_SDA_PCH_X1

+3VS

R4861

1

1MOhm

G

32

S

D

HDMI_HP_X1

12

R4826

Q4804

20KOhm

2N7002K

GND

+5VSHDMI

12

C4809

0.1UF/10V

GND

12

34

RN4811A

RN4811B

2.2KOhm

2.2KOhm

12

12

C4805

C4806

22PF/25V

22PF/25V

@/EMI

@/EMI

HDMI CON.

J4801

20

19

P_GND1

19

22

18

HDMI_HP_X1

12

C4807
22PF/25V
@/EMI

+5VSHDMI

HDMI_CLKN_PCH_X2

HDMI_CLKP_PCH_X2
HDMI_DATA0N_PCH_X2

HDMI_DATA0P_PCH_X2
HDMI_DATA1N_PCH_X2

HDMI_DATA1P_PCH_X2
HDMI_DATA2N_PCH_X2

HDMI_DATA2P_PCH_X2

P_GND3

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

23

2

P_GND4

1

21

1

P_GND2

HDMI_CON_19P

12022-00092900

GND

GND

2nd source:
12022-00097200

20150707 EMI預留

BOM

Project Name

Rev

Title :

HDMI-type D

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

48

CPU Thermal Se nsor

12

CPU_THERM#32

O/D

DC FAN Control

FAN0_PWM30

FAN0_TACH30

+3VS

12

R5001
14KOHM

SLN5001A

2R4P

+5VS

+3VS

12

R5002
10KOhm

1

+5V_FAN

1

FAN0_PWM

1

FAN0_TACH

請將測點至於TOP面
R2.0 新增_Tim_20150820

SML1_CLK_TH

12

T5004

T5003

T5001

SL5001
SHORT_LAND

12

C5004
100PF/50V

U5001

1

SCL

SDA

2

GND

3

ALERT#4VDD

NCT7717U

+5V_FAN

12

C5003
10UF/6.3V

GND

GND

12

C5005
100PF/50V

GNDGND

34

5

+5V_FAN

12

C5002

0.1UF/10V
@

SML1_DAT_TH

SLN5001B

2R4P

SMB1_DAT_S 28,76SMB1_CLK_S28,76

+3VS

12

C5001

0.1UF/10V

GNDGND

Route CPU_THRM_DA , CPU_THRM_DC and on
the same layer

------------------OTHE R SIGNALS
10 mils
===============GND
10 mils
=========H_THERMDA(10 mils)
10 mils
=========H_THERMDC(10 mils)
10 mils
=========GND
10 mils

---------------------O THER SIGNALS
Avoid FSB,Power

J5001

6

4

SIDE2

4

3

3

2

2

115

SIDE1

WTOB_CON_4P

12017-00071600

2nd source:

GND

GND

<Variant Name>

Project Name

X542UA/UV

Title :

50_FAN_Thermal Sensor

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

Engineer:

Joach_Wang

50

Rev

R2.0

102

of

SATA ODD CONN.

2016/10/06 X542UA_#13, Add SATA ODD CONN. & SATA HDD FPC CONN. circuit

+3VS

12

R5102
10KOhm
@

1

SATA_ODD_PWRGT21

2016/11/16 X542UA_R1.0 #82, Remove J5102

2016/11/28 X542UA_R1.0 #91, Add J5102 B to B CONN. from MB to HDD DB

1

G

2N7002K

Q5102

R5103
1MOhm

12

+5VS_ODD_EN

3

3

D

12

C5108
1000PF/50V

S

2

2

GND GND GND

+5VS+1 2VS

R5101 0Ohm
nbs_r0805_h24_000s

5

D

Q5101
PEA28BA

4

GS

123

12

C5105
22UF/6.3V
nbs_c0805_h57_000s
@

SATA HDD BtoB CONN.

J5102

24

GND

1

2

1

2

3

4

3

SATA0_HDD_TX_DP23
SATA0_HDD_TX_DN23

SATA0_HDD_RX_DN23
SATA0_HDD_RX_DP23

SATA0_DEVSLP23

6
8
10
12
14
16
18
20

BTOB_CON_20P

4

SIDE423SIDE3

5

5

6

7

7

8

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

SIDE221SIDE1

22

GNDGND

GND

@

+5VS_ODD

12

+3VS

+5VS

12G160H00208

2nd source:

C5106
10UF/6.3V

12

nbs_c0603_h37_000s

J5101

P6

P6

P5

NP_NC2

P5

2

P4

P4

P3

P_GND2

P3

4

P2

P2

P1

P1

S7

S7

S6

S6

S5

S5

S4

S4

S3

P_GND1

S3

3

S2

S2

S1

NP_NC1

S1

1

SATA_CON_13P

C5107

GND GND

0.1UF/16V

12015-00042700

12

2nd source:
12015-00047200

1A

2A

SATA_ODD_DA#_R

1

SATA_RXP1_C
SATA_RXN1_C

SATA_TXN1_C
SATA_TXP1_C

T5101

21

0402

21

0805

21

0805

12

C5101 0.01UF/16V

12

C5102 0.01UF/16V

12

C5103 0.01UF/16V

12

C5104 0.01UF/16V

SL5101

SATA_ODD_DA# 21

SL5102

+5VS_ODD

2A

SL5103

SATA1_ODD_RX_DP 23
SATA1_ODD_RX_DN 23

SATA1_ODD_TX_DN 23
SATA1_ODD_TX_DP 23

BOM

Title :

SATA ODD

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

Project Name

Engineer:

Joach_Wang

51

Rev

R2.0X542UA/UV

102

of

USB3.0_Por t 0

USB3.0_Por t 1

U3_U3TXDP423
U3_U3TXDN423

U3_U3RXDP423
U3_U3RXDN423

12

SLN5213A
USB_PN123
USB_PP123

12

C5209 0.1UF/16V

U3_U3TXDP123

12

C5210 0.1UF/16V

U3_U3TXDN123

U3_U3RXDP123
U3_U3RXDN123

USB_PN323
USB_PP323

12

C5204 0.1UF/16V

12

C5205 0.1UF/16V

2R4P

34

2R4P

L5233
90Ohm/100Mhz
@/EMI

14

23

nbs_choke_4p_011c

1423L5206

90Ohm/100Mhz
@/EMI

34

SLN5215B

2R4P

12

SLN5215A

U3_U3TXDP1_R1

2R4P

U3_U3TXDN1_R1

34

SLN5216B

2R4P

12

SLN5216A

2R4P

L5209
90Ohm/100Mhz
@/EMI

14

23

U5202

1

Line-1

2

9

U3_U3RXDN1_R

Line-2

NC4

3

8

U3_U3RXDP1_R

GND

NC3

4

7

Line-3

NC2

6

U3_U3TXDN1_R

NC15Line-4

U3_U3TXDP1_R

AZ1045-04F

/EMI

07G028076030

GND

2017/02/06 X542UA_R1.1 #25, U4802/03/U5202/03/U5506/07 add 07G028076030

12

SLN5201A

2R4P

34

SLN5201B

2R4P

L5201
90Ohm/100Mhz
@/EMI

14

23

nbs_choke_4p_011c

1423L5202

90Ohm/100Mhz
@/EMI

34

SLN5202B

2R4P

12

SLN5202A

U3_U3TXDP4_R1

2R4P

U3_U3TXDN4_R1

34

SLN5203B

2R4P

12

SLN5203A

2R4P

L5203
90Ohm/100Mhz
@/EMI

14

23

U5204

1

Line-1

9

2

U3_U3RXDN4_R

NC4

Line-2

3

8

U3_U3RXDP4_R

GND

NC3

4

7

Line-3

NC2

6

U3_U3TXDN4_R

NC15Line-4

U3_U3TXDP4_R

AZ1045-04F

/EMI

07G028076030

GND

SLN5213B

U3_U3RXDN1_R
U3_U3RXDP1_R
U3_U3TXDN1_R
U3_U3TXDP1_R

2nd source:

07024-00760000

07024-00960000

2nd source:
07024-00760000
07024-00960000

USB_U1­USB_U1+

U3_U3TXDP1_R
U3_U3TXDN1_R

U3_U3RXDP1_R
U3_U3RXDN1_R

USB_U3­USB_U3+

U3_U3TXDP4_R

U3_U3TXDN4_R

U3_U3RXDP4_R
U3_U3RXDN4_R

U3_U3RXDN4_R
U3_U3RXDP4_R
U3_U3TXDN4_R
U3_U3TXDP4_R

+5V_USB

+5V_USB_CON1

USB_U1-

VDD

I/O4

5

6

1234

GND

I/O1

USB_U1+

GND

+5V_USB

21

SL5201

0805

C5215

22UF/6.3V

nbs_c0805_h57_000s

USB_U3-

D5202
AZC099-04SP

/EMI

07024-00200200

I/O2 I/O3

USB_U3+

21

SL5202

0805

C5212

22UF/6.3V

nbs_c0805_h57_000s

+5V_USB_CON1

12

12

12

12

C5216

+

22UF/6.3V

C5234

CE5202

nbs_c0805_h57_000s

0.1UF/16V

100UF/6.3V

@

@

nbs_c3528_h83_000s

GNDGNDGND

GND

2016/10/12 X542UA_R1.0 #40, Modify U5201 circuit & change OC from 3.2A to 2.5A

2017/03/23 X542UA_R2.0 #09, U5201 change spec from 2.5A to 3.2A

USB3.0 Power SW for Power Protect

+5VSUS

SUSC_EC#30,57,68,88

12

C5208
10UF/25V

C5206
1UF/25V

12

@

nbs_c0805_h49_000s

GND GNDGND

GND

+5V_USB_CON2

12

12

12

12

C5211

+

22UF/6.3V

C5213

CE5203

nbs_c0805_h57_000s

0.1UF/16V

100UF/6.3V

@

@

nbs_c3528_h83_000s

GND

GNDGNDGND

4
3
2
1

USB_U1­USB_U1+

U3_U3RXDN1_R
U3_U3RXDP1_R

U3_U3TXDN1_R
U3_U3TXDP1_R

U5201

EN#/EN5OC#
IN2
IN1
GND

BD82046FVJ-GE2

06016-01290000

USB_U3­USB_U3+

U3_U3RXDN4_R
U3_U3RXDP4_R

U3_U3TXDN4_R
U3_U3TXDP4_R

OUT3
OUT2
OUT1

J5201

1

VBUS

2

D-

3

D+

4

GND

5

STDA_SSRX-

6

STDA_SSRX+

7

GND_DRAIN

8

STDA_SSTX-

9

STDA_SSTX+

10

P_GND1

11

P_GND3

12

P_GND4

13

P_GND2

USB_CON_9P

12013-00150200

GND

2nd source:
12013-00151700

T5201

1

6
7
8

12

C5207
22UF/6.3V

J5202

1

VBUS

2

D-

3

D+

4

GND

5

STDA_SSRX-

6

STDA_SSRX+

7

GND_DRAIN

8

STDA_SSTX-

9

STDA_SSTX+

10

P_GND1

11

P_GND3

12

P_GND4

13

P_GND2

USB_CON_9P

12013-00150200

GND

2nd source:
12013-00151700

BOM

Title :

USB 3.0 + 2.0 CONN.

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

+5V_USB

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

52

WLAN CONN.

2016/10/07 X542UA_R1.0 #25, Change WLAN CONN. to NGFF, follow X456U

+3VSUS_WLAN +3VSUS_WLAN+3VS

12

12

12

C5301

C5308

C5307

33PF/50V

10UF/25V

0.1UF/16V

@

GND

D5301

BAT54CW

BT_ON/OFF#21

WLAN_ON#25

3

20150804
Reserve D5301, R5301 & R5304 for BT-ON_PCH, prevent +3VS leakage at S3/S4/S5

2017/01/12 X542UA_R1.1 #05, Modify BT_ON & WLAN_ON circuit

32

Q5301

D

2N7002K

1

G

S

07G005000B12

2nd = 07G005000N11

GND

@

20150813
Reserve Q5301, R5302, R5503 & R5305 for WLAN_ON_PCH, prevent +3VS leakage

12

R5311 0Ohm

@

nbs_r0603_h24_000s

+3VSUS

SL5301

21

0603

2016/11/14 X542UA_R1.0 #74, WLAN power modify to +3VSUS for wake on WLAN

+3VSUS_WLAN

12

R5306

10KOhm

5%

1

2

BT_ON_NGFF

@

12

R53090Ohm

WLAN_ON_NGFF

12

R53100Ohm

GND

76

J5301

3.3Vaux4

2

3.3Vaux3

4

LED#1(I)/(OD)

6

PCM_CLK(OI)/(0/1.8V)

8

PCM_SYNC(OI)/(0/1.8V)

10

PCM_IN(I)/(0/1.8V)

12

PCM_OUT/(O)/(0/1.8V)

14

LED#2(I)/(OD)

16

GND1

18

UART/Wake(I)/(0/3.3V)

20

UART/Rx(I)/(0/1.8V)

22

UART/Tx(O)/(0/1.8V)

32

UART/CTS(I)/(0/1.8V)

34

UART/RTS(O)/(0/1.8V)

36

RESERVED7

38

ESER
R

40

RESERVED5

42

COEX3/(0/1.8V)

44

COEX2/(0/1.8V)

46

COEX1/(0/1.8V)

48

SUSCLK(32kHz)/(O)(0/3.3V)

50

PERST0#(O)/(0/3.3V)

52

Reserved/W_DISABLE#2(O)/

54

W_DISABLE#1(O)/(0/3.3V)

56

I2C/DATA(IO)/(0/3.3)

58

I2C/CLK(O)/(0/3.3)

60

ALERT(I)/(0/3.3)

62

RESERVED4

64

RESERVED3

66

RESERVED2

68

RESERVED1

70

3.3Vaux2

72

3.3Vaux1

74

MINI_PCI_75P

12003-00076000

78

NP_NC177NP_NC2

SIDE179SIDE2

GND11

1

USB_D+
USB_D-

SDIO_CLK(O)/(0/1.8V)
SDIO_CMD(IO)/(0/1.8V)

SDIO_DAT0(IO)/(0/1.8V)
SDIO_DAT1(IO)/(0/1.8V)
SDIO_DAT2(IO)/(0/1.8V)

SDIO_DAT3(IO)/(0/1.8V)

SDIO_Wake(I)/(0/1.8V)
SDIO_Reset(O)/(0/1.8V)

VED6

REFCLKP0
REFCLKN0

CLKREQ0#(IO)/(0/3.3V)

(0/3.3V)

PEWake0#(IO)/(0/3.3V)

Reserved/2nd_Lane_PETp1
Reserved/2nd_Lane_PETn1

Reserved/2nd_Lane_PERp1
Reserved/2nd_Lane_PERn1

RESERVED9

RESERVED8

3
5

GND10

7
9
11

13
15

17
19
21

23

GND9

33

PETP0

35

PETn0

37

GND8

39

PERp0

41

PERn0

43

GND7

45
47
49

GND6

51
53
55

GND5

57
59

61

GND4

63
65

67

GND3

69
71

73

GND2

75

GND

<Variant Name>

Title :

MINICARD(WLAN)

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

USB_PP8 23

USB_PN8 23

PCIE_TXP_WLAN 23

PCIE_TXN_WLAN 23

PCIE_RXP_WLAN 23

PCIE_RXN_WLAN 23

CLK_PCIE_WLAN 24

CLK_PCIE_WLAN# 24

CLKREQ_WLAN# 24

PCIE_WAKE# 25,33,54

Project Name

Engineer:

Joach_Wang

53

Rev

R2.0X542UA/UV

102

of

+3VSUS_WLAN

1

T5301

WLAN_LDE#

1

T5303

BT_LDE#

SUS_CK24

BUF_PLT_RST#25,30,33,54,68,70

BT_ON_NGFF
WLAN_ON_NGFF

GND

SSD CONN.

2016/10/06 X542UA_#24, Add SSD circuit follow T303UA

SATA DEVSLP.

21

SL5402

SATA2_DEVSLP23

0402

1007-11 Dean

PCIE Wake-up.

1006-6 Dean
1019-4 Dean
1026-5 Dean

R5404

12

PCIE_WAKE#25,33, 53

61

0Ohm
@/PCIESSD

+3VS_SSD

R1.2

For PCIE/SATA select

+3VS_SSD

1006-6 Dean

12

nbs_r0201_h12_000s

MSATA_MPCIE_DET#23

34

12

R5411 0Ohm

MSATA_MPCIE_DET# N GFF_CONFIG1

2016/10/27 X542UA_R1.0 #64, Add R5411 & unstaff Q5401 & R5408

Main Board

+3VS_SSD+3VS

SL5401

1.5A

21

0603

12

12

12

C5401

0.1UF/16V

C5407

21

NGFF_PERST#
NGFF_CLK#
NGFF_PEWAKE#
NGFF_MFG1
NGFF_MFG2

SUS_CK_IO

C5409

0.1UF/10V

0.1UF/10V

GNDGND

J5401

2

3.3V_1

4

3.3V_2

6

NC1

8

NC2

10

DAS/DSS#(OD)

12

3.3V_3

14

3.3V_4

16

3.3V_5

18

3.3V_6

20

NC3

22

NC4

24

NC5

26

NC6

28

NC7

30

NC8

32

NC9

34

NC10

36

NC

1

1

38

DEVSLP(0/3.3V)

40

NC12

42

NC13

44

NC14

46

NC15

48

NC16

50

PERST#(0/3.3V)/NC

52

CLKREQ#(IO)(0/3.3V)/NC

54

PEWAKE#(IO)(0/3.3V)/NC

56

NC/MFG1

58

NC/MFG2

68

SUSCLK(32KHZ)/(0/3.3V)

70

3.3V_7

PEDET

72

3.3V_8

74

3.3V_9

NP_NC177NP_NC278SIDE179SIDE2

MINI_PCI_75P_REMOVE8

76

2017/01/23 X542UA_R1.1 #15, J5401 modify to 12003-00162200

12003-00162200

2nd source:

@/EMI

6/8 Jacky add 0.1UF for ESD

SATA2_DEVSLP_R

12

R5401
0Ohm
@/PCIESSD

GND

+3VS_SSD

12

R5405
10KOhm

@/PCIESSD

@/PCIESSD

Q5401A
EM6K1-G-T2R

nbs_r0201_h12_000s

NGFF_PEWAKE#

2

12

R5409
10KOhm

R5408

@/PCIESSD

10KOhm
@/PCIESSD

nbs_r0201_h12_000s

@/PCIESSD
Q5401B
EM6K1-G-T2R

5

NGFF_CONFIG1

12

@/PCIESSD
C5403

M.2 SSD I/F

0.1UF/16V

PCIE : N.C
SATA : GND

GNDGND

+3VS_SSD

1

T5407

NGFF_DAS/DSS#

SATA2_DEVSLP_R

SL5404

BUF_PLT_RST#25,30,33,53,68,70

1105-1 EMI

NGFF_PERST#

0402

1

T5411

1

T5408

1

T5409

1

T5410

12

C5402
100PF/50V

@/EMI

GND

12

C5406

0.1UF/10V

PERN0/SATA-B+

/NC-PCIo/GND-SATA)/CONFIG_1

12

C5404

0.1UF/10V

1

GND/CONFIG_3

3

GND1

5

PERN3

7

PERP3

9

GND2

11

PETN3

13

PETP3

15

GND3

17

PERN2

19

PERP2

21

GND/CONFIG_0

23

PETN2

25

PETP2

27

GND4

29

PERN1

31

PERP1

33

GND5

35

PETN1

37

PETP1

39

GND6

41
43

PERP0/SATA-B-

45

GND7

47

PETN0/SATA-A-

49

PETP0/SATA-A+

51

GND8

53

REFCLKN

55

REFCLKP

57

GND9

67

NC17

69
71

GND10

73

GND11

75

GND/CONFIG_2

12

12

C5408

C5405

10UF/6.3V

10UF/6.3V

2016/10/27 X542UA_R1.0 #65, Modify PCIE CAPs to P54 & add SATA RX CAPs

2016/11/30 X542UA_R1.0 #93, Remove PCIE to SSD

12

C5416 0.01UF/16V

12

C5417 0.01UF/16V

SATA2_RX_DP_C
SATA2_RX_DN_C

12

C5418 0.01UF/16V

12

C5419 0.01UF/16V

SATA2_TX_DN_C
SATA2_TX_DP_C

NGFF_CONFIG1

GND

SATA2_SSD_RX_DP 23

PCIE12_RX, For SATA, DP/DN & For PCIE, Revirse

SATA2_SSD_RX_DN 23

SATA2_SSD_TX_DN 23
SATA2_SSD_TX_DP 23

<Variant Name>

NB2_RD1_EE1

Size Project Name

C

Date: S heet of

Title :

OTH_KB+TP+Camera

Engineer:

Joach_Wang

Rev

R2.0X542UA/UV

54 102Tuesday, June 20, 2017

USB 3.0 TypeC CONN.

2016/10/06 X542UA_#24, Add SSD cir cuit follow T303UA

USB3.0 Bus

U3_U3RXDP223
U3_U3RXDN223

C55080.1UF /16V

U3_U3TXDP223

12

U3_U3TXDP2_L

C55090.1UF /16V

U3_U3TXDN223

12

U3_U3TXDN2_L

USB3.0 Bus

U3_U3RXDP323

U3_U3RXDN323

C55060.1UF /16V

U3_U3TXDP323

C55070.1UF /16V

12

U3_U3TXDP3_L

U3_U3TXDN323

12

U3_U3TXDN3_L

12

SLN5505A

2R4P

USB_PN223

34

SLN5505B

2R4P

USB_PP223

2

1

USB2.0

@/EMI

09G09209011D

H=1.1

CC Logic

+5VSUS

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

+3V

SL5505

0805

0402

SL5504

SL5507

0805

21

21

nbs_r0805_shorted_000s

21

nbs_r0805_shorted_000s

12

12

C5563

C5564

0.1UF/16V

10UF/25V

nbs_c0805_h49_000s

GND GND

+3V +3V

Set CC
I limit = 3A

R5514

R5511

10KOhm

10KOhm

12

12

R5513

R5512

10KOhm

10KOhm

@

@

12

12

GND GND

+USB_C_VBUS

3A = 120 mils

12

12

12

12

C5502

C5504

C5503

C5505

47UF/6.3V

22UF/6.3V

0.1UF/16V

22UF/6.3V

@

20161207_SWAP

1

4

@/EMI/USB3.0
90Ohm/100MHz

L5504

2

3

1

4

@/EMI/USB3.0
90Ohm/100MHz

23L5506

12SLN5501A

2R4P

34SLN5501B

U3_U3RXDP2_C

2R4P

34

SLN5502B

U3_U3RXDN2_C

2R4P

12

SLN5502A

U3_U3TXDP2_C

2R4P

U3_U3TXDN2_C

1

4

L5505

20161207_SWAP

90Ohm/100MHz
@/EMI/USB3.0

2

3

2

3

L5503

20161207_SWAP

90Ohm/100MHz
@/EMI/USB3.0

1

4

12

SLN5503A

2R4P

34

SLN5503B

U3_U3RXDP3_C

2R4P

12

SLN5504A

SHORT_LAND_2R4P

U3_U3RXDN3_C

2R4P

SHORT_LAND_2R4P

34SLN5504B

U3_U3TXDP3_C

2R4P

SHORT_LAND_2R4P

U3_U3TXDN3_C

SHORT_LAND_2R4P

U2DM_AB_C
U2DP_AB_C

4

L5501

90OHM

3

T5507

1

T5506

1

GND

T5505

1

T5504

U5505

17

18

20

21

1

POL#19UFP#

GND222GND3

T5508

AUDIO#

LD_DET#

1

16

1

FAULT#

DEBUG#

2

15

USB_C_OC#

IN1_1

OUT2

3

14

IN1_2

OUT1

4

13

IN2

CC2

5

12

USB_C_CC2

AUX

GND1

12

C5566

6

11

EN

CC1

10UF/25V

USB_C_CC1

nbs_c0805_h49_000s

CHG8CHG_HI9REF_RTN10REF

7

SN1507044RVCR

06050-00280000

GND

12

R5509

CHU

100KOhm

CHU_HI

TI sug U5505
remove pin9 GND

20151007
TI 過認證後改開鋼板JP5501
認證前先用F5501保護

USB2.0 ESD-Protection

ESD chip should be 5V tole rance

U2DM_AB_C

U2DP_AB_C

+USB_C_VBUS

F5501

12

2.6A/6V @

nbs_polyswitch_2p_017

JP5501

112

2

1MM_SHORT_PIN

nbs_1mm_open_5mil_000

12

12

C5501

C5562

0.1UF/16V

10UF/25V

nbs_c0805_h49_000s

GND

GND GNDGND

+USB_C_VBUS

VDD

I/O4

5

6

1234

GND

I/O1

GND

12

C5561
100UF/6.3V

@

nbs_c1206_h75_000s

D5501
AZC099-04SP

/EMI

07024-00200200

I/O2 I/O3

2017/02/06 X542UA_R1.1 #25, U4802/03/U5202/03/U5506/07 add 07G028076030

USB3.0 ESD-Protection

U3_U3TXDP3_C
U3_U3TXDN3_C

U3_U3RXDP3_C
U3_U3RXDN3_C

GND

USB3.0 ESD-Protection

U3_U3TXDN2_C
U3_U3TXDP2_C U3_U3TXDN2_C

U3_U3RXDN2_C

GND

U5506

1

Line-1

2

9

Line-2

NC4

3

8

GND

NC3

4

7

Line-3

NC2

6

NC15Line-4

AZ1045-04F

/EMI

2nd source:
07024-00760000

07G028076030

07024-00960000

U5507

1

Line-1

2

9

Line-2

NC4

3

8

GND

NC3

4

7

Line-3

NC2

6

NC15Line-4

AZ1045-04F

/EMI

2nd source:
07024-00760000

07G028076030

07024-00960000

@

GND GND

GNDGND

J5501

A1

B1

GND1

GND4

A2

B2

SSTXp1

SSTXp2

A3

B3

U3_U3TXDP2_C
U3_U3TXDN2_C

U2DP_AB_C
U2DM_AB_C

U3_U3TXDP3_C
U3_U3TXDN3_C

U3_U3RXDP3_C
U3_U3RXDN3_C

U3_U3TXDP2_C
U3_U3RXDP2_CU3_U3RXDP2_C
U3_U3RXDN2_C

U3_U3RXDN3_C
U3_U3RXDP3_C

SSTXn1

SSTXn2

A4

B4

VBUS1

VBUS4

A5

B5

CC1

CC2

A6

B6

Dp1

Dp2

A7

B7

Dn1

Dn2

A8

B8

SUB1

SUB2

A9

B9

VBUS2

VBUS3

A10

B10

SSRXn2

SSRXn1

A11

B11

SSRXp2

SSRXp1

A12

B12

GND3

GND2

1

3

NP_NC1

P_GND1

2

4

NP_NC2

P_GND2

5

P_GND3

6

P_GND4

7

P_GND5

8

P_GND6

USB_CON_24P

12013-00111000

GND

2nd source:
12013-00116300
12013-00119300

2016/11/09 X542UA_R1.0 #68, Reserve RN5501 for USB_C_CC1/CC2 PU to +3V

U3_U3TXDP3_C
U3_U3TXDN3_C

USB_C_CC2USB_C_CC1
U2DP_AB_C
U2DM_AB_C

U3_U3RXDN2_C
U3_U3RXDP2_C

GND

USB_C_CC1
USB_C_CC2

Title :

D

Date: Sheet of

2016/06/14
X456UQK R1.4 Note 2

2017/01/20 X542UA_R1.1 #12, Type-C U3 modify

RN5501B

RN5501A

USB 3.1 MB Type-C

Size

Dept.:

Tuesday, June 20, 2017

34
12

NB2_RD1_EE1

+3V

@

4.7KOhm
@

4.7KOhm

Project Name

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

55

20160218 X541UV R1.1
R5703 Stuff for dischager +5VS

SUSB_EC#30,77,88

12

R5703

+3VA

330Ohm

12

R5701

Q5702A

100KOhm

EM6K1-G-T2R

34

UM6K1N

Q5701B

5

61

UM6K1N

Q5701A

2

GND GND GND

GND

+3VS+5VS

12

R5704
330Ohm
@

EM6K1-G-T2R

61

2

@

R1.1-5

+VCCIO

12

R5707
330Ohm
@

Q5702B

34

5

@

Main Board

20151127 X541UV DEL +1.8VS

+NVVDD +PEX_VDD

12

R5722
330Ohm
@

+NVDD_DSG +3VSG_MAIN_DSG+PEX_VDD_DSG +3VSG _AON_DSG

D5701

4/20 Stuff R5710 and R5711

2

PS_ON32,88

+3VA

12

R5702
100KOhm

61

GND

UM6K1N

Q5706A

12

@

61

2

@

GND GND

1

3

2

BAT54CW
/VGA

+3V

12

R5711
330Ohm

34

UM6K1N

Q5706B

5

GND GND

+3VA_EC+3VA

12

R5713
100KOhm

34

5

@

EM6K1-G-T2R

Q5709A

R5756
330Ohm

@

EM6K1-G-T2R

Q5709B

dGPU_PWR_MAIN_DSG#77

dGPU_PWR_AON_DSG#77

dGPU_PWR_15#77

SUSC_EC#30,52,68,88 PM_SUSC#25,30,86

UX303 0827

UX303C1 0616

61

Q5703A

2

dGPU_PWR_MAIN_DSG#_R

UM6K1N
/VGA

12

R5730

GND GND GND GND GND
1MOhm
/VGA

GND GND GND

R1.1-5

+VCCST

12

R5723
330Ohm
@

Q5708A

Q5708B

EM6K1-G-T2R

EM6K1-G-T2R

61

34

@

@

2

5

2

5VSUS_ON30,87 VSUS_ON30,83,88

UX303 1015

12

R5705

33Ohm

/VGA

34

Q5703B

5

UM6K1N

/VGA

2017/02/09 X542UA_R1.1 #27, Stuff R5712 & modify SUSC_EC# to PM_SUSC#

+5VSUS+3VA

12

R5719

R5715
100KOhm

124Ohm

@

12

34

EM6K1-G-T2R

Q5710B

5

@

61

EM6K1-G-T2R

Q5710A

@

GND GND

+VDD_MAIN +VDD_AON

12

61

Q5704A

2

UM6K1N
/VGA

@

R5721

33Ohm
/VGA

12

+3VA

12

34

5

GND

330Ohm

330Ohm

@

@

34

Q5704B

5

UM6K1N
/VGA

R5731
1MOhm
@/VGA

R5708
100KOhm

2

UM6K1N

Q5707B

GND

@

Q5705A

EM6K1-G-T2R

2

12

R5714
1MOhm
@/VGA

+1.2V

12

R5712
330Ohm

61

UM6K1N

Q5707A

12

R5709
100KOhm
@

61

EM6K1-G-T2R

Q5711A

2

@

GND

@

Q5705B

+1.35VSG_DSG

EM6K1-G-T2R

34

61

5

+1.0VSUS +1.8VSUS+3VSUS+3VA

R5717

124Ohm
@

12

12

34

61

EM6K1-G-T2R

Q5711B

5

2

@

GND GND GND

R5710

R5706

124Ohm

124Ohm

@

@

12

34

EM6K1-G-T2R

EM6K1-G-T2R

Q5712B

Q5712A

5

@

@

BOM

Project Name

Rev

Title :

DSG_Discharge

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

R1.0X542UN/URV

Engineer:

Andy_Tang

102

of

57

+FBVDDQ

12

12

R5720

R5718

20150325
R1.1 follow VC & intel sequence

3VA_DSW_PWRGD25,30,87

1.0VSUS_PWRGD83

P_3VSUS_PWRGD88

1.8VSUS_PWRGD83

DPWROK_EC25,30

VCCST_PWRGD88

20150325
R1.1 follow VC & intel sequence

PM_SUSB#25,30,88

1.2V_PWRGD86

VCCIO_PWRGD88

2.5V_PWRGD86

12

20150108
Checking

R5803

R5803 near CPU side

1KOhm

34

UM6K1N

Q5801B

5

BOM

Project Name

Title :

PRO_Protect

Size

Dept.:

NB2_RD1_EE1

B

Date: Sheet

Tuesday, June 20, 2017

Main Board

VCCST_PWRGD_PCH 25

Engineer:

Joach_Wang

Rev

R2.0X542UA/UV

102

of

58

+3VA_DSW

+3VA_DSW

12

12

R5852
100KOhm

R5811

R1.0-7

100KOhm

2014/12/26
remove VCCPRIM_PWRGD

D5804

1

3

2

BAT54AW

SL5808

21

0402

+3VA_DSW

12

R5809
100KOhm

D5803

1

3

2

R5805
100KOhm

12

R5807
100KOhm

+3VSUS +3VSUS

12

R5813

100KOhm

+3VA_DSW

3VSUS_PWRGD

R5812
100KOhm

R1.0-7

12

12

BAT54AW

D5802

1

3

2

BAT54AW

D5801

1

3

2

BAT54AW

R5814

100KOhm

D5806

1

3

2

BAT54AW

+3VSUS

+3VSUS

12

12

C5804
100PF/50V

GND

3VSUS_PWRGD

+3VS

12

R5806
10KOhm

SL5801

21

ALL_SYSTEM_PWRGD 25,30,80

0402

2017/02/13 X542UA_R1.1 #29, C5802 stuff 0.01uF for S0 to DS3 tPLT17

12

C5802

0.01UF/25V

GND

3VSUS_PWRGD 30

ALL_SYSTEM_PWRGD

EMI solution

R1.0-2

2.5V_PWRGD

VCCST_PWRGD for PCH

D5805

BAT54CTB

3

SL5802

@

C5803

0.1UF/6.3V

@

1

2

21

0402

12

@
C5801

0.1UF/6.3V

GND GND GND

12

GND

+3VA_DSW +1.0V_VCCST

12

R5801

100KOhm

61

UM6K1N

Q5801A

2

2016/10/06_X542UA_R1.0 #22, Del LED circuit

+3VA

12

C5901

0.1UF/16V

GND

12

C5902

0.1UF/16V

/PR

GND

LID_SW#30

current: 1m

JDEBUGSW5901

2nd follow X541U

06045-00050100

2nd source:
06033-00140000

LID_SW#

PWR_SW#

123

SW_4P

/PR

1

2

12

D5911
@/ESD

4

J5901

VDD

GND

OUTPUT

YB8248ST23

PWR_SW# 30,31,32

3

GND

<Variant Name>

Title :

Size

A

Date: Sheet

59_Power & WIFI & CAP LED

Dept.:

Tuesday, June 20, 2017

NB2_RD1_EE1

Project Name

X542UA/UV

Engineer:

Joach_Wang

59

Rev

R2.0

102

of

Power

J6001

PIN(+)

9
7

SPRING(-)

8
1
2
3
4

GND

5
6

DC_PWR_JACK_9P

12033-00030500

換Connector 整個 GND Shape 都要跟PIN腳連起來

Battery Connector

2016/11/11 X542UA_#71, Modify J60 02, battery pin define fol low X456U battery

J6002

NP_NC1

9

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

NP_NC2

10

BATT_CON_8P

12020-00010900

Pin define should be checked after battery team confirm

Note:<=65W bead*3;
90W~~150W:Bead*4;

1
1
1
1

+V_DCJACK

1
1
1
1

GND

>=180W: bead*6

PT6001
PT6002
PT6003
PT6004

PT6005
PT6006
PT6007
PT6008

GND

PL6001
120Ohm

PL6002
120Ohm

12

PL6003

PC6001

120Ohm

0.1UF/25V

BAT_CON

SMB0_DAT_CLK_CON
SMB0_DAT_BAT_CON

BAT_EN#

12

PC6006

0.1UF/25V
nbs_c0603_h37_000s

21

21

21

12

PR6004 330Ohm

12

PR6005 330Ohm

H6001

1
2
3

C276D94N

s10836

12

PC6003
1UF/25V

+3VA

NP_NC
GND1
GND2

A/D_DOCK_IN+V_DCJACK

12

PR6002

2.2Ohm

12

PC6004

0.1UF/25V
@

P_AC_SNB_20

12

PC6005
10UF/25V

GND

20150706
H6001為一顆螺絲接通 BAT_EN# 和 GND,電池才開始送電
20160216
H6001 Change temp_T_0390
20160329
H6001 Change s10270

1

PT6022

1

PT6020

PD6001

I/O2 I/O3

GND

VDD

2345

I/O1

I/O4

1

6

AZC099-04SP

12

SMB0_CLK 30,89
SMB0_DAT 30,89

PR6003

2.2Ohm

2mm

<Variant Name>

Project Name

Rev

R2.0

X542UA/UV

Title :

60_DC_DC & BAT IN

Size

Dept.:

Engineer:

Tuesday, June 20, 2017

Power

102

60

C

Date: Sheet of

2016/11/16 X542UA_R1.0 #81, Add HDD DB

2016/11/23 X542UA_R1.0 #88, Modify J6401 to B to B conn. & pin define

2016/11/28 X542UA_R1.0 #92, Modify J6401 to BtoB CONN. from MB to HDD DB & Del J6402 from HDD DB to IO DB

SATA HDD BtoB CONN.

SATA0_HDD_TX_DP_HD
SATA0_HDD_TX_DN_HD

SATA0_HDD_RX_DN_HD
SATA0_HDD_RX_DP_HD

SATA0_DEVSLP_HD

12G161H0020A

SATA HDD CONN.

A-B: 2

BtoB NUT s

H6401

CT236B195ID165

13NB0621M09011

nbs_nut_1p_343

2nd source:
13020-01370600

GND_HD GND_HD

C-D E-D G-D G-H: 2

H6403

1

NP_NC

2

GND4

GND1

3

GND3

GND2

c276d98n

GND_HD GND_HD GND_HD GND_HD GND_HD GND_H D

s07694

+5VS_HD

12

12

C6410

C6401

C6402

0.1UF/16V

22UF/6.3V

10UF/6.3V

12

nbs_c0805_h57_000s

nbs_c0603_h37_000s

HDD_@

+3VS_HD

GND_HD

12

12

C6403

C6404

0.1UF/16V

10UF/6.3V

HDD_@

nbs_c0603_h37_000s
HDD_@

GND_HD

SATA_TXP0_C
SATA_TXN0_C SATA_TXP0_C

SATA_RXN0_C
SATA_RXP0_C

H6402

CT236CB195D165

13020-01480000

nbs_nut_1p_343

2nd source:
13020-01370700

H6407

1

NP_NC

5

2

GND1

4

3

GND2

CRT591X374CB276D98N

s10841

H6406

1

NP_NC

5

GND4

4

GND3

5

2

GND4

GND1

4

3

GND3

GND2

CB276D98N

s10828

J6401

2
4

SIDE423SIDE3
6
8

10

10

121211
141413
16

16
18
20

SIDE221SIDE1

BTOB_CON_20P

GND_HD GND_HD

GND_HD

SATA HDD

GND_HD

U6401

1

Line-1

2

Line-2

3

GND

4

Line-3

AZ1045-04F

07G028076030

GND_HD

H6404

1

C98D98N

s09684

24

GND_HD

112

+3VS_HD

334
556
778

+5VS_HD

9

9
11
13

15

15

171718
191920

22

J6403

2

P_GND2S1S1

S2

S2

4

S3

NP_NC2

S3

S4

S4

S5

S5

S6

S6

S7

S7

P1

P1

P2

P2

P3

P3

P4

P4

P5

P5

P6

P6

P7

P7

P8

P8

P9

P9

P10

P10

P11

P11

P12

P12

P13

3

P13

NP_NC1

P14

P14

P15

1

P15

P_GND1

SATA_CON_22P

12015-00295500

2nd source:
12015-00295200

以list 2nd footprint 下去layout 避免干涉

9

NC4

8

NC3

7

SATA_TXN0_C

NC2

6

SATA_RXN0_C

NC15Line-4

SATA_RXP0_C

HDD_@/EMI

2nd source:
07024-00760000
07024-00960000

1A

2A

SATA_TXP0_C
SATA_TXN0_C

SATA_RXN0_C
SATA_RXP0_C

+3VS_HDD

SATA0_DEVSLP_C

+5VS_HDD

T6402

1

GND_HD

H6405

1

C98D98N

s09684

12

C6405 0.01UF/16V

12

C6406 0.01UF/16V

12

C6407 0.01UF/16V

12

C6408 0.01UF/16V

21

SL6404

0805

1A

12

R6402 0Ohm

HDD_@

21

SL6407

0402

21

SL6405

0805

2A

21

SL6406

0805

0805 SL 拉40 mil trace = 1A
for power consumption

Near J6403

EMI

SATA0_DEVSLP_HD

12

C6409

0.1UF/16V
HDD_@/EMI

GND_HD

SATA0_HDD_TX_DP_HD
SATA0_HDD_TX_DN_HD

SATA0_HDD_RX_DN_HD
SATA0_HDD_RX_DP_HD

+3VS_HD

SATA0_DEVSLP_HD

+5VS_HD

BOM

Project Name

Title :

IO_SATA HDD & SPEAKER

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

Rev

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

64

2016/10/18 X542UA_R1.0 #48, Update H65-1~H6506 for CP U/DGPU/SSD nuts

O-P + R-Q: 6

TOP CPU NUT S footprint: 342

2017/01/23 X542UA_R1.1 #14 , H6503 & H6504 modify to 1302 0-00880000

H6503

CT256BRID146

13020-00880000

nbs_nut_1p_344

2nd source:
13020-02020000

H6504

CT256BRID146

13020-00880000

nbs_nut_1p_344

2nd source:
13020-02020000

H6505

CT256BRID146

13020-00880000

nbs_nut_1p_344

2nd source:
13020-02020000

A-B: 4

H6511

1
2
3

c276d98n

GND GND GND GNDGND GND

s07694

C-D: 3

H6507

1
2
3

C276D94N

GND GND GND GND GND GND

s05088

C-F

At P60, H6001

X-1 AA-BB & CC-DD

GND GND

H6512

1

NP_NC
GND1
GND2

NP_NC
GND1
GND2

NP_NC

5

2

GND4

GND1

4

3

GND3

GND2

c276d98n

s07694

H6508

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

C276D94N

s05088

G-H T

H6517

1

NP_NC

2

GND1

3

GND2

C276D165N

GND GND GND GND

s10832

X-2

H6526

1

1

SMD2008X98

temp_T_001415

1

H6528

SMD827X85

temp_T_001416

H6513

1

NP_NC

5

2

GND4

GND1

4

3

GND3

GND2

c276d98n

s07694

H6510

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

C276D94N

s05088

H6531

1

NP_NC

5

2

GND4

GND1

4

3

GND3

GND2

RCT577X335CB276D165N

GND GND

s10837

1

H6521

1

O118X98DO118X98N

GNDGND

1
2
3

1
2
3

1
2
3

H6527

NP_NC
GND1
GND2

c276d98n

s07694

H6515

NP_NC
GND1
GND2

CB276D98N

s10828

H6523

NP_NC1
NP_NC2
GND2

2D_D110N_D98N

s10838

CT256BRID146

13020-00880000

nbs_nut_1p_344

2nd source:
13020-02020000

H6522

1

O118X98DO118X98N

s04890

5

GND4

4

GND3

5

GND4

4

GND3

6

GND5

5

GND4

4

GND3

TOP GPU NUT S footprint: 303

H6501

/VGA

CT236B177D150
nbs_nut_1p_303

13GNXS10M120-1

2nd source:
13020-00109900

GND GNDGND GND

K-B

H6516

6

1

GND5

NP_NC1

5

2

GND4

NP_NC2

4

3

GND3

GND2

2D_D98N_D67N

GND GND

s10835

Y-Z: 3

H6518

1

C98D98N

s09684

H6525

1

1

SMD315X236

temp_T_001414

GND

GG-HH II-JJ

H6514

1

9

NP_NC1

GND1

10

2

GND2

NP_NC2

11

3

GND3

NP_NC3

12

4

GND4

NP_NC4

5

NP_NC5

6

NP_NC6

7

NP_NC7

8

NP_NC8

8D_D98N_D39N

GND GND

s11029

2017/02/09 X542UA_R1.1 #28, H6509 & H6514 modify

H6502

/VGA

CT236B177D150
nbs_nut_1p_303

13GNXS10M120-1

2nd source:
13020-00109900

Gasket

TOP

H6529

1

1

GASKET_1P

13040-00530000

GND GND

/EMI

H6519

1

C98D98N

s09684

H6509

1

NP_NC16GND1

2

NP_NC2

3

NP_NC3

4

NP_NC4

5

NP_NC5

5D_D94N_4D24N

s11034

2017/02/02 X542UA_R1.1 #23, Add Gasket H6532 for EMI

BOT

1

H6520

s09684

H6532

1

1

SMD209X130

13040-00890000

GND

/EMI

<Variant Name>

Project Name

X542UA/UV

65_ME_Conn & Skew Hole

Title :

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

Rev

R2.0

Engineer:

Joach_Wang

102

of

65

H6530

1

1

GASKET_1P

13040-00530000

/EMI

C98D98N

7

GND2

H6506

5

GND4

4

GND3

GND GND

Y-B

5

GND4

4

GND3

GND GND

M-NI-H

5

GND4

4

GND3

s04890

DB_IO

2016/10/06 X542UA_R1.0 #16, Add IO DB. follow X456U & Modify netname

2016/10/06 X542UA_R1.0 #26, Change FFC CONN. to 12018-00021800 same as J6801

2016/10/11 X542UA_R1.0 #37, Modify J6601 pin define

2016/11/15 X542UA_R1.0 #75, J6601 Pin define reverse

2016/11/28 X542UA_R1.0 #90, Modify J6601 to 30 pin FPC CONN. from IO DB to MB

2016/12/15 X542U5_R1.0 #A5, Audio Jack pin modify

USB 2.0 con.

2016/10/06 X542UA_R1.0 #23, Change USB2.0 portect IC over current to 2.5A so lution

2016/10/12 X542UA_R1.0 #42, Modify U6602 circuit

USB3.0 Power SW for Power Protect

+5VSUS_IO

U6602

IO_N/A

EN#/EN5OC#

4

SUSC_EC#_IO

IN2

OUT3

3

6

IN1

OUT2

2

7

GND

OUT1

1

8

12

BD82034FVJ-E2

C6639

10UF/25V

C6640

06016-01200000

12

IO_@

1UF/25V

nbs_c0805_h49_000s

IO_EMI

GND_IO GND_IOGND_IO

GND_IO

AUDIO JACK

2016/10/06 X542UA_#120, Modify Audio Jack to X541U solution

R6609 62O hm

12

IO_N/A

HP_L_2_IO

R6611 62O hm

12

IO_N/A

HP_R_2_IO

2015/09/24
R2.0 R3708, R3709 change from 51 to 62
Ohm for 音壓測試

Near J6601

EMI

+5V_USB_IO

T6607

1

IO_@

12

C6641

22UF/6.3V

IO_N/A

BUF_PLT_RST#_IOSUSC_EC#_IO

12

C6644
1000PF/50V

IO_@/EMI

AC_HP_R_R

MIC2_L_RING2_IO

MIC2_R_SLEEVE_IO MIC2_R_SLEEVE_J

HDD DB to IO DB F PC CONN.

+5VSUS_IO

USB2.0 100 mil 2.5A

LED 5 mil 0.05A

+3VS_IO

CR 40 mil 0.5A

BUF_PLT_RST#_IO

CHG_FULL_LED#_IO

LED

CHG_LED#_IO
PWR_LED_IO

WLAN_LED_IO

SATA_LED#_IO

USB PWR SW en

SUSC_EC#_IO

USB_P7_DP_IO

CR

USB_P7_DN_IO

USB_P4_DN_IO

USB 2.0

USB_P4_DP_IO

HP_JD1_IO

HP_R_2_IO

AUDIO JACK

HP_L_2_IO

MIC2_L_RING2_IO

MIC2_R_SLEEVE_IO

AUDIO JACK

12

C6642
1000PF/50V

IO_@/EMI

GND_IOGND_IO

+5V_USB_IO

12

12

12

12

C6602

C6604

C6605

C6601

47UF/6.3V

22UF/6.3V

22UF/6.3V

0.1UF/16V

IO_EMI

IO_@

IO_N/A

IO_EMI

GND_IO GND_IO GND_IO GND_IO

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

34SLN6 601B

2R4P

12

SLN6601A

USB_P4_DN_IO IO_USB_U4-_CON

2R4P

IO_USB_U4+_CONUSB_P4_DP_IO

L6602

90Ohm/100Mhz
IO_@/EMI

14

23

20150708
R2.0 Mount L6601 & L6602 for EMI

USB2.0 ESD-Protection

ESD chip should be 5V tolerance

+5V_USB_IO

IO_USB_U4-_CON

VDD

I/O4

5

6

D6602

AZC099-04SP

IO_/EMI

07024-00200200

1234

GND

I/O2 I/O3

I/O1

IO_USB_U4+_CON

GND_IO

12R6610 0Ohm

IO_N/A

nbs_r0603_h24_000s

AC_HP_L_JAC_HP_L_R

12

R6612 0Ohm

IO_N/A

nbs_r0603_h24_000s

AC_HP_R_J

12

12

C6603

C6606

100PF/50V

100PF/50V

IO_/EMI

IO_/EMI

GND_AUDIO_IO

12

R6617 0OhmIO_N/A

MIC2_L_RING2_J

12

R6618 0OhmIO_N/A

12

12

C6607

C6632

100PF/50V

100PF/50V

IO_/EMI

IO_/EMI

2017/01/23 X542UA_R1.1 #21, C6603/06/43/32/07 stuff 100pF for EMI

GND_AUDIO_IO

(7031.00 4878.00)
(6869.00 4715.00)
(6946.00 5380.00)

C6646 0.1UF/16V IO_/EMI

12

C6647 0.1UF/16V IO_/EMI

12

C6645 0.1UF/16V IO_/EMI

12

GND_IO

1

SD Card Reader

J6601

30

30

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

21

32

21

SIDE2

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

31

10

SIDE1

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

FPC_CON_30P

IO_N/A

12018-00021800

2nd source:

GND_IO

12018-00021900

GND_IOGND_AUDIO_IO

12018-00022000

J6602

1

8

1

P_GND4

2

7

2

P_GND3

3

6

3

P_GND2

445

P_GND1

USB_CON_4P

IO_N/A

12012-00063900

2nd source:
12012-00063300

GND_IO

GND_IO

J6603

IO_N/A

6

4

5

HP_JD1_IO

3

2

1

AUDIO_JACK_6P

12014-00714700

2nd source:
12014-00715700

GND_AUDIO_IO

HP_JD1_IO

12

C6643

(6941.00 4853.00)

100PF/50V

IO_/EMI

GND_AUDIO_IOGND_AUDIO_IO GND_IO

Max : 0.5A

+3VS_IO

+3V_CR

SL6608

21

0603

40mil

IO_@

C6608

0.1UF/16V

12

IO_@/EMI

GND_IO

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

12SLN6 603A

2R4P

USB_P7_DP_IO

L6601

90Ohm/100Mhz

14

23

34SLN6 603B

2R4P

USB_P7_DN_IO

LED indicator

+5VSUS_IO

IO_N/A

IF = 5mA
VF Min. = 1.6V
VF Max. = 2.4V

LED6601

Orange

+

4

CHG_LED#_IO

+

123

CHG_FULL_LED#_IO

White

IF = 5mA

WHITE&ORANGE

VF Min. = 2.55V

07014-00190100

VF Max. = 3.15V

IO_N/A

FOR EMI

12

12

C6630

C6631

33PF/50V

33PF/50V

IO_@/EMI

IO_@/EMI

IO_Board PAD

A-B E-F G-H I-JC-D

H6602

H6603

1

1

NP_NC

NP_NC

2

5

2

5

GND1

GND4

GND1

GND4

3

4

3

4

GND2

GND3

GND2

GND3

CRT400X386D98N

CRTCB276D98N

GND_IO GND_IO GND_IO GND_IO GND_IO GND_IO

s10843

s10844

近IC

+3V_CR

12

12

12

C6618

C6619

0.1UF/16V

2.2UF/10V

IO_@

IO_@

nbs_c0603_h37_000s

GND_IO

USB_P7_DP_R

IO_@/EMI

12

12

C6612

C6611

USB_P7_DN_R

0.1UF/16V

0.1UF/16V

IO_@

IO_@

GND_IOGND_IO

X'tal

XIN_CR

13

12

C6616

24X6601

27PF/50V

12MHZ

IO_@

IO_@

GND_IO GND_IOGND_IO

AU6465 CLK source : External CLK or X'tal
XTALSEL : 0 = 12Mhz, 1 = 48Mhz(default)

AU6465R : Build in X'tal

WIRELESS/ BT LEDCharge r LED POWER LED

2017/01/24 X542UA_R1.1 #22, WLAN LED modify PU from +5VSUS_IO to +3VS_IO

12

R6601

330Ohm

1

WLAN_LED_IO

12

IO_@

R6602

10KOhm

GND_IO GND_IO GND_IOGND_IO

WLAN_LED_IOCHG_FULL_LED#_IO CHG_LED#_IO

PWR_LED_IO

12

C6633

33PF/50V
IO_@/EMI

H6601

1

NP_NC

2

5

GND1

GND4

3

4

GND2

GND3

c276d98n

s07694

C6620

4.7UF/6.3V

IO_N/A

XOUT_CR

12

12

R6603

100Ohm

12

+

IO_N/A

3

3

D

1

G

S

2

2

IO_N/A

GND_IO

12

C6634

33PF/50V
IO_@/EMI

GND_IOGND_IOGND_IOGND_IO

+3V_CR

12

12

C6610

C6609

10PF/50V

0.1UF/16V

IO_@

IO_N/A

GND_IO GND_IO

IO_PWR

12

12

C6621

C6622

4.7UF/6.3V

0.1UF/16V

IO_@

GND_IO

nbs_c0603_h37_000s

IO_N/A

近J4004

SL6601

0402

SDCLK

IO_@

C6617

27PF/50V

IO_@

LED6602

WHITE

07G01520043A

2nd source:

Q6603

2N7002K

PWR_LED_IO SATA_LED#_IO

H6604

1

C98D98N

s09684

12

IO_N/A

GND_IO

R6605 330Ohm

CR_REXT

USB_P7_DP_R
USB_P7_DN_R

GND_IO

XIN_CR

XOUT_CR

40mil

+1.8V_CR

+3V_CARD

+3V_CR

+3V_CARD

12

C6623

0.1UF/16V
IO_@

GND_IO

+3V_CARD

SD_CLK_C

20150708
R2.0 C6625 mount 22pF for EMI

21

SD_CLK_C

12

Checking

C6624

Modify to 10pF, 0402 type

10PF/50V

IO_@

GND_IO

+5VSUS_IO

12

R6604

330Ohm

IO_N/A

12

LED6603

+

WHITE

07G01520043A

IO_N/A

3

3

Q6604

D

2N7002K

1

1

G

12

S

2

IO_@

2

R6620

10KOhm

IO_N/A

GND_IO

H6605

1

O161X91DO161X91N

s10846

U6601

29

28

27

24

23

30

GND1

GND2

MSCLK

SDCMD

1

REXT

MSD7/SDD226MSD3/SDD325MSD6/SDD4

2

V33P

3

DP

4

DM

5

VS33P

6

XI

7

XO

V189C1_V3310VDDHM11VDD12MSINS13SDCDN14RSTN

8

AU6465RB63-GCF-GR

IO_N/A

12

C6613

IO_N/A

4.7UF/6.3V

XDRDN/MSINS

Pin 8

nbs_c0603_h37_000s

12

C6614

0.1UF/16V

GND_IO

Pin 11

GND_IO

SL6615

21

0805

IO_@

F6602 1.5A/6V

12

IO_@/EMI

SL6616

21

0603

IO_@

12

C6625

C6626

4.7UF/6.3V

22PF/50V

12

IO_@

IO_/EMI

nbs_c0603_h37_000s

GND_IO GND_IO GND_IO

HDD LED

2017/01/11 X542UA_R1.1 #01, HDD LED modify PU from +5VSUS_IO to +3VS_IO

21

SL6602

0402

2016/11/15 X542UA_R1.0 #76, SATA_LED reserve Q6604 & add SL6602

IO_@

1

1

G

12

IO_@

R6614

10KOhm

21

SL6609 IO_@

0402

21

SL6610 IO_@

0402

21

SL6611 IO_@

DATA4

0402

SDCMD_L SDCMD
DATA5

SDCLK

5/31
改用AU6465RB63-GCF-GR

22

02046-00020200

SDCLK

21

MSD0/SDD6

MSD2/SDD5

20

DATA6

MSD4/SDD7

19

21

SL6612 IO_@

DATA7

MSD1/SDD0

0402

18

21

SL6613 IO_@

DATA0 SD-DATA0

MSD5/SDD1

0402

17

21 SL6614 IO_@

MSBS/SDWP

0402

16

SDWP1

VDDIO

15

12

IO_@

XTALSEL

R6607 10KOhm

XTALSEL

12

R6608 0OhmIO_@

02046-00020200

CR_RSTN

SDCDN

1 T6606 IO_@

+1.8V_CR

IO_N/A

SD-DATA2

+3V_CARD_CON

SD-DATA3

SDCMD

SDCLK_R

C6627

SD-DATA0

0.1UF/16V

SD-DATA1

12

IO_N/A

SDCDN

SDWP

12

12

C6628

C6629

10PF/50V

10PF/50V

IO_@

IO_@

GND_IO GND_IO GND_IO GND_IO

2017/01/20 X542UA_R1.1 #14, J6604 CDN & WP SWAP

FOR EMI

SD-DATA0 SD-DATA1 SD-DATA2 SD-DATA3

12

C6635

10PF/50V

IO_@/EMI

GND_IO GND_IO GND_IO GND_IO

+3VS_IO+3VS_IO

12

R6613

100Ohm

12

LED6604

+

WHITE

07G01520043A

IO_N/A

3

3

Q6605

D

2N7002K

IO_@

S

2

2

T6601IO _@

SD-DATA2DATA2

1

SD-DATA3DATA3

T6602IO _@

1

T6603IO _@

1

T6604IO _@

1

T6605IO _@

SD-DATA1DATA1

SDWP

IO_PWR

+3V_CR

GND_IO

R6606 0OhmIO_@

12

C6615

0.47UF/6.3V

IO_N/A

GND_IO

J6604

9

DAT2

1

CD/DAT3

2

CMD

3

VSS1

4

VDD

5

CLK

6

VSS2

7

DAT0

8

DAT1

10

CD

11

WP

SD_SOCKET_9P

12023-00013700

2nd source:
12023-00017400

12

C6636

10PF/50V

IO_@/EMI

CAP LED

BOM

Title :

Size

Custom

Date: Sheet of

Tuesday, June 20, 2017

40mil

12

BUF_PLT_RST#_IO

IO_N/A

16

GND3

14

GND1

12

NP_NC1

13

NP_NC2

15

GND2

17

GND4

12

12

C6637

C6638

10PF/50V

10PF/50V

IO_@/EMI

IO_@/EMI

Project Name

Rev

R2.0X542UA/UV

IO_USB*2 & CR & LED

Dept.:

Engineer:

NB2_RD1_EE1

Joach_Wang

102

66

MAIN Board to IO FPC CONN.

2016/10/06 X542UA_R1.0 #14, Del SATA BtoB CONN.

2016/10/06 X542UA_R1.0 #19, Add IO FPC CONN. follow X456U

2016/10/11 X542UA_R1.0 #38, Modify J6801 pin define

2016/10/12 X542UA_R1.0 #41, USB Power SW enable pin change to SUSC_EC#

2016/11/16 X542UA_R1.0 #80, Update J6801 from 30pin to 40pin (Add SATA HDD)

2016/11/23 X542UA_R1.0 #87, Modify J6801 to B to B conn. & pin define

2016/11/28 X542UA_R1.0 #89, Modify J6801 to 30 pin FPC CONN. from MB to IO DB

2016/12/15 X542U5_R1.0 #A4, Audio Jack pin modify

Near J6801

EMI

2017/02/02 X542UA_R1.1 #24, 0ohm modify to SL

34

SLN6801B

SLN6801A

SLN6802B

SLN6802A

SUSC_EC#

2R4P

12

2R4P

14

34

2R4P

12

2R4P

14

12

C6803
1000PF/50V

@/EMI

USB_PP723

USB_PN723

USB_PN423
USB_PP423

L6801

90Ohm/100Mhz

@/EMI

23

L6802

90Ohm/100Mhz

@/EMI

23

BUF_PLT_RST#

MB to IO DB FPC CONN.

J6801

USB2.0 100 mil 2.5A

LED 5 mil 0.05A

CR 40 mil 0.5A

LED

USB PWR SW en

CR

USB 2.0

AUDIO JACK

USB_PP7_C
USB_PN7_C

USB_PN4_C
USB_PP4_C

12

C6801
1000PF/50V

/EMI

GNDGND

+5VSUS

+3VS

BUF_PLT_RST#25,30,33,53,54,70
CHG_FULL_LED#30

CHG_LED#30
PWR_LED30

WLAN_LED_R21
SATA_LED#23
SUSC_EC#30,52,57,88

USB_PP7_C
USB_PN7_C

USB_PN4_C

USB_PP4_C

HP_JD136
HP_R_236

HP_L_236

MIC2_L_RING236
MIC2_R_SLEEVE36

AUDIO JACK

30

30

29

29

28

28

27

27

26

26

25

25

24

24

23

23

22

22

32

21

SIDE2

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

31

10

SIDE1

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

FPC_CON_30P

12018-00021800

2nd source:
12018-00021900
12018-00022000

BOM

Title :

Size

B

Date: Sheet

GNDGNDGND_AUDIO

Dept.:

Tuesday, June 20, 2017

B TO B CONNECTOR

NB2_RD1_EE1

Project Name

Engineer:

Joach_Wang

68

Rev

R2.0X542UA/UV

102

of

BAT_CON

12

C6901

(8260.00 1214.00)

0.1UF/16V
@/EMI

GND

+3VS

(8284.00 1613.00)

GND

+LED_VCC_INV

12

C6903

(2431.00 6380.00)

0.1UF/16V
@/EMI

GND

TOUCHPAD_INTR# 21,31

TOUCHPAD_INTR#

12

C6904

(393.00 2128.00)

100PF/50V
@/EMI

GND

(7928.00 2131.00)

@/EMI

C6905 0.1UF/16V

12

GND GND_AUDIO

AC_BAT_SYS

12

12

12

C6908

C6906

C6907

0.1UF/50V

0.1UF/50V

0.1UF/50V

@/EMI

@/EMI

/EMI

GND GND GND GND GND

0608 EMI add CAP

12

C6911
1000PF/50V

/VGA/EMI

(777.00 5599.00)

12

12

(2031.00 6564.00)

C6909

C6910

(895.00 2504.00)

0.1UF/50V

0.1UF/50V

(6692.00 1744.00)
(8319.00 2323.00)

/EMI

/EMI

DGPU_PWR_EN# 21,77GPU_PWR_EN 77,91,93

12

C6902
1000PF/50V
/VGA/EMI

GNDGND

BOM

Project Name

Rev

Title :

EMI

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

R2.0X542UA/UV

Engineer:

Joach_Wang

102

of

69

2016/10/07_X542UA_#31, Modify U7002 circuit follow X456U

Near U7001

EMI

U7002

1

INB

BUF_PLT_RST#25,30,33,53,54,68

2

INA

GPU_RST#21

3

GND4OUTY

74LVC1G08GW

/VGA

GND

DGPU_PEX_RST#

12

C7013
100PF/50V
/EMI

GND

PCIENB_RXN0
PCIENB_RXP0
PCIENB_RXN1
PCIENB_RXP1
PCIENB_RXN2
PCIENB_RXP2
PCIENB_RXN3
PCIENB_RXP3

PCIEG_RXP[3:0]23
PCIEG_RXN[3:0]23
PCIENB_RXP[3:0]23
PCIENB_RXN[3:0]23

N16S-GTR = 3V

N17S-G1 = 1.8V

5

VCC

+VDD_AON

/VGA/N17

12

R7002 0Ohm

12

R7011
100KOhm
/VGA

GND

CLK_PCIE_PEG_PCH24
CLK_PCIE_PEG#_PCH24

12

CX7001 0.22UF/6.3V /VGA

12

CX7002 0.22UF/6.3V /VGA

12

CX7003 0.22UF/6.3V /VGA

12

CX7004 0.22UF/6.3V /VGA

12

CX7005 0.22UF/6.3V /VGA

12

CX7006 0.22UF/6.3V /VGA

12

CX7007 0.22UF/6.3V /VGA

12

CX7008 0.22UF/6.3V /VGA

SYS_PEX_RST_MON# 76

DGPU_PEX_RST#

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

U7001A

R7001

AB6

10KOhm

NC18

/VGA

12

AC7

DGPU_PEX_RST#32,76

PEX_CLKREQ#24

SL7001
SL7002

PCIEG_TXN0
PCIEG_TXP0
PCIEG_TXN1
PCIEG_TXP1
PCIEG_TXN2
PCIEG_TXP2
PCIEG_TXN3
PCIEG_TXP3

PEX_RST_N

AC6

PEX_CLKREQ_N

PEX_CLKREQ#

AE8

21

PEX_REFCLK

0402

AD8

21

PEX_REFCLKP

PEX_REFCLK_N

0402

PEX_REFCLKN

AC9

PEX_TX0

AB9

PCIEG_TXP0

PEX_TX0_N

PCIEG_TXN0

AG6

PEX_RX0

AG7

PCIEG_RXP0

PEX_RX0_N

PCIEG_RXN0

AB10

PEX_TX1

AC10

PCIEG_TXP1

PEX_TX1_N

PCIEG_TXN1

AF7

PEX_RX1

AE7

PCIEG_RXP1

PEX_RX1_N

PCIEG_RXN1

AD11

PEX_TX2

AC11

PCIEG_TXP2

PEX_TX2_N

PCIEG_TXN2

AE9

PEX_RX2

AF9

PCIEG_RXP2

PEX_RX2_N

PCIEG_RXN2

AC

12

PEX_TX3

AB12

PCIEG_TXP3

PEX_TX3_N

PCIEG_TXN3

AG9

PEX_RX3

AG10

PCIEG_RXP3

PEX_RX3_N

PCIEG_RXN3

AB13

NC8

AC13

NC19

AF10

NC55

AE10

NC42

AD14

NC32

AC14

NC20

AE12

NC43

AF12

NC56

AC15

NC21

AB15

NC9

AG12

NC67

AG13

NC68

AB16

NC FOR GM108NC FOR GF117/GK208/GM108

NC10

AC16

NC22

AF13

NC57

AE13

NC44

AD17

NC33

AC17

NC23

AE15

NC45

AF15

NC58

AC18

NC24

AB18

NC11

AG15

NC69

AG16

NC70

AB19

NC12

AC19

NC25

AF16

NC59

AE16

NC46

AD20

NC35

AC20

NC26

AE18

NC47

AF18

NC60

AC21

NC27

AB21

NC14

AG18

NC71

AG19

NC72

AD23

NC36

AE23

NC51

AF19

NC61

AE19

NC48

AF24

NC64

AE24

NC52

AE21

NC50

AF21

NC63

AG24

NC75

AG25

NC76

AG21

NC73

AG22

NC74

N16S-GTR-S-A2

12

12

C7009

C7010

AA22

1UF/6.3V

PEX_IOVDD1
PEX_IOVDD2
PEX_IOVDD3
PEX_IOVDD4
PEX_IOVDD5
PEX_IOVDD6

PEX_IOVDDQ1
PEX_IOVDDQ2
PEX_IOVDDQ3
PEX_IOVDDQ4
PEX_IOVDDQ5
PEX_IOVDDQ6
PEX_IOVDDQ7
PEX_IOVDDQ8

PEX_IOVDDQ9
PEX_IOVDDQ10
PEX_IOVDDQ11
PEX_IOVDDQ12
PEX_IOVDDQ13
PEX_IOVDDQ14

NC FOR GF119

PEX_PLL_HVDD1
PEX_PLL_HVDD2

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK

PEX_TSTCLK_N

PEX_PLLVDD1

PEX_PLLVDD2

PEX_TERMP

1UF/6.3V

AB23

/VGA

/VGA/N17

AC24
AD25
AE26
AE27

3300 mA

AA10
AA12
AA13
AA16

12

12

AA18

C7017

C7016

AA19

1UF/6.3V

1UF/6.3V

AA20

/VGA

/VGA

AA21
AB22
AC23
AD24
AE25
AF26
AF27

0.3A

AA8
AA9

AB8

12

R7003 0Ohm

PEX_SVDD

N17S-G1, NC

/VGA/N16

T7003

1

F2

TPC26T

NVDD_VCCSENSE 9 1

0.9V 0.2mm

F1

NVDD_VSSSENSE 91

0.0V 0.2mm

AF22
AE22

12

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT_N

R7005 200Ohm

5%

@/VGA

Place Near BALLS

150mA

AA14
AA15

PEX_PLL_VDD

12

N17S-G1, NC

AD9

TESTMODE

AF25

C7026

0.1UF/16V

/VGA/N16

12

1%

R7006 10KOhm

TESTMODE

/VGA

GND

12

1%

R7007 2.49KOhm

PEX_TERMP

0.3mm

/VGA

GND

12

C7032
1UF/6.3V
/VGA/N17

Place Near GPU

PEX_PLL_HVDD

12

C7023

0.1UF/16V
/VGA

C7024 N17 11G233210625310, 10uF
N16 11G233247515360,4.7uF

12

12

C7033
1UF/6.3V
/VGA/N17

12

C7027
1UF/6.3V

/VGA/N16

C7024

10UF/6.3V
/VGA

Place Near GPU

12

12

12

Place Near GPU 300milPlace Near BALLS

nbs_c0603_h37_000s

nbs_c0603_h37_000s

GND

C7030

4.7UF/6.3V

/VGA/N16

nbs_c0603_h37_000s

C7011

4.7UF/6.3V
/VGA

C7018

4.7UF/6.3V
/VGA/N17

C7037

4.7UF/6.3V
/VGA/N17

12

nbs_c0603_h37_000s

Place Midway btw GPU&VR

12

C7025 N17 11G233222625320, 22uF
N16 11G233247515360,4.7uF

12

C7028
22UF/6.3V
@/VGA/N16

nbs_c0805_h57_000s

12

C7012
10UF/6.3V
/VGA

nbs_c0805_h37_000s

12

12

C7020
10UF/6.3V

@/VGA/N17

nbs_c0805_h37_000s

nbs_c0805_h37_000s

C7025

22UF/6.3V

/VGA

/VGA/N16

L7001

30Ohm/100Mhz

nbs_l0603_h39_000s

BOM

Project Name

Title :

N14M-GE_PCIE

Size

Dept.:

NB2_RD1_EE1

C

Date: Sheet

Tuesday, June 20, 2017

12

nbs_c0805_h57_000s

C7021
10UF/6.3V
/VGA/N17

R7010 0Ohm

21

C7014
22UF/6.3V
/VGA

/VGA/N16

12

N17S-G1 need modify to 1.0V

+PEX_VDD

12

nbs_c0805_h57_000s

GND

N17S-G1 need modify to 1.8V

+PEX_VDD_H

12

C7022
22UF/6.3V
/VGA/N17

nbs_c0805_h57_000s

GND

+VDD_AON +VDD_MAIN

12

+PEX_VDD

12

C7029
1UF/6.3V
@/VGA/N16

GND

Engineer:

C7015
22UF/6.3V
@/VGA

N17S-G1 = 1.8V

N16S-GTR = 3V

R7009

0Ohm

/VGA/N17

Andy_Tang

Rev

R1.0X542UN/URV

102

of

70

TPC26T

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

1

FBA_D0
FBA_D1
FBA_D2
FBA_D3
FBA_D4
FBA_D5
FBA_D6
FBA_D7
FBA_D8
FBA_D9
FBA_D10
FBA_D11
FBA_D12
FBA_D13
FBA_D14
FBA_D15
FBA_D16
FBA_D17
FBA_D18
FBA_D19
FBA_D20
FBA_D21
FBA_D22
FBA_D23
FBA_D24
FBA_D25
FBA_D26
FBA_D27
FBA_D28
FBA_D29
FBA_D30
FBA_D31
FBA_D32
FBA_D33
FBA_D34
FBA_D35
FBA_D36
FBA_D37
FBA_D38
FBA_D39
FBA_D40
FBA_D41
FBA_D42
FBA_D43
FBA_D44
FBA_D45
FBA_D46
FBA_D47
FBA_D48
FBA_D49
FBA_D50
FBA_D51
FBA_D52
FBA_D53
FBA_D54
FBA_D55
FBA_D56
FBA_D57
FBA_D58
FBA_D59
FBA_D60
FBA_D61
FBA_D62
FBA_D63

FB_VREF

U7001B

E18

FBA_D0

F18

FBA_D1

E16

FBA_D2

F17

FBA_D3

D20

FBA_D4

D21

FBA_D5

F20

FBA_D6

E21

FBA_D7

E15

FBA_D8

D15

FBA_D9

F15

FBA_D10

F13

FBA_D11

C13

FBA_D12

B13

FBA_D13

E13

FBA_D14

D13

FBA_D15

B15

FBA_D16

C16

FBA_D17

A13

FBA_D18

A15

FBA_D19

B18

FBA_D20

A18

FBA_D21

A19

FBA_D22

C19

FBA_D23

B24

FBA_D24

C23

FBA_D25

A25

FBA_D26

A24

FBA_D27

A21

FBA_D28

B21

FBA_D29

C20

FBA_D30

C21

FBA_D31

R22

FBA_D32

R24

FBA_D33

T22

FBA_D34

R23

FBA_D35

N25

FBA_D36

N2

6

D37

FBA_

N23

FBA_D38

N24

FBA_D39

V23

FBA_D40

V22

FBA_D41

T23

FBA_D42

U22

FBA_D43

Y24

FBA_D44

AA24

FBA_D45

Y22

FBA_D46

AA23

FBA_D47

AD27

FBA_D48

AB25

FBA_D49

AD26

FBA_D50

AC25

FBA_D51

AA27

FBA_D52

AA26

FBA_D53

W26

FBA_D54

Y25

FBA_D55

R26

FBA_D56

T25

FBA_D57

N27

FBA_D58

R27

FBA_D59

V26

FBA_D60

V27

FBA_D61

W27

FBA_D62

W25

FBA_D63

D19

FBA_DQM0

D14

FBA_DQM1

C17

GF117/GF119

FBA_DQM2

C22

GK208

FBA_DQM3

P24

FBA_DQM4

W24

FBA_DQM5

AA25

FBA_DQM6

U25

FBA_DEBUG0

FBA_DQM7

FBA_DEBUG1

E19

FBA_DQS_WP0

C15

FBA_DQS_WP1

B16

FBA_DQS_WP2

B22

FBA_DQS_WP3

R25

FBA_DQS_WP4

W23

FBA_DQS_WP5

AB26

FBA_DQS_WP6

T26

FBA_DQS_WP7

F19

FBA_DQS_RN0

C14

FBA_DQS_RN1

A16

FBA_DQS_RN2

A22

FBA_DQS_RN3

P25

FBA_DQS_RN4

W22

FBA_DQS_RN5

AB27

FBA_DQS_RN6

T27

FBA_DQS_RN7

FB_PLLAVDD

D23

FB_VREF

N16S-GTR-S-A2

BOM Mount: 02004-00300400

GF119

NC

GF119

NC

GF117

FBA_D[0:63]72

FBA_DBI[7..0]72

FBA_EDC[7..0]72

T7101

NC

F3

FB_CLAMP

N17S-G1, NC

C27

FBA_CMD0

C26

FBA_CMD1

E24

FBA_CMD2

F24

FBA_CMD3

D27

FBA_CMD4

D26

FBA_CMD5

F25

FBA_CMD6

F26

FBA_CMD7

F23

FBA_CMD8

G22

FBA_CMD9

G23

FBA_CMD10

G24

FBA_CMD11

F27

FBA_CMD12

G25

FBA_CMD13

G27

FBA_CMD14

G26

FBA_CMD15

M24

FBA_CMD16

M23

FBA_CMD17

K24

FBA_CMD18

K23

FBA_CMD19

M27

FBA_CMD20

M26

FBA_CMD21

M25

FBA_CMD22

K26

FBA_CMD23

K22

FBA_CMD24

J23

FBA_CMD25

J25

FBA_CMD26

J24

FBA_CMD27

K27

FBA_CMD28

K25

FBA_CMD29

J27

FBA_CMD30

J26

FBA_CMD31

B19

FBA_CMD32

F22

FBA_CMD34

J22

FBA_CMD35

D24

FBA_CLK0

D25

FBA_CLK0_N

N22

FBA_

CL

K1

M22

FBA_CLK1_N

D18

FBA_WCK01

C18

FBA_WCK01_N

D17

FBA_WCK23

D16

FBA_WCK23_N

T24

FBA_WCK45

U24

FBA_WCK45_N

V24

FBA_WCK67

V25

FBA_WCK67_N

F16

FB_PLL_AVDD1

P22

FB_PLL_AVDD2

H22

FB_DLL_AVDD

T7102

1

TPC26T

12

R7104
10KOhm
/VGA/N16
1%

GND

Mode D：single rank designs.

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31

R7101 60.4Ohm @/VGA

12
12

R7102 60.4Ohm @/VGA

FBA_CLK0 72
FBA_CLK0# 72
FBA_CLK1 72
FBA_CLK1# 72

FBA_WCK01 72
FBA_WCK01# 72
FBA_WCK23 72
FBA_WCK23# 72
FBA_WCK45 72
FBA_WCK45# 72
FBA_WCK67 72
FBA_WCK67# 72

200mA

FB_PLLAVDD

12

12

C7101

C7102

0.1UF/16V

0.1UF/16V

@/VGA

@/VGA

nbs_c0402_h22_000s

nbs_c0402_h22_000s

GND

12

C7103

0.1UF/16V
/VGA

nbs_c0402_h22_000s

FBA_CMD[0:15] 72

FBA_CMD[16:31] 72

+FBVDDQ

12

nbs_c0402_h22_000s

Add for FDDR5

+FBVDDQ

12

FBA_CMD14

R7103 10KOhm

/VGA

+PEX_VDD_H

<Variant Name>

Title :

N14M-GE_FB-IF

Size

Dept.:

C

Date: Sheet

Tuesday, June 20, 2017

12

FBA_CMD30

R7123 10KOhm

/VGA

12

FBA_CMD13

R7124 10KOhm

/VGA

12

FBA_CMD29

R7125 10KOhm

/VGA

GND

Project Name

Rev

NB2_RD1_EE1

R1.0X542UN/URV

Engineer:

Andy_Tang

102

of

71

C7106

C7107

0.1UF/16V

0.1UF/16V

/VGA/N17

/VGA

nbs_c0402_h22_000s

C7104
1UF/6.3V
/VGA

GND GND

Place Near GPUPlace Near Balls

C7105
22UF/6.3V
/VGA

nbs_c0805_h57_000s

30Ohm/100Mhz

/VGA
nbs_l0603_h39_000s

N17S-G1 need modify to 1.8V

L7101

21

12

12

12

2016/11/18 X542UA_#84, Modify to GDDR5

FBA_DBI[7..0]71

FBA_EDC[7..0]71

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

20170214ForGDDR5>/3GHz

X16,0‐15&16‐31 X16,32‐47&48‐63

M2
M4
N2
N4
T2
T4
U2

FBA_D[0:63]

U4
M13

FBA_D23

FBA_D18

M11
N13

FBA_D22

FBA_D22

FBA_D21

FBA_D19

N11
T13

FBA_D20

FBA_D21

T11

FBA_D19

FBA_D16

FBA_D18

FBA_D23

U13
U11

FBA_D17

FBA_D17

FBA_D16

FBA_D20

F13
F11
E13
E11
B13
B11
A13
A11
F2
F4

FBA_D7

FBA_D0

FBA_D6

FBA_D4

E2
E4

FBA_D5

FBA_D2

B2

FBA_D4

FBA_D6

FBA_D3

FBA_D5

B4
A2

FBA_D2

FBA_D3

FBA_D1

FBA_D7

A4

FBA_D0

FBA_D1

J5
K4

FBA_CMD9

K5

FBA_CMD6

K10

FBA_CMD7
FBA_CMD4

K11

H10

FBA_CMD3

H11

FBA_CMD1

H5

FBA_CMD2

H4

FBA_CMD11
FBA_CMD10

D4

FBA_WCK0171,72

D5

FBA_WCK01#71,72

P4

FBA_WCK2371,72

P5

FBA_WCK23#71,72

R2

R13

C13

FBA_EDC2

GND

C2

FBA_EDC0

12

P2

C7267

P13

D13

FBA_DBI2

0.01UF/25V

D2

/VGA/N17

FBA_DBI0

GND

G3

FBA_CMD12

L3

FBA_CMD15

12

J3
J11

C7268

FBA_CMD14
FBA_CLK0#

J12

0.01UF/25V

FBA_CLK0

/VGA/N17

G12
L12

GND

FBA_CMD0
FBA_CMD5

12

J13

R7202 121Ohm1%

GND

12

J10

R7203 1KOhm

FBA_ZQ1
FBA_SEN1

J2

FBA_CMD13

R7204 1KOhm

J1

GND

12

FBA_MF1

MF=0non‐Mirror

A5
U5

C7202 820PF/50V@

12

GND

A10
U10

FBA_VREFD0

12

C7203 820PF/50V@

12

J14

GND

FBA_VREFC0

C7204 820PF/50V

J4

FBA_CMD8

FBA Partition Memory (1 of 4) FBA Partition Memory (2 of 4)

MF=0non‐Mirror MF=1Mirror

+FBVDDQ

U7201

B1

DQ7/DQ31

VDDQ1

B3

D

Q2

DQ6/DQ30

VD

B12

VDDQ3

DQ5/DQ29

B14

VDDQ4

DQ4/DQ28

D1

VDDQ5

DQ3/DQ27

D3

VDDQ6

DQ2/DQ26

D12

FBA_D[0:63]

VDDQ7

DQ1/DQ25

D14

VDDQ8

DQ0/DQ24

E5

VDDQ9

DQ15/DQ23

FBA_D15

E10

DQ14/DQ22

VDDQ10

F1

FBA_D14

DQ13/DQ21

VDDQ11

F3

FBA_D13

VDDQ12

DQ12/DQ20

F12

FBA_D12

DQ11/DQ19

VDDQ13

F14

FBA_D11

DQ10/DQ18

VDDQ14

FBA_D10

G2

DQ9/DQ17

VDDQ15

G13

FBA_D9

DQ8/DQ16

VDDQ16

FBA_D8

H3

DQ23/DQ15

VDDQ17

H12

DQ22/DQ14

VDDQ18

K3

DQ21/DQ13

VDDQ19

K12

DQ20/DQ12

VDDQ20

L2

DQ19/DQ11

VDDQ21

L13

DQ18/DQ10

VDDQ22

M1

DQ17/DQ9

VDDQ23

M3

DQ16/DQ8

VDDQ24

M12

Q25

D

DQ31/DQ7

VD

M14

FBA_D31

VDDQ26

DQ30/DQ6

FBA_D30

N5

VDDQ27

DQ29/DQ5

N10

FBA_D29

VDDQ28

DQ28/DQ4

P1

FBA_D28

VDDQ29

DQ27/DQ3

FBA_D27

P3

VDDQ30

DQ26/DQ2

P12

FBA_D26

VDDQ31

DQ25/DQ1

FBA_D25

P14

VDDQ32

DQ24/DQ0

T1

FBA_D24

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

A12/A13

C5

VDD1

A0/A10/A8/A7

C10

VDD2

A1/A9/A11/A6

D11

VDD3

A3/BA3/A5/BA1

G1

VDD4

A2/BA0/A4/BA2

G4

VDD5

A5/BA1/A3/BA3

G11

VDD6

A4/BA2/A2/BA0

G14

VDD7

A6/A11/A1/A9

L1

VDD8

A7/A8/A0/A10

L4

VDD9

L11

VDD10

L14

VDD11

P11

FBA_WCK2371,72

VDD12

WCK23/WCK01

R5

VDD13

WCK23#/WCK01#

FBA_WCK23#71,72

R10

VDD14

FBA_WCK0171,72

WCK01/WCK23
WCK01#/WCK23#

FBA_WCK01#71,72

A1

VSSQ1

A3

EDC0/EDC3

VSSQ2

A12

EDC1/EDC2

VSSQ3

A14

GND GND GND

EDC2/EDC1

VSSQ4

C1

EDC3/EDC0

VSSQ5

C3

VSSQ6

C4

DBI0#/DBI3#

VSSQ7

C11

DBI1#/DBI2#

VSSQ8

C12

DBI2#/DBI1#

VSSQ9

C14

DBI3#/DBI0#

VSSQ10

E1

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

VSSQ14

CAS#/RAS#

F5

VSSQ15

RAS#/CAS#

F10

VSSQ16

H2

VSSQ17

H13

VSSQ18

CKE#

K2

VSSQ19

CK#

K13

VSSQ20

CK

M5

VSSQ21

M10

VSSQ22

N1

WE#/CS#

VSSQ23

N3

CS#/WE#

VSSQ24

N12

VSSQ25

N14

VSSQ26

R1

R7224 121Ohm1%

GND

ZQ

VSSQ27

R3

R7223 1KOhm

SEN

VSSQ28

R4

VSSQ29

R11

VSSQ30

R12

RESET#

VSSQ31

R7216 1KOhm

R14

+FBVDDQ

MF

VSSQ32

U1

VSSQ33

U3

MF=1Mirror

4

VSSQ3

U1

2

VSSQ35

U14

VSSQ36
Vpp/NC
Vpp/NC1

B5

GND

VSS1

B10

VSS2

VREFD1

D10

VSS3

VREFD2

G5

VSS4

G10

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

VSS9

VREFC

L5

VSS10

L10

VSS11

P10

VSS12

T5

ABI#

VSS13

T10

VSS14

K4G41325FE-HC28

GND

/VRAM

+FBVDDQ

U7202

M2

B1

DQ7/DQ31

VDDQ1

M4

B3

DDQ

2

DQ6/DQ30

V

B12

N2

VDDQ3

DQ5/DQ29

B14

N4

VDDQ4

DQ4/DQ28

D1

T2

VDDQ5

DQ3/DQ27

D3

T4

VDDQ6

DQ2/DQ26

D12

U2

VDDQ7

DQ1/DQ25

D14

U4

VDDQ8

DQ0/DQ24

E5

M13

VDDQ9

DQ15/DQ23

FBA_D11

M11

E10

DQ14/DQ22

VDDQ10

N13

F1

FBA_D8

DQ13/DQ21

VDDQ11

F3

FBA_D12

N11

VDDQ12

DQ12/DQ20

T13

F12

FBA_D9

DQ11/DQ19

VDDQ13

T11

F14

FBA_D13

DQ10/DQ18

VDDQ14

FBA_D14

U13

G2

DQ9/DQ17

VDDQ15

U11

G13

FBA_D15

DQ8/DQ16

VDDQ16

FBA_D10

F13

H3

DQ23/DQ15

VDDQ17

F11

H12

DQ22/DQ14

VDDQ18

E13

K3

DQ21/DQ13

VDDQ19

E11

K12

DQ20/DQ12

VDDQ20

B13

L2

DQ19/DQ11

VDDQ21

B11

L13

DQ18/DQ10

VDDQ22

A13

M1

DQ17/DQ9

VDDQ23

A11

M3

DQ16/DQ8

VDDQ24

F2

M12

Q25

D

DQ31/DQ7

VD

M14

F4

FBA_D24

VDDQ26

DQ30/DQ6

FBA_D26

N5

E2

VDDQ27

DQ29/DQ5

N10

E4

FBA_D27

VDDQ28

DQ28/DQ4

P1

B2

FBA_D25

VDDQ29

DQ27/DQ3

FBA_D31

P3

B4

VDDQ30

DQ26/DQ2

P12

A2

FBA_D30

VDDQ31

DQ25/DQ1

FBA_D28

P14

A4

VDDQ32

DQ24/DQ0

T1

FBA_D29

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

J5

A12/A13

C5

K4

FBA_CMD9

VDD1

A0/A10/A8/A7

C10

K5

FBA_CMD10

VDD2

A1/A9/A11/A6

D11

K10

FBA_CMD11

VDD3

A3/BA3/A5/BA1

FBA_CMD1

G1

K11

VDD4

A2/BA0/A4/BA2

G4

H10

FBA_CMD2

VDD5

A5/BA1/A3/BA3

G11

H11

FBA_CMD4

VDD6

A4/BA2/A2/BA0

G14

H5

FBA_CMD3

VDD7

A6/A11/A1/A9

L1

H4

FBA_CMD7

VDD8

A7/A8/A0/A10

FBA_CMD6

L4

VDD9

L11

VDD10

L14

VDD11

P11

D4

VDD12

WCK23/WCK01

R5

D5

VDD13

WCK23#/WCK01#

R10

VDD14

P4

WCK01/WCK23

P5

WCK01#/WCK23#

A1

VSSQ1

R2

A3

EDC0/EDC3

VSSQ2

R13

A12

EDC1/EDC2

VSSQ3

C13

A14

FBA_EDC1

EDC2/EDC1

VSSQ4

C2

C1

EDC3/EDC0

VSSQ5

C3

FBA_EDC3

VSSQ6

P2

C4

DBI0#/DBI3#

VSSQ7

P13

C11

DBI1#/DBI2#

VSSQ8

D13

C12

FBA_DBI1

DBI2#/DBI1#

VSSQ9

D2

C14

DBI3#/DBI0#

VSSQ10

E1

FBA_DBI3

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

G3

VSSQ14

CAS#/RAS#

FBA_CMD15

F5

L3

VSSQ15

RAS#/CAS#

F10

FBA_CMD12

VSSQ16

H2

VSSQ17

H13

J3

VSSQ18

CKE#

K2

J11

FBA_CMD14

VSSQ19

CK#

FBA_CLK0#

K13

J12

VSSQ20

CK

M5

FBA_CLK0

VSSQ21

M10

VSSQ22

G12

N1

WE#/CS#

VSSQ23

L12

N3

FBA_CMD5

CS#/WE#

VSSQ24

FBA_CMD0

N12

VSSQ25

N14

VSSQ26

12

J13

R1

ZQ

VSSQ27

12

J10

R3

FBA_ZQ2

SEN

VSSQ28

R4

FBA_SEN2

VSSQ29

R11

VSSQ30

J2

R12

RESET#

VSSQ31

FBA_CMD13

J1

R14

MF

VSSQ32

12

U1

FBA_MF2

VSSQ33

U3

34

VSSQ

U1

2

VSSQ35

U14

VSSQ36

A5

Vpp/NC

U5

C7211 820PF/50V@

Vpp/NC1

12

B5

VSS1

B10

A10

VSS2

VREFD1

D10

U10

FBA_VREFD0

VSS3

VREFD2

12

G5

VSS4

G10

C7212 820PF/50V@

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

J14

VSS9

VREFC

L5

FBA_VREFC0

VSS10

L10

VSS11

P10

VSS12

J4

T5

ABI#

VSS13

FBA_CMD8

T10

VSS14

K4G41325FE-HC28

GND

/VRAM

+FBVDDQ

R7225

549Ohm
@

12

FBA_VREFD0

R7233

1.33KOhm
@

12

GND

+FBVDDQ

R7235
549Ohm

12

FBA_VREFC0

R7236

1.33KOhm

12

GND

MEM_VREF_CTL76

FBA_CLK171
FBA_CLK1#71

FBA_CMD[16:31]71

+FBVDDQ

R7213

549Ohm
@

12

FBA_VREFD1

R7219

R7217

R7234

931Ohm

1.33KOhm

931Ohm

@

@

@

12

12

12

GND

61

34

Q7202A

Q7202B

UM6K31N

UM6K31N

2

5

@

@

MEM_VREF_CTLMEM_VREF_CTL

+FBVDDQ

GND

GND

R7220
549Ohm

12

12

R7238 0Ohm@

FBA_VREFC1

R7222

R7221

R7237

931Ohm

1.33KOhm

931Ohm

12

12

12

GND

61

34

Q7201A

Q7201B

2

5

UM6K31N

UM6K31N

MEM_VREF_CTL

GND

GND

FBA_CLK071
FBA_CLK0#71

FBA_CMD[0:15]71

FBA_D[0:63]71

FBA_DBI0
FBA_DBI1
FBA_DBI2
FBA_DBI3
FBA_DBI4
FBA_DBI5
FBA_DBI6
FBA_DBI7

FBA_EDC0
FBA_EDC1
FBA_EDC2
FBA_EDC3
FBA_EDC4
FBA_EDC5
FBA_EDC6
FBA_EDC7

R7239

40.2Ohm

12

/VGA

1%

FBA_CLK0_C

R7240

40.2Ohm

12

/VGA

1%

R7241

40.2Ohm

12

/VGA

1%

FBA_CLK1_C

R7242

40.2Ohm

/VGA

12

1%

FBA Partition Memory (3 of 4)

MF=0non‐Mirror

U7203

M2

B1

DQ7/DQ31

VDDQ1

M4

B3

D

Q2

DQ6/DQ30

VD

B12

N2

VDDQ3

DQ5/DQ29

B14

N4

VDDQ4

DQ4/DQ28

D1

T2

VDDQ5

DQ3/DQ27

D3

T4

VDDQ6

DQ2/DQ26

D12

U2

FBA_D[0:63]

GND

GND

GND

GND

0603

0603

MF=0non‐Mirror

+FBVDDQ

12

FBA_D55
FBA_D54
FBA_D53
FBA_D52
FBA_D51
FBA_D50
FBA_D49
FBA_D48

FBA_D39
FBA_D38
FBA_D37
FBA_D36
FBA_D35
FBA_D34
FBA_D33
FBA_D32

R7207 121Ohm1%
R7205 1KOhm

R7206 1KOhm

C7225
10UF/6.3V
/VGA

VDDQ7

DQ1/DQ25

D14

U4

VDDQ8

DQ0/DQ24

E5

M13

VDDQ9

DQ15/DQ23

FBA_D55

M11

E10

DQ14/DQ22

VDDQ10

N13

F1

FBA_D53

DQ13/DQ21

VDDQ11

F3

FBA_D52

N11

VDDQ12

DQ12/DQ20

T13

F12

FBA_D54

DQ11/DQ19

VDDQ13

T11

F14

FBA_D51

DQ10/DQ18

VDDQ14

FBA_D50

U13

G2

DQ9/DQ17

VDDQ15

U11

G13

FBA_D49

DQ8/DQ16

VDDQ16

FBA_D48

F13

H3

DQ23/DQ15

VDDQ17

F11

H12

DQ22/DQ14

VDDQ18

E13

K3

DQ21/DQ13

VDDQ19

E11

K12

DQ20/DQ12

VDDQ20

B13

L2

DQ19/DQ11

VDDQ21

B11

L13

DQ18/DQ10

VDDQ22

A13

M1

DQ17/DQ9

VDDQ23

A11

M3

DQ16/DQ8

VDDQ24

F2

M12

Q25

D

DQ31/DQ7

VD

M14

F4

FBA_D39

VDDQ26

DQ30/DQ6

FBA_D38

N5

E2

VDDQ27

DQ29/DQ5

N10

E4

FBA_D37

VDDQ28

DQ28/DQ4

P1

B2

FBA_D36

VDDQ29

DQ27/DQ3

FBA_D35

P3

B4

VDDQ30

DQ26/DQ2

P12

A2

FBA_D34

VDDQ31

DQ25/DQ1

FBA_D33

P14

A4

VDDQ32

DQ24/DQ0

T1

FBA_D32

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

J5

A12/A13

C5

K4

FBA_CMD25

VDD1

A0/A10/A8/A7

C10

K5

FBA_CMD22

VDD2

A1/A9/A11/A6

D11

K10

FBA_CMD23

VDD3

A3/BA3/A5/BA1

FBA_CMD20

G1

K11

VDD4

A2/BA0/A4/BA2

G4

H10

FBA_CMD19

VDD5

A5/BA1/A3/BA3

G11

H11

FBA_CMD17

VDD6

A4/BA2/A2/BA0

G14

H5

FBA_CMD18

VDD7

A6/A11/A1/A9

L1

H4

FBA_CMD27

VDD8

A7/A8/A0/A10

FBA_CMD26

L4

VDD9

L11

VDD10

L14

VDD11

P11

D4

FBA_WCK4571,72

VDD12

WCK23/WCK01

R5

D5

VDD13

WCK23#/WCK01#

FBA_WCK45#71,72

R10

VDD14

P4

FBA_WCK6771,72

WCK01/WCK23

P5

WCK01#/WCK23#

FBA_WCK67#71,72

A1

VSSQ1

R2

A3

EDC0/EDC3

VSSQ2

R13

A12

EDC1/EDC2

VSSQ3

C13

A14

FBA_EDC6

EDC2/EDC1

VSSQ4

C2

C1

EDC3/EDC0

VSSQ5

C3

FBA_EDC4

VSSQ6

P2

C4

DBI0#/DBI3#

VSSQ7

P13

C11

DBI1#/DBI2#

VSSQ8

D13

C12

FBA_DBI6

DBI2#/DBI1#

VSSQ9

D2

C14

DBI3#/DBI0#

VSSQ10

E1

FBA_DBI4

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

G3

VSSQ14

CAS#/RAS#

FBA_CMD28

F5

L3

VSSQ15

RAS#/CAS#

F10

FBA_CMD31

VSSQ16

H2

VSSQ17

H13

J3

VSSQ18

CKE#

K2

J11

FBA_CMD30

VSSQ19

CK#

FBA_CLK1#

K13

J12

VSSQ20

CK

M5

FBA_CLK1

VSSQ21

M10

VSSQ22

G12

N1

WE#/CS#

VSSQ23

L12

N3

FBA_CMD16

CS#/WE#

VSSQ24

FBA_CMD21

N12

VSSQ25

N14

VSSQ26

12

J13

R1

ZQ

VSSQ27

12

J10

R3

FBA_ZQ3

SEN

VSSQ28

R4

FBA_SEN3

VSSQ29

R11

VSSQ30

J2

R12

RESET#

VSSQ31

FBA_CMD29

J1

R14

MF

VSSQ32

12

U1

FBA_MF3

VSSQ33

U3

VSSQ34

2

U1

VSSQ35

U1

4

VSSQ36

A5

Vpp/NC

U5

C7206 820PF/50V@

Vpp/NC1

12

B5

VSS1

B10

A10

VSS2

VREFD1

D10

U10

FBA_VREFD1

VSS3

VREFD2

12

G5

VSS4

G10

C7207 820PF/50V@

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

12

K14

J14

VSS9

VREFC

L5

FBA_VREFC1

C7205 820PF/50V

VSS10

L10

VSS11

P10

VSS12

J4

T5

ABI#

VSS13

FBA_CMD24

T10

VSS14

K4G41325FE-HC28

/VRAM

12

12

12

12

12

C7230

C7228

C7227

C7229

C7226

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

@/VGA

@/VGA

/VGA

@/VGA

/VGA

12

12

12

12

12

12

12

C7236

C7238

C7241

C7235

C7240

C7239

C7237

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

/VGA

/VGA

/VGA

/VGA

@/VGA

/VGA

/VGA

12

12

12

12

12

12

C7254

C7255

C7253

C7251

C7256

C7252

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V

0.1UF/10V
/VGA

/VGA

/VGA

/VGA

/VGA

/VGA

FBA Partition Memory (4 of 4)

MF=1Mirror

+FBVDDQ

FBA_D[0:63]

FBA_D47
FBA_D46
FBA_D45
FBA_D44
FBA_D43
FBA_D42
FBA_D41
FBA_D40

FBA_D63
FBA_D62
FBA_D61
FBA_D60
FBA_D59
FBA_D58
FBA_D57
FBA_D56

FBA_WCK6771,72
FBA_WCK67#71,72

FBA_WCK4571,72
FBA_WCK45#71,72

R7215 121Ohm1%

GND

R7214 1KOhm

R7209 1KOhm

+FBVDDQ

MF=1Mirror

GND

GND

12

12

12

C7232

C7233

C7231

10UF/6.3V

10UF/6.3V

10UF/6.3V

@/VGA

@/VGA

/VGA

12

12

12

C7242

C7243

C7244

1UF/6.3V

1UF/6.3V

1UF/6.3V

@/VGA

/VGA

/VGA

12

12

12

C7258

C7257

0.1UF/10V

0.1UF/10V
/VGA

/VGA

+FBVDDQ

U7204

M2

B1

DQ7/DQ31

VDDQ1

M4

B3

D

Q2

DQ6/DQ30

VD

B12

N2

VDDQ3

DQ5/DQ29

B14

N4

VDDQ4

DQ4/DQ28

D1

T2

VDDQ5

DQ3/DQ27

D3

T4

VDDQ6

DQ2/DQ26

D12

U2

VDDQ7

DQ1/DQ25

D14

U4

VDDQ8

DQ0/DQ24

E5

M13

VDDQ9

DQ15/DQ23

FBA_D47

M11

E10

DQ14/DQ22

VDDQ10

N13

F1

FBA_D46

DQ13/DQ21

VDDQ11

F3

FBA_D45

N11

VDDQ12

DQ12/DQ20

T13

F12

FBA_D44

DQ11/DQ19

VDDQ13

T11

F14

FBA_D43

DQ10/DQ18

VDDQ14

FBA_D42

U13

G2

DQ9/DQ17

VDDQ15

U11

G13

FBA_D41

DQ8/DQ16

VDDQ16

FBA_D40

F13

H3

DQ23/DQ15

VDDQ17

F11

H12

DQ22/DQ14

VDDQ18

E13

K3

DQ21/DQ13

VDDQ19

E11

K12

DQ20/DQ12

VDDQ20

B13

L2

DQ19/DQ11

VDDQ21

B11

L13

DQ18/DQ10

VDDQ22

A13

M1

DQ17/DQ9

VDDQ23

A11

M3

DQ16/DQ8

VDDQ24

F2

M12

Q25

D

DQ31/DQ7

VD

M14

F4

FBA_D56

VDDQ26

DQ30/DQ6

FBA_D58

N5

E2

VDDQ27

DQ29/DQ5

N10

E4

FBA_D59

VDDQ28

DQ28/DQ4

P1

B2

FBA_D57

VDDQ29

DQ27/DQ3

FBA_D60

P3

B4

VDDQ30

DQ26/DQ2

P12

A2

FBA_D63

VDDQ31

DQ25/DQ1

FBA_D61

P14

A4

VDDQ32

DQ24/DQ0

T1

FBA_D62

VDDQ33

T3

VDDQ34

T12

VDDQ35

T14

VDDQ36

J5

A12/A13

C5

K4

FBA_CMD25

VDD1

A0/A10/A8/A7

C10

K5

FBA_CMD26

VDD2

A1/A9/A11/A6

D11

K10

FBA_CMD27

VDD3

A3/BA3/A5/BA1

FBA_CMD17

G1

K11

VDD4

A2/BA0/A4/BA2

G4

H10

FBA_CMD18

VDD5

A5/BA1/A3/BA3

G11

H11

FBA_CMD20

VDD6

A4/BA2/A2/BA0

G14

H5

FBA_CMD19

VDD7

A6/A11/A1/A9

L1

H4

FBA_CMD23

VDD8

A7/A8/A0/A10

FBA_CMD22

L4

VDD9

L11

VDD10

L14

VDD11

P11

D4

VDD12

WCK23/WCK01

R5

D5

VDD13

WCK23#/WCK01#

R10

VDD14

P4

WCK01/WCK23

P5

WCK01#/WCK23#

A1

VSSQ1

R2

A3

EDC0/EDC3

VSSQ2

R13

A12

EDC1/EDC2

VSSQ3

C13

A14

FBA_EDC5

EDC2/EDC1

VSSQ4

C2

C1

EDC3/EDC0

VSSQ5

C3

FBA_EDC7

VSSQ6

P2

C4

DBI0#/DBI3#

VSSQ7

P13

C11

DBI1#/DBI2#

VSSQ8

D13

C12

FBA_DBI5

DBI2#/DBI1#

VSSQ9

D2

C14

DBI3#/DBI0#

VSSQ10

E1

FBA_DBI7

VSSQ11

E3

VSSQ12

E12

VSSQ13

E14

G3

VSSQ14

CAS#/RAS#

FBA_CMD31

F5

L3

VSSQ15

RAS#/CAS#

F10

FBA_CMD28

VSSQ16

H2

VSSQ17

H13

J3

VSSQ18

CKE#

K2

J11

FBA_CMD30

VSSQ19

CK#

FBA_CLK1#

K13

J12

VSSQ20

CK

M5

FBA_CLK1

VSSQ21

M10

VSSQ22

G12

N1

WE#/CS#

VSSQ23

L12

N3

FBA_CMD21

CS#/WE#

VSSQ24

FBA_CMD16

N12

VSSQ25

N14

VSSQ26

12

J13

R1

ZQ

VSSQ27

12

J10

R3

FBA_ZQ4

SEN

VSSQ28

R4

FBA_SEN4

VSSQ29

R11

VSSQ30

J2

R12

RESET#

VSSQ31

FBA_CMD29

J1

R14

MF

VSSQ32

12

U1

FBA_MF4

VSSQ33

U3

4

VSSQ3

U1

2

VSSQ35

U14

VSSQ36

A5

Vpp/NC

U5

C7213 820PF/50V@

Vpp/NC1

12

B5

VSS1

B10

A10

VSS2

VREFD1

D10

U10

FBA_VREFD1

VSS3

VREFD2

12

G5

VSS4

G10

C7214 820PF/50V@

VSS5

H1

VSS6

H14

VSS7

K1

VSS8

K14

J14

VSS9

VREFC

L5

FBA_VREFC1

VSS10

L10

VSS11

P10

VSS12

J4

T5

ABI#

VSS13

FBA_CMD24

T10

VSS14

K4G41325FE-HC28

GND

/VRAM

LD R1.2 [chip]
Add Ce7201/02

12

12

12

+

+

CE7202

CE7201

C7234

470uF/2V

470uF/2V

10UF/6.3V

@/VGA

@/VGA

@/VGA

12

12

12

12

12

12

C7246

C7250

C7245

C7247

C7249

C7248

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

/VGA

/VGA

/VGA

/VGA

@/VGA

@/VGA

12

12

12

12

12

12

12

C7263

C7261

C7259

C7260

0.1UF/10V

0.1UF/10V

/VGA

/VGA

0.1UF/10V
/VGA

C7262

0.1UF/10V

0.1UF/10V

/VGA

/VGA

<Variant Name>

Title :

DDR3L

Size

Dept.:

NB2_RD1_EE1

Custom

Date: Sheet

Tuesday, June 20, 2017

C7266

C7265

C7264

0.1UF/10V

0.1UF/10V

0.1UF/10V

/VGA

/VGA

/VGA

GND

Project Name

Rev

R1.0

X542UN/URV

Engineer:

Andy_Tang

102

of

72

Place Near GPU

N16S-GTR = 3V

N17S-G1 = 1.8V

150mA

CORE_PLLVDD

MAIN & AON 注意

U7001C

12

C7301

AD10

G8

0.1UF/16V

12

NC31

3V3_MAIN_1

AD7

G9

/VGA

R7305

GM108

NC40

3V3_MAIN_2

G10

0Ohm

/VGA/N17

3V3_AON

3V3_AON_1

G12

3V3_AON

3V3_AON_2

N17S-G1

F11

NC81

V5

FERMI_RSVD1

V6

FERMI_RSVD2

Place Near Balls

12

C7345

150mA

0.1UF/16V
/VGA/N17

nbs_c0402_h22_000s

CONFIGURABLE

12

C7331

POWER CHANNELS

0.1UF/16V

* nc on substrate

/VGA

G1

GND

NC82

G2

NC83

G3

NC84

G4

NC85

G5

NC86

G6

NC87

G7

NC88

V1

NC140

V2

NC141

W1

NC145

W2

NC146

W3

NC147

W4

NC148

N16S-GTR-S-A2

+NVVDD

21.22A

U7001E

Place Under GPU

K10

VDD1

K12

VDD2

12

12

K14

C7337

C7336

VDD3

K16

1UF/6.3V

1UF/6.3V

VDD4

K18

/VGA

/VGA

VDD5

L11

VDD6

L13

VDD7

L15

VDD8

L17

VDD9

M10

VDD10

M12

VDD11

M14

VDD12

M16

VDD13

C7340

M18

C7315

VDD14

4.7UF/6.3V

N11

4.7UF/6.3V

VDD15

12

/VGA

N13

12

/VGA

VDD16

nbs_c0603_h37_000s

N15

nbs_c0603_h37_000s

VDD17

N17

VDD18

P10

VDD19

P12

VDD20

P14

VDD21

P16

VDD22

P18

VDD23

R11

VDD24

12

12

R13

C7364

C7365

VDD25

R15

1UF/6.3V

1UF/6.3V

VDD26

R17

/VGA

/VGA

VDD27

T10

VDD28

T12

VDD29

T14

VDD30

T16

VDD31

T18

VDD32

U11

VDD33

U13

VDD34

U15

VDD35

U17

VDD36

V10

VDD37

V12

VDD38

V14

VDD39

V16

VDD40

V18

VDD41

N16S-GTR-S-A2

C7354

4.7UF/6.3V

12

nbs_c0603_h37_000s

/VGA/N17

Optional caps
Place Near GPU 300mil

Place Near Balls

12

C7363
1UF/6.3V
/VGA/N17

C7314

4.7UF/6.3V

12

/VGA

nbs_c0603_h37_000s

C7333

4.7UF/6.3V

12

/VGA

nbs_c0603_h37_000s

12

C7302

0.1UF/16V
/VGA

12

C7305

0.1UF/16V
/VGA

C7324

4.7UF/6.3V

12

/VGA

nbs_c0603_h37_000s

C7322

4.7UF/6.3V

12

/VGA/N17

nbs_c0603_h37_000s

C7321

4.7UF/6.3V

12

/VGA

nbs_c0603_h37_000s

12

C7303
1UF/6.3V
/VGA/N17

12

C7329
1UF/6.3V

/VGA/N17

Place Near GPU

GDDR5 = 40.2 ohm
DDR3 = 42.2 ohm

C7327

4.7UF/6.3V

12

12

/VGA

nbs_c0603_h37_000s

nbs_c0603_h37_000s

C7326

4.7UF/6.3V

12

12

/VGA

nbs_c0603_h37_000s

C7348

4.7UF/6.3V

12

12

nbs_c0603_h37_000s

@/VGA/N17

12

PC9145, PC9137, PC9144, PC91 39 22uF under GPU

N17S-G1 = 1.8V

+VDD_MAIN

C7304

4.7UF/6.3V

12

/VGA/N17

nbs_c0603_h37_000s

GND

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

C7330

4.7UF/6.3V

12

/VGA/N17

nbs_c0603_h37_000s

GND

+FBVDDQ

1%/VGA

R7301 4 0.2O hm

1%/VGA

R7302 4 0.2O hm

12

R7304 60.4Ohm/VGA

GDDR5 = 60.4 ohm
DDR3 = 51.1 ohm

GND

C7325

C7328

4.7UF/6.3V

4.7UF/6.3V

12

/VGA

/VGA

nbs_c0603_h37_000s

C7338

4.7UF/6.3V

/VGA
nbs_c0603_h37_000s

GND

C7349

4.7UF/6.3V

nbs_c0603_h37_000s

@/VGA/N17

C7360

10UF/6.3V
@/VGA
nbs_c0603_h37_000s

12

FB_CAL_PD_VDDQ

12

FB_CAL_PU_GND

FB_CAL_TERM_GND

20161207 For X542U layout simulation modify CAPs

12

C7356

10UF/6.3V
/VGA/N17

nbs_c0603_h37_000s

U7001D

2.5A

+FBVDDQ

B26

FBVDDQ1

C25

FBVDDQ2

E23

FBVDDQ3

E26

FBVDDQ4

F14

FBVDDQ5

F21

FBVDDQ6

G13

FBVDDQ7

G14

FBVDDQ8

G15

FBVDDQ9

G16

FBVDDQ10

G18

FBVDDQ11

G19

FBVDDQ12

G20

FBVDDQ13

G21

FBVDDQ14

L22

FBVDDQ15

L24

FBVDDQ16

L26

FBVDDQ17

M21

FBVDDQ18

N21

FBVDDQ19

R21

FBVDDQ20

T21

FBVDDQ21

V21

FBVDDQ22

W21

FBVDDQ23

GF117

GF119

GK208

H24

FBVDDQ

FBVDDQ_AON1

H26

FBVDDQ

FBVDDQ_AON2

J21

FBVDDQ

FBVDDQ_AON3

K21

FBVDDQ

FBVDDQ_AON4

D22

FB_CAL_VDDQ

C24

FB_CAL_GND

B25

FB_CAL_TERM

N16S-GTR-S-A2

GND

12

12

C7358

C7357

10UF/6.3V

10UF/6.3V

/VGA/N17

/VGA/N17

nbs_c0603_h37_000s

nbs_c0603_h37_000s

GND

12

C7306
1UF/6.3V

/VGA

12

C7307
1UF/6.3V
/VGA/N17

2/17
Add C7341, C7342, C7343, C7344→1uF
for N17S

12

C7341

1UF/6.3V
/VGA/N17

12

C7344
1UF/6.3V
/VGA/N17

Place Near GPU 300milPlace Near Balls

12

12

12

12

12

C7310

C7366

C7312

C7313

C7308

10UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

1UF/6.3V

/VGA

/VGA/N17

/VGA

/VGA

/VGA

nbs_c0603_h37_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

GND

5/16
C7311→10uF
C7312→22uF
for PWR Noise

12

12

12

C7309

C7367

C7311

1UF/6.3V

10UF/6.3V

10UF/6.3V

/VGA/N17

/VGA/N17

/VGA

nbs_c0603_h37_000s

nbs_c0603_h37_000s

GND

12

12

C7342

C7343

1UF/6.3V

1UF/6.3V

/VGA/N17

/VGA/N17

GND

GND

U7001F

A2

M13

GND1

GND73

AB17

M15

GND6

GND74

AB20

M17

GND7

GND75

AB24

N10

GND8

GND76

AC2

N12

GND10

GND77

AC22

N14

GND11

GND78

AC26

N16

GND12

GND79

AC5

N18

GND13

GND80

AC8

P11

GND14

GND81

AD12

P13

GND15

GND82

AD13

P15

GND16

GND83

A26

P17

GND2

GND84

P2

AD15

G

GND17

ND85

AD16

P23

GND18

GND86

AD18

P26

GND19

GND87

AD19

P5

GND20

GND88

AD21

R10

GND21

GND89

AD22

R12

GND22

GND90

AE

11

R14

GND23

GND91

AE14

R16

GND24

GND92

AE17

R18

GND25

GND93

AE20

T11

GND26

GND94

AB11

T13

GND4

GND95

AF1

T15

GND27

GND96

AF11

T17

GND28

GND97

AF14

U10

GND29

GND98

AF17

U12

GND30

GND99

AF20

U14

GND31

GND100

AF23

U16

GND32

GND101

AF5

U18

GND33

GND102

AF8

U2

GND34

GND103

AG2

U23

GND35

GND104

AG26

U26

GND36

GND105

AB14

U5

GND5

GND106

B1

V11

GND37

GND107

B11

V13

GND38

GND108

B14

V15

GND39

GND109

B17

V17

GND40

GND110

B20

Y2

GND41

GND111

B23

Y23

GND42

GND112

B27

Y26

GND43

GND113

B5

Y5

GND44

GND114

B8

GND45

E11

GND46

E14

GND47

E17

GND48

E2

GND49

E20

GND50

E22

GND51

E25

GND52

E5

GND53

E8

GND54

H2

GND55

H23

GND56

H25

GND57

H5

GND58

K11

GND59

K13

GND60

K15

GND61

K17

GND62

L10

GND63

L12

GND64

L14

GND65

L16

GND66

L18

GND67

L2

GND68

L23

GND69

L25

GND70

L5

AA7

GND71

GND3

M11

AB7

GND72

GND9

GND GND

N16S-GTR-S-A2

BOM

Project Name

Rev

R1.0X542UN/URV

Title :

N14M-GE-VDD

Size

Dept.:

Engineer:

NB2_RD1_EE1

Andy_Tang

D

102

Date: Sheet of

Tuesday, June 20, 2017

73

LVDS

CORE_PLLVDD

12

12

nbs_c0402_h22_000s

GND

2/17 add C7401 0.1uF for N 17
Andy

U7001G

AA6

R7403

NC6

0Ohm

/VGA/N17

V7

NC144

W7

NC151

C7401

0.1UF/16V
/VGA/N17

W6

NC150

Y6

NC154

IFPAB

N16S-GTR-S-A2

U7001J

J7

NC98

K7

NC105

K6

NC104

IFPE

H6

NC91

J6

NC97

N16S-GTR-S-A2

AC4

NC29

AC3

NC28

Y3

NC152

Y4

NC153

AA2

NC2

AA3

NC3

AA1

NC1

AB1

NC7

AA5

NC5

AA4

NC4

AB4

NC16

AB5

NC17

AB2

NC13

AB3

NC15

AD2

NC34

AD3

NC37

NC FOR GF117/GM108

AD1

NC30

AE1

NC41

AD5

NC FOR GF117/GM108

NC39

AD4

NC38

GF117

B3

NC

GPIO14

GF119/GK208

DVI-SL/HDMI

DVI-DL

I2CY_SDA

I2CY_SDA

I2CY_SCL

I2CY_SCL

TXC

TXC

TXC

TXC

TXD0

TXD0

TXD0

TXD0

TXD1TXD1

TXD1

TXD1

TXD2

TXD2

TXD2

TXD2

NC FOR GK208

HPD_E

HPD_E

NC FOR GF117/GM108

NC FOR GF117

GF119/GK208

DVI-SL/HDMI

DVI-DL

I2CZ_SDA

I2CZ_SCL

NC FOR GF117/GK208/GM108

TXC

TXC

TXD3

TXD0

TXD3

TXD0

TXD1

TXD4

IFPF

TXD4

TXD1

TXD2

TXD5

TXD5

TXD2

NC FOR GK208

NC FOR GF117/GM108

HPD_F

NC FOR GF117

U7001H

T6

NC135

M7

NC113

N7

NC119

P6

NC122

N16S-GTR-S-A2

DP

J3

NC94

J2

NC93

J1

NC92

K1

NC99

K3

NC101

K2

NC100

M3

NC110

M2

NC109

M1

NC108

N1

NC114

C2

GPIO18

DP

H4

NC90

H3

NC89

J5

NC96

J4

NC95

K5

NC103

K4

NC102

L4

NC107

L3

NC106

M5

NC112

M4

NC111

F7

GPIO19

DGPU_GPIO19 76

DGPU_GPIO19

IFPC

GF119/GK208

DVI/HDMI

DP

N5

I2CW_SDA

NC118

N4

I2CW_SCL

NC117

N3

TXC

NC116

N2

TXC

NC115

R3

TXD0

NC125

R2

TXD0

NC124

R1

TXD1

NC123

T1

TXD1

NC130

T3

TXD2

NC132

T2

TXD2

NC131

NC FOR GF117/GM108

GF117

NC FOR GF117/GM108

C3

NC

GPIO15

CRT

U7001K

GF117/GM108 GF117

W5

NC149

AE2

TSEN_VREF

NC49

AF2

NC62

N16S-GTR-S-A2

U7001I

U6

NC139

T7

NC136

R7

NC129

IFPD

R6

NC128

N16S-GTR-S-A2

GM108/GK208

B7

NC

NC

I2CA_SCL

A7

I2CA_SCL

NC

I2CA_SDA

I2CA_SDA

AE3

NC

NC

NC53

AE4

NC

NC54

AG3

NC

NC77

AF4

NC

NC66

AF3

NC

NC65

GM108

GK208

GF117

NC FOR GF117/GM108

R7401

I2CA_SCL

R7402 10KOhm

I2CA_SDA

I2CA_SCL
I2CA_SDA

BOM

Title :

Size

C

Date: Sheet

Tuesday, June 20, 2017

DVI/HDMI

I2CX_SDA

I2CX_SCL

NC FOR GF117/GM108

20161207_SWAP

10KOhm

12

2.2KOhm

34

2.2KOhm

N14M-GE_DISPLAY

Dept.:

NB2_RD1_EE1

GF119/GK208

DP

P4

NC121

P3

NC120

R5

TXC

NC127

R4

TXC

NC126

T5

TXD0

NC134

T4

TXD0

NC133

U4

TXD1

NC138

U3

TXD1

NC137

V4

TXD2

NC143

V3

TXD2

NC142

GF117

D4

NC

GPIO17

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

/VGA/N17

12
12

@/VGA/N17

RN7405A

/VGA/n16

RN7405B

/VGA/N16

GND

Project Name

Rev

R1.0X542UN/URV

Engineer:

Andy_Tang

102

of

74

Xtal

N16S-GTR = +PEX_VDD

N17S-G1 = +VDD_MAIN

+PEX_VDD_H

L7501

30Ohm/100Mhz

/VGA
nbs_l0603_h39_000s

L7502

300Ohm/100Mhz

/VGA/N16

Place Near GPU Place close to balls

150mA

21

12

C7507

C7505

22UF/6.3V

4.7UF/6.3V

/VGA

12

/VGA

nbs_c0805_h57_000s

nbs_c0603_h37_000s

GND

21

12

12

C7503
10UF/6.3V

C7511

/VGA/N16

47UF/6.3V

nbs_c0603_h37_000s

/VGA/N16

GND

R7519

+VDD_MAIN

N16S-GTR = 3V

N17S-G1 = 1.8V

N17S VRAM Starp pin

+VDD_AON

12

12

12

R7511

R7505

R7501

R7503

R7507

R7508

45.3KOhm

45.3KOhm

@/VGA

1%

12

12

STRAP5

12

12

R7510

R7512

100KOhm

100KOhm

/VGA/N17

/VGA/N17

GND

CORE_PLLVDD

12

R7529

0Ohm

/VGA/N17

12

12

C7510

0.1UF/10V
/VGA

GND

GND

100KOhm

100KOhm

4.99KOhm

@/VGA

@/VGA

@/VGA/N17

@/VGA/N17

1%

1%

12

STRAP2 STRAP0STRAP3STRAP4 STRAP1

12

12

12

12

R7506

R7504

R7509

100KOhm

100KOhm

100KOhm

@/VGA/N17

@/VGA/N17

/VGA/N17

12

R7517

40.2KOhm
/VGA/N16

1%

N16 (920/930/940)→stuff R7511

GND

60mA

45mA

45mA

12

C7501

0.1UF/16V
/VGA

NV27M_SSC_NV SS_CLKIN

GND

12

NV27M_NOSSC_NV

R7522
10KOhm

/VGA

GND

C7809

0.1UF/10V
/VGA

N16, R7501 = 49.9K (10G212499214010 )

49.9KOHM

N17, R7501 = STRAP

/VGA/N16

R7502
100KOhm

@/VGA/N17

STRAP0
STRAP1
STRAP2
STRAP3
STRAP4

STRAP5

T7501

1

TPC26T

U7001M

L6

CORE_PLLVDD

M6

SP_PLLVDD

N6

VID_PLLVDD

GF119/GK208

A10

XTAL_SSIN

C11

XTAL_IN

N16S-GTR-S-A2

R7528

0OHM

/VGA

12

NV27M_NOSSC_NV_R Xtal_out

12

C7508
15PF/50V

/VGA

N17S-G1

07G010952701

2nd source:
07G010262700 (未測)
07G010X22700 (未測)

U7001L

E10

NC79

F10

NC80

D1

STRAP0

D2

STRAP1

E4

STRAP2

E3

STRAP3

D3

STRAP4

C1

NC78

F6

MULTI_STRAP_REF0_GND

F4

MULTI_STRAP_REF1_GNDMLS_REF1

F5

MULTI_STRAP_REF2_GND

N16S-GTR-S-A2

NC

GF117/GM108

X7501
27Mhz
/VGA

13

2

4

GNDGND

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

12

D12

ROM_CS_N

ROM_CS#

B12

ROM_SI

A12

ROM_SI

ROM_SO

C12

ROM_SO

ROM_SCLK

ROM_SCLK

NC FOR

GM108

D11

BUFRST_N

D10

R7515 10KOhm

NC

PGOOD

GF117

/VGA/N16

GF119GF117

GK208

GK208

GM108

GM108

NC

NC

Near GPU

C10

XTAL_OUTBUFF

B10

XTAL_OUT

12

R7523
10KOhm

R7524

/VGA

1KOhm

/VGA

12

GND

12

C7509
15PF/50V

/VGA

GNDGND

+VDD_AON

12

12

R7532

R7531

0Ohm

0Ohm

/VGA/N17

/VGA/N16

VG BOM 帶入主料時記得要加2nd Source

4.99K = 10G212499114010
10K = 10G212100214010

12

12

12

R7526

R7518

R7516

15K = 10G212150214030

100KOhm

100KOhm

100KOhm
R7514
10KOhm
@/VGA

N16 VRAM Starp pin

12

GND

20K = 10G212200214030

/VGA/N17

/VGA/N17

/VGA/N17

24.9K = 10G212249214010

30.1K = 10G212301214010

ROM_SOROM_SI ROM_SCLK

34.8K = 10G212348214010

12

45.3K = 10G212453214010

R7521

R7519

R7520

49.9K = 10G212499214010

100KOhm

4.99KOhm

4.99KOhm

@/VGA/N16

/VGA/N16

/VGA/N16/N17

1%

1%

12

12

N16 4.99K
N17, 100Kohm

GND

BOM

Project Name

Rev

R1.0X542UN/URV

Title :

N14M-GE_ROM,XTAL

Size

Dept.:

Engineer:

NB2_RD1_EE1

Andy_Tang

D

102

Date: Sheet of

75

Tuesday, June 20, 2017

U7001N

1

E12

T7610

THERMDN

1

F12

T7611

THERMDP

AE5

1

T7612

JTAG_TCK

1T7614

AD6

JTAG_TMS

1T7609

AE6

JTAG_TDI

1T7613

AF6

JTAG_TDO

AG4

JTAG_TRST_N

12

R7601
10KOhm
1%
/VGA

GND

N16S-GTR-S-A2

For N16S-GTR GPIO, follow X456Ux For N17S-G1 GPIO, foll ow N17

12

R7603 0 Ohm/VGA/N16

DGPU_GPIO0

DGPU_FB_CLAMP_GPIO_R

DGPU_GPIO1
DGPU_GPIO2

12

R7623 0 Ohm/VGA/N16

DGPU_GPIO4

12

R7624 0 Ohm/VGA/N16

DGPU_GPIO5

VDD_MAIN_EN

DGPU_GPIO5 FRAME_LOCK#

12

R7625 0 Ohm/VGA/N16

DGPU_GPIO6

FB_CLAMP_TGL_REQ

DGPU_GPIO6

DGPU_GPIO7

3D VISION

DGPU_GPIO16 SYS_PEX_RST_MON#

12

R7630 0 Ohm/VGA/N16

DGPU_GPIO11

NVDD_PWM_VID

12R7632 0 Ohm/VGA/N16

DGPU_GPIO13

NVDD_PSI

DGPU_GPIO8

DGPU_GPIO21

12

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

R7618
10KOhm
/VGA

12

dGPU_PD#

61

Q7602A
UM6K1N

2

/VGA

34

Q7602B
UM6K1N

5

/VGA

GND GND

R7633 0 Ohm/VGA/N16

DGPU_GPIO21

GPU_PEX_RST_HOLD#

12

R7626 0 Ohm/VGA/N16

DGPU_GPIO8

SYS_PEX_RST_MON#

DGPU_GPIO19

SYS_PEX_RST_MON#70

12

R76190Ohm @/VGA

AC_IN_OC# 30,89

12

R76200Ohm /VGA

DGPU_LIMIT 30

GPU_PEX_RST_HOLD#

GND

GM108 GK208 GF11 7 GF119

GPIO16

GPIO20

GPIO21

GPIO8

R7634 0 Ohm/VGA/N17
R7635 0 Ohm/VGA/N17

R7649 0 Ohm/VGA/N17
R7638 0 Ohm/VGA/N17

R7643 0 Ohm

R7646 0 Ohm

R7644 0 Ohm

U7602

A

1

B

2

34

GND

NC7SZ08P5X
/VGA/N16

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

R7651

RN7601B

RN7601A

12

2.2KOhm

2.2KOhm
/VGA

/VGA

0Ohm /VGA

R7605

34

12

12

DGPU_RST#

GPIO

GF117

NC

NC

GK208

GM108

OVERT

GPIO16

GPIO20

GPIO8

NC NC

12
12

12R7636 0 Ohm/VGA/N17

12R7637 0 Ohm/VGA/N17
12
12

12

/VGA/N17

@/VGA/N17

12

@/VGA/N17

12

/VGA/N17

12R7645 0 Ohm

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

5

VCC

Y

12

0Ohm @/VGA

2

61

Q7601A

5

UM6K1N

D9

I2CS_SCL
I2CS_SDA

I2CC_SCL
I2CC_SDA

I2CB_SCL
I2CB_SDA

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6

GPIO7
OVERT

OVERT

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13

NC

GPIO16

NC

GPIO20

NC

GPIO21

GPIO8

NVDD_PWM_VIDDGPU_GPIO0
DGPU_FB_CLAMP_GPIO_R
FB_CLAMP_TGL_REQ

VDD_MAIN_EN

NVDD_PSI

GND

3D VISION

DGPU_PEX_RST# 32,70

R7616

10KOhm

/VGA/N16

D8

A9

B9

C9

C8

C6

B2

D6

C7

F9

A3

A4

B6

A6

F8

C5

E7

D7

B4

D5

E6

C4

N17S-G1, reserved

E9

I2CS_SCL
I2CS_SDA

DDC2C_CLK
DDC2C_DAT

DDC2B_CLK
DDC2B_DAT

DGPU_GPIO0
DGPU_GPIO1
DGPU_GPIO2

DGPU_GPIO4
DGPU_GPIO5
DGPU_GPIO6
DGPU_GPIO7

DGPU_GPIO11

DGPU_GPIO13

DGPU_GPIO16

DGPU_GPIO21

DGPU_GPIO8

DGPU_GPIO19

N16S-GTR & N17S-G1 GPIO

GPU_PEX_RST_HOLD#
3D VISION
FB_CLAMP_TGL_REQ

GPU_ALERT#_L

GPU_THERM#_L

34

Q7601B

UM6K1N

GPU_THERM#_L

N16S-GTR & N17S-G1

GPU_ALERT#_L

相同設定

MEM_VREF_CTL

dGPU_PD#

DGPU_GPIO19 74

NVDD_PWM_VID 91

VDD_MAIN_EN 77
NVDD_PSI 91

MEM_VREF_CTL 72
dGPU_PD# 89

12

/VGA

GPU_EVENT# 21
D7601
1N4148WS

R7621 0Ohm/VGA

12

S

D

312

3

2

@/VGA

G

1

2N7002K
Q7604

DGPU_PEX_RST#

Q7603

1

G

2N7002K
@/VGA

2

3

312

D

S

R7602 0Ohm/VGA

12

+3VS

2

DGPU_FB_CLAMP_GPIO_ R

/VGA/N17

GND

+VDD_AON

GPU_THERM#_GPU 32,77

12

61

Q7605A
UM6K1N

R7628 0Ohm

VGA_ALERT_P# 90

R7622

100KOhm
/VGA

12

/VGA/N16

34

RN7609B

/VGA

2.2KOhm

12

DDC2C_CLK

RN7609A

/VGA

2.2KOhm

DDC2C_DAT

0526-2 JIM

34

RN7608B

/VGA

2.2KOhm

12

RN7608A

/VGA

DDC2B_CLK

2.2KOhm

DDC2B_DAT

SMB1_CLK_S 28,50

SMB1_DAT_S 28,50

5

/VGA/N17

DGPU_RST# 77

+3VS

12

R7627

100KOhm

/VGA

34

Q7605B

UM6K1N

GND

NVDD_PSI

DGPU_FB_CLAMP_GPIO_R

VDD_MAIN_EN

FRAME_LOCK#

GPU_PEX_RST_HOLD#

GPU_EVENT#

FB_CLAMP_TGL_REQ

SYS_PEX_RST_MON#

SYS_PEX_RST_MON#

DGPU_FB_CLAMP_GPIO_R

3D VISION
MEM_VREF_CTL

Level shift
N17:1.8V
N16:3.3V

DGPU_FB_CLAMP_GPIO 21,30,77

GND

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

12RN7602A

@/VGA

2.2KOHM

34RN7602B

@/VGA

DDC2C_CLK

2.2KOHM

DDC2C_DAT

12

RN7603A

@/VGA

2.2KOHM

34

RN7603B

@/VGA

DDC2B_CLK

2.2KOHM

DDC2B_DAT

12

RN7604A

/VGA

100KOhm

34

RN7604B

/VGA

GPU_THERM#_L

100KOhm

GPU_ALERT#_L

R7606 10KOhm @/VGA/N16

12

R7609 10KOhm @/VGA

12

R7607 10KOhm /VGA

12

R7650 10KOhm /VGA/N17

12

R7610 10KOhm /VGA

12

R7615 10KOhm @/VGA

12

R7611 10KOhm /VGA

12

R7604 10KOhm /VGA

12

R7613 10KOhm @/VGA

12

R7612 10KOhm /VGA

12

12

R7647 100KOhm

12R7648 100KOhm

GND

+3VS

R760810KOhm @/VGA

12

VGA_ALERT_P#

BOM

Project Name

Rev

R1.0X542UN/URV

Title :

N14M-GE_GPIO

Size

Dept.:

Engineer:

NB2_RD1_EE1

Andy_Tang

D

102

Date: Sheet of

76

Tuesday, June 20, 2017

GPU_PWR_EN

DGPU_PWR_EN#21,69

12

GND

NVVDD_PWR_EN

FBVDDQ_EN

DGPU_FB_CLAMP_GPIO21,30,76

10KOhm

SL7701

+FBVDDQ_PWRGD24,93

NVVDD POWER GOOD LOOPBACK
ref.G753VI

+VDD_AON

+3vs

2

NVDD_PWRGD

+3vs

DGPU_FB_CLAMP_GPIO

SUSB_EC#30,57,88

R7709

10KOhm
/VGA

21

SL7702

0402

21SL7703

NVDD_PWRGD91

0402

+VDD_AON

12

R7750

/VGA

D7706

1N4148WS
/VGA

12

21

0402

12

C7707

0.033UF/16V
@/VGA

GND

DGPU_RST#76 GPU_THERM#_GPU 32,76

61

GND

+3vs

R7718
10KOhm
@/VGA

61

12

Q7707A

2

UM6K1N
@/VGA

34

Q7706B

5

UM6K1N
@/VGA

GND

Q7706A
UM6K1N
@/VGA

GND

+3VS

12

R7708

10KOhm

/VGA

dGPU_PWRON

3

3

D

Q7702

1

1

2N7002K

G

/VGA

S

2

2

GND

dGPU_PWR_15#57

D7702

1

3

2

dGPU_PWRON_OR

BAT54CW
/VGA

0302-1 rick
0303-1 rick

+3vs +VDD_AON

UM6K1N

34

Q7707B

5

GND

@/VGA

GND

R7701 0Ohm /VGA

R7720

100KOhm
/VGA

12

GND

NVDD_PWR_ENGPU_THERM#_GPU

FOR Layout Placement

12

C7702

0.1UF/25V

@/VGA

1

2

34

12

2

U7701

A

5

VCC

B

GND

Y

NC7SZ08P5X
@/VGA

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_MAIN +VDD_MAIN

12

R7710

10KOhm

@/VGA

12

R7711
100KOhm
5%
@/VGA

+12VSUS +3V

12

R7719

100KOhm
/VGA

5

61

Q7710A
UM6K1N
/VGA

GND GND

+3VSUS

GPU_PWR_EN

2

12

34

0606 delete D7704, C7703, R7718

N16S-GTR = 3V

N17S-G1 = 1.8V

+3VSUS

R7712
100KOhm
@/VGA

12

5

61

Q7704A

EM6K1-G-T2R
@/VGA

R7715

10KOhm
/VGA

Q7710B
UM6K1N
/VGA

+VDD_AON

GPU_PWR_EN 69,91,93

+VDD_MAIN

dGPU_PWR_MAIN_DSG#57

R7713
10KOhm
/VGA

12

34

Q7704B
EM6K1-G-T2R
@/VGA

GNDGNDGND GND GND

+3VSUS +3VS

12

R7740

100KOhm

/VGA/N17

61

Q7716A

2

UM6K1N

/VGA/N17

GND GND

12R7741 0Ohm

/VGA/N16

VDD_MAIN_EN76

NVDD_PWR_EN 91

R7721

300KOHM

/VGA

12

12

34

Q7716B

5

UM6K1N

/VGA/N17

0606 PU at PAGE76

+PEX_VDD

DGPU_FBVDDQ_EN 93

R7731

100KOhm

/VGA/N17

DGPU_PWROK 21,2 4

+12VSUS +12VSUS

12

R7706
100KOhm
/VGA

dGPU_PWR_AON_DSG#57

61

Q7703A

2

UM6K1N
/VGA

GPU_PWR_EN

GND GND

+12VSUS +12VSUS

12

12

R7737

R7736

100KOhm

100KOhm

/VGA

/VGA

dGPU_PWRON_VSG

MAIN_EN

34

Q7712B

5

UM6K1N
/VGA

dGPU_PWR_MAIN_DSG#

61

Q7712A

2

UM6K1N
/VGA

GND GND

12

R7707
100KOhm
/VGA

dGPU_PWRON_VSG

34

Q7703B

5

UM6K1N

/VGA

2

1

D7703 BAT54AW

12

R7733 270KOhm

N16S-GTR = 3V

N17S-G1 = 1.8V

+1V8_VDD_3V

D7701

12

1N4148WS

/VGA

12

12

R7702
1MOhm

C7701

/VGA

0.022UF/25V
/VGA

GND

N16S-GTR = 3V

R7704

12

30KOHM

3

/VGA

/VGA

12

C7706

0.01UF/25V

GND

dGPU_PWRON_VSG

D7705 BAT54AW/VGA

MAIN_EN PEX_VDD_EN

0524-2 JIM

0525-1 JIM

NVDD_PWRGD

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

Q7701

1

6

D

235

S

4

G

SI3456DDV-T1-GE3

/VGA

N16S-GTR = 3V

N17S-G1 = 1.8VN17S-G1 = 1.8V

+VDD_MAIN+1V8_VDD_3V

Q7711

1

6

D

235

S

4

G

SI3456DDV-T1-GE3

/VGA

N16S-GTR = 3V

N17S-G1 = 1.8V

+1V8_VDD_3V

+1.8VS

/VGA/N17

12

R7753 0Ohm
nbs_r0805_h24_000s

+3VS

12

+PEX_VDD+1.0VSUS

R7714 0Ohm
nbs_r0805_h24_000s

/VGA

Q7705

PEA28BA

/VGA/N16

3

D

2

2

5

3

1

GS

1

4

12

12

R7705 560K Ohm

C7704

/VGA

0.015UF/16V

GND

N16S-GTR = 3V

N16S-GTR = 1.0V

N17S-G1 = 1.8V

N17S-G1 = 1.8V

+VDD_MAIN

+PEX_VDD_H

/VGA/N17

12

R7716 0Ohm

+PEX_VDD

nbs_r0805_h24_000s

12

R7703 0Ohm

+12VSUS +12VSUS

12

12

R7717

R7751

100KOhm

100KOhm

@/VGA

@/VGA

34

5

@/VGA

61

Q7720A

2

EM6K1-G-T2R

@/VGA

GND GND

nbs_r0805_h24_000s

/VGA/N16

R7752

12

PEX_VDD_EN

10KOhm
@/VGA

Q7720B

EM6K1-G-T2R

BOM

Project Name

Rev

R1.0X542UN/URV

Title :

N14M-GE_POWER

Size

Dept.:

Engineer:

NB2_RD1_EE1

Andy_Tang

D

Date: Sheet of

102

77

Tuesday, June 20, 2017

Address Selection Table

Address

0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70

10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k

R7812

8.2k 6.2k 6.8k 4.7k 3.6k 2.7kOpen 2k

R7813

TR7807 place near VRAM
or SSD base on Thermal RD test

TR7806 place near AMD/APL CPU

105C @ 5k
40C @ 51k

PTR9110 place near PQL9101
Close to +NVDD L side

P_GPU_VRM_TEMP_SENSOR_1091

GND

105C @ 5k
40C @ 51k

GND

TR7807
47KOHM

TR7806
47KOHM

Place at Page 91

P_TEMPSENS_6_VCC_30

/VGA

t

C7804

0.1UF/25V

12

/VGA

/VGA

t

C7805

0.1UF/25V

12

/VGA

C7808

0.1UF/25V

12

/VGA

R7812

/VGA

R7808

4.3KOHM

12KOHM

12

12

P_TEMPSENS_6_VCC_30

1%

R7813

/VGA

/VGA

3.6KOhm

12

1.0 ~ 3.56V

R7810
12KOHM

/VGA

1.0 ~ 3.56V

R7809
12KOHM

/VGA

1.0 ~ 3.56V

GNDGND

U7803

8

1

SDA

ALT/ADD

7

2

P_TEMPSENS_6_ADDR_10

SCL

TM3

6

3

P_TEMPSENS_6_TM3_10

GND

TM2

5

P_TEMPSENS_6_TM2_10
P_GPU_VRM_TEMP_SENSOR_10

4

VCC5

TM1

UP1905AMA8

/VGA

12

1%

12

1%

GND

+5VSUS

P_TEMPSENS_6_SDA_30
P_TEMPSENS_6_SCL_30

P_TEMPSENS_6_VCC_30

12

R7811 2.2Ohm 5%
nbs_r0603_h24_000s

/VGA

/VGA
GND

12

C7806
1UF/16V
nbs_c0603_h37_000s

C7803
47PF/50V
@/VGA

12

SL7802 @/VGA

21

0402

SL7803 @/VGA

21

0402

12

C7807
47PF/50V
@/VGA

GND

SMB1_DAT 28,30,90

SMB1_CLK 28,30,90

Check 其他頁是否有
pull high 到 3.3V

GND

BOM

Project Name

Title :

VGA_****

Size

Dept.:

ASUSTeK COMPUTER INC.

C

Date: Sheet

Tuesday, June 20, 2017

Rev

R2.0X456

Engineer:

EE

102

of

78

P_IMVP8_CORE1_LX_SP_10

P_IMVP8_CORE2_LX_SP_10

P_IMVP8_GT_HG_3081
P_IMVP8_GT_LX_3081
P_IMVP8_GT_LG_3081

P_IMVP8_CORE1_HG_3081
P_IMVP8_CORE1_LX_3081
P_IMVP8_CORE1_LG_3081

P_IMVP8_SA_HG_3081
P_IMVP8_SA_LX_3081
P_IMVP8_SA_LG_3081

P_IMVP8_CORE2_PWM_1081

PR_2017/03/21

P_IMVP8_CORE_CSCOMP_R_10

VCCCORELL=2.4mohm

PR8009
56KOhm

12

P_IMVP8_CORE1_LX_R_10

PR8033

/U42

56KOhm

12

P_IMVP8_CORE2_LX_R_10

+5VSUS_PWR

P_IMVP8_CORE_CSREF_1080,81

P_IMVP8_CORE2_LX_SP_1081

P_IMVP8_CORE_CSREF_1080,81

P_IMVP8_CORE1_LX_SP_1081

P_IMVP8_CORE_VIN_S81

Place Close to PL8102

12

PR8046
51KOhm

12

PR8026

51KOhm

12

nbs_r0603_h24_000s

nbs_r0603_h24_000s

PTR8004
100kOhm
1%

/U42

PR8010
1KOhm

PR8028

4.22KOhm

12

PR8014

4.22KOhm

12

Place Close to CPU

PR8012
100Ohm 1%

12

nbs_r0201_h12_000s

P_VCCSA_VSSSENSE_50OHM6

1000PF/50V

Place Close to CPU

P_VCCSA_VCCSENSE_50OHM6

PR8036
100Ohm 1%

12

+VCCSA

nbs_r0201_h12_000s

P_IMVP8_SA_VSP_R_10

Place Close to CPU

PR8050

+VCCCORE

100Ohm

P_VCCCORE_VCCSENSE_50OHM6

PC8007

1000PF/50V

P_VCCCORE_VSSSENSE_50OHM6

PR8019
100Ohm

Place Close to CPU

P_IMVP8_CORE_COMP_RC_10

PC8078

680PF/50V

PC8066

PR8031

15PF/50V

75KOhm

12

PC8032

PC8021

VCCCOREOCP=42A/U22‐9.76kohm

VCCCOREOCP=84A/U42‐19.61kohm

560PF/50V

390PF/50V

12

12

PR8060

165KOhm

12

P_IMVP8_CORE_TSENSE_R_10

12

/U22

12

12

Place Close to PQL8102

PC8001

/U42

VCCCOREThermalHot=100degree

/U42

0.047UF/25V

12

PC8068

0.047UF/25V

KBLAKE IMVP8 (1) Power [For U42 CPU]

@

PC8091

220PF/50V @

12

12

PR8015
1KOhm @

PC8035

12

PR8048

@

1.4KOHM

PR8023

@

0Ohm @

12

12

PR8020

12

750Ohm

12

12

12

PC8093
4700PF/50V

PR8053

4.7KOhm

12

12

P_IMVP8_CORE_FB_RC_10

PC8006
470PF/50V

12

12

PR8044 9.76KOhm

PC8086 0.22UF/10V

PC8025

0.1UF/50V

12

12

PR8032

PTR8007

100kOhm

12.7KOHM

1%

PR8027

1.5KOhm
@

P_IMVP8_SA_COMP_R_10

VCCSALL=10.3mohm

12

@

1000PF/50V

12

12

PC8020

CHOKE SIZE

0.01UF/50V

PC8063

PR8005

470Ohm

12

@

12

@

P_IMVP8_PSYS_INFO89

PR8029

13.3KOhm

12

PR8052

/U42_/U22

P_IMVP8_CORE_VSN_10

VCCCOREICCMAX=32A/U22:102kohm

102KOhm

VCCCOREICCMAX=64A/U42:154kohm

12

PR8056

PR8056=24.9kohm/U22

24.9KOHM/U42_/U22

PR8056=26.1kohm/U42

12

PC8026
470PF/50V

PR8042

12

49.9Ohm

12

1

IOUT_2ph

2

P_IMVP8_CORE_IOUT_10

DIFFOUT_2ph/ICCMAX_2ph

3

P_IMVP8_CORE_DIFFOUT_10

FB_2ph

4

P_IMVP8_CORE_FB_10

COMP_2ph

5

P_IMVP8_CORE_COMP_10

ILIM_2ph

6

P_IMVP8_CORE_ILIM_10

CSCOMP_2ph

7

P_IMVP8_CORE_CSCOMP_10

/U42_/U22

CSSUM_2ph

8

P_IMVP8_CORE_CSSUM_10

CSREF_2ph

9

P_IMVP8_CORE_CSREF_10

CSP2_2ph

10

P_IMVP8_CORE2_CSP_10

CSP1_2ph

11

P_IMVP8_CORE1_CSP_10

TSENSE_2ph

12

P_IMVP8_CORE_TSENSE_10

VRMP

13

P_IMVP8_VRMP_10

VCC

P_IMVP8_VCC_20

PC8079

PR8054

12

PR8062

12

PC8065

0.01UF/50V

1KOhm

1Ohm

1UF/25V

nbs_r0603_h24_000s

nbs_c0603_h37_000s

12

5%

12

+5VSUS_PWR

P_IMVP8_CORE1_BST_30 P_IMVP8_GT_BST_30
P_IMVP8_CORE1_HG_30

PR8011

P_IMVP8_CORE1_LX_30
P_IMVP8_CORE1_LG_30

0Ohm

Frequency=600kHz

nbs_r0603_h24_000s

12

+5VSUS_PWR

nbs_r0603_h24_000s

P_IMVP8_CORE1_BST_R_30 P_IMVP8_GT_BST_R_30

PR8008

12

1Ohm

PC8041

0.1UF/25V

nbs_c0603_h37_000s

5%

12

nbs_c0603_h37_000s

12

PC8036

15PF/50V

12

PSL8001

0402

12

@

21

52

53

GND154GND255GND356GND457GND5

BST115HG116SW117LG1/ROSC18PVCC19LG2/ICCMAX_1a20SW221HG222BST223LG3/ICCMAX_1b24SW325HG326BST3

14

PR8040

14KOHM

PC8053
1UF/25V

12

PC8094

1000PF/50V

@

P_IMVP8_SA_VSN_10

P_IMVP8_SA_COMP_10

P_IMVP8_PSYS_10

P_IMVP8_SA_VSP_10

P_IMVP8_SA_ILIM_10

45

46

47

48

50

51

ILIM_1b

VSN_1b49VSP_1b

VSP_2ph

VSN_2ph

COMP_1b

PSYS/TSENSE_1b

P_IMVP8_PVCC_20

P_IMVP8_SA_BST_30

P_IMVP8_SA_HG_30

P_IMVP8_SA_LX_30

P_IMVP8_SA_LG_30

12

PC8005

0.1UF/25V

nbs_c0603_h37_000s

12

PR8017

29.4KOhm

12

PR8017=29.4KOhm ICCMAX=31A/ U22/U42

P_IMVP8_SA_CSN_10

P_IMVP8_SA_CSP_10

P_IMVP8_SA_IOUT_10

44

CSP_1b

CSN_1b

VR_RDY43IOUT_1b

12

P_IMVP8_SA_BST_R_30

@12PR8022

P_IMVP8_SA_CSN_10

VCCSAOCP=8A

CHOKE SIZE

PC8003

PR8045

0.01UF/50V

12

@

24KOhm

@

12

+5VSUS_PWR

DIS SA

CHOKE SIZE

12

PR8004
1KOhm

PC8046

PR8018

12

470PF/50V

54.9KOhm

@

@

12

PSL8004

21

0402

P_IMVP8_EN_10

P_IMVP8_CORE2_PWM_10

12

PR8057

PU8001

22.1KOhm

40

41EN42

NCP81236AMNTXG

39

DRON

38

P_IMVP8_DRON_10 P_IMVP8_GT_CSN_10

SCLK

37

P_SVID_CLK_50OHM_X1

ALERT#

PWM/ADDR_VBOOT

36

P_SVID_ALERT#_50OHM_X1

SDIO

35

P_SVID_DATA_50OHM_X1

VR_HOT#

34

P_IMVP8_VR_HOT#_10

IOUT_1a

33

P_IMVP8_GT_IOUT_10

CSP_1a

32

P_IMVP8_GT_CSP_10

CSN_1a

31

P_IMVP8_GT_CSN_10

ILIM_1a

30

P_IMVP8_GT_ILIM_10

COMP_1a

29

P_IMVP8_GT_COMP_10

VSN_1a

28

P_IMVP8_GT_VSN_10

VSP_1a

27

P_IMVP8_GT_VSP_10

TSENSE_1a

P_IMVP8_GT_TSENSE_10

PC8042

0.1UF/50V

12

12.7KOHM

VCCGTThermalHot=100degree

P_IMVP8_GT_HG_30

PR8030

P_IMVP8_GT_LX_30
P_IMVP8_GT_LG_30

0Ohm
nbs_r0603_h24_000s

12

PR8035
11KOhm

12

@

12

PC8030

0.1UF/25V
nbs_c0603_h37_000s

0Ohm

@

nbs_r0603_h24_000s

VCCSAICCMAX=5A/U22_11K

VCCSAICCMAX=6A3/U42_14K

PR8024

PR8039
0Ohm @

12

CHOKE SIZE

PC8092

4700PF/50V

PSL8002

20161216 Power modify

12

12

@

PR8001

49.9Ohm

Place Close to PQL8101

12

PC8072

0.01UF/50V
@

21

0402

PSL8000

0402

PC8014 470PF/50V

12
12

PR8047 59KOhm

PC8031 1000PF/50V

12

PR8006 27.4kOHM

VCCGTOCP=40A/U22

VCCGTOCP=36A/U42

PC8013 15PF/50V

12

12

PC8074

0.015UF/16V

12

PTR8003

100kOhm
1%

Place Close to PL8104

PTR8005
100kOhm

1% @

12

PR8055
12KOHM

12

PR8000

45.3Ohm

21

PR8003
10Ohm

/U42_/U22

12

/U42_/U22

PR8021 1.3KOhm

12

P_IMVP8_GT_COMP_R_10

@

12

VCCGTLL=3.1mohm

12

12

P_IMVP8_SA_CS_R_10

P_IMVP8_SVID_VCC_10

PR8047=59kohm/U22

PR8047=62kohm/U42

PC8019
1000PF/50V

PR8006=27.4kohm/U22

PR8006=31.6kohm/U42

PR8059

7.5KOHM

nbs_r0603_h39_000s

PR8002

100Ohm

2200PF/50V

12

12

PC8002

0.01UF/50V

@

PC8077

12

12

PR8049
422Ohm

PR8007

2.74KOhm

12

12

@

PR8065 100Ohm

12

PR8016
0Ohm

P_IMVP8_GT_VSP_R_10

P_IMVP8_SA_CSN_R_10 81

P_IMVP8_SA_LX_SP_10 81

12

12

PR8037
0Ohm

12

PC8027

0.022UF/25V

12

PC8000
1000PF/50V

12

CHOKE SIZE

PC8018

0.1UF/25V

nbs_c0603_h37_000s

PR8064 100Ohm1%

PR8025 100Ohm1%

P_IMVP8_GT_CSP_10

12

nbs_r0201_h12_000s

nbs_r0201_h12_000s

IMVP8_PWRGD 25,30
ALL_SYSTEM_PWRGD 25,30,58
P_IMVP8_DRON 81

12

PR8034
1Ohm
nbs_r0603_h24_000s

PC8045

0.01UF/50V

12

12

5%

12

+VCCST

P_SVID_CLK_50OHM_X2 6
P_SVID_ALERT#_50OHM_X2 6

P_SVID_DATA_50OHM_X2 6

IMVP8_VRHOT# 8

Place Close to PL8101

12

PTR8006
100kOhm
1%

P_IMVP8_GT_CS_R_10

PR8043

PR8038

12KOHM

7.5KOHM

12

nbs_r0603_h39_000s

12

Place Close to CPU

P_VCCGT_VSSSENSE_50OHM 6

P_VCCGT_VCCSENSE_50OHM 6

+VCCGT

Place Close to CPU

<Variant Name>

X542UA/UV

Title :

SPW_KBLAKE_U42_IMVP8

Size

Dept.:

ASUS Power Team

A2

Date: Sheet

Tuesday, June 20, 2017

P_IMVP8_GT_CSN_R_10 81

P_IMVP8_GT_LX_SP_10 81

Project Name

Engineer:

Rev

R2.0

SS

102

of

80

Skylake IMVP8 Power (2) [For CPU]

+VCCGT

AC_BAT_SYS

PJP8101

@

1MM_OPEN_5MIL

112

2

P_IMVP8_GT_VIN_S

12

12

12

+

PCI8111

PCI8101

PCE8101

10UF/25V

10UF/25V

22UF/25V

3

D

PQH8101

NTMFS4C09NBT1G

/U42/U22

/U42/U22

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

h=4.5mm

2

P_IMVP8_GT_HG_3080

GS

1

/U42/U22

PR8105
10KOhm

PL8101

@

12

P_IMVP8_GT_LX_3080

3

PQL8101

NTMFS4C06NBT1G

D

2

P_IMVP8_GT_LG_3080

GS

1

/U42/U22

PC8109

2200PF/50V

12

@

+VCCCORE

P_IMVP8_CORE_VIN_S80

3

D

PQH8102

NTMFS4C09NBT1G

2

P_IMVP8_CORE1_HG_3080

GS

1

/U42/U22

PR8106
10KOhm
@

12

P_IMVP8_CORE1_LX_3080

3

PQL8102

NTMFS4C06NBT1G

D

2

P_IMVP8_CORE1_LG_3080

GS

1

/U42/U22

PC8140

2200PF/50V

12

@

P_IMVP8_CORE2_LX_R_30

PC8179

/U42

PR8114

/U42

PR8115

/U42

0.1UF/25V

0Ohm

12

0Ohm

5%

5%

12

12

nbs_c0603_h37_000s

P_IMVP8_CORE2_HG_R_30

nbs_r0603_h24_000s

nbs_r0603_h24_000s

PU8101

/U42

9

GND2

1

8

BST

DRVH

P_IMVP8_CORE2_HG_30

P_IMVP8_CORE2_BST_30

2

7

PWM

SW

P_IMVP8_CORE2_PWM_1080

P_IMVP8_CORE2_LX_30

3

6

EN

GND1

P_IMVP8_DRON80

4

VCC5DRVL

P_IMVP8_CORE2_LG_30

NCP81151AMNTB

+5VS_PWR

12

PC8180

1UF/25V

/U42

nbs_c0603_h35_000s

COLAY

+VCCGT

12

12

+

+

PCE8105

PCE8108

330UF/2.5V

470U/2V

@

/U42/U22

V-Chip
h=4.6mm

POSCAP
h=2.1mm

+VCCGT

32PCS

U22=>14PCS
U42=>14PCS

12

12

12

PC8107

PC8108

PC8102

PC8110

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42/U22

@

/U42/U22

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

+VCCGT

12

12

12

PC8131

PC8130

PC8129

PC8128

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42/U22

/U42/U22

@

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

+VCCGT

12

12

12

PC8152

PC8151

PC8156

PC8153

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

@

@

@

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

+VCCGT

12

12

PC8171

PC8172

22UF/6.3V

22UF/6.3V

@

@

nbs_c0805_h57_000s

nbs_c0805_h57_000s

+VCCSA

9PCS=>3PCS

12

12

12

PC8157

PC8175

PC8142

PC8146

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42/U22

/U42/U22

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

PC8113

2200PF/50V

@

+VCCSA

5

D

PQH8104

QM1830M3

4

P_IMVP8_SA_HG_3080

GS

PR8109

123

@

10KOhm
@

12

P_IMVP8_SA_LX_3080

12

PC8154
1000PF/50V

5

nbs_c0603_h37_000s

PQL8104

QM1830M3

D

4

P_IMVP8_SA_SNB_S

P_IMVP8_SA_LG_3080

GS

12

123

PR8107

PC8169

@

1Ohm

5%

2200PF/50V

12

nbs_r1206_h30_000s

@

12

12

12

12

12

12

PC8118

PC8121

PC8144

PC8122

PC8119

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

@

/U42/U22

@

/U42/U22

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

12

12

12

12

PC8147

PC8133

PC9319

PC8138

PC8137

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

@

@

/U42/U22

@

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

12

12

12

12

PC8159

PC8161

PC8168

PC8164

PC8162

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42/U22

/U42/U22

/U42/U22

@

@

@

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

12

12

12

12

PC8111

PC8166

PC8141

PC8149

PC8158

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

@

/U42/U22

/U42/U22

@

@

@

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

Imax = 28A

0.24UH
Irat=35A

21

+VCCGT

@

12

PC8112

/U42/U22

1000PF/50V

[HF]CYNTEC/PEUE063T-R24MS1R195

PSP8104

nbs_c0603_h37_000s

SHORT_PAD

P_IMVP8_GT_CSN_R_10 80

12

P_IMVP8_GT1_SNB_S

PSP8105
@

SHORT_PAD

12

@

PR8104
1Ohm

nbs_r1206_h30_000s

12

PCI8102
10UF/25V
/U42/U22
nbs_c0805_h57_000s

12

PC8132
1000PF/50V
nbs_c0603_h37_000s

P_IMVP8_CORE_SNB_S

12

PR8103
1Ohm

5%

nbs_r1206_h30_000s

PR8110
10KOhm
@

12

12

P_IMVP8_SA_VIN_S

12

PCI8104
10UF/25V
@

nbs_c0805_h57_000s

@

[HE]CYNTEC/PEUE053T-R68MS

@

12

PC8127
22UF/6.3V

@

12

PC8150
22UF/6.3V

@

12

PC8170
22UF/6.3V

@

P_IMVP8_GT_LX_SP_10 80

5%

12

@

AC_BAT_SYS

PJP8103

@

3MM_SHORT_PIN

112

2

12

12

+

PCE8102

PCI8112

22UF/25V

10UF/25V

/U42/U22

/U42/U22

nbs_c0805_h57_000s

h=4.5mm

PL8102

Imax = 64A

0.24UH
Irat=35A

21

+VCCCORE

/U42/U22

@

[HF]CYNTEC/PEUE063T-R24MS1R195

PSP8103

SHORT_PAD

P_IMVP8_CORE1_VO_10

12

P_IMVP8_CORE_CSREF_10 80,81

12

PR8112
10Ohm

PSP8106

@

2

2

12

PL8104

0.68UH

Irat=9.7A

Place Close to PL8102

@

/U42/U22

SHORT_PAD

P_IMVP8_CORE1_LX_SP_10 80

12

@

P_IMVP8_CORE_VIN_S

12

12

PCI8103

PCI8113

10UF/25V

10UF/25V

/EMI

/U42

3

PQH8103

NTMFS4C09NBT1G

D

nbs_c0805_h57_000s

nbs_c0805_h57_000s

2017/02/06 X542UA_R1.1 #26, EMI solution

GS

1

/U42

PL8103

Imax =64 A

0.24UH

/U42

Irat=35A

21

+VCCCORE

[HF]CYNTEC/PEUE063T- R24 MS1R 195

@

12

PC8106

PSP8108

3

PQL8103

NTMFS4C06NBT1G

D

GS

1

/U42

PCI8114
10UF/25V
@

nbs_c0805_h57_000s

@

21

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

P_IMVP8_CORE2_VO_10

1000PF/50V

SHORT_PAD

nbs_c0603_h37_000s

P_IMVP8_CORE2_SNB_S

12

PR8111
1Ohm

5%

nbs_r1206_h30_000s

PJP8102

@
1MM_OPEN_5MIL

112

2

PSP8101

@

SHORT_PAD

12

PSP8107

@

SHORT_PAD

12

COLAY

+VCCCORE

12

+

+VCCCORE

12

PC8101
22UF/6.3V
/U42/U22

+VCCCORE

12

PC8124
22UF/6.3V
/U42

+VCCCORE

12

PC8163
22UF/6.3V
/U42/U22

12

P_IMVP8_CORE_CSREF_10 80,81

12

PR8113

/U42

10Ohm

PSP8109

Place Close to PL8103

@

SHORT_PAD

@

P_IMVP8_CORE2_LX_SP_10 80

12

@

AC_BAT_SYS

Imax = 5A

+VCCSA

P_IMVP8_SA_CSN_R_10 8 0

P_IMVP8_SA_LX_SP_10 80

+VCCIO_CPU+VCC SA

@
PJP8104
3MM_SHORT_PIN

112

2

Place Close to CPU

COLAY

+VCCCORE

12

12

12

+

+

+

PCE8107

PCE8111

PCE8110

PCE8109

330UF/2.5V

330UF/2.5V

470U/2V

470U/2V

@

@

@

/U42/U22

V-Chip

V-Chip

h=4.6mm

POSCAP

h=4.6mm

POSCAP

h=2.1mm

h=2.1mm

30PCS

U22=>15PCS
U42=>30PCS

12

12

12

12

12

12

12

12

12

PC8114

PC8123

PC8115

PC8120

PC8105

PC8116

PC8117

PC8104

PC8103

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42

/U42

/U42

/U42/U22

/U42/U22

/U42/U22

/U42

/U42

/U42

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

PC8125

PC8126

PC8134

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42/U22

/U42/U22

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

PC8167

PC8173

PC8165

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42

/U42

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

12

12

12

12

12

PC8155

PC8135

PC8143

PC8160

PC8136

PC8139

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42

/U42

/U42

/U42

/U42/U22

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

12

12

PC8174
22UF/6.3V
/U42/U22

nbs_c0805_h57_000s

12

12

12

12

12

PC8176

PC8189

PC8178

PC8177

PC8188

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

/U42/U22

/U42

/U42/U22

/U42

/U42/U22

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

nbs_c0805_h57_000s

BOM

Project Name

Rev

R2.0

X542UA/UV

Title :

PW_SKYLAKE-U (2)

Size

Dept.:

NB Power Team

Engineer:

SS

Custom

102

Date: Sheet

of

81

Tuesday, June 20, 2017

VSUS_ON30,57,83,88

PT830* 請放置 PU8302旁;並請放置Trace 上!

PT8303

1

P_1.0VSUS_HG_30

NB_TPC20T

PT8301

1

P_1.0VSUS_LX_30

NB_TPC20T

PT8302

1

P_1.0VSUS_LG_30

NB_TPC20T

PR8304
620KOhm

GND

P_1.0VSUS_VSENS_10

GND

P_1.0VSUS_VSENS_10

PC8301

0.1UF/25V

12

3A LDO REF=0.8V

+5VSUS_PWR

PR8321

2.2Ohm
5%

1.8VSUS_PWRGD58

PR8314

12.7KOHM

12

PC8319
1000PF/50V

PU8302
RT8248AGQW

nbs_c0603_h37_000s

12

+1.0VSUS (RT8248AGQW)

PC8304

P_1.0VSUS_VIN_S

0.033UF/16V

12

1

2

3

4

5

GND1

VDDQ

23

GND4

VTTSNS

VTTREF

VTTGND

22

GND3

21

GND2

6

20

FB

VTT

19

7

VLDOIN

S3

18

8

BOOT

S5

9

17

TON

UGATE

16

10

PHASE

PGOOD

VID12VDD13CS14PGND15LGATE

11

nbs_r0603_h24_000s

GND

12

P_1.0VSUS_CS_10

P_1.0VSUS_VDDP_30

12

PC8307

12

RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA

1UF/25V

PR8310

OCP=13A

249KOhm

GND

+1.8VSUS [For PCH]

VSUS_ON30,57,83,88

1.8VSUS_PWRGD
P_1.8VSUS_FB_10 P_1.8VSUS_EN_10

@

12

PR8308
10KOhm

P_1.0VSUS_BST_30
P_1.0VSUS_HG_30
P_1.0VSUS_LX_30

AC_BAT_SYS

PJP8301

@

1MM_OPEN_5MIL

112

2

12

12

12

+

PCE8301

PCI8303

PCI8301

33UF/25V

10UF/25V

10UF/25V

@

h=4.5mm

nbs_c0805_h57_000s

nbs_c0805_h57_000s

GND

5

PQH8301

PEA16BA

D

4

P_1.0VSUS_BST_R_30

PR8315
0Ohm

nbs_r0603_h24_000s

12

P_1.0VSUS_LG_30

PR8313
10Ohm

12

P_1.0VSUS_LOSENS_10

PSL8303

21

0402

P_1.0VSUS_RESENS_10

@

PR8312 0Ohm

12

PD8302

@

BAT54CW

1

3

2

PU8301
APL5930CQBI-TRG

13

GND3

12

GND2

11

GND1

10

1

VCNTL

POK

2

9

FB

EN

3

8

VOUT1

VIN3

4

7

VOUT2

VIN2

5

VOUT36VIN1

GS

123

PC8302

5%

PR8302

0.1UF/25V

10KOhm

PL8302

@

12

PC8310
2200PF/50V

12

PR8307
10KOhm
@

1UH
Irat=12A

21

7x7x3mm

[HF]CYNTEC/PEUB063T-1R 0MS

12

22UF/6.3V

@

PC8317

PCO8306

12

1000PF/50V

nbs_c0603_h37_000s

5

PQL8302

PEA16BA

D

P_1.0VSUS_SNB_S

4

12

GS

PR8320

@

5%

1Ohm

123

@

12

+3VA_DSW

12

SHORT_PAD

@

12

nbs_r1206_h30_000s

PSP8302

GND

PSP8301

12

SHORT_PAD

@

PC8314
10UF/6.3V

12

nbs_c0603_h37_000s

12

PC8318

0.1UF/16V
@

GND

+5VSUS

12

PC8316
1UF/16V

480mil

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

22UF/6.3V

22UF/6.3V

PC8305

PC8320

12

12

12

<Variant Name>

Title :

Date: Sheet of

Size

C

22UF/6.3V

PC8303

Tuesday, June 20, 2017

c0805,nb_c0805_h57_hdi

Dept.:

Imax=7.45A

+1.0VO

PJP8303
3MM_OPEN_5MIL

112

2

330UF/2.5V

PCE8302

12

+

@

h=4.5mm

Project Name

X542UN/URV

PW_+1.0VSUS / +1.8VSUS

POWER

+1.0VSUS

@

Rev

R1.0

Engineer:

Power

102

83

f=420kHz

12

+3VSUS

12

PR8318

100KOhm

@

P_1.0VSUS_LX_30

BAT54CW

3

PR8303
30KOhm

PR8306 close to PU8302

GND

@

PD8301

1

2

P_1.0VSUS_FB_10
P_1.0VSUS_LDO_EN_10

12

P_1.0VSUS_EN_10
P_1.0VSUS_TON_10

1.0VSUS_PWRGD58

12

PC8313

0.1UF/25V

GND

P_1.0VSUS_FB_10

PR8306

820PF/50V

12

PC8315

178KOhm

12

PR8309

VFB=0.75V

12

3.48KOhm

12

12

PR8311
10KOhm

GND GND

Imax=1A

+1.8VSUS

1

PJP8302

1

1MM_OPEN_5MIL

2

@

2

+1.8VSUSO

PSP8303

@

SHORT_PAD

12

12

PC8309

PC8311

10UF/6.3V

10UF/6.3V
@

PT860* 請放置 PU8600旁;並請放置Trace 上!

1

P_1V2_HG_30

NB_TPC20T

1

P_1V2_LX_30

NB_TPC20T

1

P_1V2_LG_30

NB_TPC20T

1.2V_PWRGD58

VFB=0.75V

12

P_1V2_FB_10

Imax= 3A

OCP= 4.5A

+2.5V

2

PJP8602

2

1MM_SHORT_PIN

1

1

12

PC8619
10UF/6.3V
@
nbs_c0805_h57_000s

+1.2V / +VTT / +2.5V[For Memory]

P_1V2_FB_10
P_1V2_LDO_EN_10
P_1V2_EN_10
P_1V2_TON_10

PC8612
820PF/50V

12

PR8611

6.2KOhm

12

P_1V2_VSENS_10

12

12

PR8612

PC8611

10KOhm

0.1UF/25V

GND GND

@

2.5V_PWRGD58

+2.5VO

PR8623

21.5KOhm

12

12

PSP8602

@

SHORT_PAD

12

PC8616
10UF/6.3V

3A LDO REF=0.8V

nbs_c0805_h57_000s

+VTT

12

12

PC8601
10UF/6.3V

nbs_c0805_h37_000s

nbs_c0805_h37_000s

f=420kHz

PR8607
620KOhm

12

AC_BAT_SYS

PC8615

0.1UF/25V

12

GND

PR8601

2.2Ohm

nbs_r0603_h24_000s

PC8602
1UF/25V
nbs_c0603_h37_000s

+1.2V

P_1V2_VSENS_10

P_1V2_VTTREF_10

PU8600

GND

RT8248AGQW

21

1

2

3

4

5

GND1

VDDQ

23

GND4

VTTREF

VTTSNS

VTTGND

22

GND3

21

GND2

6

20

FB

VTT

7

19

+VTT

S3

VLDOIN

8

18

P_1V2_LDOIN_30

S5

BOOT

9

17

P_1V2_BST_30

TON

UGATE

10

16

P_1V2_HG_30

PGOOD

PHASE

P_1V2_LX_30

12

VID12VDD13CS14PGND15LGATE

11

+5VSUS

GND

12

P_1V2_CS_10

P_1V2_LG_30

P_1V2_VDD_30

5%

GND GND

12

12

RLIMIT = ILIMIT x RDS(O N) ×10 / 5μA

PR8603
649KOhm

OCP=13A

GND

GND

+2.5V

PU8601
APL5930CQBI-TRG

13

GND3

12

GND2

11

GND1

10

1

VCNTL

POK

9

2

2.5V_PWRGD

EN

FB

8

3

P_2.5V_FB_10 P_2.5V_RCEN_10

VIN3

VOUT1

4

7

VOUT2

VIN2

5

VOUT36VIN1

PC8606

@

1000PF/50V

12

12

PR8602
10KOhm

PC8600

10UF/6.3V

@

PSL8601

0603

12

PR8604

P_1V2_BST_R_30

PR8606

10KOhm

PC8603

0Ohm

5%

@

0.1UF/25V

nbs_r0603_h24_000s

12

12

nbs_c0603_h37_000s

PC8604
1UF/25V
nbs_c0603_h37_000s

12

PC8608

1000PF/50V

@

PR8609
10Ohm

12

P_1V2_LOSENS_10

PSL8602

SHORT_PAD

21

0402

@

PD8602
BAT54AW

3

12

PR8614

PC8620

10KOhm

0.1UF/25V

@

+3VA_DSW

+5VSUS

12

12

12

PC8618

PC8617

PR8622

10UF/6.3V

1UF/16V

10KOhm
@

5

D

4

GS

123

5

D

4

GS

123

PSP8601

12

@

1

2

12

AC_BAT_SYS

12

12

12

+

PCI8603

PCE8600

PCI8601

10UF/25V

33UF/25V

10UF/25V

nbs_c0805_h57_000s

nbs_c0805_h57_000s

h=4.5mm

GND

PQH8601

QM1830M3

PL8600
1UH
Irat=12A

21

7x7x3mm

[HE]CYNTEC/PEUB063T-1R0MS

12

PC8609

1000PF/50V
nbs_c0603_h37_000s
@

PQL8602

QM1830M3

P_1V2_SNB_S

12

PR8608

5%
1Ohm
nbs_r1206_h30_000s
@

@

PR8615
0Ohm @

12

PM_SUSC#

1.2V_ON

Imax= 10.06A

OCP= 13A

+1.2V

PJP8601

112

480mil

2

22UF/6.3V

PCO8606

c0805,nb_c0805_h57_hdi

PC8605

12

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

22UF/6.3V

22UF/6.3V

PC8607

12

12

<Core Design>

@

3MM_SHORT_PIN

c0805,nb_c0805_h57_hdi

330UF/2.5V

22UF/6.3V

PCE8601

12

PC8610

+

@

h=4.5mm

Project Name

X542UN/URV

Title :

PW_+1.2V/+VTT/+2.5V

Size

Dept.:

POWER

A2

Date: S heet

Tuesday, June 20, 2017

Rev

R1.0

Engineer:

Power

102

of

86

P_1V2_VO_S

SHORT_PAD

12

12

PSP8600

@

+1.2V

PR8630

PD8600

0Ohm

BAT54AW

12

1

PM_SUSC#25,30,57

3

2

12

PR8613
10KOhm

3

P_1V2_EN_10

12

PC8613

0.22UF/10V

PD8601

@

BAT54CW

2

1

PR8616
0Ohm

12

P_1V2_LDO_EN_10

12

PC8614

0.1UF/25V
@

PR8621

P_1V2_LX_30

178KOhm

1.2V_ON30

DDR_PG_CTRL4

PT8601

PT8602

PT8603

+5VSUS

+5VSUS_PWR

PSL8705 is close to PJP8702 0511

+3VA_DSW / +5VSUS [System Power]

P_5VSUS_VIN_S

12

PCI8701

10UF/25V

nbs_c0805_h57_000s

5

D

PQH8701

QM1830M3

4

GS

123

PL8702

3.3UH

Irat=6.5A

21

5

D

PQL8702

QM1830M3

4

GS

123

12

P_5VSUS_LG_30

PC8716

@

2200PF/50V

P_5VSUS_FB_10

12

P_12VSUS_CP1_20P_3VADSW_LG_30 +5VSUSO

PC8718

0.1UF/25V

12

12

P_12VSUS_CP2_20

PC8701

0.1UF/25V

請 check 整份線路 +12VSUS total 並聯對地電阻不得小於10kOhm

+5VSUS IOCP=14A

+3VA_DSW IOCP=13A

P_5VSUS_HG_30

P_5VSUS_LX_30

PR8702

12

36KOhm

PR8706

12

36KOhm

6

BAT54SDW

PD8701

PJP8701

@

1MM_OPEN_5MIL

AC_BAT_SYS

112

2

12

12

+

PCE8702

PCI8703

10UF/25V

33UF/25V

@

h=4.5mm

+5VSUSO

[HF]CYNTEC/PEUB063T-3R3MS

12

12

+

PCE8703
220UF/6.3V

SHORT_PAD

12

PSP8705

V-Chip
h=4.5mm

@

P_5VSUS_VSENS_10

12

12

12

PR8703

PC8709

10KOhm

0.1UF/25V

12

PR8701

6.49KOhm

@

21

PSL8701

+12VSUS

0603

PC8724

0.1UF/25V

nbs_c0603_h37_000s

nbs_c0805_h57_000s

7x7x3mm

PC8715
150PF/50V

@

P_12VSUS_CP4_20 P_12VSUS_CP3_20

Imax =9.81A

PJP8702

@

3MM_SHORT_PIN

112

2

PC8723

21

22UF/6.3V

0603

PSL8705 @

P_5VSUS_CS_10
P_5VSUS_FB_10

+3VAO
P_3VADSW_FB_10

P_3VADSW_CS_10

12

PC8706

0.1UF/25V

P_5VSUS_BST_R

12

PR8705

5%

0Ohm

nbs_r0603_h24_000s

P_5VSUS_HG_30

P_5VSUS_LX_30

P_12VSUS_SKIPSEL_20

P_5VSUS_EN_10

P_5VSUS_BST_30

PU8701

RT8249CGQW

16

17

18

19

20

21

EN1

UG1

GND122GND223GND3

15

1

BOOT1

LG1

CS1

PHASE1

SKIPSEL

14

2

P_5VSUS_LG_30

BYP1

FB1

3

13

+5VSUSO

LDO3

LDO5

4

12

+5VAO

FB2

VIN

5

11

CS2

LG2

P_3VADSW_LG_30

12

EN27PGOOD8PHASE29BOOT210UG2

SHORT_LAND

SHORT_LAND

SHORT_LAND

6

P_3VADSW_EN_10

PSL8702

0402

PSL8703

0402

PSL8704

0603

12

P_3VADSW_HG_30

P_3VADSW_LX_30

P_3VADSW_BST_30

PR8708

0Ohm

nbs_r0603_h24_000s

12

P_3VADSW_BST_R

12

@

21

@

21

@

21

PC8722

0.1UF/25V
nbs_c0603_h37_000s

5%

PC8714

0.1UF/25V

3VA_DSW_PWRGD 25,30,58

P_3VADSW_EN_10

P_5VSUS_EN_10

+3VA

PC8705

4.7UF/6.3V

P_3VADSW_HG_30

P_3VADSW_LX_30

P_3VADSW_LG_30

PS_ON 1

3VADSW_ON

3VSUS_ON

5VSUS_ON

1.35V_ON

SUSC_EC#

SUSB_EC#

12

PC8702

4.7UF/6.3V

3VADSW_ON30

5VSUS_ON30,57

+3VAO

1

2345

AC_BAT_SYS

P_3VADSW_VIN_S

5

D

4

GS

123

5

D

4

GS

123

12

PC8703

@

2200PF/50V

P_3VADSW_FB_10

Adaptor Mode (IMVP8)

S3

CS S4

DS3

-

-

1

1

-

-

1

1

-

-

1

1

-

-

1

1

-

-

1

1

-

-

1

1

-

0

-

PT8704

PT8708

TPC28T

TPC28T

1

@

+3VADSWO

+12VSUS

PT8701

TPC28T

+3VA_DSW

PT8712

PT8706

TPC28T

TPC28T

1

@

GND

PT8703

PT8702

TPC28T

TPC28T

1

@

GND GN D

+5VSUS

PT8709

TPC28T

+5VAO

nbs_c0805_h57_000s

PQH8704

QM1830M3

PQL8703

QM1830M3

S5 S5 with USB Charger+S0

-

1

-

1

-

0

-

1

-

0

-

0

-

0

1

@

+3VAO

1

@

+3VA

1

@

GND+5VSUSO

1

@

1

@

PT8713

1

PT8714

1

PT8715

1

12

PCI8705
10UF/25V

12

PT8705

PT8707

PT8711

PT8710

P_3VADSW_HG_30

P_3VADSW_LX_30

P_3VADSW_LG_30

12

nbs_c0805_h57_000s

PL8701

3.3UH
Irat=6.5A

7x7x3mm

[HF]CYNTEC/PEUB063T-3R3MS

PR8727

680KOhm

P_3VADSW_FBMLCC_10

PC8708

0.01UF/50V

1

1

0

1

0

0

0

TPC28T

1

TPC28T

1

TPC28T

1

TPC28T

1

PJP8703
1MM_OPEN_5MIL

PCI8707

10UF/25V

12

@

@

@

@

PT8716

1

P_5VSUS_HG_30

PT8717

1

P_5VSUS_LX_30

PT8718

1

P_5VSUS_LG_30

Close to PU8701

@

112

AC_BAT_SYS

2

21

+3VADSWO

12

PC8707

12

390PF/50V

SHORT_PAD

12

PSP8706

@

P_3VADSW_VSENS_10

12

12

12

PC8721

PR8704

150PF/50V

6.8KOhm

@

12

PR8707

10KOhm

Battery Mode (IMVP8)

CS

PS_ON

-

1

3VADSW_ON

1

-

110

3VSUS_ON

-

-5VSUS_ON

1.35V_ON
1S40

-

1

SUSC_EC#

-

1

SUSB_EC#

-

BOM

Project Name

X542UA/UV

Title :

PW_+3VA_DSW/+5VSUS

Size

Dept.:

POWER

Custom

Date: Sheet of

Tuesday, June 20, 2017

Imax = 9.5A

+3VA_DSW

PJP8704

@

3MM_SHORT_PIN

112

2

12

12

12

PCO8711

PC8727

PC8726

PC8725

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

@

PC8710

0.1UF/25V

S3

DS3

S5 S5 with USB Charger+S0

1-

1

0

1

-

000

0

0

-

0

0

1

-

110

0

0

-

0

0

­0

0

0

0

0

-

0

0

Rev

R2.0

Engineer:

Power

102

87

+3VA

PR8820
0Ohm

12

PS_ON32,57

VSUS_ON30,57,83

2017/01/11 X542UA_R1.1 # 04, PQ8809, PC8833 & PR8826 stuff

+1.8VSUS

+1.0VSUS

P_LS_VCCST_RC_10 P_LS_VCCIO_RC_10

P_LS_3VA_EC_ON_10

12

P_LS_3VSUS_ON_10

@

@

0.01UF/25V

0.01UF/25V

PR8819

PC8815

PC8826

0Ohm

12

12

+3VA_DSW

20151204 Modify

Imax = 0.1A

+1.8VS

PQ8809

QM1830M3

3

D

5

2
1

GS

12

4

PC8834

0.1UF/25V
@

+12VS

12

P_LS_1.8VS_RC_10

12

PR8826
100KOhm

PC8833

0.01UF/25V

Imax = 0.24A Imax = 3.44A

+VCCST

PQ8805A

S

1

8

D

7

D

12

9

D

G

PC8803

PEA32DY

0.1UF/25V

2

@

+12V

12

12

PR8803

PC8810

100KOhm

0.01UF/25V

Load Switch

Imax =0.1A

PSL8801

21

VOUT1_2

VOUT1_1

VOUT2_2

P_LS_5VS_RC_10

PQ8805B

PEA32DY

GND4
GND3

GND2

CT1

GND1

CT2

Imax = 5.1A

PC8822

0.01UF/25V

0603

17

@

16
15

14

PC8801

13

+3VA_ECO

470PF/50V

12

12

11

P_LS_3VA_EC_CT_10

10

12

9

P_LS_3VSUS_CT_10

@

PC8817

0.1UF/25V

Imax = 1.63A

12

PC8816

0.1UF/25V

+5VS

PQ8801

QM1830M3

PSL8803 @

3

D

0603

5

2

12

1

GS

PSL8803請放置PQ8801B旁

PC8823

4

0.1UF/25V
@

+12VS

12

12

PR8823

100KOhm

+VCCIO

+12VS

S

3

12

G

12

PC8809

PR8806

0.1UF/25V

4

@

12

100KOhm

61

PQ8813A

2

EM6K1-G-T2R

PQ8813B

EM6K1-G-T2R

PU8801

1

VIN1_1

2

VIN1_2

3

ON1

4

VBIAS

5

ON2

6

VIN2_1

7

VIN2_28VOUT2_1

SN1409049DPUR

+5VSUS

+1.0VSUS

6

D

5

D

10

D

PC8811

0.01UF/25V

+3VA_EC

+3VA_DSW

+3VSUS

+5VS_PWR

21

+12VS

12

PR8821

100KOhm

P_LS_VCCIO_R_RC_10

34

5

PM_SUSB# 25,30,58

Imax = 1.275A

+3V

PQ8811A

8

D

7

D

9

D

PEA32DY

P_LS_3V_RC_10 P_LS_3VS_RC_10

PC8820

0.01UF/25V

+3VA_DSW

S

1

12

G

PC8805

0.1UF/25V

2

@

+12V

12

12

PR8816

100KOhm

+3VA_DSW

PD8801

BAT54CW

3

SUSC_EC#30,52,57,68,88

12

PR8824

0Ohm

+3VSUS+VCCST

12

PR8815

PR8801

1KOhm

VCCST_PWRGD 58 VCCIO_PWRGD 58

100KOhm

12

61

PQ8803A

2

EM6K1-G-T2R

C

PQ8802
PMBS3904

B

P_LS_VCCST_PG_10

12

PC8806

4.7UF/6.3V

PullhighonP.58

P_LS_VCCST_PG#_10

12

PC8802

0.1UF/25V

@

E

Imax = 5.5A

+3VS

PQ8811B

6

S

3

D

5

D

12

10

D

G

PC8828

PEA32DY

0.1UF/25V

4

@

+12VS

12

12

PR8804

PC8827

100KOhm

0.01UF/25V

PR8825
10Ohm

12

12

@

PC8832

1

1UF/6.3V

+1.2V

C1

2

A1

B1ENB2

P_VCCPLL_OC_EN

12

PC8831

0.01UF/25V

PR8807

PR8805

100KOhm

1KOhm

12

PQ8812
PMBS3904

B

P_LS_VCCIO_PG_10

12

PC8825

4.7UF/6.3V

PU8804

VDD

VIN

APL3527GHAI-TRG

+3VSUS+VCCIO

+3VSUS+3VSUS +3VA_DSW

12

12

12

PR8809

PR8813

PR8802

100KOhm

100KOhm

100KOhm

P_3VSUS_PWRGD 58

34

5

PQ8804B

P_LS_3VSUS_PG#_10

EM6K1-G-T2R

61

2

P_LS_3VSUS_PG_10

PQ8804A

12

PC8819

EM6K1-G-T2R

0.1UF/25V

+VCCPLL_OC

A2

VOUT

12

C2

SS

PC8830

P_VCCPLL_OC_SS_10

0.1UF/25V

GND

12

PC8808

0.1UF/25V

@

12

34

PQ8803B

5

EM6K1-G-T2R

C

PullhighonP.58

P_LS_VCCIO_PG#_10

12

PC8804

0.1UF/25V

@

E

PQ8810
EMD62

TR2

+12VSUS

4

R2

R1

P_LS_12V_EN_10

R1

R2

TR1

6

SUSC_EC#30,52,57,68,88 SUSB_EC#30,57,77

20mil20mil

+12V

12

235

PR8812

P_LS_12VS_EN_10

1MOhm

1

20mil20mil

4

R2

R1

235

R1

R2

TR1

1

6

+12VS

12

PR8810

1MOhm

BOM

Project Name

X542UN/URV

Title :

PW_LOAD_SWITCH

Size

Dept.:

POWER

Custom

Date: Sheet

Tuesday, June 20, 2017

Rev

R1.0

Engineer:

Power

102

of

88

PQ8807
EMD62

TR2

+12VSUS

A/D_DOCK_IN

PQ8901

QM3056M6AC

200mil

D

GS

PC8905
1000PF/50V

12

P_CHG_ACMOS_G_20

12

PR8905

1MOhm

A/D_DOCK_IN

12

PR8929
127KOhm

AD : 17.8V

P_CHG_ACDET_1090

P_IMVP8_PSYS_INFO80

12

PC8917
47PF/50V

SMB0_DAT30,60

SMB0_CLK30,60

P_CHG_CMPIN_1090

P_CHG_CMPOUT_1090

12

PR8909
100KOhm
@

A/D_MAX_POWER30 MB_MAX_POWER30

PR8916
0Ohm
5%

12

<=40W <=120W

>=120W

PR8938

25m

12

12

PC8921
1UF/25V
nbs_c0603_h37_000s

12

PC8920

2.2UF/16V

12

12

10m 5m

EPC NB G

AC_BAT_SYS

5

D

4

GS

123

PR8927
10KOhm
@

12

P_CHG_LX_30

12

PC8928

0.047UF/50V

PR8918

nbs_c0603_h37_000s

0Ohm

5

D

P_CHG_BST_R_30

3

P_CHG_REGN_20

4

GS

P_CHG_LG_30

PD8901
BAT54CW

123

PR8908
10KOhm
@

1

2

12

+3VA

12

PC8913

0.1UF/25V

PC8901

0.1UF/25V

PC8929

0.1UF/25V

+5VS_PWR

PR8917
150KOHM

12

PR8901
0Ohm

2

NEW_PWRLIMIT#_CPU

12

P_CHG_PROCHOT#_10

PQH8901

QM1830M3

PQL8901

QM1830M3

PR8920
150KOHM

12

61

PQ8908A
EM6K1-G-T2R

AC_OK

12

nbs_c0805_h57_000s

[HE]CYNTEC/PEUB063T-3R3MS

12

PC8925

1000PF/50V

nbs_c0603_h37_000s

P_CHG_SNB_20

12

PR8910

1Ohm

nbs_r1206_h30_000s

5%

2

1

PCI8901
10UF/25V

PL8901

3.3UH
Irat=6.5A

21

PD8902
BAT54CW

PR8913
1MOhm

@

3

5

200mil

12

PCI8902
10UF/25V
@

nbs_c0805_h57_000s

@

P_PL_AC_THROTTLE_10

12

34

for shipping mode

12

P_CHG_BATDRV_20

AC_BAT_SYS

12

+

PCE8901
33UF/25V

h=4.5mm

P_CHG_BATSRC_20

P_CHG_RSENS_SHAPE

PR8926
10mOHM

nbs_r0612_h28_000s

12

SHORT_PAD

SHORT_PAD

12

12

PSP8902

PSP8901

@

@

12

PC8914
2200PF/50V
@

EM6K1-G-T2R

12

PQ8905B

PC8908
270PF/50V

P_PL_AC_THROTTLE_GPU_10

PQ8902
QM0930M3

3

123

PSL8901 @

0402

0402

PSL8903 @

D

5

2

P_CHG_ACMOS_S_20

1

GS

12

PR8937

4.7MOhm

4

12

PC8922

0.047UF/50V

nbs_c0603_h37_000s

12

PR8934

4.02KOHM

PR8936

4.02KOHM

12

PR8911

P_CHG_REGN_20

12

100KOhm

PSL8902

21

AC_IN_OC#30,76

0402

@

P_CHG_ACDET_10

12

PC8912

PR8924

0.1UF/25V

12

+3VACC+3VACC

12

PR8914
100KOhm

PR8903

93.1KOhm

12

PC8907
47PF/50V

BAT1_IN_OC#30

PR8828 SET
x : 0V =>0 OHM
30W: 0.4V =>14k
40W: 0.8V =>32k
45W: 1.2V =>57.6k
65W: 1.6V =>93.1k
75W: 2.0V =>150k
90W: 2.4V =>270k
120W: 2.8V =>560k
x : 3.3V =>@

P_CHG_IDCHG_10
P_CHG_PMON_10
P_CHG_PROCHOT#_10
P_CHG_SDA_10
P_CHG_SCL_10

+3VS

20KOhm

21

21

PQ8905A

12

P_CHG_PATH_19V_SHAPE

61

PR8938
10mOHM
nbs_r0612_h28_000s

12

PSP8803.PSPS8804
請從PR8938內側中間拉線。

@

@

SHORT_PAD

SHORT_PAD

12

12

PSP8903

PSP8904

12

PC8909

0.1UF/25V

PC8903

0.1UF/25V

PR8928

12

12

AC_OK

0Ohm

12

PC8915

12

0.1UF/25V

PC8910

0.1UF/25V

2

@

EM6K1-G-T2R

P_CHG_ACN_10

P_CHG_CMSRC_20

P_CHG_ACDRV_20

P_CHG_ACOK_10

P_CHG_ACP_10

P_CHG_IADP_10

PSL8904

0402

A/D_DOCK_IN

21

@

12

PR8933

10KOhm

BAT

P_CHG_VCC_30

PU8901

1

2

3

4

5

6

7

ACP

ACN

IADP

ACOK

33

ACDET

ACDRV

CMSRC

GND6

32

GND5

31

GND4

30

GND3

29

GND2

28

8

VCC

IDCHG

9

27

P_CHG_VCC_30

PMON

PHASE

10

26

P_CHG_LX_30

PROCHOT#

HIDRV

11

25

P_CHG_HG_30

SDA

BTST

12

24

P_CHG_BST_30

SCL

REGN

13

23

P_CHG_REGN_20

CMPIN

LODRV

14

22

P_CHG_LG_30

CMPOUT

GND1

BATPRES#16TB_STAT#17BATSRC18BATDRV19SRN20SRP21ILIM

SN2867RUYR

15

12

P_CHG_ILIM_10

PR8921

12

180KOhm

12

PC8926

PR8919

0.1UF/25V

100KOhm

@

I limit : Charge 6 A
DisCharge 24A

P_CHG_SRN_10

P_CHG_BATDRV_20

nbs_r0603_h39_000s

P_CHG_TB_STAT#_10

P_CHG_BATPRES#_10

P_CHG_BATSRC_20

P_CHG_SRP_10

12

PR893110OHM

nbs_r0603_h39_000s

12

PR891210OHM

P_CHG_VCC_30

PD8903

PR8932

BAT54CW

10Ohm 5%

nbs_r1206_h28_000s

2

3

12

1

AC_BAT_SYS

240mil

PR8940

20KOhm

@

5

D

QM0930M3

PQ8903

4

GS

PR8923

123

4.02KOHM

12

P_CHG_BATDRV_G_20

12

PC8918

0.01UF/50V

PR8906
10OHM
nbs_r0603_h39_000s

12

240mil

10UF/25V

10UF/25V

12

PC8906

PC8916

12

12

+

PCE8904
15UF/25V
@

h=2.1mm

PR8935
0Ohm
@

12

34

PQ8904B

5

EM6K1-G-T2R

PR8942
100Ohm

12

34

PQ8908B

5

EM6K1-G-T2R

PR8922
1MOhm
@

12

dGPU_PD# ---> GPIO12

PR8925
0Ohm

12

61

PQ8904A

2

EM6K1-G-T2R

PC8924

12

PWRLIMIT_EC# 30

PWRLIMIT#_CPU 8

dGPU_PD# 76

10UF/25V

10UF/25V

PC8919

12

PJP8901

@

3MM_OPEN_5MIL

2

112

10UF/25V

PC8923

12

@

BOM

Title :

PW_CHARGER

Size

Dept.:

A2

Date: Sheet

Tuesday, June 20, 2017

BAT_CONBAT

Project Name

Rev

R1.0

X542UN/URV

POWER

Engineer:

Power

102

of

89

Address Selection Table

Address

0x7E 0x7C 0x7A 0x78 0x76 0x74 0x72 0x70

10k 1.5k 2k 3.6k 3.9k 4.3k 5.1k 6k

PR9001

8.2k 6.2k 6.8k 4.7k 3.6k 2.7kOpen 2k

PR9002

PTR9001 place near PQ8901
Close to AC FET

P_TEMPSENS_VCC_30

PR9003

PTR9001

12KOHM

100kOhm

12

PC9000

0.1UF/25V

1.0 ~ 3.56V

12

PTR9002 place near BAT Connect

PR9004

PTR9002

105C @ 5k
40C @ 51k

12KOHM

100kOhm

12

PC9001

0.1UF/25V

1.0 ~ 3.56V

12

GND

PTR9004 place near PL8901 or PQL8901(CHG page)

PR9005

PTR9004

12KOHM

100kOhm

105C @ 5k
40C @ 51k

12

PC9002

0.1UF/25V

1.0 ~ 3.56V

12

GND

Register Address

0x03 0x04 0x050x00 0x01 0x02

RRR

Sensed temp. data

12

PC9003

1UF/16V
nbs_c0603_h37_000s

GND

PC9005

47PF/50V
@

12

PSL9001

21

0402

PSL9002
@

21

0402

@

12

PC9004
47PF/50V

@

0x06

R

bit 4 = 0
bit 5 = 0

bit 6 = 0

When ALERT#
assert

GND

SMB1_DAT 28,30,78

SMB1_CLK 28,30,78

Check 其他頁是否有
pull high 到 3.3V

GND

Address

R/W

WWW

Temp. alert

Function

threshold setting

PR9000

12

0Ohm

VGA_ALERT_P# 76

5%@

PR9001
10KOhm

ALERT# pull low if sensed temp .
is higher than setting

12

12

P_TEMPSENS_VCC_30

1%

PR9002
2KOHM

12

@

GNDGND

PU9000

1

8

ALT/ADD

SDA

2

7

P_TEMPSENS_ADDR_10

P_TEMPSENS_TM3_10

12

P_TEMPSENS_TM2_10

P_TEMPSENS_TM1_10

1%

12

1%

P_TEMPSENS_SDA_30

TM3

SCL

3

6

P_TEMPSENS_SCL_30

TM2

GND

4

5

TM1

VCC5

P_TEMPSENS_VCC_30

UP1905AMA8

GND

+5VSUS_PWR

12

PR9006 2.2Ohm 5%

nbs_r0603_h24_000s

DC Jack Thermal Latch

PSL9003

SHORT_LAND

21

0402

P_LATCH_OUT_10

PQ9001B

EM6K1-G-T2R

P_LATCH_ACDET_10

PR9013

20KOhm

12

34

GND

P_CHG_REGN_20

12

5

P_LATCH_OUT#_10

P_CHG_ACDET_10 89

P_CHG_REGN_20

12

PR9017

PR9014

10KOhm

100KOhm

EM6K1-G-T2R

P_CHG_CMPIN_1089

PQ9001A

61

2

P_CHG_CMPOUT_10 89

GND

PR9018

12

10KOhm

PTR9003 place near DC JACK

P_CHG_REGN_20

PTR9003

100kOhm

12

12

PR9022

PC9008

7.32KOhm

1UF/25V

12

GND

<Variant Name>

Project Name

X542UN/URV

Title :

PW_PROTECTION

Size

Dept.:

POWER

A3

Date: Sheet

Tuesday, June 20, 2017

Rev

R1.0

Engineer:

Power

102

of

90

PWM-VID Spec

Config A

39

R1 (kR) 3920

R2 (kR)

39

R3 (kR)

1.5

R4 (kR)

30

R5 (kR)

1.5

C (nF)

1.5

For N17
Boot Voltage = 0.8V

P_NVVDD_REFIN_10

PT910* 請放置 PU9101旁;並請放置Trace 上!

1

1

P_NVVDD_LX1_30

1

P_NVVDD_LG1_30

Config B Config C

20 30277.5

230

18

24

0

3

2.7

1.8

R3

PSL9102

21

0402

@/VGA

R4

R5

PT9101
NB_TPC20T

@/VGA

P_NVVDD_HG2_30P_NVVDD_HG1_30

PT9102
NB_TPC20T

@/VGA

P_NVVDD_LX2_30

PT9103
NB_TPC20T

@/VGA

P_NVVDD_LG2_30

P_NVVDD_REFIN_R_10

12

PR9122

4.32KOhm

/VGA

12

PR9104

16.5KOhm

/VGA

12

PR9102

0Ohm

/VGA

P_NVVDD_FBRTN_10

1

1

1

Config D

6.2

1.74

5.6

5%

PT9104
NB_TPC20T

@/VGA

PT9105
NB_TPC20T

@/VGA

PT9306
NB_TPC20T

@/VGA

NVDD_PSI76

NVDD_PWM_VID76

R2

12

C

12

PC9103
1500PF/50V

/VGA

12

/VGA

PSP9102放在PCE9102 or PCE9101 上

12

PC9125
4700PF/50V

@/VGA

PSP9101放在PCE9102 or PCE9101 上

PTR9110 place near PQL9101
Close to +NVDD L side

GPU_PWRON_3.3VSG = NVDD_PWR_EN

12

N16S-GTR = 3V

N17S-G1 = 1.8V

+VDD_AON

12

PR9118
10KOhm

/VGA

PSL9106

21

0402

@/VGA

PSL9105

21

0402

@/VGA

PR9109

6.19KOhm

12

/VGA

R1

PR9112

20.5KOhm

/VGA

PC9122

1UF/6.3V

PR9107

100Ohm /VGA

PSL9103

0402

@/VGA

PSL9101

0402

@/VGA

PR9105

100Ohm
/VGA

PTR9110

100kOhm

P_NVVDD_VIN_S

PR9114

2.2Ohm
/VGA

PC9114
1UF/25V
/VGA

12

21

21

12

12

12

PR9116

620KOhm 1%

12

/VGA

12

PSP9102

12

SHORT_PAD

@/VGA

12

PC9109
4700PF/50V

PC9109放在GPU端

PSP9101

12

SHORT_PAD

@/VGA

At Page 78

P_GPU_VRM_TEMP_SENSOR_10 78

12

PR9106

11KOhm
@/VGA

12

PR9108
20KOhm
@/VGA

+NVVDD

NVDD_VCCSENSE 70

@/VGA

NVDD_VSSSENSE 70

P_NVVDD_FB_10

P_NVVDD_REFADJ_10

P_NVVDD_REFIN_10
P_NVVDD_VREF_10
P_NVVDD_OCS_10

P_NVVDD_FBRTN_10

12

PR9128

200KOhm

RT
OCSET
OCP=75A

PR9124
0Ohm

/VGA

12

12

PR9123

PC9110

3.3KOhm

0.015UF/16V
/VGA

/VGA

PD9101

+5VS_PWR

1

3

P_NVVDD_BST2_30

2

BAT54AW @/VGA

PR9126

PC9121

P_NVVDD_BST1_RC_30

0Ohm

5%

0.1UF/25V

12

12

nbs_r0603_h24_000s

nbs_c0603_h37_000s

/VGA

/VGA

P_NVVDD_HG1_30

P_NVVDD_PSI_10

P_NVVDD_VID_10

P_NVVDD_BST1_30

P_NVVDD_EN_10

PU9101

RT8820AGQW

1

2

3EN4

5

/VGA

PSI

VID

23

GND3

22

BOOT1

GND2

UGATE1

21

GND1

6

20

REFADJ

PHASE1

7

19

P_NVVDD_LX1_30

REFIN

LGATE1

18

8

P_NVVDD_LG1_30

PVCC

VREF

17

9

P_NVVDD_PVCC_20

LGATE2

TON

10

16

P_NVVDD_LG2_30

RGND

PHASE2

P_NVVDD_LX2_30

VSNS12OCSET/SS13PGOOD14UGATE215BOOT2

11

P_NVVDD_PG_10

P_NVVDD_HG2_30

P_NVVDD_BST2_30

P_NVVDD_COMP_10

P_NVVDD_BST2_RC_30

PR9127

PC9117

0Ohm

5%

0.1UF/25V

12

12

nbs_r0603_h24_000s

nbs_c0603_h37_000s

/VGA

/VGA

12

N16S-GTR = 3V

PC9119

N17S-G1 = 1.8V

4700PF/25V

@/VGA

+VDD_AON

12

12

PR9115

PC9120

10KOhm
/VGA

5600PF/25V
@/VGA

PSL9104

P_NVVDD_CMP_10

0402

12

@/VGA
PR9111

33KOhm
@/VGA

+NVVDD

12

12

PC9137

PC9136

22UF/6.3V

22UF/6.3V

/VGA

@/VGA

nbs_c0805_h57_000s

nbs_c0805_h57_000s

+NVVDD

12

12

PC9142

PC9141

22UF/6.3V

22UF/6.3V

@/VGA

@/VGA

nbs_c0805_h57_000s

nbs_c0805_h57_000s

NVDD_PWR_EN 77

5%

21

12

12

PC9138

22UF/6.3V
@/VGA

nbs_c0805_h57_000s

PC9143

22UF/6.3V
@/VGA

nbs_c0805_h57_000s

3

BAT54AW

+5VS_PWR

NVDD_PWRGD 77

nbs_r0603_h24_000s

nbs_c0603_h37_000s

2

1

PD9102

/VGA

12

12

12

nbs_c0805_h57_000s

12

nbs_c0805_h57_000s

nbs_r0603_h24_000s

PR9103

2.2Ohm

5% /VGA

PC9123
1UF/25V

/VGA

12

nbs_r0603_h24_000s

UPI
OCSET
OCP=60A

PC9139

22UF/6.3V
@/VGA

PC9144

22UF/6.3V
/VGA

PR9119

0Ohm

12

/VGA

27.4kOHM

PR9125
0Ohm

/VGA

P_NVVDD_LX2_30

P_NVVDD_LG2_30

PR9120

27.4kOHM

@/VGA

GPU_PWR_EN 69,77,93

5%

P_NVVDD_HG1_R_30P_NVVDD_HG1_30

12

PR9121

@/VGA

UPI
OCSET
OCP=60A

5%

P_NVVDD_HG2_R_30

12

12

PC9140

22UF/6.3V
@/VGA

nbs_c0805_h57_000s

12

PC9145

22UF/6.3V
/VGA

nbs_c0805_h57_000s

P_NVVDD_LG1_30

PC9113

1000PF/50V

@/VGA

P_NVVDD_VIN_S

12

PCI9102
10UF/25V

/VGA

nbs_c0805_h57_000s

3

PQH9101

NTMFS4C09NBT1G

D

2

GS

12

PR9110

1

/VGA

10KOhm

@/VGA

3

PQL9101

NTMFS4C06NBT1G

D

2

GS

12

1

/VGA

P_NVVDD_VIN_S

12

PCI9103
10UF/25V
/VGA

nbs_c0805_h57_000s

3

PQH9103

NTMFS4C09NBT1G

D

2

GS

12

1

/VGA

PR9101

10KOhm
@/VGA

3

PQL9103

NTMFS4C06NBT1G

D

2

GS

12

1

/VGA

PC9116

1000PF/50V
@/VGA

12

12

+

PCE9100

PCI9101

22UF/25V

10UF/25V

/VGA

@/VGA

nbs_cplsmd_2p_001

nbs_c0805_h57_000s

h=4.6mm

12

PC9104
1000PF/50V

nbs_c0603_h37_000s
@/VGA

P_NVVDD_SNB1_S

12

PR9117
1Ohm

nbs_r1206_h30_000s
5%

@/VGA

12

PCI9104
10UF/25V
@/VGA

nbs_c0805_h57_000s

12

PC9111
1000PF/50V

nbs_c0603_h37_000s
@/VGA

P_NVVDD_SNB2_S

12

PR9113
1Ohm

nbs_r1206_h30_000s
@/VGA5%

BOM

Title :

Size

Dept.:

Custom

Date: Sheet

Tuesday, June 20, 2017

PJP9100
3MM_OPEN_5MIL

2

@/VGA

[HE]CYNTEC/PEUE063T-R36MS

PL9101

0.36UH

Irat=25A /V GA

[HE]CYNTEC/PEUE063T-R36MS

PW_NVVDD (1)

POWER

112

PL9100

0.36UH

Irat=25A /VGA

AC_BAT_SYS

+NVVDD

21

12

+

PCE9102
330UF/2.5V

/VGA

h=4.5mm

Imax=51A

+NVVDD

21

12

+

PCE9103
330UF/2.5V
/VGA

h=4.5mm

Project Name

Rev

R1.0X542UN/URV

Engineer:

Power

102

of

91

GPU_PWR_EN69,77,91

DGPU_FBVDDQ_EN77

+FBVDDQ_PWRGD24,77

PT930* 請放置 PU9301旁;並請放置Trace 上!

P_FBVDDQ_HG_30

P_FBVDDQ_LX_30

P_FBVDDQ_LG_30

P_FBVDDQ_VTTREF_10

2

3

4

5

GND1

VDDQ

VTTREF

VTTSNS

VID12VDD13CS14PGND15LGATE

11

P_FBVDDQ_VDD_20

P_FBVDDQ_CS_10

P_FBVDDQ_VDDP_20

12

/VGA

R

12.4K

10K

1

23

GND4

VTTGND

22

GND3

21

GND2

20

VTT

19

VLDOIN

18

BOOT

17

P_FBVDDQ_BST_30

UGATE

16

P_FBVDDQ_HG_30

PHASE

P_FBVDDQ_LG_30

PR9309

RLIMIT = ILIMIT x RDS(ON) ×10 / 5μA

649KOhm

OCP=13A

V

1.35V

1.5V

S3 And S5 Truth Table

State Pin7(S3) Pin8(S5)

S0

11

S3

0

S4/S5

00OnOFF

P_FBVDDQ_DHR_30

PR9317

PC9312

0Ohm

0.1UF/25V

nbs_r0603_h24_000s

nbs_c0603_h37_000s

12

12

/VGA

/VGA

PC9313

/VGA

820PF/50V

12

PR9303
10KOhm

12

/VGA

12

12

PR9302

PC9317

12.4KOhm

0.1UF/25V

/VGA

@/VGA

VTTREF

VDDQ

On

1

4

GS

123

12

PR9312
10KOhm
@/VGA

4

GS

123

PC9301

@/VGA

1000PF/50V

12

PR9314
10Ohm

12

/VGA

PSL9302

0402

@/VGA

VTT

On

On

OFF(Hi-Z)

On

OFF

OFF

(Discharge)

(Discharge)(Discharge)

+FBVDDQ
[For FRAM]

AC_BAT_SYS

5

PQH9301

QM1830M3

D

/VGA

5

PQL9302

QM1830M3

D

/VGA

21

P_FBVDDQ_RESENS_10P_FBVDDQ_VSENS_10P_FBVDDQ_LX_30

AC_BAT_SYS

12

12

PCI9301

PCI9303

10UF/25V

10UF/25V

/VGA

/VGA

h=4.5mm

Imax = 12A

OCP = 13A

+FBVDDQ

112

2

@/VGA

PJP9303

c0805,nb_c0805_h57_hdi

3MM_OPEN_5MIL

22UF/6.3V

PC9315

12

/VGA

Project Name

Rev

R1.0

X542UN/URV

Title :

PW_+FBVDDQ

Size

Custom

Tuesday, June 20, 2017

Power

Dept.:

POWER

Engineer:

102

of

93

12

P_FBVDDQ_SNB_S

12

PC9311
1000PF/50V
nbs_c0603_h37_000s

PR9305
1Ohm
nbs_r1206_h30_000s

[HF]CYNTEC/PEUB063T-1R0MS

@/VGA

@/VGA

5%

P_FBVDDQ_LOSENS_10

PL9301
1UH

/VGAIrat=12A

21

+FBVDDQOP_FBVDDQ_LX_30

7x7x3mm

SHORT_PAD

PSP9301

@/VGA

SHORT_PAD

12

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

c0805,nb_c0805_h57_hdi

22UF/6.3V

22UF/6.3V

22UF/6.3V

PCO9306

PC9309

PC9318

12

12

12

330UF/2.5V

PCE9301

12

+

12

PSP9302

@/VGA

/VGA

/VGA

/VGA

@/VGA

h=4.5mm

+FBVDDQ

<Variant Name>

Date: Sheet

PD9301

1

PR9301

12

3

2

2KOhm

/VGA

BAT54AW

/VGA

PR9306

12

P_FBVDDQ_EN_10

10KOhm

12

/VGA

PC9303

0.1UF/25V

/VGA

VTTREF

12

PC9308

0.1UF/25V
/VGA

P_FBVDDQ_VSENS_10

PU9301

RT8248AGQW

f=308kHz

PR9307
820KOhm

12

/VGA

PR9304

178KOhm

/VGA

/VGA

6

FB

7

P_FBVDDQ_FB_10

S3

8

S5

9

P_FBVDDQ_EN_10

TON

10

P_FBVDDQ_TON_10AC_BAT_SYS

PGOOD

+5VSUS

12

PR9315

2.2Ohm

5%

/VGA

nbs_r0603_h24_000s

12

PC9310
1UF/25V
/VGA

nbs_c0603_h37_000s

12

FB=0.75V

PR9302

PT9301

1

NB_TPC20T
@/VGA

PT9302

1

NB_TPC20T
@/VGA

PT9303

1

NB_TPC20T
@/VGA

Controller

Converter

LDO

MOSFET

AC_BAT_SYS

A/D_DOCK_IN

P0A03BEA

P0A03BEA

5VSUS_ON

SN2867RUYR

P0A03BEA

DCDRV

ACDRV

H-MOS
PEA28BA*1

SMB0_DAT

L-MOS
PEA28BA*1

SMB0_CLK

ACOK

+3VA

+3VAO

RT8249C

+5VO

H-MOS
PEA28BA*1
L-MOS
PEA28BA*1

SN1409049-1

PS_ON

PEA32DY-1

PS_ON

PEA32DY-2

SUSB#_EC

+3VA_DSW

SN1409049-2

VSUS_ON

PEA32DY-1

H-MOS
PEA28BA*1
L-MOS

3VADSW_ON

PEA28BA*1

NCP81206

H-MOS
NTMFS4C09*1
L-MOS
NTMFS4C06*1

+5VS_PWR

H-MOS
NTMFS4C09*1
L-MOS

VCCIN_EN

NTMFS4C06*1

VR_SVID_ALERT#

VR_SVID_DATA

H-MOS
PEA28BA*1
L-MOS
PEA28BA*1

VR_SVID_CLK

RT8248A

+5VSUS

H-MOS
PEA16BA*1
L-MOS
PEA16BA*1

5VSUS_Delay

RT8248A

+5VSUS

H-MOS
PEA16BA*1
L-MOS
PEA16BA*1

1.35V_ON

DDR_PG_CTRL

RT8815A

+5VS_PWR

H-MOS
NTMFS4C09*1
L-MOS
NTMFS4C06*1

NVDD_PWR_EN

NVDD_PWM_VID

SUSC#_EC

PEA32DY-2

SUSB#_EC

UP0132A

VSUS_ON

3VA_DSW_PWRGD

IMVP8_PWRGD

+1.05VO

+1.35VO

1.35V_PWRGD

NVDD_PWRGD

PUMD12

SUSC#_EC

PUMD12

SUSB#_EC

PUMD12

MPHY_PWREN

PEA32DY-1

SUSC#_EC

PEA32DY-2

SUSB#_EC

AC_BAT_SYS

BAT

+3VA

+3VA_EC

+5VSUS

Imax =10.3A

+5V

+5VS

+5VS_PWR

+3VA_DSW

Imax =8.3A

+3VSUS

+3V

+3VS

+1.8VSUSO

+1.8VSUS

1.8VSUS_PWRGD

+12VSUS

+12V

+12VS

+12VDX

+VCCCORE

Imax = 31A

+VCCGT

Imax = 29A

+VCCSA

Imax = 5.1A

Imax =12A

+1.0VSUS

+VCCST

+VCCIO

Imax = 13A

+1.2V

VTT

Imax = 51A

+NVVDD

BOM

Project Name

Rev

R1.0

X542UN/URV

Title :

PW_FLOWCHART

Size

Dept.:

POWER

Engineer:

Power

Custom

102

Date: Sheet

of

99

Tuesday, June 20, 2017

AC-IN Mode

(to EC)

(EC to power)

+3VA_DSW/+5VSUS/+12VSUS

(PCH to EC)

4

(power to EC)

(EC to PCH)

(EC to PCH)

(to EC)

(EC to PCH)

(PCH to EC)

(PCH to EC)

12

(PCH to EC)

(EC to power)

(EC to power)

+1.2V/+2.5V/+3V/+12V/+VCCST

(EC to power)

+1.8VS/+3VS/+5VS/+12VS
+VCCIO/+VccSTG

(power to EC)

16

(EC to PCH)

(PCH to EC)

(PCH to EC)

+3VA/+3VA_EC

1

2

5VSUS_ON

3

3VA_DSW_ON

ME_SusPwrDnAck_R

3VSUS_PWRGD

5

PM_RSMRST#

6

AC_PRESENT

7

8

PM_PWRBTN#

9

PM_SLP_A#

10

11

PM_SUSB#/SLP_LAN#

(PCH to power)

ME_SLP_M_EC#

13

14

VccST/VccPLL

IMVP8_PWRGD

15

ALL_SYSTEM_PWRGD

PM_PWROK_PCH

17

PCH_SUS_STAT#

PLT_RST#

18

THERMTRIP#

PM_SUSC#

EC_RST#

PWR_SW#

SUSC_EC#

SUSB_EC#

+VCCGT

X541UV/UA Power-On Sequence
Timing Diagram Rev.0.1

(pull up to +3VSUS)

T0=20ms

(spec.>=10ms)

T1<200ms(check)

(falling edge)

T2=50ms

+VCCSA

BOM

Project Name

Rev

Title :

Power On Timing

Size

Dept.:

SS

C

Date: Sheet of

Tuesday, June 20, 2017

R1.0X542UN/URV

Engineer:

<OrgAddr1>

102

100

DC-IN Mode

(to EC)

(EC to power)

+3VA_DSW/+5VSUS/+12VSUS

(PCH to EC)

4

(power to EC)

(EC to PCH)

(EC to PCH)

(to EC)

(EC to PCH)

(PCH to EC)

(PCH to EC)

12

(PCH to EC)

(EC to power)

(EC to power)

+1.2V/+2.5V/+3V/+12V/+VCCST

(EC to power)

+1.8VS/+3VS/+5VS/+12VS
+VCCIO/+VccSTG

(power to EC)

16

(EC to PCH)

(PCH to EC)

(PCH to EC)

+3VA/+3VA_EC

1

2

5VSUS_ON

3

3VA_DSW_ON

ME_SusPwrDnAck_R

3VSUS_PWRGD

5

PM_RSMRST#

6

AC_PRESENT

7

8

PM_PWRBTN#

9

PM_SLP_A#

10

11

PM_SUSB#/SLP_LAN#

(PCH to power)

ME_SLP_M_EC#

13

14

VccST/VccPLL

IMVP8_PWRGD

15

ALL_SYSTEM_PWRGD

PM_PWROK_PCH

17

PCH_SUS_STAT#

PLT_RST#

18

THERMTRIP#

PM_SUSC#

EC_RST#

PWR_SW#

SUSC_EC#

SUSB_EC#

+VCCSA

+VCCGT

(pull up to +3VSUS)

T0=20ms

(falling edge)

(spec.>=10ms)

T1<200ms(check)

T2=50ms

X541UV/UA Power-On Sequence
Timing Diagram Rev.0.1

BOM

Title :

Power On Timing

Size

Dept.:

SS

C

Date: Sheet

Tuesday, June 20, 2017

Project Name

Rev

R1.0X542UN/URV

Engineer:

<OrgAddr1>

102

of

101

Rev Date Description

R 1.0 2016/10/ 05 0 1.P09. Add 24MHz parts fo r KBL-R U42, X0901 circuit Option: /U42

02.P24. 24MHz parts for KBL-R U22, X2401 circuit Option: /U22 & Del R2425/R2409

03.P24. Del GCLK circuit R2427/R2428/R2429

04.P24. X2402 Option: N/A & Del SL 2401/R2431/R2432

05.P33. X3301 circuit Option: N/A & modify Del R3313/R3314 & Del GCLK circuit R3312/C3319

06.P75. X7501 circuit Option : /VGA, Del GCLK R7527

07.P29. Del GCLK all circuit

08.P21. Modify DMIC_ID to PCB_ID1

09.P36. Del DMIC circuit & reserve test point & Modify AMIC netname

10.P45. Del DMIC R457/R4518 & Mo dify AMIC Option: N/A & Modi fy netname

11.P45. Del Touch Panel R4582~ R4595/SLN4507/L450 2 & C4517

2016/10/06

12.P45. Del EMI reserve C4591/ C4592/C4593

13.P51. Add SATA ODD CONN. & SATA HDD FPC CONN. circuit

14.P68. Del SATA BtoB CONN.

15.P24. Modify RTC circuit follow X456U

16.P66. Add IO DB. follow X456U

17.P33. LAN chip change soluti on to RTL8411 follow X456U

18.P34. Transformer & RJ45 follow X456U

19.P68. Add IO FPC CONN. follow X456U

20.P66. Modify Audio Jack to X541U solution & Modify netname

21.P42. Del SD CONN circuit

22.P59. Del LED circuit

23.P66. Change USB2.0 portect IC over current to 2.5A solution

24.P54. Add SSD circuit follow T303UA

25.P53. Change WLAN CONN. to NGFF, follow X456U

2016/10/07

26.P66. Change FFC CONN. to 12018-00021800 same as J6801

27.P06. Add R0601/R0602/R0 607/R0608 for U42 & U22 Opti on

28.P28. Modify SPI PCH power follow X456U

29.P32. Modify GPU_THERM# follow X456U

30.P55. Modify Type C circuit follow X456U

31.P70. Modify U7002 circuit follow X456U

32.P04. Modify 0401 circuit follow X456U P14. U14052016/10/08

33.P14. C1447-C1450 change to 47nF follow X456U

34.P14. C1533-C1536 change to 47nF follow X456U

35.P21. R2101 staff follow X456U

36.P25. U2502 circuit BOM foll ow X456U

37.P66. Modify J6601 pin define

38.P68. Modify J6801 pin define

39.P37. Modify HP Jack Mute to P36

40.P52. Modify U5201 circuit & change OC from 3.2A to 2.5A2016/10/12

41.P68. USB Power SW enable pin ch ange to SUSC_EC#

42.P66. Modify U6602 circuit

43.P47. Change DP to VGA solution from RTD2168 to RTD2166

44.P26. VCCHDA change to +3VS2016/10/13

45.P37. Add SMART AMP. TAS2555

46.P37. Change SAMRT AMP. TAS5766

2016/10/14

47.P06. Modify R0602/R0607/R0608 from 0603 to 0805 for intel suggestion

2016/10/17

48.P65. Update H65-1~H6506 for CPU/DGPU/SSD nuts

2016/10/18

49.P24. Modify CK_REQ_Px# setting P2 & P3 same group

2016/10/19

According to checklist：
Any un-used, disabled, and non- mapped SRCCLKREQ# sign al must be left as no connect s
at the PCH side on the platform.

50.P05. Add SPI for FingerPrin t

2016/10/20

51.P31. Add J3103 for FingerPr int

52.P21. Add GSPI0 for FingerPr int & PU to +3VS

2016/10/21

53.P05. Remove PCH_SUS_STAT# & reserve test point for measure2016/10/27

54.P30. Remove PCH_SUS_STAT#

55.P25. Remove reserve RES R2514 & R2554

56.P22. Remove PCH_GPPB14 & remove R2210/R2211

57.P21. Remove PCH_GPPB22 & remove R2160/R2161

58.P05. Remove GPP_C2/GPP_C5 & remove R0506/R0507

59.P21. Remove TOUCHPAD_ID/TOUCH_PANEL_ID & remove R2111/R2137/R2139/R2140

60.P21. Remove SNSR_HUB_PWREN & remove R2153

61.P23. Remove DIRECT_ESATA_DETECT_R# & remove R2302/R2306

62.P23. Remove SATA_ODD_PRSNT_R# & remove R2303/R2305

63.P23. Remove R2301/R2304

64.P54. Add R5411 & unstaff Q540 1 & R5408

65.P23. Modify PCIE CAPs to P54 & ad d SATA RX CAPs

66.P31. Add BL CONN. J3104 & circuit2016/10/28

67.P66. Add LED6604 for HDD LED2016/1 1/01

68.P55. Reserve RN5501 for USB_C_CC1/CC2 PU to +3V2016/11/09

69.P37. Update SPK CONN. pin define ADR1 & GND pin

2016/11/10

70.P36. Reserve R3526/R362 7/R3631/R3632 for Smar t Amp. SPK co-lay

71.P60. Modify J6002, batter y pin define follow X456U ba ttery2016/1 1/11

72.P32. Modify reference Design IP IT8995 KABYLAKE_EC_RST

73.P51. Modify SATS FPC CONN. pi n define2016/11/14

74.P53. WLAN power modify to +3VSUS for wake on WLAN

75.P66. J6601 Pin define reverse2016/11/15

76.P66. SATA_LED reserve Q6604 & add SL6602

77.P30. Add DGPU_FB_CLAMP_GPIO to GPC4 (GC6_EN to EC)

2016/11/16

78.P17. Remove R1709

79.P30. Remove PM_EXTTS#0 & R3091

80.P68. Update J6801 from 30pin to 40pin (Add SATA HDD)

81.P64. Add HDD DB

82.P51. Remove J5102

83.P76. Add GPIO10, MEM_VREF _CTL2016/11/ 17

84.P72. Modify to GDDR5

2016/11/18

85.P31. J3102 (Touch Pad) modify pin define to STD

2016/11/22

86.P16. Add SO-DIMM (ChA), remove P13, P14 & P15 DRAM2016/11/23

87

68. Modify J6801 to B to B conn. & pin define

.P

88.P64. Modify J6401 to B to B conn. & pin define

2016/11/28

89.P68. Modify J6801 to 30 pin FPC CONN. from MB to IO DB

90.P66. Modify J6601 to 30 pin FPC CONN. from IO DB to MB

91.P51. Add J5102 B to B CONN. from MB to HDD DB

92.P64. Modify J6401 to BtoB CONN. from MB to HDD DB & Del J6402 from HDD DB to IO DB

93

DateRev Description

2016/11/30 93.P23. Remove PCIE to SSD

94.P45. Del Q4501 circuit.2016/12/01

2016/12/02

95.P37. Add Q3701 circuit for SKP pr otectin & modify Ra & Rb for Sw itching loss

2016/12/05

96.P06. VCORE sense & VCCGT sense mo dify

97.P36. Add DIN to P37 S mart Amp

98.P16. DDR SWAP

99.P17. DDR SWAP

A1.P45. Reserve DMIC_COD EC & DMIC_PCH

A2.P36. Modify int. AMIC & Audio Jack MI C

2016/12/07 A3.P16. Modify int. AMIC & Audio J ack MIC

A4.P36. Modify Codec fro m ALC295 to ALC3 288

2016/12/15

A5.P68. Audio Jack pin modify

A6.P66. Audio Jack pin modify

A7.P36. Reserve R3635 / R3637 / C363 1 / C3632 / C3633 / C3634

A8.P37. J3701 Pin define modify: R+, R-, L+, L-2016/12/19

R 1.1 2017/01/11 01.P66. HDD LED modify PU from +5VSUS_IO to +3VS_IO

02.P36. AUD_VDD_IO modif y to +1.8VS

03.P26. +3VSUS_VCCPAZIO modi fy to +VCCPAZIO & change fr om +3VS to +1.8VSUS

04.P88. PQ8809, PC8833 & PR8826 stuff

2017/01/12 05.P53. Modify BT_ON & WLAN_ON circuit (un-stuff)

06.P24. C2401&C2402 modi fy to 27pF for X 542UQ SR PCB2017/01/13

07.P33. C3344&C3345 modi fy to 12pF for X 542UQ SR PCB

08.P75. C7508&C7509 modi fy to 15pF for X 542UQ SR PCB

09.P30. Stuff R3036, DC S0 to S5, EC pow r latch VSUS_ON will floating & VSUS will turn on

2017/01/16

10.P37. Remove Q3701 & m odify

2017/01/19

11.P04. Modify R0404 PU to +3VS & RES 20 0K

12.P55. Type-C U3 modify2017/01/20

13.P45. R4566 modify to 150K ohm for Pan el sequence

14

15

BOM

Project Name

X542UN/URV

Title :

System History

Size

Dept.:

Engineer:

SS

D

Date: Sheet of

Tuesday, June 20, 2017

Rev

102

102