Asus N73Sv Schematic

5

01. Block Diagram

02. System Setting

03. CPU_DMI,PEG,FDI,CLK,MISC

04. CPU_DDR3

05. CPU_CFG,RSVD,GND

06. CPU_PWR

07. CPU_XDP

14. DIM_DDR3 SO-DIMM 0 (for CFD)

16. DIM_DDR3 SO-DIMM 1

D D

17. DIM_DDR3 SO-DIMM 3

18. DIM_CA/DQ Voltage

19. CPU_VID Controller

20. SB_Cougar SATA,HDA,RTC,LPC

21. SB_Cougar PCIE,CLK,SMB,PEG

22. SB_Cougar FDI,DMI,SYS PWR

23. SB_Cougar DP,LVDS,CRT

24. SB_Cougar PCI,NVRAM,USB

25. SB_Cougar CPU,GPIO,MISC

26. SB_Cougar PWR,GND

27. SB_Cougar PWR,GND

28. SB_SPI ROM,SMBus

29. CLK_ICS9LRS3161

30. KBC_IT8572E

31. KBC_KB & TP

32. RST_Reset Circuit

33. LAN_AR8131

34. LAN_RJ45 Conn.

35. Hybrid switch

C C

36. AUD_CODEC ALC269

37. AUO_SPKR,Woofer,Mic

38. MIC&LINE IN

42. CB_AU6433

44. BUG_NewCard & LPC

45. CRT_LVDS & CMOS

46. CRT_D-Sub

48. CRT_HDMI

49. TV TUNE

50. FAN_Thermal Sensor & Fan

51. XDD_HDD & ODD CON.

52. USB_USB Port

53. PCI_WiFi/WiMax

56. LED_LED & Switch

57. DSG_Discharge

58. PRO_Protect

60. DC_DC & BAT IN

61. BT_Bluetooth

B B

64. TUN_TV Tuner

65. ME_W2B conm. & NUT

66. USB_USB Port

68. USB3.0_FRESCO

69. USB3.0 Port

70. VGA_N11P-GS Main (1)

71. VGA_N11P-GS Main (2)

72. VGA_N11P-GS VRAM CH_A

73. VGA_N11P-GS VRAM CH_C

74. VGA_N11P-GS Main (5)

75. VGA_N11P-GS Main (6)

76. VGA_N11P-GS Main (7)

77. VGA_N11P-GS Main (7)

78. VGA_SG Display Switch

79. VGA_SG PWR Switch

80. PWR_VCORE(NCP3218)

81. PWR_SYSTEM(RT8206A)

82. PWR_I/O_VCCP_PCH(RT8202A)

83. PWR_I/O_DDR(RT8202A+uP7711)

A A

84. PWR_+1.8V_+1.1V(RT8015+LDO)

85. PWR_VGA_CORE(RT8202A)

86. PWR_RENDER_CORE(RT8152D)

88. PWR_CHARGER(MB39A132)

91. PWR_LOAD SWITCH

93. PWR_SIGNAL

94. PWR_Flowchart

95. Revision History

5

N73Sv Block Diagram

HDMI

Touchpad

Keyboard

4

NVIDIA N12P-GS

CRT

Page 48

Page 46

Debug Conn.

Page 31

Page 31

INT. MIC

Audio Amp

Jack

ITE IT8572E

Page 37

Page 37

Page 38

CPU XDP

PCH XDP

Reset Circuit

4

3

PCIE x16

Page 35 , 70~79

CPU

Sandy Bridge
4 Core or 2Core

DDR3 1066/1333MHz

Page 3~6

LCD Panel

EC

Page 45

Page 44

Page 30

LPC

FDI x8

PCH
Cougar Point-M

DMI x4

PCIE x1

Page 20~27

SATA

HDD (1)

HDD (2)

ODD

Page 51

Page 51

Page 51

USB3.0

Fresco FL1000G

USB

USB Port 1

Azalia Codec

Azalia

Realtek ALC269

Page 36

Page 7

Page 67

Thermal Sensor

PWM Fan

Page 50

Page 50

Power Protect

Page 32

Page 58

www.vinafix.vn

Skew Holes

Discharge Circuit

Switch & LEDs

3

USB Port 0

USB Port 3

Page 65

Page 57

Page 56

DC & Battery

SPI ROM

Page 30

Page 68

Page 33

Page 33

Page 66

2

DDR3 SO-DIMM X3

Page 14~18

GigaLAN

Atheros AR8131

MiniCard

WiFi / WiMax

MiniCard

TV Tuner

Card Reader

Alcor AU6433

CMOS Camera

Bluetooth

Clock Generator

IDT ICS9LRS3161

Page 60

2

RJ45

Page 33

Page 53

Page 64

Page 34

Power

+VTT_CPU & +VTT_PCH

+1.5V & +0.75V

Page 42

+1.8V & +1.1VSG

Page 45

Page 61

Load Switch

Page 29

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

1

VCORE

System

Charger

Engineer:

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

1

Title :

Title :

Title :

Page 80

Page 81

Page 82

Page 83

Page 84

Page 88

Page 91

Block Diagram

Block Diagram

Block Diagram

Wish

Wish

Wish

195Wednesday, October 13, 2010

195Wednesday, October 13, 2010

195Wednesday, October 13, 2010

of

of

of

Rev

Rev

Rev

1.0

1.0

1.0

5

PCH
GPIO

D D

C C

B B

A A

PCH_IBEX
GPIO

GPIO 00
GPIO 01

GPIO [2:5]

GPIO 06
GPIO 07
GPIO 08
GPIO 09
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16 +3VS
GPIO 17 +3VSGPI
GPIO 18 +3VS
GPIO 19 +3VS
GPIO 20
GPIO 21
GPIO 22
GPIO 23
GPIO 24
GPIO 25
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39 +3VS
GPIO 40
GPIO 41
GPIO 42
GPIO 43
GPIO 44
GPIO 45
GPIO 46
GPIO 47
GPIO 48
GPIO 49
GPIO 50
GPIO 51
GPIO 52
GPIO 53
GPIO 54
GPIO 55
GPIO 56
GPIO 57
GPIO 58
GPIO 59
GPIO 60
GPIO 61
GPIO 62
GPIO 63
GPIO 64
GPIO 65
GPIO 66
GPIO 67
GPIO 72
GPIO 73
GPIO 74
GPIO 75

5

GPO
GPO
GPI
GPI
GPI

GPI
Native
Native

GPI
Native

GPO
Native

GPO

GPO

GPI

GPI
Native

GPO
Native

GPO

GPI

GPI CLKREQ4_USB3#

GPO

GPO
Native

GPO
Native

GPIO

GPI
Native

GPI

GPO

GPI

GPI

GPI
Native
Native
Native
Native
Native
Native
Native

GPI CLKREQ_PEG#

GPO

Native
Native

GPO

GPO
Native
Native

GPI

GPO

GPIO
Native

Native
Native
Native
Native
Native

GPO
Native

GPO
Native
Native

GPIO

Signal NameUse As

NC_TP
NC_TP

PCI_INT[E:H]#

NC_TP

USB3_SMI#

EXT_SMI#

NC_PU
NC_PU

EXT_SCI#

NC_TP
NC_TP

NC_PU
BT_LED
DGPU_HOLD_RST#
DGPU_PWROK
CLKREQ1_TV#
SATA1GP
CLKREQ2_WLAN#
SATA0GPGPI
WLAN_LED

NC_TP

NC_TP

CLKREQ3_NEWCARD#

NC_TP

WLAN_ON#

ME_SusPwrDnAck
ME_AC_PRESENT_PCH
PM_CLKRUN#
HDA_DOCK_EN#

NC_TP

SATA_CLK_REQ#_R
DGPU_PWR_EN#
DGPU_PRSNT#
PCB_ID0
PCB_ID1

NC_PU

NC_PU

NC_PU

NC_PU
CLK_REQ5#

NC_TP

NC_TP

NC_TP

PCH_TEMP_ALERT#GPO
PCI_REQ1#
PCI_GNT1#
DGPU_SELECT#_R
DGPU_PWM_SELECT#_R
PCI_REQ3#
PCI_GNT3#
CLKREQ_GLAN#
BT_ON
SML1_CLK

NC_PU
SML0ALERT#Native

NC_TP

NC_TP

NC_TP

NC_TP

NC_TP
EDID_SELECT#

CLK_CR48
PM_BATLOW#
CLK_REQ0#
SML1ALERT
SML1_DATA

4

Int.& Ext
Pull up / down

-

-

EXT PU
EXT PU
EXT PU
EXT PU & INT PU
EXT PU
EXT PU
EXT PU

­INT PD
EXT PU
INT PD
EXT PU
EXT PD & INT TBD
EXT PD
EXT PU
EXT PD
EXT PU

-

INT PU

­EXT PD
EXT PD
INT PU

-

­EXT PU
EXT PU
EXT PU

-

-

EXT PD
EXT PD
EXT PD
EXT PU / PD
EXT PU / PD
EXT PU
EXT PU
EXT PU
EXT PU
EXT PU

-

-

EXT PD

-

EXT PU
EXT PU
INT PU
EXT PU
INT PU
EXT PD
INT PU
EXT PD
EXT PU (Diode)
EXT PU
EXT PU
EXT PU

-

-

­INT TBD
INT TBD
INT TBD
INT TBD
INT PU
EXT PU
EXT PU
EXT PU

4

3

Power

+3VS
+3VS
+5VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS

+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS

+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+5VS
+3VS
+5VS
+3VS
+5VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS

EC IT8572
GPIO

EC GPIO

www.vinafix.vn

Use As Signal Name

GPA0
GPA1
GPA2
GPA3
GPA4
GPA5
GPA6
GPA7
GPB0
GPB1
GPB2
GPB3
GPB4
GPB5
GPB6
GPB7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
GPD0
GPD1
GPD2
GPD3
GPD4
GPD5
GPD6
GPD7
GPE0
GPE1
GPE2
GPE3
GPE4
GPE5
GPE6
GPE7
GPF0
GPF1
GPF2
GPF3
GPF4
GPF5
GPF6
GPF7
GPG0
GPG1
GPG2
GPG6
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6 CAP_LED#
GPI0
GPI1
GPI2
GPI3
GPI4
GPI5
GPI6
GPI7
GPJ0
GPJ1
GPJ2

GPJ4
GPJ5

OD

PWR_LED#

OD

CHG_LED#
CHG_FULL_LED#

O

MUTE_LED#

O

LCD_BL_PWM

ALT
ALT

FAN_PWM

ALT

VOLUME_LED#

O

MEDIA_KEY_LED#

BATSEL_0

O
O

BATSEL_1

O

ME_AC_PRESENT

ALT

SMB0_CLK

ALT

SMB0_DAT
A20GATE

OD

RC_IN#

OD

PM_RSMRST#

O

CLK_UC

ALT

SMB1_CLK

ALT

SMB1_DAT
PM_PWRBTN#

O
ALT

AC_IN_OC#

O

OP_SD#

ALT

BAT1_IN_OC#
RFON_SW#

I

PWRLIMIT#

I

PM_SUSC#

I
ALT

BUF_PLT_RST#
EXT_SCI#

OD

EXT_SMI#

OD

LCD_BACKOFF#

O

FAN0_TACH

ALT
OD

EXP_GATE_LED#

O

-

I

/PU

-

I

/PU

-

-

PWR_SW#

ALT
ALT

CLK_OC#

LID_SW#

I

EXP_GATE#

I

OS_LED#

ALT

VSUS_ON

O
I

VCCP_DV0

I

VCCP_DV1

ALT

TP_CLK
TP_DAT

ALT

THRO_CPU

O
O

PCH_SPI_OV
ME_SusPwrDnAck

I

PM_SUSB#

I

CLK_STRAP0
CLK_STRAP1

PM_CLKRUN#

ALT

GFX_VR_ON
CHG_EN

O

SUSC_EC#

O

SUSB_EC#

O

NUM_LED#

OD
OD

HDMI_HPD

SUS_PWRGD

I

ALL_SYSTEM_PWRGD

I

VRM_PWRGD

I

PCH_TEMP_ALERT#

I

-

IDLE_HPD_INT#

-

CPU_VRON

O

PM_PWROK

O

VSET_EC

ALT
ALT

ISET_ECGPJ3

CPU_DV0

O

3

CPU_DV1

2

1

Design IP Source:N73JF

SM_BUS ADDRESS :

PCH Master
SM-Bus Device

Clock Generator(ICS9LRS3197)
SO-DIMM 0 1010000x ( A0 )
SO-DIMM 1
VID Controller(ASM8272)

EC Master (SMB1)
SM-Bus Device

CPU Thermal Sensor(G781) 1001100x ( 9A )

PCI Express

PCIE 1

Minicard TV Tuner

PCIE 2

Minicard WLAN

PCIE 3

Newcard

PCIE 4

USB 3.0

PCIE 5

Card Reader

PCIE 6

GLAN

PCIE 7

PCIE 8

SATA Port

SATA 0

SATA HDD (1)

SATA1

SATA ODD

SATA4

SATA HDD (2)

SATA5

ESATA

Device Identification

CPU Thermal Senser

1st

06G023048011

2nd

VGA Thermal Senser

1st

06G023048010

2nd

Clock Gen

1st

06G011614010

2nd

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

2

Date: Sheet

SM-Bus Address

1101001x ( D2 )

1010001x ( A2 )
0011011x ( 36 )

SM-Bus Address

1001101x ( 9E )VGA Thermal IC(G781-1)

USB Port

USB 0

USB 1

USB 2

USB 3

USB 4

USB 5

USB 6

USB 7

USB 8

USB 9

USB 10

USB 11

USB 12

USB 13

G781F

G781-1

ICS9LVS3161

N73Sv

N73Sv

N73Sv

1

USB Port 0

USB Port 1

USB Port 2

USB Port 3

Minicard TV Tuner

NewCard

WLAN

CMOS Camera

Bluetooth

Title :

Title :

Title :

System Setting

System Setting

System Setting

Wish

Wish

Engineer:

Engineer:

Engineer:

Wish

Rev

Rev

Rev

1.0

1.0

1.0

295Wednesday, October 13, 2010

295Wednesday, October 13, 2010

295Wednesday, October 13, 2010

of

of

of

5

FDI disable: (For discrete graphic)

1. NC:

FDI_TX#[0:7],FDI_TX[0:7],VCC_AXGSENSE,VSS_AXGSENSE

2. Pull-down to GND via 1KΩ ± 5% resistor:

FDI_FSYNC[0:1],FDI_LSYNC[0:1],FDI_INT,GFX_IMON
~15mW power saving

3. Connected to GND:

D D

修改

and fall time spec

C C

B B

A A

修改

Reset,
Rise and fall time spec

VCCAXG

4. Can be connected to GND directly:

DPLL_REF_CLK,DPLL_REF_CLK#

5. Connect to +V1.05S rail:

VCCFDIPLL

eDP disable/Enable

CFG[4]:

Enable: Mount R0503, R0303=1K

Disable: un-mount R0503, R0303=10Kohm

CPU Reset,

分壓沒辦法

meet Rise

+3V

R0334

R0334
200Ohm

200Ohm

1 2

U0303

U0303

1

R0338 0Ohm

R0338 0Ohm

Q0302B

Q0302B
UM6K31N

UM6K31N

N/A

N/A

12

@

@

12

12

R0347

R0347

100KOhm

100KOhm

@

@

@

@

2

12

C0333

C0333

0.01UF/16V

0.01UF/16V

@

@

5

2
3 4

GND

GND

74LVC1G07GW

74LVC1G07GW

H_DRAM_PWRGD

D0301

D0301
RB751V-40

RB751V-40

+3VS+3VA_EC

12

61

Q0301A

Q0301A
UM6K31N

UM6K31N

H_DRAM_PWRGD<22>

34

5

D0302

D0302
RB751V-40

SYSTEM_PWRGD<58>

PROCHOT#: 0.15nS<Tr<0.44nS,

0.1ns<Tf<0.45ns (measured
between 0.7*VCCP and

0.3*VCCP

THRO_CPU#<30>

PM_DRAMPWROK: 0.15nS<Tr<0.42nS, 0.09ns<Tf<0.36ns
(measured between 0.7*VCCP and 0.3*VCCP

CPU

分壓沒辦法

RB751V-40

H_PROCHOT_S#<80>

PWRLIMIT#<30,75,88>

R0345 0OhmR0345 0Ohm

R0346

R0346

100KOhm

100KOhm

BUF_PLT_RST#<24,30,33,42,45,53,54,68,70>

meet

NC

NC
A

A

@

@

5

@

@

5

VCC

VCC

Y

Y

12

@

@

SUSB_EC<57>

+3VS

R0337

R0337
200Ohm

200Ohm

@

@

1 2

CATEER#: This signal
indicates that the
system has experienced a
catastrophic error and
can't continue to
operate

12

12

34

Q0301B

Q0301B
UM6K31N

UM6K31N

@

@

U0302

U0302

1

NC

NC
A

A

2
3 4

GND

GND

74LVC1G07GW

74LVC1G07GW

R0312 0Ohm

R0312 0Ohm

DRAMPWROK

CPU socket P/N change to 12G011909893

+VDDQ

+3V

R0335

R0335
200Ohm

200Ohm

1 2

R0336

R0336
22Ohm

22Ohm

N/A

N/A

1 2
61

Q0302A

Q0302A
UM6K31N

UM6K31N

2

N/A

N/A

SKTOCC# (Socket
Occupied): pulled
to ground on the
processor package

PECI_EC<30>

+VTT_CPU

R0307 200OhmR0307 200Ohm

1 2

H_PROCHOT_S#_R1

H_THRMTRIP#<25>

connected

PC0334

PC0334

43pF close

43PF/50V

43PF/50V

@

@

to the IMVP

PM_SYNC#<22>

H_CPUPWRGD<7,25>

DRAMPWROK

5

VCC

VCC

Y

Y

PLT_RST#_R

12

@

@

4

+VTT_CPU

+VTT_CPU

can float on processor by DG

T0303T0303

R0308 56OHMR0308 56OHM

1 2

SL0301

SL0301

2 1

SL0302

SL0302

SL0303

SL0303

R0322 130Ohm

R0322 130Ohm

1 2

+VTT_CPU

12

+3VS

R0313

R0313
75Ohm

75Ohm

R0310 43OhmR0310 43Ohm

4

DMI_TXN0<22>
DMI_TXN1<22>
DMI_TXN2<22>
DMI_TXN3<22>

DMI_TXP0<22>
DMI_TXP1<22>
DMI_TXP2<22>
DMI_TXP3<22>

DMI_RXN0<22>
DMI_RXN1<22>
DMI_RXN2<22>
DMI_RXN3<22>

DMI_RXP0<22>
DMI_RXP1<22>
DMI_RXP2<22>
DMI_RXP3<22>

FDI_TXN[7:0]<22>

FDI_TXP[7:0]<22>

FDI_FSYNC0<22>
FDI_FSYNC1<22>

FDI_INT<22>

FDI_LSYNC0<22>
FDI_LSYNC1<22>

1 2

R0302 24.9Ohm

R0302 24.9Ohm

1%

1%

1 2

R0303 10KOhm

R0303 10KOhm

/X

/X

C0337 0.01UF/16V

C0337 0.01UF/16V

1 2

@

@

H_SNB_INV#<24>

SNB_SKTOCC#<80>

H_CATERR#

1

H_PECI_ISO

H_PROCHOT_S#_R

0402

0402

0402

0402

0402

0402

R0309 10KOhmR0309 10KOhm

1%

1%

H_THRMTRIP#_R

C0336 0.01UF/16V

C0336 0.01UF/16V

1 2

@

@

PM_SYNC#_R

21

C0335 0.01UF/16V

C0335 0.01UF/16V

1 2

@

@

H_CPUPWRGD_R

21

12

VDDPWRGOOD_R

T0302T0302

CPU_RST#

12

12

R0311

R0311
750Ohm

750Ohm

1%

1%
@

@

3

U0301A

U0301A

B27

DMI_RX#[0]

B25

DMI_RX#[1]

A25

DMI_RX#[2]

B24

DMI_RX#[3]

B28

DMI_RX[0]

B26

DMI_RX[1]

A24

DMI_RX[2]

B23

DMI_RX[3]

G21

DMI_TX#[0]

E22

DMI_TX#[1]

F21

DMI_TX#[2]

D21

DMI_TX#[3]

G22

DMI_TX[0]

D22

DMI_TX[1]

F20

DMI_TX[2]

C21

DMI_TX[3]

FDI_TXN0

A21

AN34

AL33

AN33

AL32

AN32

AM34

AP33

AR33

C26

V8

U0301B

U0301B

SOCKET989

SOCKET989

FDI0_TX#[0]

H19

FDI0_TX#[1]

E19

FDI0_TX#[2]

F18

FDI0_TX#[3]

B21

FDI1_TX#[0]

C20

FDI1_TX#[1]

D18

FDI1_TX#[2]

E17

FDI1_TX#[3]

A22

FDI0_TX[0]

G19

FDI0_TX[1]

E20

FDI0_TX[2]

G18

FDI0_TX[3]

B20

FDI1_TX[0]

C19

FDI1_TX[1]

D19

FDI1_TX[2]

F17

FDI1_TX[3]

J18

FDI0_FSYNC

J17

FDI1_FSYNC

H20

FDI_INT

J19

FDI0_LSYNC

H17

FDI1_LSYNC

A18

eDP_COMPIO

A17

eDP_ICOMPO

B16

eDP_HPD

C15

eDP_AUX

D15

eDP_AUX#

C17

eDP_TX[0]

F16

eDP_TX[1]

C16

eDP_TX[2]

G15

eDP_TX[3]

C18

eDP_TX#[0]

E16

eDP_TX#[1]

D16

eDP_TX#[2]

F15

eDP_TX#[3]

SOCKET989

SOCKET989

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

eDP_HPD#

1

CPU_RST#:

0.25nS<Tr<0.42nS,

0.09ns<Tf<0.36ns (measured
between 0.7*VCCP and

0.3*VCCP

www.vinafix.vn

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]

DMI

DMI

PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]

Intel(R) FDI

Intel(R) FDI

PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

eDP

eDP

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

3

J22
J21
H22

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

BCLK

BCLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

SM_DRAMRST#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

MISC

MISC

PRDY#
PREQ#

TRST#

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

PEG_IRCOMP_R

PCIENB_RXN0
PCIENB_RXN1
PCIENB_RXN2
PCIENB_RXN3
PCIENB_RXN4
PCIENB_RXN5
PCIENB_RXN6
PCIENB_RXN7
PCIENB_RXN8
PCIENB_RXN9
PCIENB_RXN10
PCIENB_RXN11
PCIENB_RXN12
PCIENB_RXN13
PCIENB_RXN14
PCIENB_RXN15

PCIENB_RXP0
PCIENB_RXP1
PCIENB_RXP2
PCIENB_RXP3
PCIENB_RXP4
PCIENB_RXP5
PCIENB_RXP6
PCIENB_RXP7
PCIENB_RXP8
PCIENB_RXP9
PCIENB_RXP10
PCIENB_RXP11
PCIENB_RXP12
PCIENB_RXP13
PCIENB_RXP14
PCIENB_RXP15

PCIENB_TXN0
PCIENB_TXN1
PCIENB_TXN2
PCIENB_TXN3
PCIENB_TXN4
PCIENB_TXN5
PCIENB_TXN6
PCIENB_TXN7
PCIENB_TXN8
PCIENB_TXN9
PCIENB_TXN10
PCIENB_TXN11
PCIENB_TXN12
PCIENB_TXN13
PCIENB_TXN14
PCIENB_TXN15

PCIENB_TXP0
PCIENB_TXP1
PCIENB_TXP2
PCIENB_TXP3
PCIENB_TXP4
PCIENB_TXP5
PCIENB_TXP6
PCIENB_TXP7
PCIENB_TXP8
PCIENB_TXP9
PCIENB_TXP10
PCIENB_TXP11
PCIENB_TXP12
PCIENB_TXP13
PCIENB_TXP14
PCIENB_TXP15

A28
A27

A16
A15

R8

AK1
A5
A4

AP29
AP27

AR26

TCK

AR27

TMS

AP30
AR28

TDI

AP26

TDO

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

R0301 24.9Ohm 1%R0301 24.9Ohm 1%

1 2

CX0301 0.1UF/16VCX0301 0.1UF/16V

1 2

CX0302 0.1UF/16VCX0302 0.1UF/16V

1 2

CX0303 0.1UF/16VCX0303 0.1UF/16V

1 2

CX0304 0.1UF/16VCX0304 0.1UF/16V

1 2

CX0305 0.1UF/16VCX0305 0.1UF/16V

1 2

CX0306 0.1UF/16VCX0306 0.1UF/16V

1 2

CX0307 0.1UF/16VCX0307 0.1UF/16V

1 2

CX0308 0.1UF/16VCX0308 0.1UF/16V

1 2

CX0309 0.1UF/16VCX0309 0.1UF/16V

1 2

CX0310 0.1UF/16VCX0310 0.1UF/16V

1 2

CX0311 0.1UF/16VCX0311 0.1UF/16V

1 2

CX0312 0.1UF/16VCX0312 0.1UF/16V

1 2

CX0313 0.1UF/16VCX0313 0.1UF/16V

1 2

CX0314 0.1UF/16VCX0314 0.1UF/16V

1 2

CX0315 0.1UF/16VCX0315 0.1UF/16V

1 2

CX0316 0.1UF/16VCX0316 0.1UF/16V

1 2

CX0317 0.1UF/16VCX0317 0.1UF/16V

1 2

CX0318 0.1UF/16VCX0318 0.1UF/16V

1 2

CX0319 0.1UF/16VCX0319 0.1UF/16V

1 2

CX0320 0.1UF/16VCX0320 0.1UF/16V

1 2

CX0321 0.1UF/16VCX0321 0.1UF/16V

1 2

CX0322 0.1UF/16VCX0322 0.1UF/16V

1 2

CX0323 0.1UF/16VCX0323 0.1UF/16V

1 2

CX0324 0.1UF/16VCX0324 0.1UF/16V

1 2

CX0325 0.1UF/16VCX0325 0.1UF/16V

1 2

CX0326 0.1UF/16VCX0326 0.1UF/16V

1 2

CX0327 0.1UF/16VCX0327 0.1UF/16V

1 2

CX0328 0.1UF/16VCX0328 0.1UF/16V

1 2

CX0329 0.1UF/16VCX0329 0.1UF/16V

1 2

CX0330 0.1UF/16VCX0330 0.1UF/16V

1 2

CX0331 0.1UF/16VCX0331 0.1UF/16V

1 2

CX0332 0.1UF/16VCX0332 0.1UF/16V

1 2

CLK_CPU_BCLK_L
CLK_CPU_BCLK#_L

CLK_CPU_BCLK_L
CLK_CPU_BCLK#_L

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

XDP_PREQ#

XDP_TDI_R
XDP_TDO_R

H_DBR#_R

XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7

+VTT_CPU

PCIEG_RXN0
PCIEG_RXN1
PCIEG_RXN2
PCIEG_RXN3
PCIEG_RXN4
PCIEG_RXN5
PCIEG_RXN6
PCIEG_RXN7
PCIEG_RXN8
PCIEG_RXN9
PCIEG_RXN10
PCIEG_RXN11
PCIEG_RXN12
PCIEG_RXN13
PCIEG_RXN14
PCIEG_RXN15

PCIEG_RXP0
PCIEG_RXP1
PCIEG_RXP2
PCIEG_RXP3
PCIEG_RXP4
PCIEG_RXP5
PCIEG_RXP6
PCIEG_RXP7
PCIEG_RXP8
PCIEG_RXP9
PCIEG_RXP10
PCIEG_RXP11
PCIEG_RXP12
PCIEG_RXP13
PCIEG_RXP14
PCIEG_RXP15

RNX0303B

@ RNX0303B

@

3 4

0OHM

0OHM

RNX0303A

RNX0303A

1 2

0OHM

0OHM

@

@

RNX0301B

RNX0301B

3 4

0OHM

0OHM

RNX0301A

RNX0301A

1 2

0OHM

0OHM

R0323 140Ohm 1%R0323 140Ohm 1%

1 2

R0324 25.5OHM 1%R0324 25.5OHM 1%

1 2

R0325 200Ohm 1%R0325 200Ohm 1%

1 2

R0326 0OhmR0326 0Ohm

1 2

R0327 0OhmR0327 0Ohm

1 2

R0328 0OhmR0328 0Ohm

1 2

2

PCIENB_RXN[15:0] <70>

PCIENB_RXP[15:0] <70>

PCIEG_RXN[15:0] <70>

PCIEG_RXP[15:0] <70>

C0301 1.8PF/50V @C0301 1.8PF/50V @

1 2

1 2

C0302

C0302

XDP_PRDY# <7>

XDP_TCLK <7>
XDP_TMS <7>
XDP_TRST# <7>

XDP_TDI <7>
XDP_TDO <7>

XDP_DBRESET# <7,22,67>

T0304T0304

1

T0305T0305

1

T0306T0306

1

T0307T0307

1

T0308T0308

1

T0309T0309

1

T0310T0310

1

T0311T0311

1

2

Huron River PCIE support

2.5 GT/s, 5 GT/s and 8 GT/s

PCIE AC Coupling Capacitors:

1. 436735 PDG Page 39, 75nF~200nF

2. 431433 EMERALD LAKE Schematic 220nF

3. 436735 PDG Page 41, 180nF~265nF

T0313T0313
T0314T0314

ICS_BCLK <29>
ICS_BCLK# <29>

CLK_CPU_BCLK <21>
CLK_CPU_BCLK# <21>

1.8PF/50V @

1.8PF/50V @

CLK_DREF <21>
CLK_DREF# <21>

M_DRAMRST# <4>

RNX0301 close to CPU, C0301 and
C0302 Close to RNX0301

100 MHz, Come form PCH

For eDP 120MHz

CLK_DREF#
CLK_DREF

Follow 436715_4_sodimm_Rev0.9

T0315T0315
T0316T0316
T0317T0317
T0318T0318
T0319T0319
T0320T0320

XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
XDP_TRST#

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Date: Sheet

Date: Sheet

Date: Sheet

CLK_CPU_BCLK

1

CLK_CPU_BCLK#

1

R03401KOhm R03401KOhm

12

R03411KOhm R03411KOhm

1 2

XDP_TCLK

1

XDP_TRST#

1

XDP_TMS

1

XDP_TDI

1

XDP_TDO

1

XDP_DBRESET#

1

R0329 51OhmR0329 51Ohm
R0330 51OhmR0330 51Ohm
R0331 51Ohm@R0331 51Ohm@
R0332 51OhmR0332 51Ohm

1 2

R0333 51OhmR0333 51Ohm

1 2

Size Project Name

Size Project Name

Size Project Name

C

C

C

1

+VTT_CPU

12
12
12

N73Sv

N73Sv

N73Sv

1

Main Board

+VTT_CPU

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

CPU_DMI,PEG,FDI,CLK,MISC

CPU_DMI,PEG,FDI,CLK,MISC

CPU_DMI,PEG,FDI,CLK,MISC

Wish

Wish

Wish

395Wednesday, October 13, 2010

395Wednesday, October 13, 2010

395Wednesday, October 13, 2010

of

of

of

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

Main Board

D D

U0301D

U0301C

U0301C

U0301D

AB6

SA_CLK[0]

M_A_DQ[63:0]<14,16>

C C

B B

M_A_BS0<14,16>
M_A_BS1<14,16>
M_A_BS2<14,16>

M_A_CAS#<14,16>
M_A_RAS#<14,16>

M_A_WE#<14,16>

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15

AE10
AF10

C5

SA_DQ[0]

D5

SA_DQ[1]

D3

SA_DQ[2]

D2

SA_DQ[3]

D6

SA_DQ[4]

C6

SA_DQ[5]

C2

SA_DQ[6]

C3

SA_DQ[7]

F10

SA_DQ[8]

F8

SA_DQ[9]

G10

SA_DQ[10]

G9

SA_DQ[11]

F9

SA_DQ[12]

F7

SA_DQ[13]

G8

SA_DQ[14]

G7

SA_DQ[15]

K4

SA_DQ[16]

K5

SA_DQ[17]

K1

SA_DQ[18]

J1

SA_DQ[19]

J5

SA_DQ[20]

J4

SA_DQ[21]

J2

SA_DQ[22]

K2

SA_DQ[23]

M8

SA_DQ[24]

N10

SA_DQ[25]

N8

SA_DQ[26]

N7

SA_DQ[27]

M10

SA_DQ[28]

M9

SA_DQ[29]

N9

SA_DQ[30]

M7

SA_DQ[31]

AG6

SA_DQ[32]

AG5

SA_DQ[33]

AK6

SA_DQ[34]

AK5

SA_DQ[35]

AH5

SA_DQ[36]

AH6

SA_DQ[37]

AJ5

SA_DQ[38]

AJ6

SA_DQ[39]

AJ8

SA_DQ[40]

AK8

SA_DQ[41]

AJ9

SA_DQ[42]

AK9

SA_DQ[43]

AH8

SA_DQ[44]

AH9

SA_DQ[45]

AL9

SA_DQ[46]

AL8

SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]

V6

SA_BS[2]

AE8

SA_CAS#

AD9

SA_RAS#

AF9

SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CLK#[0]

SA_CKE[0]

SA_CLK[1]

SA_CLK#[1]

SA_CKE[1]

SA_CLK[2]

SA_CLK#[2]

SA_CKE[2]

SA_CLK[3]

SA_CLK#[3]

SA_CKE[3]

SA_CS#[0]
SA_CS#[1]
SA_CS#[2]
SA_CS#[3]

SA_ODT[0]
SA_ODT[1]
SA_ODT[2]
SA_ODT[3]

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_CLK_DDR0 <16>
M_CLK_DDR#0 <16>
M_CKE0 <16>

M_CLK_DDR1 <16>
M_CLK_DDR#1 <16>
M_CKE1 <16>

M_CLK_DDR4 <14>
M_CLK_DDR#4 <14>
M_CKE4 <14>

M_CLK_DDR5 <14>
M_CLK_DDR#5 <14>
M_CKE5 <14>

M_CS#0 <16>
M_CS#1 <16>

M_CS#4 <14>
M_CS#5 <14>

M_ODT0 <16>
M_ODT1 <16>

M_ODT4 <14>
M_ODT5 <14>

M_A_DQS#[7:0] <14,16>

M_A_DQS[7:0] <14,16>

M_A_A[15:0] <14,16>

M_B_DQ[63:0]<17>

For Second DIMM

For Second DIMM

For Second DIMM

M_B_BS0<17>
M_B_BS1<17>
M_B_BS2<17>

M_B_CAS#<17>
M_B_RAS#<17>

M_B_WE#<17>

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AJ11

AH11
AJ12

AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA10

C9

SB_DQ[0]

A7

SB_DQ[1]

D10

SB_DQ[2]

C8

SB_DQ[3]

A9

SB_DQ[4]

A8

SB_DQ[5]

D9

SB_DQ[6]

D8

SB_DQ[7]

G4

SB_DQ[8]

F4

SB_DQ[9]

F1

SB_DQ[10]

G1

SB_DQ[11]

G5

SB_DQ[12]

F5

SB_DQ[13]

F2

SB_DQ[14]

G2

SB_DQ[15]

J7

SB_DQ[16]

J8

SB_DQ[17]

K10

SB_DQ[18]

K9

SB_DQ[19]

J9

SB_DQ[20]

J10

SB_DQ[21]

K8

SB_DQ[22]

K7

SB_DQ[23]

M5

SB_DQ[24]

N4

SB_DQ[25]

N2

SB_DQ[26]

N1

SB_DQ[27]

M4

SB_DQ[28]

N5

SB_DQ[29]

M2

SB_DQ[30]

M1

SB_DQ[31]

AM5

SB_DQ[32]

AM6

SB_DQ[33]

AR3

SB_DQ[34]

AP3

SB_DQ[35]

AN3

SB_DQ[36]

AN2

SB_DQ[37]

AN1

SB_DQ[38]

AP2

SB_DQ[39]

AP5

SB_DQ[40]

AN9

SB_DQ[41]

AT5

SB_DQ[42]

AT6

SB_DQ[43]

AP6

SB_DQ[44]

AN8

SB_DQ[45]

AR6

SB_DQ[46]

AR5

SB_DQ[47]

AR9

SB_DQ[48]
SB_DQ[49]

AT8

SB_DQ[50]

AT9

SB_DQ[51]
SB_DQ[52]

AR8

SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

AA9

SB_BS[0]

AA7

SB_BS[1]

R6

SB_BS[2]

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_CLK[0]

SB_CLK#[0]

SB_CKE[0]

SB_CLK[1]

SB_CLK#[1]

SB_CKE[1]

SB_CLK[2]

SB_CLK#[2]

SB_CKE[2]

SB_CLK[3]

SB_CLK#[3]

SB_CKE[3]

SB_CS#[0]
SB_CS#[1]
SB_CS#[2]
SB_CS#[3]

SB_ODT[0]
SB_ODT[1]
SB_ODT[2]
SB_ODT[3]

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_CLK_DDR2 <17>
M_CLK_DDR#2 <17>
M_CKE2 <17>

M_CLK_DDR3 <17>
M_CLK_DDR#3 <17>
M_CKE3 <17>

M_CS#2 <17>
M_CS#3 <17>

M_ODT2 <17>
M_ODT3 <17>

M_B_DQS#[7:0] <17>

M_B_DQS[7:0] <17>

M_B_A[15:0] <17>

SOCKET989

SOCKET989

SOCKET989

R0403 0Ohm

R0403 0Ohm

1 2

@

@

+1.5V

12

R0401

Q0401

A A

R0402 4.99KOhm

R0402 4.99KOhm

1 2

1%

DRAMRST_PCH<21>

Come from PCH, must
pull high to +3VSUS

5

1%

4

Q0401

S

S

2

2

G

G

1

1

1

Rdson=3Ohm/Vgs(th)=2.5V

Rdson=3Ohm/Vgs(th)=2.5V

12

C0401

C0401

0.047UF/16V

0.047UF/16V

R0401
1KOhm

1KOhm

D

D

32

3

3

2N7002ET1G

2N7002ET1G

www.vinafix.vn

DRAM RESET

DRAMRST# <14>M_DRAMRST#<3>

3

SOCKET989

Title :

Title :

Title :

CPU_DDR3

CPU_DDR3

CPU_DDR3

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

495Wednesday, October 13, 2010

495Wednesday, October 13, 2010

495Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Main Board

1

，拿掉測點,以需有

CFG1,CFG3,CFG8~CFG17,

D D

+VGFX
+VCORE

C C

H_SNB#_PWRCTRL<82>

B B

Via 2

，拿掉

net

以防止

layout

后處理一直報錯。

R0508

R0508
1KOhm

1KOhm

@

@

1 2

1%

1%

CFG0
CFG2
CFG4

CFG5
CFG6
CFG7

H_CPU_RSVD1
H_CPU_RSVD2
H_CPU_RSVD3
H_CPU_RSVD4

DIMM_DQ_VREF

1 2

H_VCCP_SEL

R0507

R0507
1KOhm

1KOhm

@

@
1%

1%

CFG0<7>

R0512 49.9Ohm@1%R0512 49.9Ohm@1%
R0511 49.9Ohm@1%R0511 49.9Ohm@1%
R0509 49.9Ohm@1%R0509 49.9Ohm@1%
R0510 49.9Ohm@1%R0510 49.9Ohm@1%

H_SNB_IVB#_PWRCTRL= LOW, VCCP=1.0V
H_SNB_IVB#_PWRCTRL= High/NC, VCCP=1.05V

+3VSUS

12

R0513

R0513
10KOhm

10KOhm

R0501 0OhmR0501 0Ohm

12
12
12
12

DIMM_CA_VREF

1 2

U0301E

U0301E

AK28

CFG[0]

AK29

CFG[1]

AL26

CFG[2]

AL27

CFG[3]

AK26

CFG[4]

AL29

CFG[5]

AL30

CFG[6]

AM31

CFG[7]

AM32

CFG[8]

AM30

CFG[9]

AM28

CFG[10]

AM26

CFG[11]

AN28

CFG[12]

AN31

CFG[13]

AN26

CFG[14]

AM27

CFG[15]

AK31

CFG[16]

AN29

CFG[17]

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD5

B4

RSVD6

D1

RSVD7

F25

RSVD8

F24

RSVD9

F23

RSVD10

D24

RSVD11

G25

RSVD12

G24

RSVD13

E23

RSVD14

D23

RSVD15

C30

RSVD16

A31

RSVD17

B30

RSVD18

B29

RSVD19

D30

RSVD20

B31

RSVD21

A30

RSVD22

C29

RSVD23

J20

RSVD24

B18

RSVD25

A19

RSVD26

J15

RSVD27

SOCKET989

SOCKET989

RSVD28
RSVD29
RSVD30
RSVD31
RSVD32

RSVD33
RSVD34
RSVD35

RSVD37
RSVD38
RSVD39
RSVD40

RSVD_NCTF_5
RSVD_NCTF_1
RSVD_NCTF_2
RSVD_NCTF_8
RSVD_NCTF_6

RSVD_NCTF_11
RSVD_NCTF_13
RSVD_NCTF_12
RSVD_NCTF_10

RSVD_NCTF_9

RESERVED

RESERVED

RSVD51
RSVD52

VCC_DIE_SENSE

BCLK_ITP

BCLK_ITP#

RSVD_NCTF_3
RSVD_NCTF_4
RSVD_NCTF_7

NTCF

L7
AG7
AE7
AK2
W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AH27

AN35
AM35

AT2
AT1
AR1

B1

VCC_DIESENSE

T0519T0519

1

CLK_ITP_BCLK <7>
CLK_ITP_BCLK# <7>

AT35
AT32
AT29
AT27
AT25
AT22
AT19
AT16
AT13
AT10

AR25
AR22
AR19
AR16
AR13
AR10

AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AM29
AM25
AM22
AM19
AM16
AM13
AM10

AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AJ25

U0301H

U0301H

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

AT7

VSS11

AT4

VSS12

AT3

VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19

AR7

VSS20

AR4

VSS21

AR2

VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31

AP7

VSS32

AP4

VSS33

AP1

VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42

AN7

VSS43

AN4

VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51

AM7

VSS52

AM4

VSS53

AM3

VSS54

AM2

VSS55

AM1

VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

AL7

VSS66

AL4

VSS67

AL2

VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77

AK7

VSS78

AK4

VSS79
VSS80

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

U0301I

U0301I

T35

VSS161

T34

VSS162

T33

VSS163

T32

VSS164

T31

VSS165

T30

VSS166

T29

VSS167

T28

VSS168

T27

VSS169

T26

VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176

N35

VSS177

N34

VSS178

N33

VSS179

N32

VSS180

N31

VSS181

N30

VSS182

N29

VSS183

N28

VSS184

N27

VSS185

N26

VSS186

M34

VSS187

L33

VSS188

L30

VSS189

L27

VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198

K35

VSS199

K32

VSS200

K29

VSS201

K26

VSS202

J34

VSS203

J31

VSS204

H33

VSS205

H30

VSS206

H27

VSS207

H24

VSS208

H21

VSS209

H18

VSS210

H15

VSS211

H13

VSS212

H10

VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222

G35

VSS223

G32

VSS224

G29

VSS225

G26

VSS226

G23

VSS227

G20

VSS228

G17

VSS229

G11

VSS230

F34

VSS231

F31

VSS232

F29

VSS233

VSS

VSS

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

SOCKET989

SOCKET989

SOCKET989

SOCKET989

CFG strapping information:

CFG[2]: PEG Static Lane Reversal (For the 16X)

- 1: (Default) Normal Operation; Lane # definition matches socket pin map definition

- 0: Lane Reversed

CFG[4]: Display Port Presence Strap

- 1 : (Default) Disable; No Physical Display Port attached to Embedded Display Port

- 0 : Enable; An external Display Port device is connected to the Embeded Display port

CFG[6:5]: PCIE Port Bifurcation Straps

- 11 : (Default) X16 - Device 1 functions 1 and 2 disable

A A

- 10 : X8, X8 - Device 1 function 1 enabled; Function 2 disable

- 01 : Reserved - (Device 1 Function 1 disable ; Function 2 enable

- 00 : X8, X4 X4 - Device 1 function 1 and 2 enabled

CFG[7]: Defer Training

-1: (Default) PEG Train immediately following xxRESETB de assertion

-0: PEG Wait for BIOS for training

5

4

CFG2

R0502 1KOhm @1%R0502 1KOhm @1%

1 2

CFG4

R0503 1KOhm @1%R0503 1KOhm @1%

1 2

CFG5

R0504 1KOhm @1%R0504 1KOhm @1%

1 2

CFG6

R0505 1KOhm @1%R0505 1KOhm @1%

1 2

CFG7

R0506 1KOhm @1%R0506 1KOhm @1%

1 2

www.vinafix.vn

3

CPU_CFG,RSVD,GND

CPU_CFG,RSVD,GND

CPU_CFG,RSVD,GND

Title :

Title :

Title :

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

595Wednesday, October 13, 2010

595Wednesday, October 13, 2010

595Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

+VCORE

2C (35W) : 52A
4C (45W) : 78A

D D

+VCORE_CPU

C C

B B

A A

AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

U0301F

U0301F

SOCKET989

SOCKET989

VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

POWER

POWER

CORE SUPPLY

CORE SUPPLY

+VCORE_CPU

AH13

VCCIO1

AH10

VCCIO2

AG10

VCCIO3

AC10

VCCIO4

Y10

VCCIO5

U10

VCCIO6

P10

VCCIO7

L10

VCCIO8

J14

VCCIO9

J13

VCCIO10

J12

VCCIO11

J11

VCCIO12

H14

VCCIO13

H12

VCCIO14

H11

VCCIO15

G14

VCCIO16

G13

VCCIO17

G12

VCCIO18

F14

VCCIO19

F13

VCCIO20

F12

VCCIO21

F11

VCCIO22

E14

VCCIO23

E12

VCCIO24

E11

VCCIO25

D14

VCCIO26

D13

VCCIO27

D12

VCCIO28

D11

VCCIO29

C14

VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDALERT#

VIDSCLK

VIDSOUT

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSSIO_SENSE

C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

PEG AND DDR

PEG AND DDR

SENSE LINES SVID

SENSE LINES SVID

+VTT_CPU

H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT

+VTT_CPU

100ohm R0606 & R0607 delete,Power stuff

SL0604

SL0604
SL0605

SL0605

1

4

12

12

C0607

C0607
22UF/6.3V

22UF/6.3V

12

12

C0617

C0617
22UF/6.3V

22UF/6.3V

12

+

+

R0605 75OhmR0605 75Ohm

1 2

R0602 43OhmR0602 43Ohm

1 2

R0604 130Ohm

R0604 130Ohm

1 2

1%

1%

21

0402

0402

21

0402

0402

T0601T0601

VCCP_SENSE <82>
VSSP_SENSE <82>

+VTT_CPU+1.05VS

C0608

C0608
22UF/6.3V

22UF/6.3V

C0618

C0618
22UF/6.3V

22UF/6.3V

CE0601

CE0601

330UF/2V

330UF/2V

@

@

+VTT_CPU

12

@

@

12

C0604

C0604
22UF/6.3V

22UF/6.3V

12

C0609

C0609
22UF/6.3V

22UF/6.3V

12

C0614

C0614
22UF/6.3V

22UF/6.3V

12

C0619

C0619
22UF/6.3V

22UF/6.3V

12

+

+

C0677

C0677

0.1UF/16V

0.1UF/16V

3

2

1

Main Board

+VGFX_CORE +VGFX

POWER

12

PC8078

PC8078
22UF/6.3V

22UF/6.3V

c0805

c0805

POWER

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

VREFMISC

VREFMISC

GRAPHICS

GRAPHICS

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

1.8V RAIL

1.8V RAIL

VCCSA_SEL0

12

PC8079

PC8079
22UF/6.3V

22UF/6.3V

c0805

c0805

It must be min 100ns after to +1.5Vs reaches 80%

AK35

VAXG_SENSE

AK34

0930: R0617, R0618 Change to 1K

+V_SM_VREF_CNT

AL1

SM_VREF

+V_SM_VREF Should have 10
mils trace width

AF7

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

VCCSA_SENSE

FC_C22

VCCSA_VID1

AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

M27
M26
L26
J26
J25
J24
H26
H25

H23

C22
C24

12

12

12

+

+

CE0607

CE0607

330UF/2V

330UF/2V

R0610 100Ohm

R0610 100Ohm

1%

1%

VCCSA_SENSE

VCCSA_SEL1 VCCSA_SEL

L

L

H

L

H

L 0.75V

HH

VCC_AXG_SENSE <80>
VSS_AXG_SENSE <80>

12

C0647

C0647

C0648

C0648

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

12

C0651

C0651

C0650

C0650

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

@

@

VCCSA

12

12

C0653

C0653

C0654

C0654

10UF/6.3V

10UF/6.3V

10UF/6.3V

10UF/6.3V

12

1

1 2

1 2

VCCSA_SEL0 <87>

VCCSA_SEL1 <87>

R0608 1KOhmR0608 1KOhm

R0609 1KOhmR0609 1KOhm

0.9V

0.8V

0.65V

+VDDQ

5A

T0602T0602

12

C0649

C0649
10UF/6.3V

10UF/6.3V

12

C0652

C0652
10UF/6.3V

10UF/6.3V

12

+0.8VS

+VDDQ

C0655

C0655
10UF/6.3V

10UF/6.3V

R0617

R0617
1KOhm

1KOhm

1%

1%

1 2

R0618

R0618
1KOhm

1KOhm

1%

1%

1 2

1009 change +1.5V to
+1.5VS for energy star

+1.5VS

+0.8VS

6A

12

C0656

C0656
10UF/6.3V

10UF/6.3V

12

+

+

CE0608

CE0608

330UF/2V

330UF/2V

+VGFX

SL0607

SL0607

0805

0805

C0644

C0644
10UF/6.3V

10UF/6.3V

12

12

12

12

C0635

C0635
22UF/6.3V

22UF/6.3V

12

C0638

C0638
22UF/6.3V

22UF/6.3V

C0628

C0628
22UF/6.3V

22UF/6.3V

C0631

C0631
22UF/6.3V

22UF/6.3V

C0634

C0634
22UF/6.3V

22UF/6.3V

12

33A

1A

C0645

C0645
1UF/6.3V

1UF/6.3V

12

12

12

C0636

C0636
22UF/6.3V

22UF/6.3V

12

C0639

C0639
22UF/6.3V

22UF/6.3V

C0629

C0629
22UF/6.3V

22UF/6.3V

C0632

C0632
22UF/6.3V

22UF/6.3V

12

C0646

C0646
1UF/6.3V

1UF/6.3V

12

12

12

+

+

12

C0637

C0637
22UF/6.3V

22UF/6.3V

12

C0640

C0640
22UF/6.3V

22UF/6.3V

12

C0643

C0643
22UF/6.3V

22UF/6.3V

C0630

C0630
22UF/6.3V

22UF/6.3V

C0633

C0633
22UF/6.3V

22UF/6.3V

CE0604

CE0604

330UF/2V

330UF/2V

@

@

VCCPLL

12

+

+

CE0606

CE0606

@

@

10A

12

C0605

C0605
22UF/6.3V

22UF/6.3V

12

C0610

C0610
22UF/6.3V

22UF/6.3V

12

C0615

C0615
22UF/6.3V

22UF/6.3V

+VTT_CPU

12

C0679

C0679

0.1UF/16V

0.1UF/16V

@

@

VR_SVID_ALERT# <80>
VR_SVID_CLK <80>
VR_SVID_DATA <80>

VCCSENSE <80>
VSSSENSE <80>

Power stuff
220uF*2,so EE only
reserve *1

+1.8VS

21

12

12

C0620

C0620
22UF/6.3V

22UF/6.3V

CE0802

CE0802

330UF/2V

330UF/2V

12

C0678

C0678

0.1UF/16V

0.1UF/16V

@

@

U0301G

U0301G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

AT20

VAXG4

AT18

VAXG5

AT17

VAXG6

AR24

VAXG7

AR23

VAXG8

AR21

VAXG9

AR20

VAXG10

AR18

VAXG11

AR17

VAXG12

AP24

VAXG13

AP23

VAXG14

AP21

VAXG15

AP20

VAXG16

AP18

VAXG17

AP17

VAXG18

AN24

VAXG19

AN23

VAXG20

AN21

VAXG21

AN20

VAXG22

AN18

VAXG23

AN17

VAXG24

AM24

VAXG25

AM23

VAXG26

AM21

VAXG27

AM20

VAXG28

AM18

VAXG29

AM17

VAXG30

AL24

VAXG31

AL23

VAXG32

AL21

VAXG33

AL20

VAXG34

AL18

VAXG35

AL17

VAXG36

AK24

VAXG37

AK23

VAXG38

AK21

VAXG39

AK20

VAXG40

AK18

VAXG41

AK17

VAXG42

AJ24

VAXG43

AJ23

VAXG44

AJ21

VAXG45

AJ20

VAXG46

AJ18

VAXG47

AJ17

VAXG48

AH24

VAXG49

AH23

VAXG50

AH21

VAXG51

AH20

VAXG52

AH18

VAXG53

AH17

VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

330UF/2V

330UF/2V

SOCKET989

SOCKET989

PC8071,PC8072 change to 10uF,so its can be in CPU socket

In CPU socket

+VCORE

12

PC8070

PC8070
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8071

PC8071
10UF/6.3V

10UF/6.3V

c0603

c0603

12

PC8072

PC8072
10UF/6.3V

10UF/6.3V

c0603

c0603

12

PC8073

PC8073
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8074

PC8074
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8075

PC8075
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8076

PC8076
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8077

PC8077
22UF/6.3V

22UF/6.3V

c0805

c0805

close CPU socket

+VCORE

12

12

PC8080

PC8080
22UF/6.3V

22UF/6.3V

c0805

c0805

5

4

www.vinafix.vn

PC8081

PC8081
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8082

PC8082
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8083

PC8083
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8084

PC8084
22UF/6.3V

22UF/6.3V

c0805

c0805

3

12

PC8085

PC8085
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8086

PC8086
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8087

PC8087
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8088

PC8088
22UF/6.3V

22UF/6.3V

c0805

c0805

12

PC8089

PC8089
22UF/6.3V

22UF/6.3V

c0805

c0805

Title :

Title :

Title :

CPU_PWR

CPU_PWR

CPU_PWR

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

695Wednesday, October 13, 2010

695Wednesday, October 13, 2010

695Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Main Board

D D

+1.05VSO +3VS

C C

12

R0707

R0707

R0706

R0706
51Ohm

51Ohm

1KOhm

1 2

1KOhm

XDP_DBRESET# <3,22,67>
XDP_TDO <3>

R0708 0Ohm @R0708 0Ohm @

1 2

R0709 0Ohm @R0709 0Ohm @

1 2

FPC_CON_26P

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

/X

/X

FPC_CON_26P

1

SIDE1

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24

SIDE2

25
26

J0701

J0701

27

28

4

www.vinafix.vn

XDP_PREQ#_D

1

T0701T0701
T0702T0702

T0703T0703
T0704T0704

12
12

1 2

/X

/X

T0705T0705

T0706T0706

OBS_DATA0

1

OBS_DATA1

1

OBS_DATA2

1

OBS_DATA3

1

CPUPWRGD_XDP
PM_PWRBTN#_XDP
XDP_HOOK2
SYS_PWROK_XDP

CLK_XDP_P
CLK_XDP_N

XDP_RST#_R

TCK1

1

XDP_PRDY#<3>

B B

R0701 1KOhm

+1.05VSO

5

R0701 1KOhm
R0702 0Ohm

R0702 0Ohm
R0703 1KOhm

R0703 1KOhm

1 2

/X

/X

R0704 0Ohm

R0704 0Ohm

1 2

/X

/X
/X

/X
/X

/X

R0705 1KOhm

R0705 1KOhm

H_CPUPWRGD<3,25>

PM_PWRBTN#_R<22,67>

CFG0<5>

PM_SYSPWROK_PCH<22>

H_CPUPWRGD<3,25>

XDP_DBRESET#<3,22,67>

XDP_TDO<3>

XDP_TRST#<3>

XDP_TDI<3>
XDP_TMS<3>

XDP_TCLK<3>

A A

R0710 0Ohm @R0710 0Ohm @

+3VA

12

R0711

R0711
1KOhm

1KOhm

@

@

SYS_PWROK_XDP

1 2

CLK_XDP_P
CLK_XDP_N

CLK_XDP_N
CLK_XDP_P

3

XDP_TDI <3>
XDP_TMS <3>

PCH_JTAG_TDO <20,67>

PCH_JTAG_TDI <20,67>

PCH_JTAG_TMS <20,67>

RNX0703B

@ RNX0703B

@

3 4

0OHM

0OHM

RNX0703A

RNX0703A

1 2

0OHM

0OHM

@

@

RNX0702B

RNX0702B

3 4

0OHM

0OHM

RNX0702A

RNX0702A

1 2

0OHM

0OHM

/X

/X
/X

/X

CLK_ITP_BCLK <5>
CLK_ITP_BCLK# <5>

CLK_ITP_BCLK_PCH# <21>
CLK_ITP_BCLK_PCH <21>

2

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

CPU_XDP

CPU_XDP

CPU_XDP

Wish

Wish

Wish

795Wednesday, October 13, 2010

795Wednesday, October 13, 2010

795Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

NB_****

NB_****

NB_****

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

895Wednesday, October 13, 2010

895Wednesday, October 13, 2010

895Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

A

A

A

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

Date: Sheet

2

Engineer:

N73Sv

N73Sv

N73Sv

NB_****

NB_****

NB_****

Wish

Wish

Wish

995Wednesday, October 13, 2010

995Wednesday, October 13, 2010

995Wednesday, October 13, 2010

1

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

A

A

A

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

Date: Sheet

2

Engineer:

N73Sv

N73Sv

N73Sv

NB_****

NB_****

NB_****

Wish

Wish

Wish

10 95Wednesday, October 13, 2010

10 95Wednesday, October 13, 2010

10 95Wednesday, October 13, 2010

1

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

A

A

A

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

Date: Sheet

2

Engineer:

N73Sv

N73Sv

N73Sv

NB_****

NB_****

NB_****

Wish

Wish

Wish

11 95Wednesday, October 13, 2010

11 95Wednesday, October 13, 2010

11 95Wednesday, October 13, 2010

1

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

NB_****

NB_****

NB_****

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

12 95Wednesday, October 13, 2010

12 95Wednesday, October 13, 2010

12 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

D D

C C

4

3

2

1

B B

A A

Title :

Title :

Title :

NB_****

NB_****

NB_****

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

13 95Wednesday, October 13, 2010

13 95Wednesday, October 13, 2010

13 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

D D

M_A_A[15:0]<4,16>

M_A_BS0<4,16>
M_A_BS1<4,16>
M_A_BS2<4,16>

M_A_CAS#<4,16>

M_CLK_DDR#4<4>

C C

B B

M_CLK_DDR#5<4>

M_CLK_DDR4<4>
M_CLK_DDR5<4>

M_CKE4<4>
M_CKE5<4>

M_A_DQS[7:0]<4,16>

M_A_DQS#[7:0]<4,16>

M_A_DQS1
M_A_DQS0
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#1
M_A_DQS#0
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

CH-A-4mm-TOP

J1401A

J1401A

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

115

CAS#

103

CK#0

104

CK#1

101

CK0

102

CK1

73

CKE0

74

CKE1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3_DIMM_204P

DDR3_DIMM_204P

12G02554204A

12G02554204A

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ[63:0] <4,16>

M_A_DQ8

5

M_A_DQ10

7

M_A_DQ9

15

M_A_DQ13

17

M_A_DQ11

4

M_A_DQ12

6

M_A_DQ14

16

M_A_DQ15

18

M_A_DQ5

21

M_A_DQ4

23

M_A_DQ7

33

M_A_DQ2

35

M_A_DQ0

22

M_A_DQ1

24

M_A_DQ3

34

M_A_DQ6

36

M_A_DQ17

39

M_A_DQ20

41

M_A_DQ23

51

M_A_DQ19

53

M_A_DQ21

40

M_A_DQ16

42

M_A_DQ18

50

M_A_DQ22

52

M_A_DQ28

57

M_A_DQ30

59

M_A_DQ27

67

M_A_DQ31

69

M_A_DQ24

56

M_A_DQ26

58

M_A_DQ25

68

M_A_DQ29

70

M_A_DQ32

129

M_A_DQ38

131

M_A_DQ33

141

M_A_DQ36

143

M_A_DQ35

130

M_A_DQ37

132

M_A_DQ34

140

M_A_DQ39

142

M_A_DQ47

147

M_A_DQ41

149

M_A_DQ40

157

M_A_DQ46

159

M_A_DQ44

146

M_A_DQ42

148

M_A_DQ43

158

M_A_DQ45

160

M_A_DQ49

163

M_A_DQ53

165

M_A_DQ50

175

M_A_DQ52

177

M_A_DQ51

164

M_A_DQ48

166

M_A_DQ54

174

M_A_DQ55

176

M_A_DQ61

181

M_A_DQ57

183

M_A_DQ58

191

M_A_DQ60

193

M_A_DQ62

180

M_A_DQ56

182

M_A_DQ63

192

M_A_DQ59

194

0

1

2

3

4

5

6

7

SMBus Slave Address: A2H

+1.5V

12

+

+

@

@

CE1403

CE1403
220UF/4V

220UF/4V

ESR=40mOhm/Ir=1.9A

ESR=40mOhm/Ir=1.9A

+3VS

12

R1401

R1401
10KOhm

10KOhm

Layout Note: Place these caps near SO DIMM 0

12

C1405

C1405
1UF/10V

1UF/10V

C1410

C1410
10UF/6.3V

10UF/6.3V

C1414

C1414

2.2UF/10V

2.2UF/10V

12

C1411

C1411
10UF/6.3V

10UF/6.3V

12

12

+3VS

12

C1415

C1415

0.1UF/16V

0.1UF/16V

PM_EXTTS#0<16,17,30>

DRAMRST#<4>

DRAMRST#_R<16,17>

12

C1406

C1406
1UF/10V

1UF/10V

12

C1412

C1412
10UF/6.3V

10UF/6.3V

M_VREFCA_DIMM0

12

C1424

C1424

2.2UF/10V

2.2UF/10V

M_VREFDQ_DIMM0

12

C1422

C1422

2.2UF/10V

2.2UF/10V

12

12

C1407

C1407
1UF/10V

1UF/10V

C1413

C1413
10UF/6.3V

10UF/6.3V

M_ODT4<4>
M_ODT5<4>

M_A_RAS#<4,16>

M_CS#4<4>
M_CS#5<4>

12

C1423

C1423

0.1UF/16V

0.1UF/16V

12

C1425

C1425

0.1UF/16V

0.1UF/16V

R1403 1KOhm1%R1403 1KOhm1%

SMB_CLK_S<16,17,28,29,53>
SMB_DAT_S<16,17,28,29,53>

12

C1408

C1408
1UF/10V

1UF/10V

12

C1420

C1420
1UF/10V

1UF/10V

@

@

J1401B

J1401B

198

EVENT#

207

GND1

208

GND2

77

NC1

122

NC2

205

NP_NC1

206

NP_NC2

116

ODT0

120

ODT1

110

RAS#

30

12

RESET#

114

S#0

121

S#1

197

SA0

201

SA1

202

SCL

200

SDA

125

TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

126

VREFCA

1

VREFDQ

DDR3_DIMM_204P

DDR3_DIMM_204P

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

WE#

+0.75VS

12

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

113

C1416

C1416
1UF/10V

1UF/10V

12

C1417

C1417
1UF/10V

1UF/10V

+0.75VS

M_A_WE# <4,16>

12

C1418

C1418
1UF/10V

1UF/10V

12

C1419

C1419
1UF/10V

1UF/10V

A A

DDR3 SO-DIMM_0

DDR3 SO-DIMM_0

DDR3 SO-DIMM_0

Title :

Title :

Title :

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB6

ASUSTeK COMPUTER INC. NB6

ASUSTeK COMPUTER INC. NB6

Size Project Name

Size Project Name

Size Project Name

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

5

4

www.vinafix.vn

3

2

Date: Sheet

N73Sv

N73Sv

N73Sv

Wednesday, October 13, 2010

Wednesday, October 13, 2010

Wednesday, October 13, 2010

Engineer:

1

Wish

Wish

Wish

of

14 95

14 95

14 95

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

DDR3_****

DDR3_****

DDR3_****

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

15 95Wednesday, October 13, 2010

15 95Wednesday, October 13, 2010

15 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

CH-A-5.2mm-BOT

J1601A

M_A_A[15:0]<4,14>

D D

M_A_BS0<4,14>
M_A_BS1<4,14>
M_A_BS2<4,14>

M_A_CAS#<4,14>
M_CLK_DDR#0<4>
M_CLK_DDR#1<4>

M_CLK_DDR0<4>
M_CLK_DDR1<4>

M_CKE0<4>
M_CKE1<4>

M_A_DQS[7:0]<4,14>

C C

M_A_DQS#[7:0]<4,14>

B B

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQS1
M_A_DQS0
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#1
M_A_DQS#0
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

J1601A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

115

CAS#

103

CK#0

104

CK#1

101

CK0

102

CK1

73

CKE0

74

CKE1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3_DIMM_204P

DDR3_DIMM_204P

12G025542044

12G025542044

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

M_A_DQ11

5

DQ0

M_A_DQ12

7

DQ1

M_A_DQ15

15

DQ2

M_A_DQ14

17

DQ3

M_A_DQ8

4

DQ4

M_A_DQ10

6

DQ5

M_A_DQ9

16

DQ6

M_A_DQ13

18

DQ7

M_A_DQ1

21

DQ8

M_A_DQ0

23

DQ9

M_A_DQ3

33

M_A_DQ6

35

M_A_DQ5

22

M_A_DQ4

24

M_A_DQ7

34

M_A_DQ2

36

M_A_DQ21

39

M_A_DQ16

41

M_A_DQ22

51

M_A_DQ18

53

M_A_DQ20

40

M_A_DQ17

42

M_A_DQ23

50

M_A_DQ19

52

M_A_DQ26

57

M_A_DQ24

59

M_A_DQ25

67

M_A_DQ29

69

M_A_DQ28

56

M_A_DQ30

58

M_A_DQ31

68

M_A_DQ27

70

M_A_DQ35

129

M_A_DQ37

131

M_A_DQ34

141

M_A_DQ39

143

M_A_DQ32

130

M_A_DQ38

132

M_A_DQ33

140

M_A_DQ36

142

M_A_DQ44

147

M_A_DQ42

149

M_A_DQ43

157

M_A_DQ45

159

M_A_DQ47

146

M_A_DQ41

148

M_A_DQ40

158

M_A_DQ46

160

M_A_DQ49

163

M_A_DQ48

165

M_A_DQ54

175

M_A_DQ55

177

M_A_DQ51

164

M_A_DQ53

166

M_A_DQ50

174

M_A_DQ52

176

M_A_DQ62

181

M_A_DQ56

183

M_A_DQ63

191

M_A_DQ59

193

M_A_DQ61

180

M_A_DQ57

182

M_A_DQ58

192

M_A_DQ60

194

M_A_DQ[63:0] <4,14>

0

1

2

3

4

5

ESR=40mOhm/Ir=1.9A

ESR=40mOhm/Ir=1.9A

6

7

PM_EXTTS#0<14,17,30>

SMBus Slave Address: A0H

2 1

0402

0402

+1.5V

Layout Note: Place these caps near SO DIMM 0

12

12

C1605

C1605

C1606

C1606

1UF/10V

1UF/10V

1UF/10V

1UF/10V

12

+

+

CE1603

CE1603
220UF/4V

220UF/4V

@

@

+3VS

12

12

C1614

C1614

2.2UF/10V

2.2UF/10V

C1610

C1610

10UF/6.3V

10UF/6.3V

12

10UF/6.3V

10UF/6.3V

12

C1615

C1615

0.1UF/16V

0.1UF/16V

C1611

C1611

12

10UF/6.3V

10UF/6.3V

C1612

C1612

DRAMRST#_R<14,17>

SL1605

SL1605

12

C1607

C1607
1UF/10V

1UF/10V

12

C1613

C1613

10UF/6.3V

10UF/6.3V

M_VREFCA_DIMM0

12

C1624

C1624

2.2UF/10V

2.2UF/10V

M_VREFDQ_DIMM0

12

M_ODT0<4>
M_ODT1<4>

M_A_RAS#<4,14>

M_CS#0<4>
M_CS#1<4>

SMB_CLK_S<14,17,28,29,53>
SMB_DAT_S<14,17,28,29,53>

C1622

C1622

2.2UF/10V

2.2UF/10V

12

12

C1608

C1608
1UF/10V

1UF/10V

@

@

C1620

C1620
1UF/10V

1UF/10V

12

C1623

C1623

0.1UF/16V

0.1UF/16V

12

C1625

C1625

0.1UF/16V

0.1UF/16V

J1601B

J1601B

198

EVENT#

207

GND1

208

GND2

77

NC1

122

NC2

205

NP_NC1

206

NP_NC2

116

ODT0

120

ODT1

110

RAS#

30

RESET#

114

S#0

121

S#1

197

SA0

201

SA1

202

SCL

200

SDA

125

TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

126

VREFCA

1

VREFDQ

DDR3_DIMM_204P

DDR3_DIMM_204P

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1

VTT2

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189

+0.75VS

190
195
196

203
204

12

C1617

C1617
1UF/10V

1UF/10V

M_A_WE# <4,14>

12

C1618

C1618
1UF/10V

1UF/10V

12

C1619

C1619
1UF/10V

1UF/10V

113

WE#

+0.75VS

12

C1616

C1616
1UF/10V

1UF/10V

A A

Title :

DDR3 SO-DIMM_0

Title :

DDR3 SO-DIMM_0

Title :

DDR3 SO-DIMM_0

Wish

Wish

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

Engineer:

1

ASUSTeK COMPUTER INC. NB6

ASUSTeK COMPUTER INC. NB6

ASUSTeK COMPUTER INC. NB6

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, October 13, 2010

Wednesday, October 13, 2010

5

4

www.vinafix.vn

3

2

Wednesday, October 13, 2010

Wish

of

16 95

of

16 95

of

16 95

Rev

Rev

Rev

1.0

1.0

1.0

5

CH-B-9.2mm-BOT

J1701A

M_B_A[15:0]<4>

D D

M_B_BS0<4>
M_B_BS1<4>
M_B_BS2<4>

M_B_CAS#<4>
M_CLK_DDR#2<4>
M_CLK_DDR#3<4>

M_CLK_DDR2<4>
M_CLK_DDR3<4>

M_CKE2<4>
M_CKE3<4>

M_B_DQS[7:0]<4>

C C

M_B_DQS#[7:0]<4>

B B

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQS0
M_B_DQS1

M_B_DQS2
M_B_DQS3

M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_DQS#0
M_B_DQS#1

M_B_DQS#2
M_B_DQS#3

M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

J1701A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

115

CAS#

103

CK#0

104

CK#1

101

CK0

102

CK1

73

CKE0

74

CKE1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

10

DQS#0

27

DQS#1

45

DQS#2

62

DQS#3

135

DQS#4

152

DQS#5

169

DQS#6

186

DQS#7

DDR3_DIMM_204P

DDR3_DIMM_204P

12G02555204B

12G02555204B

DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

SWAP

M_B_DQ2
M_B_DQ5
M_B_DQ1
M_B_DQ3
M_B_DQ4
M_B_DQ0
M_B_DQ6
M_B_DQ7

M_B_DQ13

M_B_DQ10
M_B_DQ12
M_B_DQ15
M_B_DQ9
M_B_DQ14
M_B_DQ8
M_B_DQ11
M_B_DQ16

M_B_DQ20

M_B_DQ18

M_B_DQ21
M_B_DQ22
M_B_DQ17

M_B_DQ23

M_B_DQ19
M_B_DQ26

M_B_DQ27
M_B_DQ29
M_B_DQ25

M_B_DQ30

M_B_DQ31
M_B_DQ28
M_B_DQ24
M_B_DQ32

M_B_DQ33

M_B_DQ38

M_B_DQ37

M_B_DQ34
M_B_DQ36
M_B_DQ39
M_B_DQ35

M_B_DQ44
M_B_DQ42

M_B_DQ45
M_B_DQ41

M_B_DQ47

M_B_DQ40

M_B_DQ46
M_B_DQ43
M_B_DQ52
M_B_DQ49
M_B_DQ54
M_B_DQ55
M_B_DQ51
M_B_DQ53
M_B_DQ48
M_B_DQ50
M_B_DQ58

M_B_DQ59

M_B_DQ61

M_B_DQ62

M_B_DQ60
M_B_DQ56

M_B_DQ63
M_B_DQ57

4

M_B_DQ[63:0] <4>

+1.5V

ESR=40mOhm/Ir=1.9A

ESR=40mOhm/Ir=1.9A

PM_EXTTS#0<14,16,30>

SMBus Slave Address: A4H

+3VS

0930: add pull up R1701

12

R1701

R1701
10KOhm

10KOhm

Layout Note: Place these caps near SO DIMM 1

12

12

C1706

C1706

C1705

C1705

1UF/10V

1UF/10V

1UF/10V

1UF/10V

12

+

+

CE1703

CE1703
220UF/4V

220UF/4V

12

@

@

C1710

C1710
10UF/6.3V

10UF/6.3V

+3VS

12

C1714

C1714

2.2UF/10V

2.2UF/10V

12

12

C1715

C1715

0.1UF/16V

0.1UF/16V

C1711

C1711
10UF/6.3V

10UF/6.3V

12

C1712

C1712
10UF/6.3V

10UF/6.3V

M_VREFCA_DIMM1

12

M_VREFDQ_DIMM1

12

12

C1724

C1724

2.2UF/10V

2.2UF/10V

12

3

DRAMRST#_R<14,16>

C1707

C1707
1UF/10V

1UF/10V

C1713

C1713
10UF/6.3V

10UF/6.3V

C1722

C1722

2.2UF/10V

2.2UF/10V

M_B_RAS#<4>

12

C1723

C1723

0.1UF/16V

0.1UF/16V

2

J1701B

J1701B

198

EVENT#

207

GND1

208

GND2

77

NC1

122

NC2

205

NP_NC1

206

NP_NC2

M_ODT2<4>
M_ODT3<4>

M_CS#2<4>
M_CS#3<4>

SMB_CLK_S<14,16,28,29,53>
SMB_DAT_S<14,16,28,29,53>

12

C1708

C1708
1UF/10V

1UF/10V

12

@

@

C1720

C1720
1UF/10V

1UF/10V

12

C1725

C1725

0.1UF/16V

0.1UF/16V

116

ODT0

120

ODT1

110

RAS#

30

RESET#

114

S#0

121

S#1

197

SA0

201

SA1

202

SCL

200

SDA

125

TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

126

VREFCA

1

VREFDQ

DDR3_DIMM_204P

DDR3_DIMM_204P

+0.75VS

12

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8

VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1

VTT2

WE#

C1716

C1716
1UF/10V

1UF/10V

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189

+0.75VS

190
195
196

203
204

12

C1718

C1718
1UF/10V

1UF/10V

M_B_WE# <4>

12

C1719

C1719
1UF/10V

1UF/10V

113

12

C1717

C1717
1UF/10V

1UF/10V

1

A A

Title :

DDR3 SO-DIMM_1

Title :

DDR3 SO-DIMM_1

Title :

DDR3 SO-DIMM_1

Wish

Wish

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

Engineer:

1

ASUSTeK COMPUTER INC. NB6

ASUSTeK COMPUTER INC. NB6

ASUSTeK COMPUTER INC. NB6

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, October 13, 2010

Wednesday, October 13, 2010

5

4

www.vinafix.vn

3

2

Wednesday, October 13, 2010

Wish

of

17 95

of

17 95

of

17 95

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

+1.5V

R1801

R1801
1KOhm

1KOhm

1%

1%

1 2

R1802

+1.5V

R1802
1KOhm

1KOhm

1%

1%

1 2

R1803

R1803
1KOhm

1KOhm

1%

1%

1 2

R1804

R1804
1KOhm

1KOhm

1%

1%

1 2

D D

12

C1805

C1805

0.1UF/16V

0.1UF/16V

12

C1804

C1804

0.1UF/16V

0.1UF/16V

M_VREFDQ_DIMM0

M_VREFCA_DIMM0

For DDR3_VREF command & address.

M1

M1: Fixed SO-DIMM VREF_DQ
(Default Stuffing)

C C

+1.5V

R1818

R1818
1KOhm

1KOhm

1%

1%

1 2

R1820

R1820
1KOhm

1KOhm

1%

1%

1 2

12

C1806

C1806

0.1UF/16V

0.1UF/16V

M_VREFCA_DIMM1

+1.5V

B B

A A

5

R1821

R1821
1KOhm

1KOhm

1%

1%

1 2

R1819

R1819
1KOhm

1KOhm

1%

1%

1 2

12

C1807

C1807

0.1UF/16V

0.1UF/16V

M_VREFDQ_DIMM1

Title :

Title :

Title :

DIM_CA/DQ Voltage

DIM_CA/DQ Voltage

DIM_CA/DQ Voltage

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

4

www.vinafix.vn

3

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

18 95Wednesday, October 13, 2010

18 95Wednesday, October 13, 2010

18 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

Main Board

D D

C C

B B

A A

Title :

Title :

Title :

CPU_VID Controller_*

CPU_VID Controller_*

CPU_VID Controller_*

Wish

Wish

Engineer:

Engineer:

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

2

Date: Sheet

Engineer:

N73Sv

N73Sv

N73Sv

1

Wish

19 95Wednesday, October 13, 2010

19 95Wednesday, October 13, 2010

19 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

+VCC_RTC

12

R2002

R2002
20KOhm

D D

CMOS Settings

Clear CMOS
Keep CMOS

TPM Settings

Clear ME RTC
Registers
Keep ME RTC
Registers

C C

JRST2001

Shunt

Open
(Default)

JRST2002

Shunt

Open
(Default)

HDA_SYNC(On-Die PLL VR voltage select):
Rising edge of RSMRST# pin
High:1.5V, Low:1.8V (default)

+3VSUS_HDA

1 2

R2027 1KOhmR2027 1KOhm

20KOhm

1%

1%

R2003

R2003
20KOhm

20KOhm

1%

1%

ACZ_SYNC

GND GND

12

12

12

C2002

C2002
1UF/6.3V

1UF/6.3V

C2003

C2003
1UF/6.3V

1UF/6.3V

GNDGND

1

1
2

2

1

JRST2002

JRST2002

1

SGL_JUMP

SGL_JUMP

2

2

JRST2001

JRST2001
SGL_JUMP

SGL_JUMP

@

@

@

@

R2009 0Ohm

R2009 0Ohm

stuff R2027 for 1.5V +VCCAFDI

+3VS

U2002

5

VCC

VCC

Y

Y

U2002

74LVC1G07GW

74LVC1G07GW

1

NC

NC

ACZ_SYNC

A

A

2
34

GND

GND

@

@

GND

R2028

R2028
200Ohm

200Ohm

@

@

ACZ_SYNC_AUD

B B

HDA_SYNC signal also serves as a strap for selecting VRM voltage to the PCH. The
strap is sampled on the rising edge of RSMRST# signal. Due to potential leakage
on the codec (path to GND), the strap may not be able to achive the Vihmin at PCH
input.Therefore, platform may need to isolate this signal from the codec during
the strap phase.

1 2

4

@

@

12

+VCC_RTC

Stuff For Moff

PCH P/N : 02G010027100

12

GND

C2005

C2005
18PF/50V

18PF/50V

C2006

C2006
18PF/50V

18PF/50V

GND

reserve for power noise

C2007

C2007

15PF/50V

15PF/50V

@

@

ACZ_BCLK_AUD

12

C2008

C2008

0.1UF/16V /EMI

0.1UF/16V /EMI

GND

14

2
3

12

1 2

R2004 1MOhm 5%R2004 1MOhm 5%

1 2

R2007 330KOhm 5%R2007 330KOhm 5%

ACZ_SDIN0_AUD

12

X2001

X2001

32.768Khz

32.768Khz

X2RTC

3

RTC battery

+3VA

+RTC_BAT

12

R2001 1KOhm 5%R2001 1KOhm 5%

12

BAT1

BAT1

3

BATT_HOLDER_2P

BATT_HOLDER_2P

SPI_SI

1
1

4

X1_RTC
X2_RTC
RTCRST#
SRTCRST#
SM_INTRUDER#
INTVRMEN

ACZ_BCLK
ACZ_SYNC

PCH_SPKR

ACZ_RST#

ACZ_SDIN1_MDC
ACZ_SDIN2

ACZ_SDOUT

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO

SB_SPICS0#
SB_SPICS1#

Intel Anti-Theft
Technology:
Enable=High

GND

A20
C20
D20
G22

K22
C17

N34

L34

T10

K34

E34
G34
C34

A34

A36

C36
N32

J3

H7

K5

H1

T3

Y14

T1

V4

U3

U2001A

U2001A

RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDO

HDA_DOCK_EN# / GPIO33
HDA_DOCK_RST# / GPIO13

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

COUGARPOINT-H

COUGARPOINT-H

12

R2006

R2006
10MOhm

10MOhm

5%

5%

SL2001

SL2001

2 1

0402

0402

12

R2018

R2018
330KOhm

330KOhm

5% @

5% @

GND

ACZ_SDIN0_AUD<36>

T2007T2007
T2004T2004

HDA_DOCK_EN#

T2018T2018

1

HDA_DOCK_RST#

T2017T2017

1

PCH_JTAG_TCK<67>
PCH_JTAG_TMS<7,67>
PCH_JTAG_TDI<7,67>
PCH_JTAG_TDO<7,67>

SPI_CLK<28>
SPI_CS#0<28>

SPI_SI<28>
SPI_SO<28>

R2010 15Ohm 5%R2010 15Ohm 5%

T2003T2003

+3VS_VCC3_3

1 2

12
1

R2011

R2011
10KOhm

10KOhm

@

@

2

BATT HOLDER @ IO BOARD 2

+VCC_RTC+RTCBAT

D2001

D2001

1

3

2

BAT54CW

BAT54CW

FWH0 / LAD0
FWH1 / LAD1
FWH2 / LAD2
FWH3 / LAD3

LPC

LPC

FWH4 / LFRAME#

LDRQ0#

LDRQ1# / GPIO23

RTCIHDA

RTCIHDA

JTAG

JTAG

SPI

SPI

SERIRQ

SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN

SATA 6G

SATA 6G

SATA1RXP
SATA1TXN
SATA1TXP

SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN
SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP
SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#
SATA0GP / GPIO21
SATA1GP / GPIO19

12

C2001

C2001
1UF/10V

1UF/10V

@

@

GND

C38
A38
B37
C37

D36
E36

K36
V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11
Y10

AB12
AB13

AH1

P3
V14
P1

PCH_DRQ#0

SATA0GP

SATA_COMP

SATA3_COMP

RBIAS_SATA3

SATA_LED# <56>

SATA1GP <24>

1 2

R2021 37.4Ohm 1%R2021 37.4Ohm 1%

1 2

R2022 49.9Ohm 1%R2022 49.9Ohm 1%

1 2

R2023 750Ohm 1%R2023 750Ohm 1%

SATALED#: O.D. 6mA

LPC_AD0 <30,44>
LPC_AD1 <30,44>
LPC_AD2 <30,44>
LPC_AD3 <30,44>

LPC_FRAME# <30,44>

T2005T2005

1

INT_SERIRQ <30>

SATA_RXN0 <51>
SATA_RXP0 <51>

SATA_TXN0 <51>
SATA_TXP0 <51>

SATA_RXN1 <51>
SATA_RXP1 <51>

SATA_TXN1 <51>
SATA_TXP1 <51>

SATA_RXN2 <51>
SATA_RXP2 <51>

SATA_TXN2 <51>
SATA_TXP2 <51>

GND

Boot BIOS Strap:GNT1#(BBS0), SATA1GP(BBS1)

1

+VTT_SATA

+VTT_SATA3

SATA 0
SATA 1
SATA 2
SATA 3
SATA 4
SATA 5

Main HD
2nd HD
ODD

ACZ_SDOUT:(1) PCH: Internal PD 20k
ohm, VIL=0.35V, VIH=0.65~3.3V (2)
ALC269:VIL<0.35*3.3V, VIH>0.65*3.3V

HD Audio JTAG For PU/PD

PCH_SPI_OV<30>

ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT

R2019 33OhmR2019 33Ohm

ACZ_BCLK_AUD<36>
ACZ_SYNC_AUD<36>
ACZ_RST#_AUD<36,37>

ACZ_SDOUT_AUD<36>

A A

1 2

R2024 33OhmR2024 33Ohm

1 2

R2025 33OhmR2025 33Ohm

1 2

R2026 33OhmR2026 33Ohm

1 2

GPIO33 is a signal used for Flash
Descriptor security Override/ME debug mode
HIGH : Disable, LOW : Enable

5

0930: Maunt for ME firmware update

+3VSUS_ORG

R2008

R2008
1KOhm

1KOhm

N/A

N/A

1 2

12

32

3

3

D

D

1

1

1

G

G

S

S

2

2

GND

R2043

R2043
33Ohm

33Ohm

Q2001

Q2001
2N7002ET1G

2N7002ET1G

ACZ_SDOUT

4

+3VS_VCC3_3

+3VSUS_ORG

+3VSUS_ORG

+3VSUS_ORG

R2012

R2012
200Ohm

200Ohm

1%

1%

1 2

R2013

R2013
100Ohm

100Ohm

1%

1%

1 2

GND

www.vinafix.vn

R2016

R2016

R2014

R2014

200Ohm

200Ohm

200Ohm

200Ohm

1%

1%

1%

1%

1 2

1 2

1 2

PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO

R2017

R2017

R2015

R2015

100Ohm

100Ohm

100Ohm

100Ohm

1%

1%

1%

1%

1 2

GNDGND

DPDG(P.28):51Ohm, CRB:4.7KOhm

GND

stuff ??

3

PCH_JTAG_TCK

R2020

R2020
51Ohm

51Ohm

1 2

SATA0GP

3 4

10KOHM

INT_SERIRQ

SATA_LED#

PCH_SPKR

SPKR:No Reboot strap

10KOHM

5 6

10KOHM

10KOHM

1 2

10KOHM

10KOHM

7 8

10KOHM

10KOHM

1 2

R2044 1KOhm

R2044 1KOhm

RN2002B

RN2002B

RN2002C

RN2002C

RN2002A

RN2002A

RN2002D

RN2002D

@

@

2

Boundary Scan TP (PCH)

PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO

RTCRST#

INTVRMEN
SRTCRST#

PCH_IBEX(1)SATA,IHDA,RTC,LPC

PCH_IBEX(1)SATA,IHDA,RTC,LPC

PCH_IBEX(1)SATA,IHDA,RTC,LPC

Title :

Title :

Title :

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

Engineer:

1

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

T2008T2008

1

T2009T2009

1

T2010T2010

1

T2011T2011

1

T2013T2013

1

T2015T2015

1

T2016T2016

1

Wish

Wish

Wish

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

20 95Wednesday, October 13, 2010

20 95Wednesday, October 13, 2010

20 95Wednesday, October 13, 2010

5

4

3

2

1

If support PCIE 3.0, pls change all 0.1uF to 0.22uF

U2001B

U2001B

PCIE1: TV

PCIE2: WLAN

D D

PCIE4: USB3.0

PCIE6: LAN

C C

B B

A A

PCIE_RXN1_TV<54>
PCIE_RXP1_TV<54>
PCIE_TXN1_C<54>
PCIE_TXP1_C<54>

PCIE_RXN2_WLAN<53>
PCIE_RXP2_WLAN<53>
PCIE_TXN2_C<53>
PCIE_TXP2_C<53>

PCIE_RXN4_USB3<68>
PCIE_RXP4_USB3<68>
PCIE_TXN4_C<68>
PCIE_TXP4_C<68>

PCIE_RXN6_GLAN<33>
PCIE_RXP6_GLAN<33>
PCIE_TXN6_C<33>
PCIE_TXP6_C<33>

CLK_PCIE_TV#_PCH<54>
CLK_PCIE_TV_PCH<54>

CLKREQ0_TV#<54>

CLK_PCIE_WLAN#_PCH<53>
CLK_PCIE_WLAN_PCH<53>

CLKREQ1_WLAN#<53>

CLK_PCIE_USB3#_PCH<68>
CLK_PCIE_USB3_PCH<68>

CLK_PCIE_GLAN#_N_PCH<33>
CLK_PCIE_GLAN_P_PCH<33>

CLKREQ_GLAN#<33>

CLK_ITP_BCLK_PCH#<7>
CLK_ITP_BCLK_PCH<7>

5

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

12
12

12
12

12
12

12
12

T2117T2117

CX21010.1UF/16V CX21010.1UF/16V
CX21020.1UF/16V CX21020.1UF/16V

CX21030.1UF/16V CX21030.1UF/16V
CX21040.1UF/16V CX21040.1UF/16V

CX21070.1UF/16V CX21070.1UF/16V
CX21080.1UF/16V CX21080.1UF/16V

CX21110.1UF/16V CX21110.1UF/16V
CX21120.1UF/16V CX21120.1UF/16V

SL2101

SL2101
SL2102

SL2102
SL2103

SL2103

SL2104

SL2104
SL2105

SL2105
SL2106

SL2106

SL2107

SL2107
SL2108

SL2108

T2125T2125

T2124T2124

SL2110

SL2110
SL2111

SL2111
SL2112

SL2112

T2115T2115

T2126T2126

T2123T2123

PCIE_TXN1
PCIE_TXP1

PCIE_TXN2
PCIE_TXP2

PCIE_TXN4
PCIE_TXP4

PCIE_TXN6
PCIE_TXP6

1

1

1

CLK_PEGB_REQ#

1

1

1

CLK_PCH_SRC0_N
CLK_PCH_SRC0_P

CLK_REQ0#

CLK_PCH_SRC1_N
CLK_PCH_SRC1_P

CLK_REQ1#

CLK_REQ2#

CLK_PCH_SRC3_N
CLK_PCH_SRC3_P

CLK_REQ3#_USB3

CLK_REQ4#

CLK_PCH_SRC5_N
CLK_PCH_SRC5_P

CLK_REQ5#

CLK_REQ6#

CLK_REQ7#

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0# / GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1# / GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2# / GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4# / GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5# / GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ# / GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6# / GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7# / GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

COUGARPOINT-H

COUGARPOINT-H

SMBALERT# / GPIO11

SML0ALERT# / GPIO60

SMBUSController

SMBUSController

SML1ALERT# / PCHHOT# / GPIO74

SML1CLK / GPIO58

SML1DATA / GPIO75

PCI-E*

PCI-E*

Link

Link

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLOCKS

CLOCKS

CLKREQ_PEG#<70>

4

CLKOUT_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_PCILOOPBACK

CLKOUTFLEX0 / GPIO64
CLKOUTFLEX1 / GPIO65
CLKOUTFLEX2 / GPIO66
CLKOUTFLEX3 / GPIO67

FLEX CLOCKS

FLEX CLOCKS

www.vinafix.vn

E12
H14

SMBCLK

C9

SMBDATA

DRAMRST_PCH

A12

SML0_CLK

C8

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

Check BIOS

Programmable output clock

+3VSG

1

1

1

G

G

2

2

S

S

2N7002 @

2N7002 @

Q2104

Q2104

G12

C13
E14
M16

M7

T11

P10

M10

AB37
AB38

AV22
AU22

AM12
AM13

BF18
BE18

BJ30
BG30

G24
E24

AK7
AK5

K45

H45

V47
V49

Y47

K43
F47
H47
K49

3

3

32

D

D

SML0_DAT

PCHHOT#
SML1_CLK
SML1_DAT

CL_CLK

CL_DAT

CL_RST#

CLK_PEGA_REQ#

CLK_PCIE_PEG#_PCH_R
CLK_PCIE_PEG_PCH_R

CLK_CPU_BCLK#_PCH
CLK_CPU_BCLK_PCH

CLK_DREF#_PCH
CLK_DREF_PCH

CLK_DMI#_PCH
CLK_DMI_PCH

CLK_GND#
CLK_GND

CLK_DOT96#_PCH
CLK_DOT96_PCH

CLK_SATA#_PCH
CLK_SATA_PCH

CLK_ICH14_PCH

CLK_PCI_FB

X1_25IN
X2_25OUT

XCLK_COMP

CLK_OUT0

CLK_OUT1
CLK_OUT2

CLK_OUT3

CLKREQ_PEG#_R

T2106T2106

1

T2107T2107

1

T2111T2111

1

T2108T2108

1

T2109T2109

1

T2110T2110

1

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

2 1

0402

0402

R2118 0Ohm@R2118 0Ohm@

1 2

R2119 0Ohm@R2119 0Ohm@

1 2

R2116 0Ohm@R2116 0Ohm@

1 2

R2117 0Ohm@R2117 0Ohm@

1 2

R2111 0Ohm@R2111 0Ohm@
R2112 0Ohm@R2112 0Ohm@

R2113 0Ohm@R2113 0Ohm@
R2115 0Ohm@R2115 0Ohm@

R2114 0Ohm@R2114 0Ohm@

1 2

R2101 90.9Ohm

R2101 90.9Ohm

1%

1%

T2119T2119

1

T2121T2121

1

T2120T2120

1
1 2

R2103 33OhmR2103 33Ohm

R2133

R2133

12

0Ohm @

0Ohm @

3

SL2127

SL2127
SL2128

SL2128

1 2
1 2

1 2
1 2

1 2

1

12

GND

SL2126

SL2126
SL2125

SL2125

C2107

C2107
10PF/50V

10PF/50V

@

@

CLK_PEGA_REQ#

T2118T2118

+VCCDIFFCLKN

EXT_SCI# <30>
SCL_3A <28>
SDA_3A <28>

DRAMRST_PCH <4>

SML1_CLK <28>
SML1_DAT <28>

CLK_PCIE_PEG#_PCH <70>
CLK_PCIE_PEG_PCH <70>

CLK_CPU_BCLK# <3>
CLK_CPU_BCLK <3>

CLK_DREF# <3>
CLK_DREF <3>

CLK_DMI# <29>
CLK_DMI <29>

CLK_DOT96# <29>
CLK_DOT96 <29>

CLK_SATA# <29>
CLK_SATA <29>

CLK_ICH14 <29>

CLK_PCI_FB <24>

CLK_USB48 <42>

+3VSUS_ORG

D

D

Q2101

Q2101

2N7002

2N7002

S

S

GND

To EC

R2107

R2107
1MOhm

1MOhm

5%

5%

1 2

2 1

SL2123

SL2123

R2108: For Xtal measurement

R2134

R2134
10KOhm

10KOhm

1 2

32

3

3

1

1

1

G

G

2

2

PCH CLKREQ Setting:

X1_25IN_XTAL

X2101

X2101
25Mhz

25Mhz

X225OUT

0402

0402

DGPU_PWROK <25,70>

2

C2108與C2109換成10pF

1 2

C2108 10PF/50VC2108 10PF/50V

4
2

1 3

1 2

C2109 10PF/50VC2109 10PF/50V

GND

Please refer to DG V0.7 P245

RC Delay Time

CLK_REQ7#
CLK_REQ6#
CLK_REQ2#

+3VSUS_ORG

+3VSUS_ORG

CLK_PEGA_REQ#

CLK_REQ3#_USB3

PCHHOT#
EXT_SCI#

CLK_PEGB_REQ#
SDA_3A

SCL_3A
DRAMRST_PCH

SML1_CLK
SML1_DAT

SML0_DAT
SML0_CLK

CLK_REQ5#

CLK_REQ1#

CLK_REQ0#
CLK_REQ4#
CLK_REQ1#
CLK_REQ5#

R2135 10KOhm

R2135 10KOhm

1 2

10KOHM

10KOHM

3 4

10KOHM

10KOHM

5 6

10KOHM

10KOHM

7 8

10KOHM

10KOHM

1 2

2.2KOhm

2.2KOhm

3 4

2.2KOhm

2.2KOhm

5 6

2.2KOhm

2.2KOhm

7 8

2.2KOhm

2.2KOhm

5 6

2.2KOhm

2.2KOhm

7 8

2.2KOhm

2.2KOhm

1 2

2.2KOhm

2.2KOhm

3 4

2.2KOhm

2.2KOhm

1 2

10KOHM

10KOHM

3 4

10KOHM

10KOHM

5 6

10KOHM

10KOHM

7 8

10KOHM

10KOHM

1 2

10KOHM

10KOHM

3 4

10KOHM

10KOHM

10KOHM

10KOHM
10KOHM

10KOHM

@ RN2106A

@

1 2

10KOHM

10KOHM

@ RN2106B

@

3 4

10KOHM

10KOHM

@ RN2106C

@

5 6

10KOHM

10KOHM

@ RN2106D

@

7 8

10KOHM

10KOHM

R2132 10KOhm @R2132 10KOhm @

1 2

R2124 10KOhmR2124 10KOhm

1 2

1 2

@

@

GND

CLK_GND#
CLK_GND

CLK_DMI#_PCH
CLK_DMI_PCH

CLK_DOT96#_PCH
CLK_DOT96_PCH

CLK_SATA#_PCH
CLK_SATA_PCH

CLK_ICH14_PCH

stuff:Integrated clock mode

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

N73Sv

N73Sv

Date: Sheet

Date: Sheet

Date: Sheet

N73Sv

+3VSUS_ORG

RN2101A

RN2101A
RN2101B

RN2101B
RN2101C

RN2101C
RN2101D

RN2101D
RN2102A

RN2102A
RN2102B

RN2102B
RN2102C

RN2102C
RN2102D

RN2102D

RN2103C

RN2103C
RN2103D

RN2103D

RN2103A

RN2103A
RN2103B

RN2103B

+3VSUS_ORG

RN2105A

RN2105A
RN2105B

RN2105B
RN2105C

RN2105C
RN2105D

RN2105D

CLK_REQ4#

RN2104A

RN2104A
RN2104B

RN2104B

RN2104C

RN2104C

56

RN2104D

RN2104D

78

RN2106A
RN2106B
RN2106C
RN2106D

1 2

R2130 10KOhmR2130 10KOhm

1 2

R2131 10KOhmR2131 10KOhm

1 2

R2123 10KOhmR2123 10KOhm

1 2

R2125 10KOhmR2125 10KOhm

1 2

R2126 10KOhmR2126 10KOhm

1 2

R2127 10KOhmR2127 10KOhm

1 2

R2128 10KOhmR2128 10KOhm

1 2

R2129 10KOhmR2129 10KOhm

1 2

R2122 10KOhmR2122 10KOhm

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

+3VS_VCC3_3

+3VSUS_ORG

+3VS_VCC3_3

CLK_REQ0#

GND

+3VSUS_ORG

GND

PCH_IBEX(2)_PCIE,CLK,SMB,PEG

PCH_IBEX(2)_PCIE,CLK,SMB,PEG

PCH_IBEX(2)_PCIE,CLK,SMB,PEG

Wish

Wish

Wish

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

21 95Wednesday, October 13, 2010

21 95Wednesday, October 13, 2010

21 95Wednesday, October 13, 2010

5

4

3

2

1

PM_RSMRST#_PCH

12

21

0402

0402

PM_CLKRUN# <30>

T2214T2214

T2213T2213

T2205T2205

SL2204

SL2204

21

0402

0402

SL2205

SL2205

21

0402

0402

T2206T2206

12

PM_SYNC# <3>

T2207T2207

1 2

R2205 10KOhmR2205 10KOhm

FDI_TXN[7:0] <3>

FDI_TXP[7:0] <3>

SL2206

SL2206

CRB:8.2K Ohm

2

DSWVRMEN:
High -> DSW On-Die VR Enable
Low -> DSW On-Die VR disable

DSWVRMEN

FDI_INT <3>
FDI_FSYNC0 <3>
FDI_FSYNC1 <3>
FDI_LSYNC0 <3>
FDI_LSYNC1 <3>

PCIE_WAKE# <33,53,68>

Delete R2222, R2228, U2201, R2230,
R2233, C2201 and D2203, Deeper

要拿掉

sleeper

PM_SUSC# <30>

PM_SUSB# <30>

PM_SLP_SUS# <30>

PMSYNCH is Low in C6/C7 states only

reserve for powr noise

WAKE#

12

C2201

C2201

0.01UF/16V

0.01UF/16V

@

@

+3VS_VCC3_3

12

R221010KOhm R221010KOhm

12

R221110KOhm R221110KOhm

R2203

R2203
330KOhm

330KOhm

5%

5%

12

12

R2204

R2204
330KOhm

330KOhm

5% @

5% @

GND

+VCC_RTC

DPWROK:
This input is tied
together with RSMRST#
in platforms that do not
support DeepSx

VCCDSW stable to DPWROK
assertion is 10ms (min)

Boundary Scan TP (PCH)

PM_RSMRST#_PCH
PM_PWROK_PCH
APWROK_R
PM_SYSPWROK_PCH

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

N73Sv

N73Sv

Date: Sheet

Date: Sheet

Date: Sheet

N73Sv

1
1
1
1

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

1

T2217T2217
T2211T2211
T2215T2215
T2216T2216

PCH_IBEX(3)_FDI,DMI,SYS PWR

PCH_IBEX(3)_FDI,DMI,SYS PWR

PCH_IBEX(3)_FDI,DMI,SYS PWR

Wish

Wish

Wish

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

22 95Wednesday, October 13, 2010

22 95Wednesday, October 13, 2010

22 95Wednesday, October 13, 2010

U2001C

D D

+VTT_PCH_VCCIO

SUSACK#:
SUSACK# and SUSWARN# can be tied together
if EC does not want to involve in handshake
mechanism for the Deep Sleep state entry and exit.

C C

PM_SYSPWROK_PCH<7>

ALL_SYSTEM_PWRGD<29,30,58,80>

APWROK:
For platform not supporting iAMT
it can be connected to PWROK.

SUSPWRDNACK (PCH to EC):
This pin requires a pull-up to +3VSUS.
Platforms are not expected to use this
signal when the PCH's Deep S4/S5 feature is used.

SUSWARN# (PCH to EC):
This pin aserts low when PCH is planning
to enter the DeepSx power state and remove
Suspend power(using SLP_SUS#)

Entry Into Deep S4/S5
A combination of condition is required for entry into Deep S4/S5

B B

All of the following must be met:

-Intel ME in Moff.

-AND either "a" or "b"(EDS R0.7v1 p.186).

Power failure solution (S0-->G3,S5-->G3):

PM_PWROK,PM_RSMRST#: previous platform solution.
ME_PWROK,ME_AC_PRESENT: reserved for test.

Have Pull up Res. in CPU side

R2202

R2202

49.9Ohm

49.9Ohm

1%

1%

1 2

ASW Power well stable for at least 1ms
before platform logic asserts APWROK

DMI_RXN0<3>
DMI_RXN1<3>
DMI_RXN2<3>
DMI_RXN3<3>

DMI_RXP0<3>
DMI_RXP1<3>
DMI_RXP2<3>
DMI_RXP3<3>

DMI_TXN0<3>
DMI_TXN1<3>
DMI_TXN2<3>
DMI_TXN3<3>

DMI_TXP0<3>
DMI_TXP1<3>
DMI_TXP2<3>
DMI_TXP3<3>

ME_SusPwrDnAck_R

XDP_DBRESET#<3,7,67>

@

@

R2223 0Ohm

R2223 0Ohm

H_DRAM_PWRGD<3>

PM_RSMRST#_PCH

ME_SUSPWRDNACK<30>

PM_PWRBTN#_R<7,67>
PM_PWRBTN#<30>

T2204T2204

+3VSUS_ORG +VCCPDSW

R221510KOhm@R221510KOhm

R221610KOhm@R221610KOhm

R223110KOhm@R223110KOhm

R221410KOhm R221410KOhm

1 2

1 2

1 2

12

1

1 2

DMI_COMP

GND

R2208 0OhmR2208 0Ohm

R2212 0Ohm

R2212 0Ohm

R2213 0OhmR2213 0Ohm

T2203T2203

1

2 1

0402

0402

SL2212

SL2212

2 1

0402

0402

SL2203

SL2203

T2201T2201

T2202T2202

09'MoW04:

Optional if ME FW is
Ignition FW

1 2

R2201 750Ohm

R2201 750Ohm

1%

1%

12

PM_SUSACK# DPWROK_R

@

@

SYS_RESET#SYS_RESET# WAKE#

12

PM_SYSPWROK_PCH

PM_PWROK_PCH

12

APWROK_R

ME_SusPwrDnAck_R

ME_AC_PRESENT_PCH

PM_BATLOW#

1

PM_RI#

1

U2001C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT / GPIO31

E10

BATLOW# / GPIO72

A10

RI#

COUGARPOINT-H

COUGARPOINT-H

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6

DMI

FDI

DMI

FDI

FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

System Power Management

System Power Management

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN# / GPIO29

CHECK PULL-UP OR DOWN

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

DSWVRMEN

PM_CLKRUN#

PM_SUS_STAT#

SUS_CLK#

SLP_S5#

SLP_S4#_R

SLP_S3#_R

SLP_A#

SLP_SUS#_R

SLP_LAN#

R2221 0OhmR2221 0Ohm

1

1

1

1

R2224 0OhmR2224 0Ohm

1

For PU/PD

@

@

R223410KOhm R223410KOhm

@

@

DPWROK_R

12

R221710KOhm R221710KOhm

12

R221810KOhm R221810KOhm

12

R221910KOhm

R221910KOhm

12

D22071SS355PT D22071SS355PT

21

PM_SYSPWROK<30>

PM_PWROK<30>

PM_RSMRST#<30,67>

ME_AC_PRESENT<30>

D2207: Prevent EC drive hign,
SUS_PWRGD sink low in S5-->G3.

A A

R2229

R2229
10KOhm

10KOhm

5

GND

12

R2220

R2220
10KOhm

10KOhm

12

GND

ALL_SYSTEM_PWRGD<29,30,58,80>

SUS_PWRGD<30,58,81>

SUS_PWRGD<30,58,81>

@

1

3

2

BAT54AW

BAT54AW
D2201

D2201

D2204

D2204

1

3

2

BAT54CW

BAT54CW

D2202

D2202

1

3

2

BAT54CW

BAT54CW

4

PM_SYSPWROK_PCH

PM_PWROK_PCH

PM_RSMRST#_PCH

ME_AC_PRESENT_PCH

www.vinafix.vn

PM_RI#

PCIE_WAKE#

ME_SusPwrDnAck

PM_BATLOW#

SLP_LAN#

3

1 2

R2209 10KOhmR2209 10KOhm

Internal PU 15K to 40K Strap high is GPIO mode

1 2

R2226 10KOhmR2226 10KOhm

1 2

R2227 10KOhmR2227 10KOhm

1 2

R2225 10KOhmR2225 10KOhm

1 2

R2206 10KOhmR2206 10KOhm

+3VSUS_ORG

PM_CLKRUN#

SYS_RESET#
XDP_DBRESET#

DG:Pull-up 10K Ohm to 3.3V(Core)
CRB:NO Pull-up or down resistor

5

D D

+3VS_VCC3_3

L_CTRL_CLK

L_CTRL_DATA

CRT_BLUE_R

CRT_GREEN_R

C C

12

12

C2301

C2301

C2302

C2302

5PF/50V

5PF/50V

5PF/50V

5PF/50V

@

@

@

@

CRT_BLUE<46>
CRT_GREEN<46>
CRT_RED<46>

B B

CRT_RED_R

12

C2303

C2303
5PF/50V

5PF/50V

@

@

GNDGNDGND

JP2301 SHORT_PIN @JP2301 SHORT_PIN @

1 2

JP2302 SHORT_PIN @JP2302 SHORT_PIN @

1 2

JP2303 SHORT_PIN @JP2303 SHORT_PIN @

1 2

1 2

2.2KOHM

2.2KOHM

3 4

2.2KOHM

2.2KOHM

RN2303A

RN2303A

RN2303B

RN2303B

R2307150Ohm1%R2307150Ohm

12

1%

1%

4

U2001D

U2001D

LCD_BACKEN<45>
LCD_VDD_EN<45>

L_BKLTCTL_PCH<45>
EDID_CLK_PCH<45>

EDID_DAT_PCH<45>

LVDS_LCLKN_PCH<45>
LVDS_LCLKP_PCH<45>

LVDS_L0N_PCH<45>
LVDS_L1N_PCH<45>
LVDS_L2N_PCH<45>

LVDS_L0P_PCH<45>
LVDS_L1P_PCH<45>
LVDS_L2P_PCH<45>

LVDS_UCLKN_PCH<45>
LVDS_UCLKP_PCH<45>

LVDS_U0N_PCH<45>
LVDS_U1N_PCH<45>
LVDS_U2N_PCH<45>

LVDS_U0P_PCH<45>
LVDS_U1P_PCH<45>
LVDS_U2P_PCH<45>

T2301T2301
T2302T2302

R2301 2.37KOHM1%R2301 2.37KOHM1%
R2302 0Ohm

R2302 0Ohm

GND

PULL UP 2.2KOhm@CONNECTOR SIDE

R2308150Ohm1%R2308150Ohm

DDC_CLK_PCH<46>

R2309150Ohm1%R2309150Ohm

DDC_DATA_PCH<46>

12

12

CRT_HSYNC<46>
CRT_VSYNC<46>

1%

GND

1
1

CRT_BLUE_R
CRT_GREEN_R
CRT_RED_R

2 1

0402

0402

2 1

0402

0402

L_CTRL_CLK
L_CTRL_DATA

12
12

@

@

SL2303

SL2303
SL2304

SL2304

12

0.5%

0.5%

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

R23101KOhm

R23101KOhm

DAC_IREF

T42

CRT_IRTN

COUGARPOINT-H

COUGARPOINT-H

GND

3

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPB_0N

DDPB_0P

DDPB_1N

DDPB_1P

DDPB_2N

DDPB_2P

DDPB_3N

DDPB_3P

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

CRT

T2305T2305

1

T2306T2306

1

TMDS_TXN2_PCH
TMDS_TXP2_PCH
TMDS_TXN1_PCH
TMDS_TXP1_PCH
TMDS_TXN0_PCH
TMDS_TXP0_PCH
TMDS_CLKN_PCH
TMDS_CLKP_PCH

2

PORT STRAP ENABLE PORT DISABLE PORT
LVDS
PORT B
PORT C
PORT D
DG P.105,168

L_DDC_DATA
SDVO_CTRLDATA
DDPC_CTRLDATA
DDPD_CTRLDATA

Pull up to 3.3(V)
with 2.2k Ohm

1

NC

PULL UP 2.2KOhm @ CONNECTOR SIDE

HDMI_CLK <48>
HDMI_DAT <48>

HDMI_HPD <25,48>

HDMI_TX2N <48>
HDMI_TX2P <48>
HDMI_TX1N <48>
HDMI_TX1P <48>
HDMI_TX0N <48>
HDMI_TX0P <48>
HDMI_CLKN <48>
HDMI_CLKP <48>

DG P.106

GND

A A

Title :

Title :

Title :

PCH_IBEX(4)_DP,LVDS,CRT

PCH_IBEX(4)_DP,LVDS,CRT

PCH_IBEX(4)_DP,LVDS,CRT

Engineer:

Engineer:

Engineer:

Wish

Wish

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

N73Sv

N73Sv

Date: Sheet

Date: Sheet

5

4

www.vinafix.vn

3

2

Date: Sheet

N73Sv

1

Wish

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

23 95Wednesday, October 13, 2010

23 95Wednesday, October 13, 2010

23 95Wednesday, October 13, 2010

5

BG26

BJ26

BH25

BJ16

BG16

GPU_RST#
STP_27M

AH38
AH37
AK43
AK45

AH12

AB46
AB45

AY16
BG46

BE28
BC30
BE32

BC28
BE30

BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28

AW30

BJ32

BF32

+3VS_VCC3_3

+3VS_VCC3_3

D D

C C

B B

12

R2501

R2501
10KOhm

10KOhm

@

@

12

R2503

R2503

10KOhm

10KOhm

GND

CLK_PCI_FB<21>
CLK_KBCPCI_PCH<30>
CLK_DEBUG<44>

PCB ID

12

R2502

R2502
10KOhm

10KOhm

@

@

PCB_ID0

PCB_ID1

12

R2504

R2504
10KOhm

10KOhm

GND

PCI_INTA#
PCI_INTB#
PCI_INTC#

T2407T2407

T2413T2413

PCI_INTD#

PCI_GNT1#
DGPU_PWM_SELECT#

1

STP_A16OVR

PCI_INTE#

PCB_ID0
PCB_ID1

PCI_PME#

1

PLT_RST#

CLKOUT_PCI0

1

CLK_PCI_FB_R
CLK_KBCPCI_PCH_R
CLK_DEBUG_R

GPU_RST#<70>
STP_27M<29>

DGPU_PWR_EN#<70>

SATA_ODD_DA#<51>

5V

5V

T2408T2408

SATA_ODD_DA#

R2428 22OhmR2428 22Ohm

1 2

R2429 39OhmR2429 39Ohm

1 2

R2430 22OhmR2430 22Ohm

1 2

U2001E

U2001E

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9

C18

TP10

N30

TP11

H3

TP12
TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18
TP19
TP20

B21

TP21

M20

TP22
TP23
TP24

TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1# / GPIO50

C44

REQ2# / GPIO52

E40

REQ3# / GPIO54

D47

GNT1# / GPIO51

E42

GNT2# / GPIO53

F46

GNT3# / GPIO55

G42

PIRQE# / GPIO2

G40

PIRQF# / GPIO3

C42

PIRQG# / GPIO4

D44

PIRQH# / GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

COUGARPOINT-H

COUGARPOINT-H

4

AY7

NV_CE#0

AV7

NV_CE#1

AU3

NV_CE#2

BG4

NV_CE#3

AT10

NV_DQS0

BC8

NV_DQS1

RSVD

RSVD

PCI

PCI

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_DQ10 / NV_IO10

NVRAM

NVRAM

NV_DQ11 / NV_IO11
NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

NV_RE#_WRB0
NV_RE#_WRB1

USB

USB

NV_ALE
NV_CLE

NV_RCOMP

NV_RB#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AY1

AV10
AT8
AY5

BA2
AT12

BF3

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32

C33

B33

A14
K20
B17
C16
L16
A16
D14
C14

Tacoma Pass(NVRAM) Disabling and termination guidelines(DG R0.7 p.322)
If the tacoma Pass interface is not used,
the interface signals, inculding NV_RCOMP,
can be left as No connects with few exceptions.
VccpNAND, NV_ALE, NV_CLE

DMI & FDI Termination Voltage

NV_CLE

CRB

T2401T2401

1

NV_CLE

T2402T2402

1

USB_PN0 <33>
USB_PP0 <33>
USB_PN1 <33>
USB_PP1 <33>
USB_PN2 <66>
USB_PP2 <66>
USB_PN3 <69>
USB_PP3 <69>
USB_PN4 <54>
USB_PP4 <54>

USB_PN8 <53>
USB_PP8 <53>
USB_PN9 <45>
USB_PP9 <45>

USB_PN11 <42>
USB_PP11 <42>
USB_PN12 <61>
USB_PP12 <61>

USBRBIAS_PN

OC#0
OC#1
OC#2
OC#3
OC#4
OC#5
OC#6
OC#7

3

LOW : Set to Vss

HIGH : Set to Vcc

R2420 1KOhmR2420 1KOhm

1 2

R2406 22.6Ohm

R2406 22.6Ohm

12

1%

1%

GND

+V_NVRAM_VCCPNAND

R2418

R2418

2.2kOHM

2.2kOHM

1 2

T2403T2403

1

USB Port (LAN BD)

USB 0

USB Port (LAN BD)

USB 1
USB 2

USB Port

USB 3

USB 3.0 Port

USB 4

TV Tuner
USB 5
USB 6
USB 7
USB 8

WiFi / WiMax

Camera

USB 9
USB 10

Card Reader

USB 11
USB 12

Bluetooth
USB 13

H_SNB_INV# <3>

2

OC#0
OC#7
OC#3
OC#5
OC#1
OC#2
OC#6
OC#4

RP2403A

RP2403A
RP2403B

RP2403B
RP2403C

RP2403C
RP2403D

RP2403D
RP2403E

RP2403E
RP2403F

RP2403F
RP2403G

RP2403G
RP2403H

RP2403H

1 5

10KOhm

10KOhm

2 5

10KOhm

10KOhm

3 5

10KOhm

10KOhm

4 5

10KOhm

10KOhm

6 5

10KOhm

10KOhm

7 5

10KOhm

10KOhm

8 5

10KOhm

10KOhm

9 5

10KOhm

10KOhm

1

+3VSUS_ORG

10
10
10
10
10
10
10
10

+3VS_VCC3_3

PCI_INTA#
PCI_INTB#
PCI_INTC#

SATA_ODD_DA#
PCI_INTD#
PCI_INTE#

A A

STP_27M

SATA_ODD_DA#
DGPU_PWR_EN#
GPU_RST#
STP_27M

5

RP2401A

RP2401A
RP2401B

RP2401B
RP2401C

RP2401C
RP2401D

RP2401D
RP2401E

RP2401E
RP2401F

RP2401F
RP2401G

RP2401G
RP2401H

RP2401H

R2427 10KOhmR2427 10KOhm

12

R2421 10KOhm @R2421 10KOhm @

12

R2422 10KOhm @R2422 10KOhm @

12

R2423 10KOhmR2423 10KOhm

12

R2424 10KOhm @R2424 10KOhm @

12

1 5

10KOhm

10KOhm

2 5

10KOhm

10KOhm

3 5

10KOhm

10KOhm

4 5

10KOhm

10KOhm

6 5

10KOhm

10KOhm

7 5

10KOhm

10KOhm

8 5

10KOhm

10KOhm

9 5

10KOhm

10KOhm

10
10
10
10
10
10
10
10

GND

Boot BIOS Strap : GNT1#, SATA1GP

Boot BIOS Strap

SATA1GP(BBS0)GNT1#(BBS1)

0
1
1

Sampled on rising edge of PWROK.

Default PU
20K OHM

SATA1GP<20>

PCI_GNT1#

4

1
0
1
00

+3VS_VCC3_3

R2409

R2409

10KOhm

10KOhm

R2410

R2410

10KOhm

10KOhm

1 2

R2411 1KOhm @R2411 1KOhm @
R2412 1KOhm @R2412 1KOhm @

www.vinafix.vn

Boot BIOS Location
Reserved
PCI
SPI

(PCH)

LPC

1 2

1 2
1 2

GND

A16 swap override Strap/

GNT3#:

Top-Block swap override jumper

Low=Enabled A16 swap override/
Top-Block swap override

High=Default

STP_A16OVR

3

1 2

R2413 1KOhm @R2413 1KOhm @

+3V

U2401

U2401

1

PLT_RST#<32>

GND

2

2

GND

R2414 0Ohm @R2414 0Ohm @

INB

VCC
INA
GND3OUTY

74LVC1G08GW

74LVC1G08GW

1 2

5
4

BUF_PLT_RST# <3,30,33,42,45,53,54,68,70>

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

N73Sv

N73Sv

N73Sv

Title :

Title :

Title :

PCH_IBEX(5)_PCI,NVRAM,USB

PCH_IBEX(5)_PCI,NVRAM,USB

PCH_IBEX(5)_PCI,NVRAM,USB

Engineer:

Engineer:

Engineer:

Wish

Wish

Wish

of

of

of

24 95Wednesday, October 13, 2010

24 95Wednesday, October 13, 2010

1

24 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

BT_LED

USB20_SEL

ICC_EN#

R2526 1KOhmR2526 1KOhm

R2527 10KOhm

R2527 10KOhm

R2532 10KOhmR2532 10KOhm

R2528 10KOhmR2528 10KOhm
R2515 10KOhmR2515 10KOhm
R2540 10KOhmR2540 10KOhm
R2541 10KOhmR2541 10KOhm
R2537 10KOhmR2537 10KOhm
R2538 10KOhmR2538 10KOhm
R2523 10KOhmR2523 10KOhm
R2518 10KOhm

R2518 10KOhm

+3VS_VCC3_3

12

R2506

R2506
1KOhm

1KOhm

5%

5%

For XDP Debug, need to no stuff R2507

D D

+3VS_VCC3_3

R2513 10KOhmR2513 10KOhm

R2510 10KOhmR2510 10KOhm

GND

R2536 10KOhmR2536 10KOhm

12

PLL_ODVR_EN

GPIO28(On-Die PLL VR):
High:Enable (default), Low:Disable

GPIO35_PCH

R2535 10KOhm

R2535 10KOhm

C C

DMI Termination Voltage Override

DMI_OVRVLTG

12

DGPU_PWROK

12

1 2

R2534 1KOhm

R2534 1KOhm

@

@

12

@

@

SATA_DET#4

GND

+3VS_VCC3_3

12

+3VSUS_ORG

GND

R2509200KOhm R2509200KOhm

FDI Termination Voltage Override

FDI_OVRVLTG

12

R2520 100KOhmR2520 100KOhm

GND

B B

GFX_CRB_DET

R2519 10KOhmR2519 10KOhm

12

R2521 100KOhm

R2521 100KOhm

@

GND

@

+3VS_VCC3_3

12

S_GPIO

SL2502

SL2502

SATA_DET#4

12

XDP_FN17_R

TMDS_HDMI_HPD

12

PM_LANPHY_EN

PLL_ODVR_EN

STP_PCI#
GPIO35_PCH
DMI_OVRVLTG
FDI_OVRVLTG
USB30_RST#_PCH

GFX_CRB_DET

TEST_SET_UP

PCH_TEMP_ALERT#

BT_ON

ICC_EN#

R2507 100OhmR2507 100Ohm

T2508T2508
T2506T2506

T2507T2507

T2504T2504

T2501T2501

BT_LED<56>

1 2

R2505 0Ohm @R2505 0Ohm @

1
1

DSW_WAKE#

2 1

0402

0402

1

1

1

R2525 100KOhmR2525 100KOhm

GND

EXT_SMI#<30>
HDMI_HPD<23,48>
USB3_SMI#<68>

DGPU_PWROK<21,70>

WLAN_LED<56>

USB20_SEL<69>
DSW_WAKE#<30>
WLAN_ON#<53>

BT_ON<61>

U2001F

U2001F

T7

BMBUSY# / GPIO0

A42

TACH1 / GPIO1

H36

TACH2 / GPIO6

E38

TACH3 / GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL / GPIO12

G2

GPIO15

U2

SATA4GP / GPIO16

D40

TACH0 / GPIO17

T5

SCLOCK / GPIO22

E8

GPIO24 / MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI# / GPIO34

K4

GPIO35

V8

SATA2GP / GPIO36

M5

SATA3GP / GPIO37

N2

SLOAD / GPIO38

M3

SDATAOUT0 / GPIO39

V13

SDATAOUT1 / GPIO48

V3

SATA5GP / GPIO49

D6

GPIO57

A4

VSS_NCTF_1

A44

VSS_NCTF_2

A45

VSS_NCTF_3

A46

VSS_NCTF_4

A5

VSS_NCTF_5

A6

VSS_NCTF_6

B3

VSS_NCTF_7

B47

VSS_NCTF_8

BD1

VSS_NCTF_9

BD49

VSS_NCTF_10

BE1

VSS_NCTF_11

BE49

VSS_NCTF_12

BF1

VSS_NCTF_13

BF49

VSS_NCTF_14

COUGARPOINT-H

COUGARPOINT-H

GPIO

GPIO

TACH4 / GPIO68
TACH5 / GPIO69
TACH6 / GPIO70
TACH7 / GPIO71

CPU/MISC

CPU/MISC

NCTF

NCTF

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

NC_1
NC_2
NC_3
NC_4
NC_5

VSS_NCTF_15
VSS_NCTF_16
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_NCTF_22
VSS_NCTF_23
VSS_NCTF_24
VSS_NCTF_25
VSS_NCTF_26
VSS_NCTF_27
VSS_NCTF_28
VSS_NCTF_29
VSS_NCTF_30
VSS_NCTF_31
VSS_NCTF_32

C40

R2531 1KOhmR2531 1KOhm

B41

1 2

R2529 1KOhmR2529 1KOhm

C41

1 2

R2530 1KOhmR2530 1KOhm

A40

1 2

P4
AU16
P5
AY11
AY10

INT3_3V#

T14

N_TS_VSS1

AH8

N_TS_VSS2

AK11

N_TS_VSS3

AH10

N_TS_VSS4

AK10
P37

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

T2503T2503

1

T2505T2505

1

PM_THRMTRIP#

R2516 0OhmR2516 0Ohm
R2517 0OhmR2517 0Ohm
R2522 0OhmR2522 0Ohm
R2524 0OhmR2524 0Ohm

T2502T2502

1

R2512 390OhmR2512 390Ohm

SATA_ODD_PWRGT <51>

GND

+3VS_VCC3_3

A20GATE <30>

RCIN# <30>

H_CPUPWRGD <3,7>

1 2

12
12
12
12

GND

H_THRMTRIP# <3>

T2509T2509

1

PDG V0.9, 3.9.3 These signals shouldn't float
on the motherboard. they should be tied to
GND directly.

TMDS_HDMI_HPD
STP_PCI#
WLAN_LED
PCH_TEMP_ALERT#
EXT_SMI#
USB3_SMI#
TEST_SET_UP
USB30_RST#_PCH

1 2

12

@

@

12

@

@

+3VSUS_ORG

+3VS_VCC3_3

12
12
12
12
12
12
12
12

GPIO27(checklist r0.7):
Default = Do not connect (floating)
High (1) = Enables the internal VccVRM to have a

+VCCPDSW

12

R2511

R2511
10KOhm

10KOhm

12

R2514

R2514
10KOhm

A A

10KOhm

GND

clean supply for analog rails. No need to use on-board
filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board
filter circuits for analog rails.

@

@

DSW_WAKE#

@

@

5

Title :

Title :

Title :

PCH_IBEX(6)CPU,GPIO,MISC

PCH_IBEX(6)CPU,GPIO,MISC

PCH_IBEX(6)CPU,GPIO,MISC

Wish

Wish

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

Engineer:

1

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

4

www.vinafix.vn

3

2

Date: Sheet

Wish

25 95Wednesday, October 13, 2010

25 95Wednesday, October 13, 2010

25 95Wednesday, October 13, 2010

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

4

3

2

1

(VccADAC: 68mA@3.3V)

+VCCA_DAC_1_2

12

C2614

C2614

0.01UF/16V

0.01UF/16V

D D

+VTT_PCH_VCC

(VccCore: 1.3A@1.05V)

12

C2601

C2601
10UF/6.3V

10UF/6.3V

GND GND GND GND

+VTT_PCH_VCCIO +VTT_PCH_VCCDPLL_EXP

+VTT_PCH_VCC

2 1

L2601 1KOhm/100Mhz

L2601 1KOhm/100Mhz

@

@

C C

+VTT_PCH_VCCIO

12

C2609

C2609
10UF/6.3V

10UF/6.3V

GND GND GND GND

+3VS_VCC3_3

2 1

0603

0603

+VTT_PCH_VCC

B B

+VccAFDIPLL_PCH

2 1

L2602 1KOhm/100Mhz

L2602 1KOhm/100Mhz

@

@

2 1

0603

0603

+VTT_PCH_VCCDPLL_FDI+VTT_PCH_VCCIO

SL2603

SL2603

12

C2605

C2605
10UF/6.3V

10UF/6.3V

@

@

GND

(VccIO: 2.925A@1.05V)

12

C2606

C2606
1UF/6.3V

1UF/6.3V

+3VS_VCCA3GBG

(Vcc3_3: 266mA@3.3V)

SL2602

SL2602

12

C2611

C2611

0.1UF/16V

0.1UF/16V

GND

12

12

C2602

C2602
1UF/6.3V

1UF/6.3V

2 1

Analog Power Supply for DMI PLL

12

C2603

C2603

C2604

C2604

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

SL2601

SL2601

0603

0603

(VccAPLLEXP: 50mA@1.05V,CRB)

+VTT_PCH_VCC_EXP

12

12

GND

C2607

C2607

0.1UF/16V

0.1UF/16V

+VCCAFDI_VRM

12

C2608

C2608
1UF/6.3V

1UF/6.3V

(VccVRM: 160mA@1.5V)

Analog Power Supply for FDI PLL

(VccAFDIPLL: ???mA@1.05V)

C2610

C2610
1UF/6.3V

1UF/6.3V

+VTT_CPU_VCC_DMI

AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29

AJ23
AJ26
AJ27
AJ29
AJ31

AN19

BJ22

AN16
AN17

AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24

AN33
AN34

BH29

AP16

AP17

AU20

BG6

U2001G

U2001G

COUGARPOINT-H

COUGARPOINT-H

VCCCORE[1]
VCCCORE[2]
VCCCORE[3]
VCCCORE[4]
VCCCORE[5]
VCCCORE[6]
VCCCORE[7]
VCCCORE[8]
VCCCORE[9]
VCCCORE[10]
VCCCORE[11]
VCCCORE[12]
VCCCORE[13]
VCCCORE[14]
VCCCORE[15]
VCCCORE[16]
VCCCORE[17]

VCCIO[28]

VCCAPLLEXP

VCCIO[15]
VCCIO[16]

VCCIO[17]
VCCIO[18]
VCCIO[19]
VCCIO[20]
VCCIO[21]
VCCIO[22]
VCCIO[23]
VCCIO[24]

VCCIO[25]
VCCIO[26]

VCC3_3[3]

VCCVRM[2]

VccAFDIPLL

VCCIO[27]

VCCDMI[2]

POWER

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

CRTLVDS

CRTLVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

DMI

DMI

NAND / SPI HVCMOS

NAND / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS
VSSALVDS

VCC3_3[6]

VCC3_3[7]

VCCVRM[3]

VCCDMI[1]

VCCCLKDMI

VCCPNAND[1]

VCCPNAND[2]

VCCPNAND[3]

VCCPNAND[4]

VCCSPI

U48

U47

AK36
AK37

AM37
AM38
AP36
AP37

V33

V34

+VCCAFDI_VRM

AT16

AT20

AB36

AG16

AG17

AJ16

AJ17

(VccSPI: 20mA@1.8V)

V1

+3VS_VCCA_LVDS

12

GND

C2624

C2624

0.1UF/16V

0.1UF/16V

@

@

GND

GND

(VccDMI: 42mA@1.05V)

(VccCLKDMI: 20mA@1.05V)

(VccpNAND: 190mA@1.8V)

12

C2623

C2623

0.1UF/16V

0.1UF/16V

+V3.3_VCCSPI

GND

12

C2622

C2622
1UF/6.3V

1UF/6.3V

GND

12

12

C2612

C2612

C2613

C2613

10UF/6.3V

10UF/6.3V

0.1UF/16V

0.1UF/16V

GNDGNDGND

(VccALVDS: 1mA@3.3V)

2 1

0603

0603

SL2604

SL2604

+3VS_VCC3_3

(VccTXLVDS: 60mA@1.8V)

12

12

C2615

C2615

C2616

C2616

0.01UF/16V

0.01UF/16V

0.01UF/16V

0.01UF/16V

GND GND GND

+3VS_VCC_GIO +3VS_VCC3_3

12

C2618

C2618

0.1UF/16V

0.1UF/16V

GND

0603

0603

SL2605

SL2605

21

0603

0603

12

C2619

C2619
1UF/6.3V

1UF/6.3V

GND

+V_NVRAM_VCCPNAND

+3VSUS_ORG

SL2609

SL2609

21

VCC_DMI is 1.1V for Mobile

12

GND

12

C2620

C2620
1UF/6.3V

1UF/6.3V

GND GND

0603

0603

All Beads : 0603 !!

+3VS_VCC3_3

L26031KOhm/100Mhz L26031KOhm/100Mhz

21

+1.8VS_VCCT_LVD

21

12

C2617

C2617
22UF/6.3V

22UF/6.3V

+VTT_PCH_VCC+VTT_CPU_VCC_DMI

SL2607

SL2607

21

0603

12

C2621

C2621
10UF/6.3V

10UF/6.3V

@

@

0603

+VccCLKDMI_PCH

0603

0603

21

C2625

C2625

0.1UF/16V

0.1UF/16V

check with CRB (LC filter)

+1.8VS

SL2608

SL2608

21

+1.8VS

L26041KOhm/100Mhz L26041KOhm/100Mhz

+VTT_PCH_VCC

SL2610

SL2610

U2001H

U2001H

H5

VSS[0]

AA17

VSS[1]

AA2

VSS[2]

AA3

VSS[3]

AA33

VSS[4]

AA34

VSS[5]

AB11

VSS[6]

AB14

VSS[7]

AB39

VSS[8]

AB4

VSS[9]

AB43

VSS[10]

AB5

VSS[11]

AB7

VSS[12]

AC19

VSS[13]

AC2

VSS[14]

AC21

VSS[15]

AC24

VSS[16]

AC33

VSS[17]

AC34

VSS[18]

AC48

VSS[19]

AD10

VSS[20]

AD11

VSS[21]

AD12

VSS[22]

AD13

VSS[23]

AD19

VSS[24]

AD24

VSS[25]

AD26

VSS[26]

AD27

VSS[27]

AD33

VSS[28]

AD34

VSS[29]

AD36

VSS[30]

AD37

VSS[31]

AD38

VSS[32]

AD39

VSS[33]

AD4

VSS[34]

AD40

VSS[35]

AD42

VSS[36]

AD43

VSS[37]

AD45

VSS[38]

AD46

VSS[39]

AD8

VSS[40]

AE2

VSS[41]

AE3

VSS[42]

AF10

VSS[43]

AF12

VSS[44]

AD14

VSS[45]

AD16

VSS[46]

AF16

VSS[47]

AF19

VSS[48]

AF24

VSS[49]

AF26

VSS[50]

AF27

VSS[51]

AF29

VSS[52]

AF31

VSS[53]

AF38

VSS[54]

AF4

VSS[55]

AF42

VSS[56]

AF46

VSS[57]

AF5

VSS[58]

AF7

VSS[59]

AF8

VSS[60]

AG19

VSS[61]

AG2

VSS[62]

AG31

VSS[63]

AG48

VSS[64]

AH11

VSS[65]

AH3

VSS[66]

AH36

VSS[67]

AH39

VSS[68]

AH40

VSS[69]

AH42

VSS[70]

AH46

VSS[71]

AH7

VSS[72]

AJ19

VSS[73]

AJ21

VSS[74]

AJ24

VSS[75]

AJ33

VSS[76]

AJ34

VSS[77]

AK12

VSS[78]

AK3

VSS[79]

COUGARPOINT-H

COUGARPOINT-H

GND GND

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

VccRAM : 1.5V/1.8V supply for internal PLL and VRMs

(+VTT_PCH: 4.68A@1.05V)

12

12

@

@

+VCCAFDI_VRM

12

+

+

CE2601

CE2601
330UF/2V

330UF/2V

+1.5VS+1.8VS

A A

R2605 0OhmR2605 0Ohm

R2607 0Ohm

R2607 0Ohm

5

(+VTT_PCH_VCC: 1.412A@1.05V)

JP2601

JP2601

2

112

2MM_OPEN_5MIL

2MM_OPEN_5MIL

JP2602

JP2602

2

112

2MM_OPEN_5MIL

2MM_OPEN_5MIL

(+VTT_PCH_VCCIO: 2.925A@1.05V)

@

@

4

N/A

N/A

N/A

N/A

+VTT_PCH_VCC+1.05VS

+VTT_PCH_VCCIO

+VTT 4.68A
+1.5VS 0.16A
+1.8VS 0.19A
+3VS 0.355A
+3VSUS 0.1A

www.vinafix.vn

PCH ICC Description

PCH_IBEX(7)_POWER,GND

PCH_IBEX(7)_POWER,GND

PCH_IBEX(7)_POWER,GND

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

Wish

Wish

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

N73Sv

N73Sv

Date: Sheet

Date: Sheet

3

2

Date: Sheet

N73Sv

Wednesday, October 13, 2010

Wednesday, October 13, 2010

Wednesday, October 13, 2010

1

Wish

26 95

26 95

26 95

Rev

Rev

Rev

1.0

1.0

1.0

of

of

of

5

+3VSUS_ORG

+3VA

support DSx

+3VS_VCC3_3

D D

C C

B B

A A

1KOhm/100Mhz

1KOhm/100Mhz

+VTT_PCH_VCC

@

@

2 1

L2706

L2706
1KOhm/100Mhz

1KOhm/100Mhz

+VTT_PCH_VCC

0603

0603

SL2709

SL2709

+VTT_PCH_VCCA_B_DPL

+VTT_PCH_VCCIO

0603

0603

0603

0603

0603

0603

12

GND

+VTT_CPU_VCCPCPU+VTT_PCH_VCC

2 1

0603

0603

VCCACLK, VCCAPLLEXP, VCCAPLLDMI2, VCCAFDIPLL,
VCCAPLLSATA can be left no connect in On-Die VR
enable mode

+VCCPDSW

1 2

R2705 0OhmR2705 0Ohm

1 2

R2706 0Ohm

R2706 0Ohm

@

@

L2707

L2707

21

+VCCAPLL_CPY_PCH

12

GND

21

21

SL2710

SL2710

+VCCDIFFCLKN

21

SL2711

SL2711

+VTT_SSCVCC

21

SL2712

SL2712

C2722

C2722

0.1UF/16V

0.1UF/16V

SL2702

SL2702

+VCC_RTC

+3VS +3VS_VCC3_3

GND

+3VS_VCC_CLKF33

12

C2744

C2744
1UF/6.3V

1UF/6.3V

GND GND

C2711

C2711

+VTT_PCH_VCCIO

10UF/6.3V

10UF/6.3V

@

@

+V1.05M_VCCASW

+VTT_PCH_VCCA_A_DPL

+VCCDIFFCLKN

12

C2721

C2721
1UF/6.3V

1UF/6.3V

GND

12

C2724

C2724

4.7UF/6.3V

4.7UF/6.3V

GND GND GND

12

C2727

C2727
1UF/6.3V

1UF/6.3V

GND GND GND

357mA
S0 max

JP2701

JP2701

2

112

1MM_OPEN_5MIL

1MM_OPEN_5MIL

5

+VTT_PCH_VCCA_CLK+VTT_PCH_VCC

@

@

2 1

L2701 1KOhm/100Mhz

L2701 1KOhm/100Mhz

12

C2708

C2708

0.1UF/16V

0.1UF/16V

04/20 No-stuff
for +1.05VS
leakage

2 1

0603

0603

(VccDSW3_3: 2mA@3.3V)

12

C2745

C2745
10UF/6.3V

10UF/6.3V

(VccAPLLDMI2: ???mA@1.8V)

+VCCDPLL_CPY

SL2708

SL2708

(VccASW: 1.01A@1.05V)

12

12

C2714

C2714

C2713

C2713

22UF/6.3V

22UF/6.3V

22UF/6.3V

22UF/6.3V

GNDGND

12

12

C2717

C2717

C2715

C2715

1UF/6.3V

1UF/6.3V

1UF/6.3V

1UF/6.3V

GND GND GND

+VCCAFDI_VRM

12

C2720

C2720
1UF/6.3V

1UF/6.3V

GND

12

C2725

C2725

0.1UF/16V

0.1UF/16V

12

C2728

C2728

0.1UF/16V

0.1UF/16V

GND

(VccADPLLA: 15mA@1.05V)
(VccADPLLB: 15mA@1.05V)

+VCCDIFFCLK

12

C2719

C2719
1UF/6.3V

1UF/6.3V

GND

12

C2723

C2723
1UF/6.3V

1UF/6.3V

@

@

GND

12

C2726

C2726

0.1UF/16V

0.1UF/16V

12

C2729

C2729

0.1UF/16V

0.1UF/16V

(VccACLK: ???A@1.05V)

12

C2707

C2707

0.1UF/16V

0.1UF/16V

@

@

GND

12

C2712

C2712
1UF/6.3V

1UF/6.3V

@

@

GND

12

C2716

C2716
1UF/6.3V

1UF/6.3V

12

C2718

C2718

0.1UF/16V

0.1UF/16V

(VccDIFFCLKN: 55mA@1.05V)

(VccSSC: 95mA@1.05V)

(V_PROC_IO: 1mA@1.05V)

(VccRTC: N/A@3.3V)

All Beads : 0603 !!

AD49

BH23

AL29

AL24

AA19
AA21
AA24
AA26
AA27
AA29
AA31
AC26
AC27
AC29
AC31
AD29
AD31

BD47
BF47

AF17
AF33
AF34
AG34

AG33

T16

V12

T38

W21
W23
W24
W26
W29
W31
W33

N16

Y49

V16

T17
V19

BJ8

A22

U2001J

U2001J

VCCACLK

VCCDSW3_3

DCPSUSBYP

VCC3_3[5]

VCCAPLLDMI2
VCCIO[14]

DCPSUS[3]

VCCASW[1]
VCCASW[2]
VCCASW[3]
VCCASW[4]
VCCASW[5]
VCCASW[6]
VCCASW[7]
VCCASW[8]
VCCASW[9]
VCCASW[10]
VCCASW[11]
VCCASW[12]
VCCASW[13]
VCCASW[14]
VCCASW[15]
VCCASW[16]
VCCASW[17]
VCCASW[18]
VCCASW[19]
VCCASW[20]

DCPRTC

VCCVRM[4]

VCCADPLLA
VCCADPLLB

VCCIO[7]
VCCDIFFCLKN[1]
VCCDIFFCLKN[2]
VCCDIFFCLKN[3]

VCCSSC

DCPSST

DCPSUS[1]
DCPSUS[2]

V_PROC_IO

VCCRTC

COUGARPOINT-H

COUGARPOINT-H

4

POWER

POWER

VCCSUS3_3[10]

Clock and Miscellaneous

Clock and Miscellaneous

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

CPURTC

CPURTC

HDA

HDA

+3VSUS +3VSUS_ORG

2

1MM_OPEN_5MIL

1MM_OPEN_5MIL

4

N26

VCCIO[29]

P26

VCCIO[30]

P28

VCCIO[31]

T27

VCCIO[32]

T29

VCCIO[33]

T23

VCCSUS3_3[7]

T24

VCCSUS3_3[8]

V23

VCCSUS3_3[9]

V24
P24

VCCSUS3_3[6]

T26

VCCIO[34]

M26

V5REF_SUS

AN23

DCPSUS[4]

AN24

VCCSUS3_3[1]

P34

V5REF

N20

VCCSUS3_3[2]

N22

VCCSUS3_3[3]

P20

VCCSUS3_3[4]

P22

VCCSUS3_3[5]

AA16

VCC3_3[1]

W16

VCC3_3[8]

T34

VCC3_3[4]

AJ2

VCC3_3[2]

AF13

VCCIO[5]

AH13

VCCIO[12]

AH14

VCCIO[13]

AF14

VCCIO[6]

AK1

VCCAPLLSATA

AF11

VCCVRM[1]

AC16

VCCIO[2]

AC17

VCCIO[3]

AD17

VCCIO[4]

T21

VCCASW[22]

V21

VCCASW[23]

T19

VCCASW[21]

P32

VCCSUSHDA

JP2702

JP2702

112

www.vinafix.vn

+VCCIO_USB

12

C2730

C2730
1UF/6.3V

1UF/6.3V

GND

C2731

C2731

12

0.1UF/16V

0.1UF/16V

GND

(V5REF_SUS: 1mA@5V)

+VTT_VCCPSUS

12

GND

+3VS_VCCPPCI

+3VS_VCC3_3

C2739

C2739

12

0.1UF/16V

0.1UF/16V

GND

2 1

2 1

2 1

GND

C2736

C2736
1UF/6.3V

1UF/6.3V

0402

0402

0402

0402

0402

0402

(V5REF: 1mA@5V)

+VCCAFDI_VRM

(VccSUSHDA: 10mA@3.3V)

C2743

C2743

12

0.1UF/16V

0.1UF/16V

GND

0603

0603

+3VSUS_VCCPUSB

+3VSUS_VCCAUBG

C2732

C2732

12

0.1UF/16V

0.1UF/16V

GND

+VTT_VCCAUPLL

12

C2735

C2735
1UF/6.3V

1UF/6.3V

@

@

+VTT_VCCPSUS

GND

GND

SL2720

SL2720

SL2721

SL2721

SL2722

SL2722

GND

12

12

12

C2740

C2740
1UF/6.3V

1UF/6.3V

C2742

C2742
1UF/6.3V

1UF/6.3V

3

SL2723

SL2723

21

C2737

C2737

0.1UF/16V

0.1UF/16V

+VTT_SATA3

+VTT_SATA

+3VSUS_HDA

3

+VTT_PCH_VCCIO

(VccSUS3_3: 97mA@3.3V)

0603

0603

SL2701

SL2701

2 1

0402

0402

SL2713

SL2713

+VTT_PCH_VCCIO

2 1

0402

0402

SL2714

SL2714

21

0603

0603

SL2715

SL2715

C2738

C2738

12

0.1UF/16V

0.1UF/16V

GND

+VTT_PCH_VCCIO

2 1

0603

0603

SL2718

SL2718

+VTT_VCCAPLL_SATA3

2 1

0603

0603

SL2719

SL2719

+VTT_PCH_VCC

0603

0603

SL2703

SL2703

+VTT_PCH_VCCA_A_DPL

+VTT_PCH_VCCA_B_DPL

+3VSUS_ORG

21

C2733

C2733

12

0.1UF/16V

0.1UF/16V

GND

+3VSUS_ORG

21

0603

0603

SL2716

SL2716

2 1

0603

0603

SL2717

SL2717

L2702 1KOhm/100Mhz

L2702 1KOhm/100Mhz

12

C2741

C2741
10UF/6.3V

10UF/6.3V

@

@

GND

+VTT_PCH_VCCIO

+3VSUS_ORG

21

D2702

D2702

3

BAT54CW

BAT54CW

+3VS_VCC3_3

R2701

R2701

1 2

10Ohm

10Ohm

21

@

@

12

0Ohm

0Ohm
R2703

R2703

@

@

1
2

+3VSUS_ORG

+5VSUS

D2703

D2703

3

BAT54CW

BAT54CW

12

C2734

C2734
1UF/6.3V

1UF/6.3V

GND

(VccAPLLSATA: ???mA@1.05V)

+VTT_PCH_VCC

+VTT_PCH_VCCA_A_DPL

12

C2703

C2703
1UF/6.3V

1UF/6.3V

+VTT_PCH_VCCA_B_DPL

12

C2704

C2704
1UF/6.3V

1UF/6.3V

2

1
2

R2702

R2702

1 2

10Ohm

10Ohm

12

+

+

CE2701

CE2701
220UF/4V

220UF/4V

ESR=40mOhm/Ir=1.9A

ESR=40mOhm/Ir=1.9A

GNDGND

12

+

+

CE2702

CE2702
220UF/4V

220UF/4V

ESR=40mOhm/Ir=1.9A

ESR=40mOhm/Ir=1.9A

GNDGND

2

+3VS_VCC3_3

+5VS

L2703

L2703

10UH

10UH

L2704

L2704

10UH

10UH

1

U2001I

U2001I

AY4

VSS[159]

AY42

VSS[160]

AY46

VSS[161]

AY8

VSS[162]

B11

VSS[163]

B15

VSS[164]

B19

VSS[165]

B23

VSS[166]

B27

VSS[167]

B31

VSS[168]

B35

VSS[169]

B39

VSS[170]

B7

VSS[171]

F45

VSS[172]

BB12

VSS[173]

BB16

VSS[174]

BB20

VSS[175]

BB22

VSS[176]

BB24

VSS[177]

BB28

VSS[178]

BB30

VSS[179]

BB38

VSS[180]

BB4

VSS[181]

BB46

VSS[182]

BC14

VSS[183]

BC18

VSS[184]

BC2

VSS[185]

BC22

VSS[186]

BC26

VSS[187]

BC32

VSS[188]

BC34

VSS[189]

BC36

VSS[190]

BC40

VSS[191]

BC42

VSS[192]

BC48

VSS[193]

BD46

VSS[194]

BD5

VSS[195]

BE22

VSS[196]

BE26

VSS[197]

BE40

VSS[198]

BF10

VSS[199]

BF12

VSS[200]

BF16

VSS[201]

BF20

VSS[202]

BF22

VSS[203]

BF24

VSS[204]

BF26

VSS[205]

BF28

VSS[206]

BD3

VSS[207]

BF30

VSS[208]

BF38

VSS[209]

BF40

VSS[210]

BF8

VSS[211]

BG17

VSS[212]

BG21

VSS[213]

BG33

VSS[214]

BG44

VSS[215]

BG8

VSS[216]

BH11

VSS[217]

BH15

VSS[218]

BH17

VSS[219]

BH19

VSS[220]

H10

VSS[221]

BH27

VSS[222]

BH31

VSS[223]

BH33

VSS[224]

BH35

VSS[225]

BH39

VSS[226]

BH43

VSS[227]

BH7

VSS[228]

D3

VSS[229]

D12

VSS[230]

D16

VSS[231]

D18

VSS[232]

D22

VSS[233]

D24

VSS[234]

D26

VSS[235]

D30

VSS[236]

D32

VSS[237]

D34

VSS[238]

D38

VSS[239]

D42

VSS[240]

D8

VSS[241]

E18

VSS[242]

E26

VSS[243]

G18

VSS[244]

G20

VSS[245]

G26

VSS[246]

G28

VSS[247]

G36

VSS[248]

G48

VSS[249]

H12

VSS[250]

H18

VSS[251]

H22

VSS[252]

H24

VSS[253]

H26

VSS[254]

H30

VSS[255]

H32

VSS[256]

H34

VSS[257]

F3

VSS[258]

COUGARPOINT-H

COUGARPOINT-H

GND GND

+VTT_PCH_VCC

21

21

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

N73Sv

N73Sv

Date: Sheet

Date: Sheet

Date: Sheet

N73Sv

Wednesday, October 13, 2010

Wednesday, October 13, 2010

Wednesday, October 13, 2010

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[333]
VSS[334]
VSS[335]
VSS[337]
VSS[338]
VSS[340]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]

Title :

PCH_IBEX(8)_POWER,GND

Title :

PCH_IBEX(8)_POWER,GND

Title :

PCH_IBEX(8)_POWER,GND

Engineer:

Engineer:

Engineer:

Wish

Wish

Wish

1

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

of

27 95

of

27 95

of

27 95

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

PCH SPI ROM

Reserve +3VA

D D

SPI FLASH TOOL CON

SLN2801B

SLN2801B

SLN2801A

T2801T2801

1

1

1 2

R2837 33OhmR2837 33Ohm

1 2

R2838 33OhmR2838 33Ohm

SPI_CS#0<20>
SPI_SO<20>

C C

T2802T2802

EC_SCE#_PCH<30>

EC_SO_PCH<30>

2R4P

2R4P

3 4

R2866

R2866
0Ohm

0Ohm

SLN2801A

2R4P

2R4P

1 2

R2869

R2869
0Ohm

0Ohm

T2805T2805

1 2

1 2

1

SPI_CS#_CON
SPI_SO_CON

R2833

R2833

3.3KOhm

3.3KOhm

1 2

+3VM_SPI_WP0#

R2834 0OhmR2834 0Ohm

1 2

R2835 0Ohm

R2835 0Ohm

1 2

@

@

Put near U2801

+3VM_SPI

J2802

J2802

1
3 4
5 6
7

HEADER_2X4P_K8

HEADER_2X4P_K8

12G06100008K

12G06100008K

U2801

U2801

1

CE#

2

SO

HOLD#

3

WP#
VSS4SI

SST25VF032B

SST25VF032B

(32Mb)

T2808T2808

1

R2847 0Ohm

R2847 0Ohm

2

@

@

+3VM_SPI

8

VDD

+3VM_SPI_00

7

SPICLK0

6

SCK

SPISI0

5

D2801

D2801

1
2

BAT54CW

BAT54CW

SPI_CLK_CON

SPI_SI_CON

T2807T2807

1

R2831

R2831

3.3KOhm

3.3KOhm

1 2

+3VM_SPI+3VSUS_ORG+3VA

3

12

@

@

1

R2867

R2867
0Ohm

0Ohm

T2806T2806

12

C2802

C2802

0.1UF/16V

0.1UF/16V

1 2

SPI_CLK_CON

SLN2802B

SLN2802B

SLN2802A

SLN2802A

2R4P

2R4P

2R4P

2R4P

3 4

1 2

R2868

R2868
0Ohm

0Ohm

1 2

12

EC2801

EC2801

0.1UF/16V

0.1UF/16V

@

@

R2840 33OhmR2840 33Ohm

1 2
1 2

R2841 33OhmR2841 33Ohm

EC_SCK_PCH <30>

EC_SI_PCH <30>

1

SPI_CLK <20>
SPI_SI <20>

1

T2803T2803

T2804T2804

+3VS

+12VS

2

SCL_3A<21>

PCH

SDA_3A<21>

SMB1_CLK<30>

EC PCH

SMB1_DAT<30>

6 1

Q2801A

Q2801A
UM6K1N

UM6K1N

6 1

Q2802A

Q2802A
UM6K1N

UM6K1N

5

3 4

Q2801B

Q2801B
UM6K1N

UM6K1N

+12VSUS

2

3 4

Q2802B

Q2802B
UM6K1N

UM6K1N

4.7KOhm

4.7KOhm

4.7KOhm

4.7KOhm

R2802

R2802

R2803

R2803

1 2

1 2

5

SMB_CLK_S <14,16,17,29,53>

SMB_DAT_S <14,16,17,29,53>

SML1_CLK <21>

SML1_DAT <21>

+12VS

B B

2

6 1

Q2804A

Q2804A
UM6K1N

UM6K1N

3 4

Q2804B

Q2804B
UM6K1N

UM6K1N

A A

5

4

www.vinafix.vn

3

2

+3VS

4.7KOhm

4.7KOhm

4.7KOhm

4.7KOhm
R2808

R2808

R2809

R2809

1 2

1 2

5

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

ASUSTeK COMPUTER INC.

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

Wednesday, October 13, 2010

Wednesday, October 13, 2010

Wednesday, October 13, 2010

SMB1_CLK_S <50,75,88>

CPU,Thermal

SMB1_DAT_S <50,75,88>

Title :

Title :

Title :

Engineer:

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

1

PCH_SPI ROM,OTH

PCH_SPI ROM,OTH

PCH_SPI ROM,OTH

Wish

Wish

Wish

of

28 95

of

28 95

of

28 95

Rev

Rev

Rev

1.0

1.0

1.0

5

4

3

2

1

Main Board

D D

+VDD_ICS

+VDD_ICS

12

12

R2925

R2925

R2924

R2924

10KOhm

10KOhm

10KOhm

10KOhm

@

16
15
14
13
12
11
10
9

CLK_OC
CLK_UC

+VDD_ICS

1 2
1 2

@

27M_STP#

CLK_DMI#_R
CLK_DMI_R

CLK_SATA#_R
CLK_SATA_R

@

@
@

@

@

@

9LRS3197: Stuff R2921

9LRS3162: UnStuff R2921

+VDD_ICS

12

R2921

R2921
10KOhm

10KOhm

@

@

RX2911 33Ohm

RX2911 33Ohm
RX2912 33Ohm

RX2912 33Ohm
RX2913 33Ohm

RX2913 33Ohm
RX2914 33Ohm

RX2914 33Ohm

NV27M_SSC <76>
NV27M_NOSSC <76>

CLK_DOT96# <21>
CLK_DOT96 <21>

1 2

@

@

1 2

@

@

1 2

@

@

1 2

@

@

CLK_DMI# <21>
CLK_DMI <21>

CLK_SATA# <21>
CLK_SATA <21>

Layout Note:

+1.5VS

L2903

L2903

120Ohm/100Mhz

120Ohm/100Mhz

@

@

21

VDD_ICS:5pin-->0.1uF to each pin
put it at pin1, 15, 17, 18, 24

12

12

C2905

C2905
10UF/10V

10UF/10V

@

@

@

@

Total Power Consumption 104mW

D

D

S

S

C2906

C2906

0.1UF/16V

0.1UF/16V

32

3

3

2

2

2N7002ET1G

2N7002ET1G

1

1

1

G

G

@

@

12

@

@

Q2905

Q2905

C2926

C2926

0.1UF/16V

0.1UF/16V

STP_27M <24>

12

C2904

C2904

0.1UF/16V

0.1UF/16V

@

@

+VDD_ICS

12

12

@

@

C2909

C2909

0.1UF/16V

0.1UF/16V

C2910

C2910

0.1UF/16V

0.1UF/16V

@

@

ICS_BCLK <3>
ICS_BCLK# <3>

X2CLK

1 2

13

X2901

X2901

14.31818Mhz

14.31818Mhz

R2906

R2906

1.5KOHM

1.5KOHM

@

@

@

@

12

@

@

CLK_PWRGD

ALL_SYSTEM_PWRGD<22,30,58,80>

CPU_VRON<30,80,81>

C C

CLK_STRAP0<30>

B B

+VDD_3.3_ICS

3

3

1

1

1

G

G

2

2

12

12

32

D

D

S

S

R2917

R2917
10KOhm

10KOhm

@

@

R2918

R2918
1KOhm

1KOhm

@

@

FSLC

Q2904

Q2904
2N7002ET1G

2N7002ET1G

@

@

12

R2919

R2919
10KOhm

10KOhm

@

@

R2928 0Ohm

R2928 0Ohm

R2929 0Ohm

R2929 0Ohm

FSLC

BCLK
133

0

100

1

12

@

@

12

@

@

CLK_ICH14<21>
SMB_DAT_S<14,16,17,28,53>
SMB_CLK_S<14,16,17,28,53>

12

R2927 0Ohm

R2927 0Ohm

@

@

C2908

C2908

27PF/50V

27PF/50V

C2907

C2907

27PF/50V

27PF/50V

RX2907 33Ohm

RX2907 33Ohm

12

@

@

2
4

12

@

@

X2_CLK

X1_CLK
FSLC

FSLC

12

C2927

C2927
10PF/50V

10PF/50V

@

@

+VDD_3.3_ICS

EMI

25

VTTPWRGD/PD#_3.3

26

GNDREF

27

X2

28

X1

29

VDDREF_3.3

30

REF/FSLC_3.3

31

SDATA_3.3

32

SCLK_3.3

33

GND1

34

GND2

20

19

22

24

23

21

UC_1.5**

OC_1.5**

GNDCPU

CPUT_LR

CPUC_LR

VDDCPU_1.5

VDD96_1.51GND962DOT96T_LR3DOT96C_LR4VDD27_3.35**SEL25_3.3/27FIX627SS/25M7GND27

17

18

VDDPCIEX_1.5

VDDCPU_IO_LV

*SE_STOP#_1.5

VDDPCIEX_IO_LV

PCIEXC_LR
PCIEXT_LR

GNDPCIEX
SATAC_LR
SATAT_LR

GNDSATA

ICS9LVS3161BKLF

ICS9LVS3161BKLF

8

U2901

U2901

27M_SSC_ICS

27M_NOSSC_ICS

@

@

RX2908 33Ohm

RX2908 33Ohm
RX2909 33Ohm

RX2909 33Ohm

27M_NOSSC_ICS

12

R2923

R2923
10KOhm

10KOhm

@

@

A A

5

4

www.vinafix.vn

3

Layout Note:
27M_NOSSC length must short

27M_NOSSC=L, 27M_SSC=27M
27M_NOSSC=H, 27M_SSC=25M

2

Layout Note:
VDD_3.3_ICS:5pin-->0.1uF to each pin
put it at pin5,29

+3VS +VDD_3.3_ICS

L2902

L2902

120Ohm/100Mhz

120Ohm/100Mhz

21

@

@

12

C2903

C2903
10UF/10V

10UF/10V

@

@

@

@

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

ASUSTeK COMPUTER INC. NB3

Size Project Name

Size Project Name

Size Project Name

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

12

C2901

C2901

0.1UF/16V

0.1UF/16V

12

@

@

C2902

C2902

0.1UF/16V

0.1UF/16V

Engineer:

Engineer:

Engineer:

N73Sv

N73Sv

N73Sv

1

Title :

Title :

Title :

CLK_ICS9LRS3197

CLK_ICS9LRS3197

CLK_ICS9LRS3197

Wish

Wish

Wish

29 95Wednesday, October 13, 2010

29 95Wednesday, October 13, 2010

29 95Wednesday, October 13, 2010

of

of

of

Rev

Rev

Rev

1.0

1.0

1.0