ASUS K75D Schematics

A

яяяяяяя

1 1

B

C

D

E

Compal Confidential

2 2

QML70 Schematics Document

AMD Comal

APU Trinity / Hudson M3 / Thames XT M2

UMA Only / PX Muxless with BACO

3 3

2011-10-17

LA-8371P REV: 0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Page

QML70 LA-8371P

E

0.2

1 53Wednesday, October 19, 2011

0.2

A

C

ompal Confidential

B

C

D

E

Model Name : QML70

V

Z

ZZ1

1 1

P

CB 0OG LA-8371P REV0 MB

DA80000RG00

Thermal Sensor

ADM1032

page 19

+1.0VSG, +1.5VSG, +1.8VSG, +3VSG, +VGA_CORE, +VDDCI

HDMI Conn.

page 29

2 2

LVDS Conn.

page 28

LVDS

CRT Conn.

page 28

3 3

RAM 2G/1G 128M x16 x 8 / 64M x 16 x 8

ATI

Thames XT M2

uFCBGA-962

LVDS Translator

RTD2136S-VE-CG

FCH CRT (VGA DAC)

LAN(GbE) RTL8111F-CGT

RJ45

age 24, 25

p

DDR3

GPP1

page 30

Page 18~25

page 27

MINI Card 1 WLAN w/ BT

Gen2GFX x 16

DP x4 (DP0 TXP/N0 ~ 3)

APU HDMI (UMA / Muxless)

DP x2 (DP2 TXP/N0 ~ 1)

P_GPP x 2 GEN1

GPP2

page 33

C

omal

AMD FS1r2 APU

Trinity

uPGA-722 Package

+APU_CORE, +APU_CORE_NB, +1.5V, +1.2VS, +2.5VS

DP x4 (DP1 TXP/N0 ~ 3)

FCH

Hudson-M3

uFCBGA-656

+3V_PCH, +1.1VALW, +1.1VS

Page 6~10

UMI

Page 13~17

Memory BUS(DDR3)

Dual Channel

1.5V DDRIII 800~1333MHz

USB 2.0 + 3.0

page 35

USB3.0 Port 0

USB

3.3V 48MHz

HD Audio

SATA Gen2

SATA HDD1 Conn.

USB2.0 Port 10

3.3V 24.576MHz/48Mhz

port 0

page 34

SATA HDD2 Conn.

USB 2.0 + 3.0

page 35

USB3.0 Port 1 USB2.0 Port 11

port 1

page 34

204pin DDRIII-SO-DIMM X2

BANK 0, 1, 2, 3

USB2.0

page 30

USB2.0 Port 0

port 2

ODD Conn.

page 34

Page 11,12

USB2.0

CMOS Camera

page 30

USB2.0 Port 1

HDA Codec ALC269Q-VB5-GR

page 28

USB2.0 Port 2

USB2.0 Port 4

page 31

Mini Card (with BT)

page 33

USB2.0 Port 3

Card Reader RTS5137-GR

page 32

SPI ROM

LPC BUS

4MB

LED

page 39

page 15

ENE KB9012

page 37

SPI ROM 128KB

(Reserve)

page 37

RTC CKT.

4 4

page 13

DC/DC Interface CKT.

Power Circuit

page 40~50

page 39

A

VGA DC/DC Interface CKT.

page 26

B

Touch Pad Int.KBD

page 38

Security Classification

Issued Date

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING D RAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTODY OF T HE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

page 38

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

Block Diagrams

QML70 LA-8371P

2 53Wednesday, October 19, 2011

E

0.2

5

4

3

2

1

LOCK DISTRIBUTION

C

D D

B _SODIMM

A _SODIMM

AMD

MEM_MB_CLK1_P/N

MEM_MB_CLK7_P/N

1066~1600MHz

C C

AMD

CPU FS1r2 SOCKET

MEM_MA_CLK1_P/N

M EM_MA_CLK7_P/N

1066~1600MHz

APU_DISP_CLKP/N

100MHz

APU_CLKP/N

100MHz

DP2_AUX

LVDS Transtator

ATI VGA

Thames XT M2

CLK_PEG_VGA / CLK_PEG_VGA#

100MHz

AMD

FCH Hudson-M3 Internal CLK GEN

GPP_CLK

100MHz

32.768KHz 25MHz

DISPLAY DISTRIBUTION

:

LVDS PATH

:

APU HDMI PATH

APU_TXOUT[0:2]+/APU_TXOUT_CLK+/APU_TZOUT[0:2]+/APU_TZOUT_CLK+/APU_LVDS_CLK/DATA

LVDS_OUT

RTD2136S-VE-CG

DP_IN

XOUT[0:2]+/-

T TXCLK+/TZOUT[0:2]+/TZCLK+/I2CC_SCL/DA

L

VDS CONN

R

C

DP0_TXP/N[0:1] DP0_AUXP/N

B B

WLAN

GbE LAN

Mini PCI Socket

GPP2GPP1

APU

DP1

DP0

PCIE_GFX[0:7]

PCIE_GFX[12:15]

C

PCIE_GFX[0:15]

VGA

25MHz

FCH

R

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONS ENT OF COMPAL ELECTRONICS, INC.

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Title

CLOCK / DISPLAY DISTRIBUTION

Size Document Number Rev

Custom

QML70 LA-8371P

Date: Sheet of

2

Date: Sheet of

LS

HDMI CONNCRT CONN

0.2

3 53Wednesday, Oct ober 19, 2011

1

3 53Wednesday, Oct ober 19, 2011

0.2

A

B

C

D

E

Voltage Rails

N/AN/AN/A

OFF

ON*

OFFON

ONON

Deep S3

N/A

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

STATE

Full ON

SIGNAL

SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

LOW

LOW LOW

S5 (Soft OFF) LOW

HIGH

LOW

HIGHHIGHHIGH

HIGH

LOW

ON

ON ON

ON

LOW

ON

OFF

ON

OFF

Power Plane Description

VIN

B+

+APU_CORE

+APU_CORE_NB ON OFF OFF

1 1

+VGA_CORE OFFOFFON0.95-1.2V switched power rail

+0.75VS ONON OFF0.75V switched power rail for DDR terminator

+1.0VSG ON OFF OFF1.0V switched power rail for VGA

+1.1VALW 1.1V switched power rail for FCH ON ON*ON

+3V_PCH 3.3V switched power rail for FCH ON ON ON*

+1.1VS

+1.2VS ON OFF OFF

+3VSG ON OFF OFF1.8V switched power rail

+1.5V ON

+1.5VS

+1.8VSG OFFON OFF1.8V switched power rail

+2.5VS

+3VALW

+LAN_IO ON ON ON

+3VS

+5VALW

2 2

+5VS

+VSB ON ON*

+RTCVCC

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

Voltage for On-die VGA of APU

1.2V switched power rail for APU

1.5V power rail for CPU VDDIO and DDR

1.5V switched power rail

2.5V for CPU_VDDA

3.3V always on power rail

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

RTC power

S1 S3 S4/S5

N/A N/A N/A

ON OFF

ON OFF OFF1.1V switched power rail for FCH

ON

OFF

ON OFF

OFF

ON

ON ON*

ON

OFF

ON

OFF

ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

BTO Option Table

BTO ItemBOM Structure

PX@ Use VGA (Mux)

AI Use AI Charger

nonAI@ Do not use AI Charger

x = 1 is read cmd, x= 0 is writee cmd.

External PCI Devices

Device

3 3

IDSEL#

REQ#/GNT#

Interrupts

CARD@ Use Card Reader IC

nonCARD@ do not use Card Reader IC

X76L01@

X76L02@

X76L03@

X76L04@

930@

9012@

EC SM Bus1 address EC SM Bus2 address

Device Address HEX

Smart Battery

0001 011X b

FCH SM Bus 0 address

4 4

Device Address Device Address

DDR DIMM1

DDR DIMM2

1101 000X b

1101 001X b

A

Device Address HEX

16H

ADI ADM1032

AMD Thames XT M2

AMD FS1r2 (APU)

RTD2132S (TL)

1001 101X b

1000 001X b

1001 1000 b

1010 1000 b

FCH SM Bus 1 address

HEX

D0

D2

9AH

82H

98H

A8H

HEX

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Board ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 8.2K +/- 5% 0.168 V 0.250 V 0.362 V

2011/07/29 2012/07/29

C

100K +/- 5%Ra / Rc

Rb / Rd V min

0 +/- 5% 0 V 0 V 0.155 V

Compal Secret Data

VRAM ID TableX76@

Use Hynix GDDR3 1GB VRAM

Use Hynix GDDR3 2GB VRAM

Use Samsung GDDR3 1GB VRAM

Use Samsung GDDR3 2GB VRAM

Use EC KB930

Use EC KB9012

AD_BID

Deciphered Date

V typ

AD_BID

Date: Sheet of

D

Date: Sheet of

V

max

AD_BID

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

Notes List

QML70 LA-8371P

E

4 53Wednesday, October 19, 2011

0.2

5

4

3

2

1

BATTERY

12.6V

AC ADAPTOR

D D

19V 90W

C C

B B

BATT+

VIN

PU101 CHARGER

FAN Control APL5607

+5VS 500mA

B+

LCD panel

17.3"

B+ 300mA

+3.3 350mA

U27,U29,U30,U31 AP2301MPG

+INVPWR_B+

+USB_VCCA +USB_VCCB

PU201 ISL6277HRTZ-T

PU501 RT8207MZQW

PU701 TPS51212DSCR

PU901 TPS51212DSCR

PU701 SY8036DBC

PU301 RT8205LZQW

+3VS

+5VS

+APU_CORE

+APU_CORE_NB

+1.5V

+1.2VS

+VGA_CORE +VDDCI

+1.1VALW

+3VALW

+5VALW

+3VS

U69 SI4178

+2.5VS

PU702 APL5508-25DC

U71 SI4178

PU902 APL5912

U19 AO4430L

PU401 SY8033BDBC

PU501 RT8207MZQW

+1.0VSG

+1.5VSG

+1.8VSG

Q7 AO3404AL

U39 AO4430L

+0.75VS

+3VSG

+1.1VS

+CPU_CORE

+

CPU_CORE_NB

+2.5VS

+1.5V

+1.2VS

+0.75VS

+VGA_CORE

+VDDCI

+1.0VSG

+1.5VSG

+1.8VSG

+1.1VS

+1.1VALW

+3VS

+3VSG

USB X4

+5V Dual+1

2.5A

SATA

HDD*2

ODD*1

+5V 3A

+3.3V

A A

Audio Codec ALC269-GR

+5V 45mA

+3.3VS 25mA

EC ENE KB9012

+3.3VALW 30mA +3.3VS 3mA

+3VALW

LAN RTL8111F

+3.3VALW 201mA

+1.5VS

Mini Card

+1.5VS 500mA +3.3VS 1A +3.3VALW 330mA

RTC Bettary

+3VALW

AMD APU FS1

1.025~1.475V

0.7~1.475V

+2.5VS

+1.5V

+1.2VS

VDD CORE 54A

VDDNB 27.5A

VDDA 500mA

VDDIO 4.6A

VDDR 6.7A

RAM DDRIII SODIMMX2

+1.5V

+0.75VS

0.85~1.1V

0.9~1.0V

+1.0VSG

+1.5VSG

+1.8VSG

+3VSG

VDD_MEM 4A

VTT_MEM 0.5A

VGA ATI W

histler/Seymour/Granville

VDDC 47A

VDDCI 4.6A

DPLL_VDDC: 125 mA SPV10: 120 mA PCIE_VDDC: 2000 mA DP[A:E]_VDD10: 680 mA

VDDR1: 3400 mA

PLL_PVDD: 75 mA TSVDD: 20 mA AVDD: 70 mA VDD1DI: 100 mA VDD2DI: 50 mA A2VDDQ: 1.5 mA VDD_CT: 110 mA VDDR4: 170 mA PCIE_PVDD: 40 mA MPV18: 150 mA SPV18: 75 mA PCIE_VDDR: 400 mA DP[A:F]_VDD18: 920 mA DP[A:F]_PVDD: 120 mA

A2VDD: 130 mA VDDR3: 60 mA

FCH AMD Hudson M2/M3

VDDPL_11_DAC: 7 mA VDDAN_11_ML: 226 mA VDDCR_11: 1007 mA

+1.1VS

VDDAN_11_CLK: 340 mA VDDAN_11_PCIE: 1088 mA VDDAN_11_SATA: 1337 mA

VDDAN_11_USB_S: 140 mA VDDCR_11_USB_S: 197 mA VDDAN_11_SSUSB_S: 282 mA

+1.1VALW

VDDCR_11_SSUSB_S: 424 mA VDDCR_11_S: 187 mA VDDPL_11_SYS: 70 mA

VDDIO_33_PCIGP: 131 mA VDDPL_33_SYS: 47 mA VDDPL_33_DAC: 20 mA VDDPL_33_ML: 20 mA VDDAN_33_DAC: 200 mA

+3VS

VDDPL_33_PCIE: 43 mA VDDPL_33_SATA: 93 mA VDDIO_AZ_S: 26 mA

VDDPL_33_SSUSB_S: 20 mA VDDPL_33_USB_S: 17 mA VDDAN_33_USB_S: 658 mA

+3VALW

VDDIO_33_S: 59 mA VDDXL_33_S: 5 mA VDDAN_33_HWM_S: 12 mA

VDDIO_33_GBE_S VDDCR_11_GBE_S

GND

VDDIO_GBE_S

VDDBT_RTC_GRTC BAT

VRAM 1GB/2GB 64M / 128Mx16 * 4 / 8

+1.5VSG 2.4 A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

3

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

2

Title

POWER DELIVERY CHART

Size Document Number Rev

Custom

QML70 LA-8371P

Date: Sheet of

1

5 53Wednesday, October 19, 2011

0.2

A

PCIE_CRX_GTX_P[0..15]18

JCPU1A

PCI EXPRESS

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0 PCIE_CRX_GTX_P1 PCIE_CRX_GTX_N1 PCIE_CRX_GTX_P2

1 1

LAN

2 2

WLAN

PCIE_DTX_C_CRX_P130 PCIE_DTX_C_CRX_N130 PCIE_DTX_C_CRX_P233 PCIE_DTX_C_CRX_N233

UMI_MTX_C_CRX_P013 UMI_MTX_C_CRX_N013 UMI_MTX_C_CRX_P113 UMI_MTX_C_CRX_N113 UMI_MTX_C_CRX_P213 UMI_MTX_C_CRX_N213 UMI_MTX_C_CRX_P313 UMI_MTX_C_CRX_N313

+1.2VS

PCIE_CRX_GTX_N2 PCIE_CRX_GTX_P3 PCIE_CRX_GTX_N3 PCIE_CRX_GTX_P4 PCIE_CRX_GTX_N4 PCIE_CRX_GTX_P5 PCIE_CRX_GTX_N5 PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6 PCIE_CRX_GTX_P7 PCIE_CRX_GTX_N7 PCIE_CRX_GTX_P8 PCIE_CRX_GTX_N8 PCIE_CRX_GTX_P9 PCIE_CRX_GTX_N9 PCIE_CRX_GTX_P10 PCIE_CRX_GTX_N10 PCIE_CRX_GTX_P11 PCIE_CRX_GTX_N11 PCIE_CRX_GTX_P12 PCIE_CRX_GTX_N12 PCIE_CRX_GTX_P13 PCIE_CRX_GTX_N13 PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14 PCIE_CRX_GTX_P15 PCIE_CRX_GTX_N15

1 2

R1 196_0402_1%R1 196_0402_1%

P_ZVDDP

AG11

AB8 AB7 AA9 AA8 AA5 AA6

AE5 AE6 AD8 AD7 AC9 AC8 AC5 AC6

AG8 AG9 AG6 AG5 AF7 AF8 AE8 AE9

Y8

Y7 W9 W8 W5 W6

V8

V7

U9

U8

U5

U6

T8

T7

R9

R8

R5

R6

P8

P7

N9

N8

N5

N6 M8 M7

P_GFX_RXP0 P_GFX_RXN0 P_GFX_RXP1 P_GFX_RXN1 P_GFX_RXP2 P_GFX_RXN2 P_GFX_RXP3 P_GFX_RXN3 P_GFX_RXP4 P_GFX_RXN4 P_GFX_RXP5 P_GFX_RXN5 P_GFX_RXP6 P_GFX_RXN6 P_GFX_RXP7 P_GFX_RXN7 P_GFX_RXP8 P_GFX_RXN8 P_GFX_RXP9 P_GFX_RXN9 P_GFX_RXP10 P_GFX_RXN10 P_GFX_RXP11 P_GFX_RXN11 P_GFX_RXP12 P_GFX_RXN12 P_GFX_RXP13 P_GFX_RXN13 P_GFX_RXP14 P_GFX_RXN14 P_GFX_RXP15 P_GFX_RXN15

P_GPP_RXP0 P_GPP_RXN0 P_GPP_RXP1 P_GPP_RXN1 P_GPP_RXP2 P_GPP_RXN2 P_GPP_RXP3 P_GPP_RXN3

P_UMI_RXP0 P_UMI_RXN0 P_UMI_RXP1 P_UMI_RXN1 P_UMI_RXP2 P_UMI_RXN2 P_UMI_RXP3 P_UMI_RXN3

P_ZVDDP

CONN@

PCI EXPRESS

GPP GRAPHICS

UMI

LOTES_ACA-ZIF-109-P12-A_FS1R2

B

P_GFX_TXP0 P_GFX_TXN0 P_GFX_TXP1 P_GFX_TXN1 P_GFX_TXP2 P_GFX_TXN2 P_GFX_TXP3 P_GFX_TXN3 P_GFX_TXP4 P_GFX_TXN4 P_GFX_TXP5 P_GFX_TXN5 P_GFX_TXP6 P_GFX_TXN6 P_GFX_TXP7 P_GFX_TXN7 P_GFX_TXP8 P_GFX_TXN8 P_GFX_TXP9

P_GFX_TXN9 P_GFX_TXP10 P_GFX_TXN10 P_GFX_TXP11 P_GFX_TXN11 P_GFX_TXP12 P_GFX_TXN12 P_GFX_TXP13 P_GFX_TXN13 P_GFX_TXP14 P_GFX_TXN14 P_GFX_TXP15 P_GFX_TXN15

P_GPP_TXP0

P_GPP_TXN0

P_GPP_TXP1

P_GPP_TXN1

P_GPP_TXP2

P_GPP_TXN2

P_GPP_TXP3

P_GPP_TXN3

P_UMI_TXP0 P_UMI_TXN0 P_UMI_TXP1 P_UMI_TXN1 P_UMI_TXP2 P_UMI_TXN2 P_UMI_TXP3 P_UMI_TXN3

P_ZVSS

PCIE_CTX_C_GRX_P0

AB2

PCIE_CTX_C_GRX_N0

AB1

PCIE_CTX_C_GRX_P1

AA3

PCIE_CTX_C_GRX_N1

AA2

PCIE_CTX_C_GRX_P2

Y5

PCIE_CTX_C_GRX_N2

Y4

PCIE_CTX_C_GRX_P3

Y2

PCIE_CTX_C_GRX_N3

Y1

PCIE_CTX_C_GRX_P4

W3

PCIE_CTX_C_GRX_N4

W2

PCIE_CTX_C_GRX_P5

V5

PCIE_CTX_C_GRX_N5

V4

PCIE_CTX_C_GRX_P6

V2

PCIE_CTX_C_GRX_N6

V1

PCIE_CTX_C_GRX_P7

U3

PCIE_CTX_C_GRX_N7

U2

PCIE_CTX_C_GRX_P8

T5

PCIE_CTX_C_GRX_N8

T4

PCIE_CTX_C_GRX_P9

T2

PCIE_CTX_C_GRX_N9

T1

PCIE_CTX_C_GRX_P10

R3

PCIE_CTX_C_GRX_N10

R2

PCIE_CTX_C_GRX_P11

P5

PCIE_CTX_C_GRX_N11

P4

PCIE_CTX_C_GRX_P12

P2

PCIE_CTX_C_GRX_N12

P1

PCIE_CTX_C_GRX_P13

N3

PCIE_CTX_C_GRX_N13

N2

PCIE_CTX_C_GRX_P14

M5

PCIE_CTX_C_GRX_N14

M4

PCIE_CTX_C_GRX_P15

M2

PCIE_CTX_C_GRX_N15

M1

AD5 AD4

PCIE_CTX_DRX_P1

AD2

PCIE_CTX_DRX_N1

AD1

PCIE_CTX_DRX_P2

AC3

PCIE_CTX_DRX_N2

AC2 AB5 AB4

UMI_CTX_MRX_P0

AG2

UMI_CTX_MRX_N0

AG3

UMI_CTX_MRX_P1

AF4

UMI_CTX_MRX_N1

AF5

UMI_CTX_MRX_P2

AF1

UMI_CTX_MRX_N2

AF2

UMI_CTX_MRX_P3

AE2

UMI_CTX_MRX_N3

AE3

P_ZVSS

AH11

C1 0.1U_0402_16V7KPX@C1 0.1U_0402_16V7KPX@ C2 0.1U_0402_16V7KPX@C2 0.1U_0402_16V7KPX@ C3 0.1U_0402_16V7KPX@C3 0.1U_0402_16V7KPX@ C4 0.1U_0402_16V7KPX@C4 0.1U_0402_16V7KPX@ C5 0.1U_0402_16V7KPX@C5 0.1U_0402_16V7KPX@ C6 0.1U_0402_16V7KPX@C6 0.1U_0402_16V7KPX@ C7 0.1U_0402_16V7KPX@C7 0.1U_0402_16V7KPX@ C8 0.1U_0402_16V7KPX@C8 0.1U_0402_16V7KPX@ C9 0.1U_0402_16V7KPX@C9 0.1U_0402_16V7KPX@ C10 0.1U_0402_16V7KPX@C10 0.1U_0402_16V7KPX@ C11 0.1U_0402_16V7KPX@C11 0.1U_0402_16V7KPX@ C12 0.1U_0402_16V7KPX@C12 0.1U_0402_16V7KPX@ C13 0.1U_0402_16V7KPX@C13 0.1U_0402_16V7KPX@ C14 0.1U_0402_16V7KPX@C14 0.1U_0402_16V7KPX@ C15 0.1U_0402_16V7KPX@C15 0.1U_0402_16V7KPX@ C16 0.1U_0402_16V7KPX@C16 0.1U_0402_16V7KPX@ C17 0.1U_0402_16V7KPX@C17 0.1U_0402_16V7KPX@ C18 0.1U_0402_16V7KPX@C18 0.1U_0402_16V7KPX@ C19 0.1U_0402_16V7KPX@C19 0.1U_0402_16V7KPX@ C20 0.1U_0402_16V7KPX@C20 0.1U_0402_16V7KPX@ C21 0.1U_0402_16V7KPX@C21 0.1U_0402_16V7KPX@ C22 0.1U_0402_16V7KPX@C22 0.1U_0402_16V7KPX@ C23 0.1U_0402_16V7KPX@C23 0.1U_0402_16V7KPX@ C24 0.1U_0402_16V7KPX@C24 0.1U_0402_16V7KPX@ C25 0.1U_0402_16V7KPX@C25 0.1U_0402_16V7KPX@ C26 0.1U_0402_16V7KPX@C26 0.1U_0402_16V7KPX@ C27 0.1U_0402_16V7KPX@C27 0.1U_0402_16V7KPX@ C28 0.1U_0402_16V7KPX@C28 0.1U_0402_16V7KPX@ C29 0.1U_0402_16V7KPX@C29 0.1U_0402_16V7KPX@ C30 0.1U_0402_16V7KPX@C30 0.1U_0402_16V7KPX@ C31 0.1U_0402_16V7KPX@C31 0.1U_0402_16V7KPX@ C32 0.1U_0402_16V7KPX@C32 0.1U_0402_16V7KPX@

1 2

R2 196_0402_1%R2 196_0402_1%

C

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

C35 0.1U_0402_16V7KC35 0.1U_04 02_16V7K

1 2

C36 0.1U_0402_16V7KC36 0.1U_04 02_16V7K

1 2

C71 0.1U_0402_16V7KC71 0.1U_04 02_16V7K

1 2

C72 0.1U_0402_16V7KC72 0.1U_04 02_16V7K

1 2

C37 0.1U_0402_16V7KC37 0.1U_04 02_16V7K

1 2

C38 0.1U_0402_16V7KC38 0.1U_04 02_16V7K

1 2

C39 0.1U_0402_16V7KC39 0.1U_04 02_16V7K

1 2

C40 0.1U_0402_16V7KC40 0.1U_04 02_16V7K

1 2

C41 0.1U_0402_16V7KC41 0.1U_04 02_16V7K

1 2

C42 0.1U_0402_16V7KC42 0.1U_04 02_16V7K

1 2

C43 0.1U_0402_16V7KC43 0.1U_04 02_16V7K

1 2

C44 0.1U_0402_16V7KC44 0.1U_04 02_16V7K

1 2

PCIE_CTX_GRX_P0 PCIE_CTX_GRX_N0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15

PCIE_CTX_GRX_P[0..15] 18

PCIE_CTX_GRX_N[0..15] 18PCIE_CRX_GTX_N[0..15]18

PCIE_CTX_C_DRX_P1 30 PCIE_CTX_C_DRX_N1 30 PCIE_CTX_C_DRX_P2 33 PCIE_CTX_C_DRX_N2 33

UMI_CTX_C_MRX_P0 13 UMI_CTX_C_MRX_N0 13 UMI_CTX_C_MRX_P1 13 UMI_CTX_C_MRX_N1 13 UMI_CTX_C_MRX_P2 13 UMI_CTX_C_MRX_N2 13 UMI_CTX_C_MRX_P3 13 UMI_CTX_C_MRX_N3 13

LAN

WLAN

D

E

3 3

Power Sequence of APU

+1.5V

+2.5VS

+1.5VS

+CPU_CORE

4 4

+CPU_CORE_NB

+1.2VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

FS1r2 PCIE/UMI

QML70 LA-8371P

E

6 53Wednesday, October 19, 2011

Group A

Group B

0.2

A

1 1

JCPU1B

MEMORY CHANNEL A

DDRA_SMA[15..0]11

DDRA_SBS0#11 DDRA_SBS1#11 DDRA_SBS2#11 DDRA_SDM[7..0]11

2 2

DDRA_SDQS011 DDRA_SDQS0#11 DDRA_SDQS111 DDRA_SDQS1#11 DDRA_SDQS211 DDRA_SDQS2#11 DDRA_SDQS311 DDRA_SDQS3#11 DDRA_SDQS411 DDRA_SDQS4#11 DDRA_SDQS511 DDRA_SDQS5#11 DDRA_SDQS611 DDRA_SDQS6#11 DDRA_SDQS711 DDRA_SDQS7#11

DDRA_CLK011 DDRA_CLK0#11 DDRA_CLK111 DDRA_CLK1#11

DDRA_CKE011 DDRA_CKE111

DDRA_ODT011 DDRA_ODT111

3 3

DDRA_SCS0#11 DDRA_SCS1#11

DDRA_SRAS#11 DDRA_SCAS#11 DDRA_SWE#11

MEM_MA_RST#11 MEM_MA_EVENT#11

+MEM_VREF

+1.5V

Place them close to APU within 1"

Place them close to APU within 1"Place them close to APU within 1"

15mil

DDRA_SMA0 DDRA_SMA1 DDRA_SMA2 DDRA_SMA3 DDRA_SMA4 DDRA_SMA5 DDRA_SMA6 DDRA_SMA7 DDRA_SMA8 DDRA_SMA9 DDRA_SMA10 DDRA_SMA11 DDRA_SMA12 DDRA_SMA13 DDRA_SMA14 DDRA_SMA15

DDRA_SBS0# DDRA_SBS1# DDRA_SBS2#

DDRA_SDM0 DDRA_SDM1 DDRA_SDM2 DDRA_SDM3 DDRA_SDM4 DDRA_SDM5 DDRA_SDM6 DDRA_SDM7

DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7#

DDRA_CLK0 DDRA_CLK0# DDRA_CLK1 DDRA_CLK1#

DDRA_CKE0 DDRA_CKE1

DDRA_ODT0 DDRA_ODT1

DDRA_SCS0# DDRA_SCS1#

DDRA_SRAS# DDRA_SCAS# DDRA_SWE#

MEM_MA_RST#

MEM_MA_EVENT#

M_ZVDDIO

1 2

R3 39.2_0402_1%R3 39.2_0402_1%

M21

M22

AA25

AD27 AC23 AD19 AC15

AE26 AD26 AB22 AA22 AB18 AA18 AA14 AA15

AA27

AA26

W24 W23

W20

W21

U20 R20 R21 P22 P21 N24 N23 N20 N21

U23

L24

L21 L20

U24 U21

L23

E14

J17 E21 F25

G14 H14 G18 H18

J21 H21 E27 E26

T21 T22 R23 R24

H28 H27

Y25

V22

V21

H25 T24

MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15

MA_BANK0 MA_BANK1 MA_BANK2

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7

MA_CLK_H0 MA_CLK_L0 MA_CLK_H1 MA_CLK_L1

MA_CKE0 MA_CKE1

MA_ODT0 MA_ODT1

MA_CS_L0 MA_CS_L1

MA_RAS_L MA_CAS_L MA_WE_L

MA_RESET_L MA_EVENT_L

M_VREF

M_ZVDDIO

CONN@

MEMORY CHANNEL A

LOTES_ACA-ZIF-109-P12-A_FS1R2

B

MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7

MA_DATA8

MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15

MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23

MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31

MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39

MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47

MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55

MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63

E13 J13 H15 J15 H13 F13 F15 E15

H17 F17 E19 J19 G16 H16 H19 F19

H20 F21 J23 H23 G20 E20 G22 H22

G24 E25 G27 G26 F23 H24 E28 F27

AB28 AC27 AD25 AA24 AE28 AD28 AB26 AC25

Y23 AA23 Y21 AA20 AB24 AD24 AA21 AC21

AA19 AC19 AC17 AA17 AB20 Y19 AD18 AD17

AA16 Y15 AA13 AC13 Y17 AB16 AB14 Y13

DDRA_SDQ0 DDRA_SDQ1 DDRA_SDQ2 DDRA_SDQ3 DDRA_SDQ4 DDRA_SDQ5 DDRA_SDQ6 DDRA_SDQ7

DDRA_SDQ8 DDRA_SDQ9 DDRA_SDQ10 DDRA_SDQ11 DDRA_SDQ12 DDRA_SDQ13 DDRA_SDQ14 DDRA_SDQ15

DDRA_SDQ16 DDRA_SDQ17 DDRA_SDQ18 DDRA_SDQ19 DDRA_SDQ20 DDRA_SDQ21 DDRA_SDQ22 DDRA_SDQ23

DDRA_SDQ24 DDRA_SDQ25 DDRA_SDQ26 DDRA_SDQ27 DDRA_SDQ28 DDRA_SDQ29 DDRA_SDQ30 DDRA_SDQ31

DDRA_SDQ32 DDRA_SDQ33 DDRA_SDQ34 DDRA_SDQ35 DDRA_SDQ36 DDRA_SDQ37 DDRA_SDQ38 DDRA_SDQ39

DDRA_SDQ40 DDRA_SDQ41 DDRA_SDQ42 DDRA_SDQ43 DDRA_SDQ44 DDRA_SDQ45 DDRA_SDQ46 DDRA_SDQ47

DDRA_SDQ48 DDRA_SDQ49 DDRA_SDQ50 DDRA_SDQ51 DDRA_SDQ52 DDRA_SDQ53 DDRA_SDQ54 DDRA_SDQ55

DDRA_SDQ56 DDRA_SDQ57 DDRA_SDQ58 DDRA_SDQ59 DDRA_SDQ60 DDRA_SDQ61 DDRA_SDQ62 DDRA_SDQ63

DDRA_SDQ[63..0] 11

C

DDRB_SMA[15..0]12

DDRB_SBS0#12 DDRB_SBS1#12 DDRB_SBS2#12 DDRB_SDM[7..0]12

DDRB_SDQS012 DDRB_SDQS0#12 DDRB_SDQS112 DDRB_SDQS1#12 DDRB_SDQS212 DDRB_SDQS2#12 DDRB_SDQS312 DDRB_SDQS3#12 DDRB_SDQS412 DDRB_SDQS4#12 DDRB_SDQS512 DDRB_SDQS5#12 DDRB_SDQS612 DDRB_SDQS6#12 DDRB_SDQS712 DDRB_SDQS7#12

DDRB_CLK012 DDRB_CLK0#12 DDRB_CLK112 DDRB_CLK1#12

DDRB_CKE012 DDRB_CKE112

DDRB_ODT012 DDRB_ODT112

DDRB_SCS0#12 DDRB_SCS1#12

DDRB_SRAS#12 DDRB_SCAS#12 DDRB_SWE#12

MEM_MB_RST#12 MEM_MB_EVENT#12

DDRB_SMA0 DDRB_SMA1 DDRB_SMA2 DDRB_SMA3 DDRB_SMA4 DDRB_SMA5 DDRB_SMA6 DDRB_SMA7 DDRB_SMA8 DDRB_SMA9 DDRB_SMA10 DDRB_SMA11 DDRB_SMA12 DDRB_SMA13 DDRB_SMA14 DDRB_SMA15

DDRB_SBS0# DDRB_SBS1# DDRB_SBS2#

DDRB_SDM0 DDRB_SDM1 DDRB_SDM2 DDRB_SDM3 DDRB_SDM4 DDRB_SDM5 DDRB_SDM6 DDRB_SDM7

DDRB_SDQS0 DDRB_SDQS0# DDRB_SDQS1 DDRB_SDQS1# DDRB_SDQS2 DDRB_SDQS2# DDRB_SDQS3 DDRB_SDQS3# DDRB_SDQS4 DDRB_SDQS4# DDRB_SDQS5 DDRB_SDQS5# DDRB_SDQS6 DDRB_SDQS6# DDRB_SDQS7 DDRB_SDQS7#

DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1#

DDRB_CKE0 DDRB_CKE1

DDRB_ODT0 DDRB_ODT1

DDRB_SCS0# DDRB_SCS1#

DDRB_SRAS# DDRB_SCAS# DDRB_SWE#

MEM_MB_RST# MEM_MB_EVENT#

D

P24 P25 N27

N26 M28 M27 M24 M25

U26

K27 W26

K25

K24

U27

K28

D14

A18

A22

C25

AF25 AG22 AH18 AD14

C15

B15

E18

D18

E22

D22

B26

A26

AG24 AG25 AG21 AF21 AG17 AG18 AH14 AG14

R26

R27

P27

P28

W27

V25

V24

V27

V28

T27

L26

L27

T28

J26 J27

Y28

Y27

J25 T25

JCPU1C

MEMORY CHANNEL B

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8 MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15

MB_BANK0 MB_BANK1 MB_BANK2

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7

MB_CLK_H0 MB_CLK_L0 MB_CLK_H1 MB_CLK_L1

MB_CKE0 MB_CKE1

MB_ODT0 MB_ODT1

MB_CS_L0 MB_CS_L1

MB_RAS_L MB_CAS_L MB_WE_L

MB_RESET_L MB_EVENT_L

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7

MB_DATA8

MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15

MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23

MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31

MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39

MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47

MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55

MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63

A14 B14 D16 E16 B13 C13 B16 A16

C17 B18 B20 A20 E17 B17 B19 C19

C21 B22 C23 A24 D20 B21 E23 B23

E24 B25 B27 D28 B24 D24 D26 C27

AG26 AH26 AF23 AG23 AG27 AF27 AH24 AE24

AE22 AH22 AE20 AH20 AD23 AD22 AD21 AD20

AF19 AE18 AE16 AH16 AG20 AG19 AF17 AD16

AG15 AD15 AG13 AD13 AG16 AF15 AE14 AF13

DDRB_SDQ0 DDRB_SDQ1 DDRB_SDQ2 DDRB_SDQ3 DDRB_SDQ4 DDRB_SDQ5 DDRB_SDQ6 DDRB_SDQ7

DDRB_SDQ8 DDRB_SDQ9 DDRB_SDQ10 DDRB_SDQ11 DDRB_SDQ12 DDRB_SDQ13 DDRB_SDQ14 DDRB_SDQ15

DDRB_SDQ16 DDRB_SDQ17 DDRB_SDQ18 DDRB_SDQ19 DDRB_SDQ20 DDRB_SDQ21 DDRB_SDQ22 DDRB_SDQ23

DDRB_SDQ24 DDRB_SDQ25 DDRB_SDQ26 DDRB_SDQ27 DDRB_SDQ28 DDRB_SDQ29 DDRB_SDQ30 DDRB_SDQ31

DDRB_SDQ32 DDRB_SDQ33 DDRB_SDQ34 DDRB_SDQ35 DDRB_SDQ36 DDRB_SDQ37 DDRB_SDQ38 DDRB_SDQ39

DDRB_SDQ40 DDRB_SDQ41 DDRB_SDQ42 DDRB_SDQ43 DDRB_SDQ44 DDRB_SDQ45 DDRB_SDQ46 DDRB_SDQ47

DDRB_SDQ48 DDRB_SDQ49 DDRB_SDQ50 DDRB_SDQ51 DDRB_SDQ52 DDRB_SDQ53 DDRB_SDQ54 DDRB_SDQ55

DDRB_SDQ56 DDRB_SDQ57 DDRB_SDQ58 DDRB_SDQ59 DDRB_SDQ60 DDRB_SDQ61 DDRB_SDQ62 DDRB_SDQ63

E

DDRB_SDQ[63..0] 12

EVENT# pull high 0.75V reference voltage

+1.5V

4 4

R5 1K_0402_5%R5 1K_0402_5%

1 2

R6 1K_0402_5%R6 1K_0402_5%

1 2

MEM_MA_EVENT#

MEM_MB_EVENT# +MEM_VREF

A

R4

1K_0402_1%

R7

1K_0402_1%

+1.5V

1 2

B

1

C45

C45 1000P_0402_50V7K

1000P_0402_50V7K

2

15mil

2

C46

0.1U_0402_16V7K

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

FS1r2 DDRIII Memory I/F

QML70 LA-8371P

7 53Wednesday, October 19, 2011

E

0.2

A

HDMI_TX2P29 HDMI_TX2N29

HDMI_TX1P29 HDMI_TX1N29

HDMI_TX0P29 HDMI_TX0N29

HDMI_CLKP29 HDMI_CLKN29

1 1

ML_VGA_TXP015 ML_VGA_TXN015

ML_VGA_TXP115 ML_VGA_TXN115

ML_VGA_TXP215 ML_VGA_TXN215

ML_VGA_TXP315 ML_VGA_TXN315

DP2_TXP0_C27 DP2_TXN0_C27

DP2_TXP1_C27 DP2_TXN1_C27

C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K

1 2

C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K

1 2

C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K

1 2

C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K

1 2

C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K

1 2

C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K

1 2

C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K

1 2

C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K

1 2

C47 0.1U_0402_16V7KC47 0.1U_0402_16V7K

1 2

C48 0.1U_0402_16V7KC48 0.1U_0402_16V7K

1 2

C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K

1 2

C52 0.1U_0402_16V7KC52 0.1U_0402_16V7 K

1 2

Place near APU

APU_CLKP13 APU_CLKN13

APU_DISP_CLKP13

APU_TDI APU_TDO APU_TCK APU_TMS APU_TRST# APU_DBRDY APU_DBREQ#

APU_DISP_CLKN13

APU_SVC47 APU_SVD47

APU_SVT47

APU_SIC14 APU_SID14

APU_RST#13 APU_PWRGD13

APU_PROCHOT#13

R541 0_0402_5%R541 0_0402_5%

1 2

R542 0_0402_5%R542 0_0402_5%

1 2

R543 0_0402_5%R543 0_0402_5%

1 2

R544 0_0402_5%R544 0_0402_5%

1 2

R545 0_0402_5%R545 0_0402_5%

1 2

R546 0_0402_5%R546 0_0402_5%

1 2

R547 0_0402_5%R547 0_0402_5%

1 2

R28 0_0402_5%R28 0_0402 _5%

1 2

APU_VDDNB_SEN47

APU_VDD_SEN47

APU_SIC APU_SID

APU_THERMTRIP# ALERT_L

APU_RST#

2 2

APU_PWRGD

1

C597

C598

2

@

100P_0402_50V8J

EMI request for ESD protection

As close as U2

APU_VDD_RUN_FB_L47

Route as differential with VSS_SENSE

3 3

HDMI_TX2P HDMI_TX2N

HDMI_TX1P HDMI_TX1N

HDMI_TX0P HDMI_TX0N

HDMI_CLKP HDMI_CLKN

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

DP2_TXP0 DP2_TXN0

DP2_TXP1 DP2_TXN1

AE11 AD11

AB11 AA11

AG12 AH12

AF10 AB12

AC10 AE12 AF12

B

L3 L2

K5 K4

K2 K1

J3 J2

H5 H4

H2 H1

G3 G2

F2 F1

L9 L8

L5 L6

K8 K7

J6 J5

B3 A3

C3

H10

J10 F10 G10

F9 G9 H9

B4 C5

A4

A5 C4

B5

DP0_TXP0 DP0_TXN0

DP0_TXP1 DP0_TXN1

DP0_TXP2 DP0_TXN2

DP0_TXP3 DP0_TXN3

DP1_TXP0 DP1_TXN0

DP1_TXP1 DP1_TXN1

DP1_TXP2 DP1_TXN2

DP1_TXP3 DP1_TXN3

DP2_TXP0 DP2_TXN0

DP2_TXP1 DP2_TXN1

DP2_TXP2 DP2_TXN2

DP2_TXP3 DP2_TXN3

CLKIN_H CLKIN_L

DISP_CLKIN_H DISP_CLKIN_L

SVC SVD

SVT

SIC SID

RESET_L PWROK

PROCHOT_L THERMTRIP_L ALERT_L

TDI TDO TCK TMS TRST_L DBRDY DBREQ_L

VSS_SENSE VDDP_SENSE VDDNB_SENSE VDDIO_SENSE VDD_SENSE VDDR_SENSE

CONN@

JCPU1D

ANALOG/DISPLAY/MISC

HDMI

DISPLAY PORT 0

To FCH

DISPLAY PORT MISC.

LVDS

LOTES_ACA-ZIF-109-P12-A_FS1R2

DP_VARY_BL

DP_AUX_ZVSS

DISPLAY PORT 2 DISPLAY PORT 1

TEST

CTRL SE R. CLK

DMAACTIVE_L

JTAG

RSVD

SENSE

DP0_AUXP DP0_AUXN

DP1_AUXP DP1_AUXN

DP2_AUXP DP2_AUXN

DP3_AUXP DP3_AUXN

DP4_AUXP DP4_AUXN

DP5_AUXP DP5_AUXN

DP0_HPD DP1_HPD DP2_HPD DP3_HPD DP4_HPD DP5_HPD

DP_BLON

DP_DIGON

TEST6

TEST9 TEST10 TEST14 TEST15 TEST16 TEST17 TEST18 TEST19 TEST20 TEST24

TEST25_H

TEST25_L

TEST28_H

TEST28_L

TEST30_H

TEST30_L

TEST31

TEST32_H

TEST32_L

TEST35

FS1R2

TEST4

TEST5

RSVD1 RSVD2 RSVD3 RSVD4

D1 D2

ML_VGA_AUXP

E1

ML_VGA_AUXN

E2

DP2_AUXP

D5

DP2_AUXN

D6

E5 E6

F5 F6

G5 G6

D3 E3 D7 E7 F7 G7

DP_ENBKL

C6 B6

DP_INT_PWM

A6

DP_AUX_ZVSS

C1

AD12 M18 N18 F11 G11 H11 J11

APU_TEST18

F12

APU_TEST19

G12

APU_TEST20

J12

APU_TEST24

H12

TEST25_H

AE10

TEST25_L

AD10 L10 M10 P19 R19

APU_TEST31

K22 T19 N19

APU_TEST35

AA12

FS1R2

W10 AC12

P18 R18

Y10 AA10 Y12 K21

C

C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K

1 2

C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K

1 2

C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K

1 2

C50 0.1U_0402_16V7KC50 0.1U_0402_16V7K

1 2

HDMI_DET 10 ML_VGA_HPD 10 LVDS_HPD_R 10

DP_ENBKL 10

DP_INT_PWM 10

R13 150_0402_1%R13 150_0402_1%

1 2

T1T1 T2T2 T3T3 T4T4 T5T5 T6T6

R14 1K_0402_5%R14 1K_0402_5%

1 2

R15 1K_0402_5%R15 1K_0402_5%

1 2

R16 1K_0402_5%R16 1K_0402_5%

1 2

R17 1K_0402_5%R17 1K_0402_5%

1 2

R20 510_0402_1%R20 510_0402_1%

1 2

R21 510_0402_1%R21 510_0402_1%

1 2

T7T7 T8T8

R22 39.2_0402_1%R22 39.2_0402_1%

1 2

R23 300_0402_5%R23 300_0402_5%

1 2

R24 300_0402_5%@R24 300_0402_5%@

1 2

R25 10K_0402_5%R25 10K_0402_5%

1 2

ALLOW_STOP 13

T9T9 T10T10

HDMI_CLK 29 HDMI_DATA 29

ML_VGA_AUXP_C 15 ML_VGA_AUXN_C 15

DP2_AUXP_C 27 DP2_AUXN_C 27

+1.2VS

+1.5V

+3VALW

D

To HDMI

To FCH for RGB

To LVDS Translater

Asserted as an input to force the processor into the HTC-active state

THERMTRIP shutdown temperature: 125 degree

1K_0402_5%

for issue, HDMI no display @ DOS Mode

+1.5VS

R615

1K_0402_5%

@

1 2

APU_PROCHOT#

+1.5VS

R614

1K_0402_5%

@

1 2

APU_THERMTRIP#

ML_VGA_AUXP

ML_VGA_AUXN

DP2_AUXP

DP2_AUXN

R10

1 2

+1.5V

R18

1 2

MMBT3904_NL_SOT23-3 @

R560 0_0402_5%R560 0_0402_5%

1 2

R8 1.8K_0402_5%R8 1.8K_0402_5%

R9 1.8K_0402_5%R9 1.8K_0402_5%

R40 1.8K_0402_5%R40 1.8K_0402_5%

R30 1.8K_0402_5%R30 1.8K_0402_5%

+3VS+1.5V

R11

10K_0402_5%

Q101

C

MMBT3904_NL_SOT23-3

Indicates to the FCH that a thermal trip has occurred. Its assertion will cause the FCH to transition the system to S5 immediately

12

R19

R19 10K_0402_5%

10K_0402_5%

@

B

2

Q2

E

3 1

C

E

12

R12

R12 10K_0402_5%

10K_0402_5%

2

B

E

31

H_PROCHOT#_EC 37,47

H_THERMTRIP# 14

EC_THERMTRIP# 37

CPU TSI interface level shift

1 2

BSH111, the Vgs is: min = 0.4V Max = 1.3V

R36

R36 1K_0402_5%

1K_0402_5%

1 2

EC_SMB_DA2 19,27,37

EC_SMB_CK2 19,27,37

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

To EC

2011/07/29 2012/07/29

APU_TRST#

Compal Secret Data

R41 0_0402_5%R41 0_0402_5%

1 2

R44 10K_0402_5%R44 10K_0402_5%

1 2

R47 10K_0402_5%R47 10K_0402_5%

1 2

R50 10K_0402_5%R50 10K_0402_5%

1 2

Deciphered Date

D

+1.5V

@

+1.5V

R32 1K_0402_5%@R32 1K_0402_5%@

1 2

R35 1K_0402_5%@R35 1K_0402_5%@

1 2

R37 1K_0402_5%@R37 1K_0402_5%@

1 2

R45 1K_0402_5%@R45 1K_0402_5%@

1 2

R48 1K_0402_5%R48 1K_0402_5%

1 2

R607 1K_0402_5%@R607 1K_0402_5%@

1 2

R608 1K_0402_5%@R608 1K_0402_5%@

1 2

R89 300_0402_5%@R89 300_0402_5%@

1 2

R68 300_0402_5%@R68 300_0402_5%@

1 2

+1.5VS

4 4

R53 300_0402_5%R53 300_0402_5%

1 2

R56 300_0402_5%R56 300_0402_5%

1 2

R57 1K_0402_5%R57 1K_0402_5%

1 2

R46 1K_0402_5%R46 1K_0402_5%

1 2

R613 1K_0402_5%R613 1K_0402_5%

1 2

R582 1K_0402_5%@R582 1K_0402_5%@

1 2

APU_SVT

APU_SVC

APU_SVD

ALERT_L

ALLOW_STOP

APU_SIC

APU_SID

APU_RST#

APU_PWRGD

APU_RST#

APU_PWRGD

APU_SIC

APU_SID

ALERT_L

ALLOW_STOP

A

+1.5VS

+3VS

APU_SIC

R59

1 2

31.6K_0402_1%

31.6K_0402_1% R33

R33

1 2

@

31.6K_0402_1%

BSH111 1N_SOT23-3

@

C63 0.1U_0402_16V4Z

1 2

R34

1 2

@

30K_0402_1%

G

2

Q4

EC_SMB_DAAPU_SID

13

D

S

D

S

@

1 2

R49 0_0402_5%

G

2

Q5

EC_SMB_CK

13

D

S

D

S

@

1 2

R58 0_0402_5%

B

R43 0_0402_5%R43 0_0402_5%

R54 0_0402_5%R54 0_0402_5%

HDT Debug conn

JHDT1

1

3

5

7

9

11

13

15

17

19

SAMTE_ASP-136446-07-B

CONN@

APU_TCK

2

APU_TMS

4

APU_TDI

6

APU_TDO

8

APU_PWRGD

10

APU_RST#

12

APU_DBRDY

14

APU_DBREQ#

16

R52 0_0402_5%R52 0_0402 _5%

18

R55 0_0402_5%R55 0_0402 _5%

20

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

R31 1K_0402_5%R31 1K_0402_5%

1 2

R38 1K_0402_5%R38 1K_0402_5%

1 2

R39 1K_0402_5%R39 1K_0402_5%

1 2

R51 300_0402_5%R51 300_0402_5%

1 2

Compal Electronics, Inc.

FS1r2 Display/MISC/HDT

APU_TEST19

APU_TEST18

QML70 LA-8371P

E

+1.5V+1.5V

0.2

of

8 53Wednesday, October 19, 2011

A

Power Name

VDD +CPU_CORE

VDDNB +CPU_CORE_NB

VDDIO +1.5V

VDDP / VDDR +1.2VS

VDDA

1 1

+2.5VS

2 2

3 3

4 4

+2.5VS

Consumption

60A

29A

3.2A

5A / 3.5A

0.5A

VDDP decoupling

180P_0402_50V8J

C100

C101

C102

0.22U_0402_6.3V6K

C102

1

2

L1

L1 FBMA-L11-201209-221LMA30T_0805

FBMA-L11-201209-221LMA30T_0805

0.22U_0402_6.3V6K

1

2

12

C70

C66

10U_0603_6.3V6K

12

C112

3300P_0402_50V7K

C112

3300P_0402_50V7K

12

+APU_CORE_NB

+1.2VS

C103

0.22U_0402_6.3V6K

C103

0.22U_0402_6.3V6K

1

2

12

C67

10U_0603_6.3V6K

C113

0.22U_0402_6.3V6K

C113

0.22U_0402_6.3V6K

1

2

A

+APU_CORE

F8

VDD_1

H6

VDD_2

J1

VDD_3

J14

VDD_4

P6

VDD_5

P10

VDD_6

J16

VDD_7

J18

VDD_8

J9

VDD_9

K19

VDD_10

K3

VDD_11

K17

VDD_12

M3

VDD_13

K6

VDD_14

V10

VDD_15

V18

VDD_16

V3

VDD_17

F3

VDD_18

L18

VDD_19

V6

VDD_20

W1

VDD_21

T18

VDD_22

Y14

VDD_23

AA1

VDD_24

AB6

VDD_25

AC1

VDD_26

R1

VDD_27

P3

VDD_28

K10

VDD_29

H3

VDD_30

M19

VDD_31

C8

VDDNB_1

D10

VDDNB_2

B8

VDDNB_3

B12

VDDNB_4

C9

VDDNB_5

A9

VDDNB_6

A10

VDDNB_7

A8

VDDNB_8

A11

VDDNB_9

E10

VDDNB_10

E11

VDDNB_11

C10

VDDNB_12

40mil

+VDDA_APU

AA28

AB10

H26

M20 M23 M26 N22 N25 N28

AH6 AH5 AH4 AH3 AH7

VDDIO_1

K20

VDDIO_2

J28

VDDIO_3

K23

VDDIO_4

K26

VDDIO_5

L22

VDDIO_6

L25

VDDIO_7

L28

VDDIO_8 VDDIO_9 VDDIO_10 VDDIO_11 VDDIO_12 VDDIO_13 VDDIO_14

P20

VDDIO_15

P23

VDDIO_16

P26

VDDIO_17 VDDIO_18

VDDP_1 VDDP_2 VDDP_3 VDDP_4 VDDP_5

VDDA

+1.5V

C359

1000P_0402_50V7K

C359

1000P_0402_50V7K

1

2

12

C64

22U_0603_6.3V6K

C114

4.7U_0402_6.3V6M

C114

4.7U_0402_6.3V6M

1

2

JCPU1E

VDD_32 VDD_33 VDD_34 VDD_35 VDD_36 VDD_37 VDD_38 VDD_39 VDD_40 VDD_41 VDD_42 VDD_43 VDD_44 VDD_45 VDD_46 VDD_47 VDD_48 VDD_49 VDD_50 VDD_51 VDD_52 VDD_53 VDD_54 VDD_55 VDD_56 VDD_57 VDD_58 VDD_59 VDD_60 VDD_61 VDD_62

VDDNB_13 VDDNB_14 VDDNB_15 VDDNB_16 VDDNB_17 VDDNB_18 VDDNB_19 VDDNB_20 VDDNB_21 VDDNB_22 VDDNB_23

VDDNB_CAP_1 VDDNB_CAP_2

VDDIO_19 VDDIO_20 VDDIO_21 VDDIO_22 VDDIO_23 VDDIO_24 VDDIO_25 VDDIO_26 VDDIO_27 VDDIO_28 VDDIO_29 VDDIO_30 VDDIO_31 VDDIO_32 VDDIO_33 VDDIO_34 VDDIO_35 VDDIO_36

VDDR_1 VDDR_2 VDDR_3 VDDR_4

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

B

+APU_CORE

R11 T10 H8 G1 U11 W11 W13 W15 W17 W19 AB3 AD3 AD6 AE1 L1 Y6 M6 N11 N1 T3 T6 U19 U1 Y16 Y18 Y3 D4 F4 AF6 AF3 L11

C11 C12 D9 D8 D12 D11 B11 A12 B10 E12 B9

K13 K12

T23 T26 U22 U25 U28 Y26 T20 R28 R25 R22 V20 V23 V26 W22 W25 W28 Y24 G28

AG10 AH8 AH9 AH10

B

+APU_CORE_NB

+APU_CORE_NB_CAP

+1.5V

C104

180P_0402_50V8J

C104

180P_0402_50V8J

C105

1

2

C

+1.5V

4.7U_0603_6.3V6K

C81

22U_0603_6.3V6M

C81

22U_0603_6.3V6M

C82

22U_0603_6.3V6M

C82

22U_0603_6.3V6M

C83

22U_0603_6.3V6M

C83

C80

22U_0603_6.3V6M

C80

22U_0603_6.3V6M

C79

22U_0603_6.3V6M@C79

22U_0603_6.3V6M

1

@

2

+1.5V

C96

1

2

+1.2VS

180P_0402_50V8J

C109

1000P_0402_50V7K

C109

1000P_0402_50V7K

1

2

across VDDIO an d VSS split

0.22U_0402_6.3V6K

C97

0.22U_0402_6.3V6K

C97

0.22U_0402_6.3V6K

C98

180P_0402_50V8J

C98

180P_0402_50V8J

1

2

VDDR decoupling

C111

0.22U_0402_6.3V6K

C111

0.22U_0402_6.3V6K

C358

0.22U_0402_6.3V6K

C358

0.22U_0402_6.3V6K

10U_0603_6.3V6K

1

2

10U_0603_6.3V6K

1

2

22U_0603_6.3V6M

1

2

C99

180P_0402_50V8J

C99

180P_0402_50V8J

1

2

10U_0603_6.3V6K

12

C65

C68

4.7U_0603_6.3V6K

C84

C85

1

2

12

C69

4.7U_0603_6.3V6K

C88

0.22U_0402_6.3V6K

C88

0.22U_0402_6.3V6K

C90

C89

0.22U_0402_6.3V6K

C89

C86

C87

1

2

+APU_CORE_NB_CAP

0.22U_0402_6.3V6K

1

2

1

2

C108

22U_0603_6.3V6M

C108

22U_0603_6.3V6M

C107

22U_0603_6.3V6M

C107

22U_0603_6.3V6M

1

2

D

C92

0.22U_0402_6.3V6K

C92

0.22U_0402_6.3V6K

C94

180P_0402_50V8J

C94

C91

0.22U_0402_6.3V6K

C91

0.22U_0402_6.3V6K

1

2

180P_0402_50V8J

C93

0.22U_0402_6.3V6K

C93

0.22U_0402_6.3V6K

1

2

E

JCPU1F

J20

VSS_1

L4

VSS_2

R7

VSS_3

W18

VSS_4

A15

VSS_5

AB17

VSS_6

AC22

VSS_7

AE21

VSS_8

AF24

VSS_9

AH23

VSS_10

AH25

VSS_11

B7

VSS_12

C14

VSS_13

C16

VSS_14

C2

VSS_15

C20

VSS_16

C22

VSS_17

C24

VSS_18

C26

VSS_19

C28

VSS_20

D13

VSS_21

D15

VSS_22

D17

VSS_23

D19

VSS_24

D23

VSS_25

D25

VSS_26

D27

VSS_27

E4

VSS_28

E9

VSS_29

F14

VSS_30

F16

VSS_31

F18

VSS_32

F20

VSS_33

F22

VSS_34

F26

VSS_35

F28

VSS_36

G13

VSS_37

G15

VSS_38

G17

VSS_39

G19

VSS_40

G21

VSS_41

G23

VSS_42

G25

VSS_43

G4

VSS_44

J22

VSS_45

J24

VSS_46

J4

VSS_47

J7

VSS_48

K11

VSS_49

K14

VSS_50

K9

VSS_51

AC11

VSS_52

L19

VSS_53

L7

VSS_54

M11

VSS_55

AF11

VSS_56

V19

VSS_57

V9

VSS_58

W16

VSS_59

W4

VSS_60

W7

VSS_61

Y11

VSS_62

Y20

VSS_63

Y22

VSS_64

Y9

VSS_65

A17

VSS_66

A13

VSS_67

K16

VSS_68

F24

VSS_69

G8

VSS_70

H7

VSS_71

J8

VSS_72

LOTES_ACA-ZIF-109-P12-A_FS1R2

CONN@

VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98

VSS_99 VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143

A19 A21 A23 A25 A7 AA4 AA7 AB13 AB15 AB19 AB21 AB23 AB25 AB27 AB9 AC14 AC16 AC18 AC20 AC24 AC26 AC28 AC4 AC7 AD9 AE13 AE15 AE17 M9 N10 N4 N7 R10 R4 T11 T9 U10 U18 U4 U7 V11 AE19 AE23 AE25 AE27 AE4 AE7 AF14 AF16 AF18 AF20 AF22 AF26 AF28 AF9 AG4 AG7 AH13 AH15 AH17 AH19 AH21 P9 C18 D21 W14 P11 C7 E8 K18 W12

Demo Board Capacitor

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

D

APU_CORE 22uF x 7

0.22uF x 2

0.01uF x 3 180pF x 2

VDDP 22uF x 1 10uF x 3

0.22uF x 2 180pF x 2 1nF x 1

CORE_NB 22uF x 2 10uF x 1

0.22uF x 2 180pF x 3

VDDR 10uF x 3

0.22uF x 2 1nF x 1 180pF x 2

Title

Size Document Number Rev

Custom

Date: Sheet of

CORE_NB_CAP 22uF x 2

VDDA

4.7uF x 1

0.22uF x 1

3.3nF x 1

Compal Electronics, Inc.

FS1r2 PWR/GND

QML70 LA-8371P

9 53Wednesday, October 19, 2011

E

0.2

5

4

3

2

1

Panel PWM

Panel PWMPanel PWM

HPD

HPDHPD

D D

CRT HPD

From FCH

FCH_CRT_HPD15 ML_VGA_HPD 8

FCH_CRT_HPD

R626 0_0402_5%R626 0_0402_5%

1 2

DP_INT_PWM8

1 2

R65 2.2K_0402_5%R65 2.2K_0402_5%

12

R66

4.7K_0402_5%

+3VS

12

R61

R61 47K_0402_5%

47K_0402_5%

C

Q8

2

B

E

3 1

12

R62

4.7K_0402_5%

13

D

2

G

Q6

G

Q6 2N7002K_SOT23-3

2N7002K_SOT23-3

S

MMBT3904_NL_SOT23-3

APU_INVT_PWM 27,28

Translator HPD

From Translator

C C

LVDS_HPD27 LVDS_HPD_R 8

HDMI HPD

From HDMI Conn

APU_HDMI_HPD29 HDMI_DET 8

LVDS_HPD

APU_HDMI_HPD

@

12

R659 100K_0402_5%

R627 0_0402_5%R627 0_0402_5%

1 2

R711 0_0402_5%R711 0_0402_5%

1 2

+1.5VS

12

@

R630

4.7K_0402_5%

Panel ENBKL

Panel ENBKLPanel ENBKL

DP_ENBKL8

DP_ENBKL ENBKL

R624 0_0402_5%R624 0_0402_5%

1 2

ENBKL 37

B B

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

FS1r2 Signal Level Shifter

QML70 LA-8371P

1

10 53Wednesday, October 19, 2011

0.2

A

B

C

D

E

+1.5V +1.5V+VREF_DQ

15mil

DDRA_SDQ0 DDRA_SDQ1

DDRA_SDM0

DDRA_SDQ2

1 1

DDRA_SDQS1#7 DDRA_SDQS17

DDRA_SDQS2#7 DDRA_SDQS27

DDRA_CKE07

2 2

3 3

4 4

C136

2.2U_0603_6.3V4Z

DDRA_SBS2#7

DDRA_CLK07 DDRA_CLK0#7

DDRA_SBS0#7

DDRA_SWE#7

DDRA_SCAS#7 DDRA_ODT0 7

DDRA_SCS1#7

DDRA_SDQS4#7 DDRA_SDQS47

DDRA_SDQS6#7 DDRA_SDQS67

+3VS

1

C137

0.1U_0402_16V4Z

2

DDRA_SDQ3

DDRA_SDQ8 DDRA_SDQ9

DDRA_SDQS1# DDRA_SDQS1

DDRA_SDQ10 DDRA_SDQ11

DDRA_SDQ16 DDRA_SDQ17

DDRA_SDQS2# DDRA_SDQS2

DDRA_SDQ18 DDRA_SDQ19

DDRA_SDQ24 DDRA_SDQ25

DDRA_SDM3

DDRA_SDQ26 DDRA_SDQ27

DDRA_CKE0

DDRA_SBS2#

DDRA_SMA12 DDRA_SMA9

DDRA_SMA8 DDRA_SMA5

DDRA_SMA3 DDRA_SMA1

DDRA_CLK0 DDRA_CLK0#

DDRA_SMA10 DDRA_SBS0#

DDRA_SWE# DDRA_SCAS# DDRA_ODT0

DDRA_SMA13 DDRA_SCS1#

DDRA_SDQ32 DDRA_SDQ33

DDRA_SDQS4# DDRA_SDQS4

DDRA_SDQ34 DDRA_SDQ35

DDRA_SDQ40 DDRA_SDQ41

DDRA_SDM5

DDRA_SDQ42 DDRA_SDQ43

DDRA_SDQ48 DDRA_SDQ49

DDRA_SDQS6# DDRA_SDQS6

DDRA_SDQ50 DDRA_SDQ51

DDRA_SDQ56 DDRA_SDQ57

DDRA_SDM7

DDRA_SDQ58 DDRA_SDQ59

R73 10K_0402_5%

+3VS

1 2

12

R74

10K_0402_5%

3.56A

JDIMM1

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013310-1

DQ4 DQ5

VSS3

DQS#0

DQS0

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

VSS10

DM1

DQ14 DQ15

DQ20 DQ21

DM2

VSS17

DQ22 DQ23

VSS19

DQ28 DQ29

VSS21

DQS3

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

VDD10

CK1 CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36 DQ37

VSS30

DM4

VSS31

DQ38 DQ39

VSS33

DQ44 DQ45

VSS35 DQS#5

DQS5

VSS38

DQ46 DQ47

VSS40

DQ52 DQ53

VSS42

DM6

VSS43

DQ54 DQ55

VSS45

DQ60 DQ61

VSS47 DQS#7

DQS7

VSS50

DQ62 DQ63

VSS52

EVENT#

SDA

SCL VTT2

2

DDRA_SDQ4

4

DDRA_SDQ5

6 8

DDRA_SDQS0#

10

DDRA_SDQS0

12 14

DDRA_SDQ6

16

DDRA_SDQ7

18 20

DDRA_SDQ12

22

DDRA_SDQ13

24 26

DDRA_SDM1

28

MEM_MA_RST#

30 32

DDRA_SDQ14

34

DDRA_SDQ15

36 38

DDRA_SDQ20

40

DDRA_SDQ21

42 44

DDRA_SDM2

46 48

DDRA_SDQ22

50

DDRA_SDQ23

52 54

DDRA_SDQ28

56

DDRA_SDQ29

58 60

DDRA_SDQS3#

62

DDRA_SDQS3

64 66

DDRA_SDQ30

68

DDRA_SDQ31

70 72

DDRA_CKE1

74 76

DDRA_SMA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDRA_SMA14

80 82

DDRA_SMA11

84

DDRA_SMA7

86 88

DDRA_SMA6

90

DDRA_SMA4

92 94

DDRA_SMA2

96

DDRA_SMA0

98 100

DDRA_CLK1

102

DDRA_CLK1#

104 106

DDRA_SBS1#

108

DDRA_SRAS#

110 112

DDRA_SCS0#

114 116 118

DDRA_ODT1

120 122 124

15mil

126 128

DDRA_SDQ36

130

DDRA_SDQ37

132 134

DDRA_SDM4

136 138

DDRA_SDQ38

140

DDRA_SDQ39

142 144

DDRA_SDQ44

146

DDRA_SDQ45

148 150

DDRA_SDQS5#

152

DDRA_SDQS5

154 156

DDRA_SDQ46

158

DDRA_SDQ47

160 162

DDRA_SDQ52

164

DDRA_SDQ53

166 168

DDRA_SDM6

170 172

DDRA_SDQ54

174

DDRA_SDQ55

176 178

DDRA_SDQ60

180

DDRA_SDQ61

182 184

DDRA_SDQS7#

186

DDRA_SDQS7

188 190

DDRA_SDQ62

192

DDRA_SDQ63

194 196

MEM_MA_EVENT#

198 200 202 204

206

+0.75VS

DDRA_SDQS0# 7 DDRA_SDQS0 7

MEM_MA_RST# 7

DDRA_SDQS3# 7 DDRA_SDQS3 7

DDRA_CKE1 7

DDRA_CLK1 7 DDRA_CLK1# 7

DDRA_SBS1# 7 DDRA_SRAS# 7

DDRA_SCS0# 7

DDRA_ODT1 7

1

C135

1000P_0402_50V7K

2

DDRA_SDQS5# 7 DDRA_SDQS5 7

DDRA_SDQS7# 7 DDRA_SDQS7 7

MEM_MA_EVENT# 7

FCH_SDATA0 12,14,33 FCH_SCLK0 12,14,33

+VREF_CA

DDRA_SDQ[0..63]

DDRA_SDM[0..7]

DDRA_SMA[0..15]

Place near DIMM1

+1.5V

0.1U_0402_16V4Z

2

C115

1

0.1U_0402_16V4Z

2

C126

1

0.1U_0402_16V4Z

15mil

4.7U_0603_6.3V6K

+VREF_DQ

1

@

C129

2

0.1U_0402_16V4Z

DDRA_SDQ[0..63] 7

DDRA_SDM[0..7] 7

DDRA_SMA[0..15] 7

2

C116

1

0.1U_0402_16V4Z

2

C127

1

4.7U_0603_6.3V6K

1

C130

2

1000P_0402_50V7K

C131

2

1

0.1U_0402_16V4Z

2

C118

C117

1

C125 0.1U_0402_16V4Z

1

C128

2

+1.5V+VREF_DQ

R69

R69 1K_0402_1%

1K_0402_1%

1 2

R71

R71 1K_0402_1%

1K_0402_1%

1 2

2

C119

1

0.1U_0402_16V4Z

+1.5V+0.75VS

@

1 2

Add C1106 20101101

0.1U_0402_16V4Z

2

C120

1

4.7U_0603_6.3V6K

1

2

C121

1

0.1U_0402_16V4Z

15mil

+VREF_CA

1

@

C132

2

0.1U_0402_16V4Z

2

C122

1

C133

2

1000P_0402_50V7K

2

C123

1

0.1U_0402_16V4Z

+1.5V+VREF_CA

C134

0.1U_0402_16V4Z

2

C124

1

R70

R70 1K_0402_1%

1K_0402_1%

1 2

R72

R72 1K_0402_1%

1K_0402_1%

1 2

Security Classification

Issued Date

DIMM_A STD H:9.2mm

<Address: 00>

A

B

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDRIII SO-DIMM 1

QML70 LA-8371P

E

0.2

11 53Wednesday, October 19, 2011

0.2

A

B

C

D

E

+VREF_DQ

15mil

DDRB_SDQ0 DDRB_SDQ1

DDRB_SDM0

DDRB_SDQ2

+3VS

DDRB_SDQ3

DDRB_SDQ8 DDRB_SDQ9

DDRB_SDQS1# DDRB_SDQS1

DDRB_SDQ10 DDRB_SDQ11

DDRB_SDQ16 DDRB_SDQ17

DDRB_SDQS2# DDRB_SDQS2

DDRB_SDQ18 DDRB_SDQ19

DDRB_SDQ24 DDRB_SDQ25

DDRB_SDM3

DDRB_SDQ26 DDRB_SDQ27

DDRB_CKE0

DDRB_SBS2#

DDRB_SMA12 DDRB_SMA9

DDRB_SMA8 DDRB_SMA5

DDRB_SMA3 DDRB_SMA1

DDRB_CLK0 DDRB_CLK0#

DDRB_SMA10 DDRB_SBS0#

DDRB_SWE#

DDRB_SMA13 DDRB_SCS1#

DDRB_SDQ32 DDRB_SDQ33

DDRB_SDQS4# DDRB_SDQS4

DDRB_SDQ34 DDRB_SDQ35

DDRB_SDQ40 DDRB_SDQ41

DDRB_SDM5

DDRB_SDQ42 DDRB_SDQ43

DDRB_SDQ48 DDRB_SDQ49

DDRB_SDQS6# DDRB_SDQS6

DDRB_SDQ50 DDRB_SDQ51

DDRB_SDQ56 DDRB_SDQ57

DDRB_SDM7

DDRB_SDQ58 DDRB_SDQ59

R75 10K_0402_5%R75 10K_0402_5%

1 2

12

R76

10K_0402_5%

1 1

DDRB_SDQS1#7 DDRB_SDQS17

DDRB_SDQS2#7 DDRB_SDQS27

DDRB_CKE07

2 2

3 3

4 4

DDRB_SBS2#7

DDRB_CLK07 DDRB_CLK0#7

DDRB_SBS0#7

DDRB_SWE#7

DDRB_SCAS#7

DDRB_SCS1#7

DDRB_SDQS4#7 DDRB_SDQS47

DDRB_SDQS6#7 DDRB_SDQS67

3.56A

JDIMM2

VREF_DQ1VSS1

3

VSS2

5

DQ0

7

DQ1

9

VSS4

11

DM0

13

VSS5

15

DQ2

17

DQ3

19

VSS7

21

DQ8

23

DQ9

25

VSS9

27

DQS#1 DQS129RESET# VSS1131VSS12

33

DQ10

35

DQ11 VSS1337VSS14

39

DQ16

41

DQ17 VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25 VSS2261DQS#3

63

DM3 VSS2365VSS24

67

DQ26

69

DQ27 VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

TYCO_2-2013289-1

DQS#0

DQS0

VSS10

VSS17

VSS19

VSS21

DQS3

VDD10

VDD12

VDD14

VDD16

VDD18

VREF_CA

VSS28

VSS30

VSS31

VSS33

VSS35

DQS#5

DQS5

VSS38

VSS40

VSS42

VSS43

VSS45

VSS47

DQS#7

DQS7

VSS50

VSS52

EVENT#

DQ4 DQ5

VSS3

VSS6

DQ6

DQ7 VSS8 DQ12 DQ13

DM1

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQ30 DQ31

CKE1 VDD2

VDD4

VDD6

VDD8

CK1 CK1#

BA1 RAS#

ODT0

ODT1

NC2

DQ36 DQ37

DM4

DQ38 DQ39

DQ44 DQ45

DQ46 DQ47

DQ52 DQ53

DM6

DQ54 DQ55

DQ60 DQ61

DQ62 DQ63

SDA

SCL VTT2

+1.5V+1.5V

2

DDRB_SDQ4

4

DDRB_SDQ5

6 8

DDRB_SDQS0#

10

DDRB_SDQS0

12 14

DDRB_SDQ6

16

DDRB_SDQ7

18 20

DDRB_SDQ12

22

DDRB_SDQ13

24 26

DDRB_SDM1

28

MEM_MB_RST#

30 32

DDRB_SDQ14

34

DDRB_SDQ15

36 38

DDRB_SDQ20

40

DDRB_SDQ21

42 44

DDRB_SDM2

46 48

DDRB_SDQ22

50

DDRB_SDQ23

52 54

DDRB_SDQ28

56

DDRB_SDQ29

58 60

DDRB_SDQS3#

62

DDRB_SDQS3

64 66

DDRB_SDQ30

68

DDRB_SDQ31

70 72

DDRB_CKE1

74 76

DDRB_SMA15

78

A15 A14

A11

A7

A6 A4

A2 A0

S0#

G2

DDRB_SMA14

80 82

DDRB_SMA11

84

DDRB_SMA7

86 88

DDRB_SMA6

90

DDRB_SMA4

92 94

DDRB_SMA2

96

DDRB_SMA0

98 100

DDRB_CLK1

102

DDRB_CLK1#

104 106

DDRB_SBS1#

108

DDRB_SRAS#

110 112

DDRB_SCS0#

114

DDRB_ODT0DDRB_SCAS#

116 118

DDRB_ODT1

120 122 124

15mil

126 128

DDRB_SDQ36

130

DDRB_SDQ37

132 134

DDRB_SDM4

136 138

DDRB_SDQ38

140

DDRB_SDQ39

142 144

DDRB_SDQ44

146

DDRB_SDQ45

148 150

DDRB_SDQS5#

152

DDRB_SDQS5

154 156

DDRB_SDQ46

158

DDRB_SDQ47

160 162

DDRB_SDQ52

164

DDRB_SDQ53

166 168

DDRB_SDM6

170 172

DDRB_SDQ54

174

DDRB_SDQ55

176 178

DDRB_SDQ60

180

DDRB_SDQ61

182 184

DDRB_SDQS7#

186

DDRB_SDQS7

188 190

DDRB_SDQ62

192

DDRB_SDQ63

194 196

MEM_MB_EVENT#

198 200 202 204

206

+0.75VS

DDRB_SDQS0# 7 DDRB_SDQS0 7

MEM_MB_RST# 7

DDRB_SDQS3# 7 DDRB_SDQS3 7

DDRB_CKE1 7

DDRB_CLK1 7 DDRB_CLK1# 7

DDRB_SBS1# 7 DDRB_SRAS# 7

DDRB_SCS0# 7 DDRB_ODT0 7

DDRB_ODT1 7

1

C154

C154 1000P_0402_50V7K

1000P_0402_50V7K

2

DDRB_SDQS5# 7 DDRB_SDQS5 7

DDRB_SDQS7# 7 DDRB_SDQS7 7

MEM_MB_EVENT# 7

FCH_SDATA0 11,14,33 FCH_SCLK0 11,14,33

+VREF_CA

DDRB_SDQ[0..63]

DDRB_SDM[0..7]

DDRB_SMA[0..15]

DDRB_SDQ[0..63] 7

DDRB_SDM[0..7] 7

DDRB_SMA[0..15] 7

Place near DIMM2

+1.5V

0.1U_0402_16V4Z

2

C138

C139

1

0.1U_0402_16V4Z

+0.75VS

0.1U_0402_16V4Z

+VREF_DQ +VREF_CA

15mil 15mil

4.7U_0603_6.3V6K

1

@

C153

2

C139

1

0.1U_0402_16V4Z

2

C149

1

+VREF_DQ +VREF_CA

0.1U_0402_16V4Z

1

C155

2

1000P_0402_50V7K

2

C140

1

0.1U_0402_16V4Z

1

C151

C150

2

4.7U_0603_6.3V6K

1

C156

2

0.1U_0402_16V4Z

C148 0.1U_0402_16V4Z

4.7U_0603_6.3V6K

2

C141

1

1 2

1

@

C157

2

C142

1

0.1U_0402_16V4Z

@

Add C1107 20101101

0.1U_0402_16V4Z

1

C158

2

0.1U_0402_16V4Z

2

C143

1

C159

2

1000P_0402_50V7K

2

C144

1

0.1U_0402_16V4Z

+1.5V+1.5V

1

+

C152

C152 330U_X_2VM_R6M@

330U_X_2VM_R6M@

2

0.1U_0402_16V4Z

2

C145

1

2

C146

1

0.1U_0402_16V4Z

2

C147

1

Security Classification

Issued Date

DIMM_B STD H:5.2mm

<Address: 01>

A

B

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

DDRIII SO-DIMM 2

QML70 LA-8371P

E

0.2

12 53Wednesday, October 19, 2011

0.2

A

C160 150P_0402_50V8JC160 150P_0402_50V8J

12

APU_PCIE_RST#_C

R77 33_0402_5%R77 33_0402_5%

PCI Host Bus Reset (To EC)

1 1

2 2

SS

NSS

For "EXT" CLK mode, input to PCIE,

APU DISP

APU

V

GA

GLAN

WLAN

SS

3 3

4 4

A_RST#37

UMI_MTX_C_CRX_P06 UMI_MTX_C_CRX_N06 UMI_MTX_C_CRX_P16 UMI_MTX_C_CRX_N16 UMI_MTX_C_CRX_P26 UMI_MTX_C_CRX_N26 UMI_MTX_C_CRX_P36 UMI_MTX_C_CRX_N36

UMI_CTX_C_MRX_P06 UMI_CTX_C_MRX_N06 UMI_CTX_C_MRX_P16 UMI_CTX_C_MRX_N16 UMI_CTX_C_MRX_P26 UMI_CTX_C_MRX_N26 UMI_CTX_C_MRX_P36 UMI_CTX_C_MRX_N36

+PCIE_VDDR_FCH

+1.1VS_CKVDD

APU_DISP_CLKP8 APU_DISP_CLKN8

APU_CLKP8 APU_CLKN8

CLK_PEG_VGA18 CLK_PEG_VGA#18

CLK_PCIE_LAN30 CLK_PCIE_LAN#30

CLK_PCIE_MINI133 CLK_PCIE_MINI1#33

CLK_SD_48M32

25MHZ_20PF_X3G025000DK1H-X

A

4

2

20M_0402_5%

1 2

C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K

1 2

C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K

1 2

C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K

1 2

C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K

1 2

C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K

1 2

C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K

1 2

C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K

1 2

C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K

1 2

R81 590_0402_1%R81 590_0402_1%

1 2

R82 2K_0402_1%R82 2K_0402_1%

1 2

R86 2K_0402_1%R86 2K_0402_1%

1 2

APU_DISP_CLKP APU_DISP_CLKN

APU_CLKP APU_CLKN

CLK_PEG_VGA CLK_PEG_VGA#

CLK_PCIE_LAN CLK_PCIE_LAN#

CLK_PCIE_MINI1 CLK_PCIE_MINI1#

R99 22_0402_5%R99 22_0402_5%

C172 33P_0402_50V8KC172 33P_0402_50V8K

1 2

X1

1 2

R105

1 2

3

OSC

GND

1

OSC

GND

C173 33P_0402_50V8KC173 33P_0402_50V8K

1 2

C177

12

10P_0402_50V8J

C178

Close to HUDSON-M2

10P_0402_50V8J

R220 0_0402_5%R220 0_0402_5%

1 2

R221 0_0402_5%R221 0_0402_5%

1 2

R90 0_0402_5%R90 0_0402_5%

1 2

R91 0_0402_5%R91 0_0402_5%

1 2

R93 0_0402_5%R93 0_0402_5%

1 2

R94 0_0402_5%R94 0_0402_5%

1 2

EMI

1 2

R103

R103 1M_0402_5%

1M_0402_5%

R101 0_0402_5%R101 0_0402_5%

Y1

4

OSC

1

OSC

32.768KHZ 7PF Q13MC1461000100

UMI_MTX_CRX_P0 UMI_MTX_CRX_N0 UMI_MTX_CRX_P1 UMI_MTX_CRX_N1 UMI_MTX_CRX_P2 UMI_MTX_CRX_N2 UMI_MTX_CRX_P3 UMI_MTX_CRX_N3

UMI_CTX_C_MRX_P0 UMI_CTX_C_MRX_N0 UMI_CTX_C_MRX_P1 UMI_CTX_C_MRX_N1 UMI_CTX_C_MRX_P2 UMI_CTX_C_MRX_N2 UMI_CTX_C_MRX_P3 UMI_CTX_C_MRX_N3

PCIE_CALRP PCIE_CALRN

CLK_CALRN

1 2

NC

A_RST#_R

CLK_PEG_VGA_R CLK_PEG_VGA#_R

CLK_PCIE_LAN_R CLK_PCIE_LAN#_R

CLK_PCIE_MINI1_R CLK_PCIE_MINI1#_R

3

2

CLK_SD_48M_R

25M_X1

25M_X2

32K_X1

32K_X2

B

U2A

AE2

PCIE_RST#

AD5

A_RST#

AE30

UMI_TX0P

AE32

UMI_TX0N

AD33

UMI_TX1P

AD31

UMI_TX1N

AD28

UMI_TX2P

AD29

UMI_TX2N

AC30

UMI_TX3P

AC32

UMI_TX3N

AB33

UMI_RX0P

AB31

UMI_RX0N

AB28

UMI_RX1P

AB29

UMI_RX1N

Y33

UMI_RX2P

Y31

UMI_RX2N

Y28

UMI_RX3P

Y29

UMI_RX3N

AF29

PCIE_CALRP

AF31

PCIE_CALRN

V33

GPP_TX0P

V31

GPP_TX0N

W30

GPP_TX1P

W32

GPP_TX1N

AB26

GPP_TX2P

AB27

GPP_TX2N

AA24

GPP_TX3P

AA23

GPP_TX3N

AA27

GPP_RX0P

AA26

GPP_RX0N

W27

GPP_RX1P

V27

GPP_RX1N

V26

GPP_RX2P

W26

GPP_RX2N

W24

GPP_RX3P

W23

GPP_RX3N

F27

CLK_CALRN

G30

PCIE_RCLKP

G28

PCIE_RCLKN

R26

DISP_CLKP

T26

DISP_CLKN

H33

DISP2_CLKP

H31

DISP2_CLKN

T24

APU_CLKP

T23

APU_CLKN

J30

SLT_GFX_CLKP

K29

SLT_GFX_CLKN

H27

GPP_CLK0P

H28

GPP_CLK0N

J27

GPP_CLK1P

K26

GPP_CLK1N

F33

GPP_CLK2P

F31

GPP_CLK2N

E33

GPP_CLK3P

E31

GPP_CLK3N

M23

GPP_CLK4P

M24

GPP_CLK4N

M27

GPP_CLK5P

M26

GPP_CLK5N

N25

GPP_CLK6P

N26

GPP_CLK6N

R23

GPP_CLK7P

R24

GPP_CLK7N

N27

GPP_CLK8P

R27

GPP_CLK8N

J26

14M_25M_48M_OSC

C31

25M_X1

C33

25M_X2

HUDSON-M3_FCBGA656

B

HUDSON-2

PCI CLKS

PCICLK4/14M_OSC/GPO39

PCI EXPRESS INTERFACES

PCI INTERFACE

REQ2#/CLK_REQ8#/GPIO41 REQ3#/CLK_REQ5#/GPIO42

GNT2#/SD_LED/GPO45

GNT3#/CLK_REQ7#/GPIO46

CLOCK GENERATOR

LPCAPUS5 PLUS

LDRQ1#/CLK_REQ6#/GPIO49

C

AF3

PCICLK0

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8 AD9/GPIO9

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

GNT0#

CLKRUN#

LOCK#

LPCCLK0

LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

PROCHOT#

APU_PG

LDT_STP#

APU_RST#

RTCCLK

32K_X1

32K_X2

AF1 AF5 AG2 AF6

AB5

AJ3 AL5 AG4 AL6 AH3 AJ5 AL1 AN5 AN6 AJ1 AL8 AL3 AM7 AJ6 AK7 AN8 AG9 AM11 AJ10 AL12 AK11 AN12 AG12 AE12 AC12 AE13 AF13 AH13 AH14 AD15 AC15 AE16 AN3 AJ8 AN10 AD12 AG10 AK9 AL10 AF10 AE10 AH1 AM9 AH8 AG15 AG13 AF15 AM17 AD16 AD13 AD21 AK17 AD19 AH9

AF18 AE18 AC16 AD18

B25

D25 D27 C28 A26 A29 A31 B27 AE27 AE19

G25 E28 E26 G26 F26

H7 F1 F3 E6

G2

G4

C

1 2

R102 0_0402_5%R102 0_0402_5%

T11T11

T12T12

PM_CLKRUN#

LPC_CLK1_R LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

APU_PWRGD

APU_RST#

S5_CORE_EN

32K_X1

32K_X2

2011/07/29 2012/07/29

PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

REQ1#/GPIO40

GNT1#/GPO44

INTE#/GPIO32

INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

SERIRQ/GPIO48

DMA_ACTIVE#

S5_CORE_EN

INTRUDER_ALERT#

VDDBT_RTC_G

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI_CLK1 16

PCI_CLK3 16 PCI_CLK4 16

APU_PCIE_RST#_C

VGA_PWRGD_R

1 2

R575 0_0402_5%

1 2

R576 0_0402_5%

R437

1 2

0_0402_5%@

R95 22_0402_ 5%R95 22_0402_5%

1 2

R96 22_0402_ 5%R96 22_0402_5%

1 2

R97 22_0402_ 5%R97 22_0402_5%

1 2

R98 0_0402_5%@R98 0_0402_5%@

R100 22_0402_5%R100 22_0402_5%

LPC_CLK0_ECLPC_CLK0_EC_R

1 2

C174

1

2

0.1U_0402_16V4Z

Compal Secret Data

Deciphered Date

RTCVCC_R

C175

1

2

D

For PCIE device reset on FS1 (

GLAN, WLAN, Card Reader)

R78 33_0402_5%R78 33_0402_5%

1 2

150P_0402_50V8J

VGA_PWRGD20,49

PCI_AD23 16 PCI_AD24 16 PCI_AD25 16 PCI_AD26 16 PCI_AD27 16

VGA_PWRGD_R 14

PE_GPIO0 14,18 PE_GPIO1 14,20,37

PM_CLKRUNEC# 37

LPC_CLK0_EC 16,37 CLK_PCI_DB 33 LPC_CLK1 16 LPC_AD0 33,37 LPC_AD1 33,37 LPC_AD2 33,37 LPC_AD3 33,37 LPC_FRAME# 33,37

SERIRQ 37

ALLOW_STOP 8 APU_PROCHOT# 8 APU_PWRGD 8

APU_RST# 8

S5_CORE_EN 37 RTC_CLK 16,37

1 2

R104 1K_0402_5%R104 1K_0402_5%

W=20mils

for Clear CMOS

1U_0402_6.3V4Z

D

C170

E

+3V_FCH

C166

@C166

@

1 2

0.1U_0402_16V4Z

5

@

2

P

B

4

Y

1

A

G

U3

2

R79

8.2K_0402_5%@

1

1 2

U4

@U4

VGA_PWRGD VGA_PWRGD_R

@

NC7SZ08P5X_NL_SC70-5

10K_0402_5%

APU_PWRGD

PE_GPIO1

R92 10K_0402_5%

1 2

U3

NC7SZ08P5X_NL_SC70-5

3

1 2

R80 0_0402_5%

+3V_FCH

C171

@C171

@

1 2

0.1U_0402_16V4Z

5

2

P

B

4

Y

1

A

G

3

1 2

R85 0_0402_5%R85 0_0402_5%

+1.5VS

12

R87

@

B

2

E

3 1

C

Q10

Q10 MMBT3904_NL_SOT23-3@

MMBT3904_NL_SOT23-3@

1 2

R579 0_0402_5%R579 0_0402_5%

@

1 2

R83 0_0402_5%@R83 0_0402_5%@

1 2

R84 100K_0402_5%@R84 100K_ 0402_5%@

+3VS

1 2

R88

4.7K_0402_5%

@

APU_PWRGD

APU_RST#

As close as U2

PLT_RST# 18,30,33

APU_PWRGD_L 47

1

C600

C599

2

@

100P_0402_50V8J

EMI request for ESD protection

APU_PG/APU_RST#/LDT_STP# : OD pin DMA_ACTIVE# : IN/OD, 0.8V threshold PROCHOT# : IN, 0.8V threshold LDT_STP : No use, NC

DMA active. The FCH drives the DMA_ACTIVE# to APU to notify DMA activity. This will cause the APU to reestablish the UMI link quicker.

D1

2

1

3

DAN202UT106_SC70-3

0.1U_0402_16V4Z

Compal Electronics, Inc.

QML70 LA-8371P

R67

1 2

1K_0402_5%

E

+RTCBATT

+CHGRTC

13 53Wednesday, October 19, 2011

12

CLRP1

SHORT PADS

@

+RTCVCC

1

C176

2

Title

Hudson-M2/M3-UMI/PCI/CLOCK/LPC/RTC

Size Document Number Rev

Custom

Date: Sheet of

100P_0402_50V8J

0.2

A

B

C

D

E

PCIE_RST2 : Reset PCIE device on Hudson2

U2D

AB6

EC_LID_OUT#37

PM_SLP_S3#37 PM_SLP_S5#37 PBTN_OUT#37

1 1

GATE2037

KB_RST#37 EC_SCI#37 EC_SMI#37

12

USB_OC2#

USB_OC0#

USB_OC1#

H_THERMTRIP#

FCH_SCLK1

FCH_SDATA1

EC_LID_OUT#

FCH_PCIE_WAKE#

FCH_ODD_DA#

ODD_DETECT#

AC_PRESENT_OK

ODD_DETECT#

FCH_SCLK0

FCH_SDATA0

MINI1_CLKREQ#

LAN_CLKREQ#_1

EC_RSMRST#

HDA_BITCLK

HDA_SDIN0

HDA_SDIN1

A

FCH_PCIE_WAKE#30,33,37

H_THERMTRIP#8

EC_RSMRST#37

FCH_SCLK011,12,33 FCH_SDATA011,12,33

MINI1_CLKREQ#33 LAN_CLKREQ#30

VGA_PWRGD_R13

VGA_PD16

PEG_CLKREQ#19

FCH_ODD_DA#34

ODD_DETECT#34 AC_PRESENT_OK37

USB_OC2#35 USB_OC1#35 USB_OC0#35

HDA_BITCLK_AUDIO31 HDA_SDOUT_AUDIO31

HDA_SDIN031

HDA_SYNC_AUDIO31

HDA_RST_AUDIO#31

+3VALW

THERMTRIP: Need level shift from +3VALW to +1.5V

SM bus 0-->S0 PWR domain

M bus 1-->S5 PWR domain

S

VGA_PD: Support MLDAC power save if connect 0: MLDAC power on 1: MLDAC power off

2 2

PEG_CLKREQ#_R

USB_OC0#: for USB3.0 w/ AI Charger (JUSB1) USB_OC1#: for USB2.0 port (JUSB3, 4) USB_OC2#: for USB3.0 port (JUSB2)

+3V_FCH

3 3

+3VS

4 4

+3VS

R360

R360 10K_0402_5%

10K_0402_5%

@

1 2

R571

10K_0402_5%

1 2

R118 100K_0402_5%R118 100K_0402_5%

1 2

R119 100K_0402_5%R119 100K_0402_5%

1 2

R120 100K_0402_5%R120 100K_0402_5%

1 2

R121 10K_0402_5%R121 10K_0402_5%

1 2

R122 10K_0402_5%R122 10K_0402_5%

1 2

R124 10K_0402_5%R124 10K_0402_5%

1 2

R126 10K_0402_5%

@

1 2

R128 10K_0402_5%

@

1 2

R135 10K_0402_5%

1 2

R555 2.2K_0402_5%@R5 55 2.2K_0402_5%@

1 2

R410 10K_0402_5%

@

1 2

R445 2.2K_0402_5%

1 2

R131 2.2K_0402_5%R131 2.2K_0402_5%

1 2

R136 2.2K_0402_5%R136 2.2K_0402_5%

@

1 2

R137 8.2K_0402_5%

1 2

R138 8.2K_0402_5%R138 8.2K_0402_5%

1 2

R139 2.2K_0402_5%R139 2.2K_0402_5%

@

1 2

R140 10K_0402_5%

@

1 2

R142 10K_0402_5%

@

1 2

R144 10K_0402_5%

+3V_FCH

FCH_PCIE_WAKE#

+3VS

Modify 2010212-AMD request

FCH_SCLK0 FCH_SDATA0 FCH_SCLK1 FCH_SDATA1 MINI1_CLKREQ#

R109 0_0402_5%R109 0_0402_5%

1 2

R577 0_0402_5%@R577 0_0402_5%@

VGA_PD

R111 0_0402_5%@R11 1 0_0402_5%@

FCH_ODD_DA#

ODD_DETECT# AC_PRESENT_OK USB_OC2# USB_OC1# USB_OC0#

R114 33_0402_5%R114 33_0402_5% R115 33_0402_5%R115 33_0402_5%

R116 33_0402_5%R116 33_0402_5% R117 33_0402_5%R117 33_0402_5%

PE_GPIO013,18 PE_GPIO113,20,37

8.2K_0402_5%

@ R130

8.2K_0402_5%

@

8.2K_0402_5%

@ R127

8.2K_0402_5%

@

12

R130

R127

FCH_GPIO189 FCH_GPIO190

8.2K_0402_5%

@ R133

8.2K_0402_5%

@

8.2K_0402_5%

@ R134

8.2K_0402_5%

@

12

R133

R134

+3VALW

For FCH internal debug use

@

1 2

R141 2.2K_0402_5%

@

1 2

R143 2.2K_0402_5%

@

1 2

R145 2.2K_0402_5%

1 2 1 2

Project SKU ID

Add Project ID Table 201011301600

EC_LID_OUT#

TEST0 TEST1 TEST2

SYS_RESET#

@

1 2

R106 10K_0402_5%

1 2

R107 10K_0402_5%R107 10K_0402_5%

1 2

R110 10K_0402_5%R110 10K_0402_5%

LAN_CLKREQ#_1

12

PEG_CLKREQ#_R

12

HDA_SDIN0

TEST0

TEST1

TEST2

FCH_PWRGD

T13T13 T14T14

FCH_GPIO189

FCH_GPIO190

R573 R574

B

HDA_BITCLK HDA_SDOUT

HDA_SDIN1

HDA_SYNC HDA_RST#

T34T34 T15T15

@R573

@ @R574

@

0_0402_5%

0_0402_5% 0_0402_5%

0_0402_5%

PCIE_RST2#/PCI_PME#/GEVENT4#

R2

RI#/GEVENT22#

W7

SPI_CS3#/GBE_STAT1/GEVENT21#

T3

SLP_S3#

W2

SLP_S5#

J4

PWR_BTN#

N7

PWR_GOOD

T9

TEST0

T10

TEST1/TMS

V9

TEST2

AE22

GA20IN/GEVENT0#

AG19

KBRST#/GEVENT1#

R9

LPC_PME#/GEVENT3#

C26

LPC_SMI#/GEVENT23#

T5

LPC_PD#/GEVENT5#

U4

SYS_RESET#/GEVENT19#

K1

WAKE#/GEVENT8#

V7

IR_RX1/GEVENT20#

R10

THRMTRIP#/SMBALERT#/GEVEN T2#

AF19

WD_PWRGD

U2

RSMRST#

AG24

CLK_REQ4#/SATA_IS0#/GPIO64

AE24

CLK_REQ3#/SATA_IS1#/GPIO63

AE26

SMARTVOLT1/SATA_IS2#/GPIO50

AF22

CLK_REQ0#/SATA_IS3#/GPIO60

AH17

SATA_IS4#/FANOUT3/GPIO55

AG18

SATA_IS5#/FANIN3/GPIO59

AF24

SPKR/GPIO66

AD26

SCL0/GPIO43

AD25

SDA0/GPIO47

T7

SCL1/GPIO227

R7

SDA1/GPIO228

AG25

CLK_REQ2#/FANIN4/GPIO62

AG22

CLK_REQ1#/FANOUT4/GPIO61

J2

IR_LED#/LLB#/GPIO184

AG26

SMARTVOLT2/SHUTDOWN #/GPIO51

V8

DDR3_RST#/GEVENT7#/VGA_PD

W8

GBE_LED0/GPIO183

Y6

SPI_HOLD#/GBE_LED1/GEVENT9#

V10

GBE_LED2/GEVENT10#

AA8

GBE_STAT0/GEVENT11#

AF25

CLK_REQG#/GPIO65/OSCIN/IDLEEXIT#

M7

BLINK/USB_OC7#/GEVENT18#

R8

USB_OC6#/IR_TX1/GEVENT6#

T1

USB_OC5#/IR_TX0/GEVENT17#

P6

USB_OC4#/IR_RX0/GEVENT16#

F5

USB_OC3#/AC_PRES/TDO/GEVENT15#

P5

USB_OC2#/TCK/GEVENT14#

J7

USB_OC1#/TDI/GEVENT13#

T8

USB_OC0#/SPI_TPM_CS#/TRST#/GEVENT1 2#

AB3

AZ_BITCLK

AB1

AZ_SDOUT

AA2

AZ_SDIN0/GPIO167

Y5

AZ_SDIN1/GPIO168

Y3

AZ_SDIN2/GPIO169

Y1

AZ_SDIN3/GPIO170

AD6

AZ_SYNC

AE4

AZ_RST#

K19

PS2_DAT/SDA4/GPIO187

J19

PS2_CLK/CEC/SCL4/GPIO188

J21

SPI_CS2#/GBE_STAT2/GPIO166

D21

PS2KB_DAT/GPIO189

C20

PS2KB_CLK/GPIO190

D23

12

PS2M_DAT/GPIO191

C22

12

PS2M_CLK/GPIO192

F21

KSO_0/GPIO209

E20

KSO_1/GPIO210

F20

KSO_2/GPIO211

A22

KSO_3/GPIO212

E18

KSO_4/GPIO213

A20

KSO_5/GPIO214

J18

KSO_6/GPIO215

H18

KSO_7/GPIO216

G18

KSO_8/GPIO217

B21

KSO_9/GPIO218

K18

KSO_10/GPIO219

D19

KSO_11/GPIO220

A18

KSO_12/GPIO221

C18

KSO_13/GPIO222

B19

KSO_14/GPIO223

B17

KSO_15/GPIO224

A24

KSO_16/GPIO225

D17

KSO_17/GPIO226

HUDSON-M3_FCBGA656

HUDSON-2

EMBEDDED CTRL

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

USBCLK/14M_25M_48M_OSC

USB MISCUSB 1.1USB 2.0USB 3.0

USB OC GPIO ACPI / WAKE UP EVENTSHD AUDIO

EC_PWM0/EC_TIMER 0/GPIO197 EC_PWM1/EC_TIMER 1/GPIO198

EC_PWM2/EC_TIMER 2/WOL_EN/GPIO199

EC_PWM3/EC_TIMER 3/GPIO200

2011/07/29 2012/07/29

USB_RCOMP

USB_FSD1P/GPIO186

USB_FSD1N

USB_FSD0P/GPIO185

USB_FSD0N

USB_HSD13P USB_HSD13N

USB_HSD12P USB_HSD12N

USB_HSD11P USB_HSD11N

USB_HSD10P USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P USB_HSD4N

USB_HSD3P USB_HSD3N

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

USBSS_CALRP

USBSS_CALRN

USB_SS_TX3P USB_SS_TX3N

USB_SS_RX3P

USB_SS_RX3N

USB_SS_TX2P USB_SS_TX2N

USB_SS_RX2P

USB_SS_RX2N

USB_SS_TX1P USB_SS_TX1N

USB_SS_RX1P

USB_SS_RX1N

USB_SS_TX0P USB_SS_TX0N

USB_SS_RX0P

USB_SS_RX0N

SCL2/GPIO193

SDA2/GPIO194 SCL3_LV/GPIO195 SDA3_LV/GPIO196

KSI_0/GPIO201

KSI_1/GPIO202

KSI_2/GPIO203

KSI_3/GPIO204

KSI_4/GPIO205

KSI_5/GPIO206

KSI_6/GPIO207

KSI_7/GPIO208

G8

USB_RCOMP

B9

H1 H3

H6 H5

H10 G10

K10 J12

USB20_P11

G12

USB20_N11

F12

USB20_P10

K12

USB20_N10

K13

B11 D11

E10 F10

C10 A10

H9 G9

A8 C8

USB20_P4

F8

USB20_N4

E8

USB20_P3

C6

USB20_N3

A6

USB20_P2

C5

USB20_N2

A5

USB20_P1

C1

USB20_N1

C3

USB20_P0

E1

USB20_N0

E3

USBSS_CALRP

C16

USBSS_CALRN

A16

A14 C14

C12 A12

D15 B15

E14 F14

USB3_TX1_P

F15

USB3_TX1_N

G15

USB3_RX1_P

H13

USB3_RX1_N

G13

USB3_TX0_P

J16

USB3_TX0_N

H16

USB3_RX0_P

J15

USB3_RX0_N

K15

R123 10K_0402_5%R123 10K_0402_5%

H19

R125 10K_0402_5%R125 10K_0402_5%

G19

APU_SIC

G22

APU_SID

G21 E22 H22

EC_PWM2

J22 H21

K21 K22 F22 F24 E24 B23 C24 F18

Compal Secret Data

Deciphered Date

R108 11.8K_0402_1%R108 11.8K_0402_1%

1 2

USB20_P11 35 USB20_N11 35

USB20_P10 35 USB20_N10 35

USB20_P4 32 USB20_N4 32

USB20_P3 33 USB20_N3 33

USB20_P2 28 USB20_N2 28

USB20_P1 31 USB20_N1 31

USB20_P0 31 USB20_N0 31

R112 1K_0402_1%R112 1K_0402_1%

1 2

R113 1K_0402_1%R113 1K_0402_1%

1 2

1 2 1 2

FCH_PWRGD

D

APU_SIC 8 APU_SID 8

EC_PWM2 16

2

1

USB2.0 + 3.0, JUSB2

USB2.0 + 3.0, JUSB1

Card Reader

Mini Card (WLAN w/ BT)

Camera

USB2.0 Conn. JUSB4

USB2.0 Conn. JUSB3

R750 0_0402_5%@R75 0 0_0402_5%@

R751 0_0402_5%R751 0_0402_5%

4

@

C839

0.1U_0402_16V7K

12

+3VS

@

C838 0.1U_0402_16V7K

1 2

5

2

P

B

Y

1

A

G

MC74VHC1G08DFT2G SC70 5P

3

@

U75

Title

Hudson-M2/M3-ACPI/USB/EC

Size Document Number Rev

Custom

Date: Sheet of

Hudson-M2 Hudson-M3 EHCI CTL DEV 22, Fn 2 <Disable CTL of M2>

Hudson-M2/M3 EHCI CTL DEV 19, Fn 2

Hudson-M2/M3 EHCI CTL DEV 18, Fn 2

+FCH_VDD_11_SSUSB_S

USB3_TX1_P 35 USB3_TX1_N 35

USB3_RX1_P 35 USB3_RX1_N 35

USB3_TX0_P 35 USB3_TX0_N 35

USB3_RX0_P 35 USB3_RX0_N 35

Compal Electronics, Inc.

QML70 LA-8371P

FCH_POK 37

VGATE 37,47

E

On board USB Conn

14 53Wednesday, October 19, 2011

x

HCI CTL DEV 16, Fn 1 xHCI CTL DEV 16, Fn 0

Hudson-M3 xHCI CTL DEV 16, Fn 1 xHCI CTL DEV 16, Fn 0

0.2

A

SATA_FTX_DRX_P034

+3VS

GND GND GND GND

SEL

YA YB YC

YD YE

SATA_FTX_DRX_N034

SATA_FRX_DTX_N034 SATA_FRX_DTX_P034

SATA_FTX_DRX_P134 SATA_FTX_DRX_N134

SATA_FRX_DTX_N134 SATA_FRX_DTX_P134

SATA_FTX_DRX_P234 SATA_FTX_DRX_N234

SATA_FRX_DTX_N234 SATA_FRX_DTX_P234

WL_OFF#_FCH33

ODD_EN#34

FLASH_EN

12

2

FCH_SPI_CS1#_RR

5

FCH_SPI_CLK_RR

6

FCH_SPI_MOSI_RR

8 11

3 7 10 20

HDD1

HDD2

1 1

ODD

2 2

+AVDD_SATA

3 3

+3VS

R167

1 2

@

10K_0402_5%

+3V_FCH

FCH_SPI_CLK_R1 FCH_SPI_MOSI

4 4

ODD_EN#

R151

1 2

0_0402_5%

+3VALW

KSI437,38 KSI537,38 KSI637,38 KSI737,38

A

+3V_FCH

0.8mA

FCH_SPI_CS1#_R

FCH_SPI_CLK_R FCH_SPI_MOSI_R FCH_SPI_MISO_R

KSI4 KSI5 KSI6 KSI7

U5

1

VDD

4

VDD

9

VDD

19

VDD

24

A0

22

B0

18

C0

17

D0

14

E0

23

A1

21

B1

16

C1

15

D1

13

E1

PI3V512QE_QSOP24

B

SATA_CALRP

R1561K_ 0402_1% R1561K_0402_1%

12

SATA_CALRN

R157931_04 02_1% R157931_0402_1%

12

SATA_LED#38

R159 10K_0402_5%R159 10K_0402_5%

1 2

T16T16

BT_ON_FCH33

R169 10K_0402_5%R169 10K_0402_ 5%

R172 10K_0402_5%R172 10K_0402_ 5%

R173 10K_0402_5%R173 10K_0402_ 5%

SATA_LED#

BT_ON_FCH

WL_OFF#_FCH

ODD_EN#

1 2

FLASH_EN 37

+3V_SPI

R548 33_0402_5%R548 33_0402_5%

1 2

R549 47_0402_5%R549 47_0402_5%

1 2

R550 75_0402_5%R550 75_0402_5%

1 2

B

U2B

AK19

SATA_TX0P

AM19

SATA_TX0N

AL20

SATA_RX0N

AN20

SATA_RX0P

AN22

SATA_TX1P

AL22

SATA_TX1N

AH20

SATA_RX1N

AJ20

SATA_RX1P

AJ22

SATA_TX2P

AH22

SATA_TX2N

AM23

SATA_RX2N

AK23

SATA_RX2P

AH24

SATA_TX3P

AJ24

SATA_TX3N

AN24

SATA_RX3N

AL24

SATA_RX3P

AL26

SATA_TX4P

AN26

SATA_TX4N

AJ26

SATA_RX4N

AH26

SATA_RX4P

AN29

SATA_TX5P

AL28

SATA_TX5N

AK27

SATA_RX5N

AM27

SATA_RX5P

AL29

NC6

AN31

NC7

AL31

NC8

AL33

NC9

AH33

NC10

AH31

NC11

AJ33

NC12

AJ31

NC13

AF28

SATA_CALRP

AF27

SATA_CALRN

AD22

SATA_ACT#/GPIO67

AF21

SATA_X1

AG21

SATA_X2

AH16

FANOUT0/GPIO52

AM15

FANOUT1/GPIO53

AJ16

FANOUT2/GPIO54

AK15

FANIN0/GPIO56

AN16

FANIN1/GPIO57

AL16

FANIN2/GPIO58

K6

TEMPIN0/GPIO171

K5

TEMPIN1/GPIO172

K3

TEMPIN2/GPIO173

M6

TEMPIN3/TALERT#/GPIO174

HUDSON-M3_FCBGA656

FCH_SPI_CS1# FCH_SPI_CLK

FCH_SPI_MISO

HUDSON-2

SERIAL ATA

HW MONITOR

C

SD_CLK/SCLK_2/GPIO73

SD_CMD/SLOAD_2/GPIO74

SD_DATA0/SDATI_2/GPIO77

SD_DATA1/SDATO_2/GPIO78

SD CARDGBE LANSPI ROMVGA DACVGA MAINLINK

SD_DATA2/GPIO79 SD_DATA3/GPIO80

GBE_RXCTL/RXDV

GBE_TXCTL/TXEN

GBE_PHY_RST#

SPI_DO/GPIO163

SPI_CLK/GPIO162

SPI_CS1#/GPIO165

ROM_RST#/SPI_WP#/GPIO161

VGA_HSYNC/GPO68 VGA_VSYNC/GPO69

VGA_DDC_SDA/GPO70 VGA_DDC_SCL/GPO71

VGA_DAC_RSET

AUX_VGA_CH_P AUX_VGA_CH_N

ML_VGA_HPD/GPIO229

VIN2/SDATI_1/GPIO177

VIN3/SDATO_1/GPIO178

VIN4/SLOAD_1/GPIO179

VIN5/SCLK_1/GPIO180

VIN6/GBE_STAT3/GPIO181

VIN7/GBE_LED3/GPIO182

SD_CD/GPIO75

SD_WP/GPIO76

GBE_COL

GBE_CRS

GBE_MDCK

GBE_MDIO

GBE_RXCLK

GBE_RXD3 GBE_RXD2 GBE_RXD1 GBE_RXD0

GBE_RXERR

GBE_TXCLK

GBE_TXD3 GBE_TXD2 GBE_TXD1 GBE_TXD0

GBE_PHY_PD

GBE_PHY_INTR

SPI_DI/GPIO164

VGA_RED

VGA_GREEN

VGA_BLUE

AUXCAL

ML_VGA_L0P

ML_VGA_L0N

ML_VGA_L1P

ML_VGA_L1N

ML_VGA_L2P

ML_VGA_L2N

ML_VGA_L3P

ML_VGA_L3N

VIN0/GPIO175

VIN1/GPIO176

NC1 NC2 NC3 NC4 NC5

FCH_SDCLK_R

AL14

FCH_SDCMD_R

AN14

FCH_SDCD#_R

AJ12

FCH_SDWP_R

AH12

FCH_SDDATA0_R

AK13

FCH_SDDATA1_R

AM13

FCH_SDDATA2_R

AH15

FCH_SDDATA3_R

AJ14

AC4 AD3 AD9 W10 AB8 AH7 AF7 AE7 AD7 AG8 AD1 AB7 AF9 AG6 AE8 AD8 AB9 AC2 AA7 W9

V6 V5 V3 T6 V1

L30

L32

M29

M28 N30

M33 N32

K31

V28 V29

U28

T31 T33 T29 T28 R32 R30 P29 P28

C29

N2

M3

L2

N4

P1

P3

M1

M5

AG16 AH10 A28 G27 L4

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR

R551

1 2

0_0402_5%

R152 150_0402_1%R152 150_0402_1%

1 2

R154 150_0402_1%R154 150_0402_1%

1 2

R155 150_0402_1%R155 150_0402_1%

1 2

R158 715_0402_1%R158 715_0402_1%

1 2

AUXCAL

1 2

R160 100_0402_1%R160 100_0402_1%

FCH_CRT_HPD

1 2

R162 10K_0402_5%R162 1 0K_0402_5%

1 2

R163 10K_0402_5%R163 1 0K_0402_5%

1 2

R164 10K_0402_5%R164 1 0K_0402_5%

1 2

R165 10K_0402_5%R165 1 0K_0402_5%

1 2

R166 10K_0402_5%R166 1 0K_0402_5%

1 2

R168 10K_0402_5%R168 1 0K_0402_5%

1 2

R170 10K_0402_5%@R 170 10K_0402_5%@

1 2

R171 10K_0402_5%R171 1 0K_0402_5%

R752 60.4_0402_1 %nonCARD@R752 60.4_0402_1%nonCARD@ R753 60.4_0402_1 %nonCARD@R753 60.4_0402_1%nonCARD@ R754 0_040 2_5%nonCARD@R754 0_0402_5%nonCARD@ R755 0_040 2_5%nonCARD@R755 0_0402_5%nonCARD@ R756 60.4_0402_1 %nonCARD@R756 60.4_0402_1%nonCARD@ R757 60.4_0402_1 %nonCARD@R757 60.4_0402_1%nonCARD@ R758 60.4_0402_1 %nonCARD@R758 60.4_0402_1%nonCARD@ R759 60.4_0402_1 %nonCARD@R759 60.4_0402_1%nonCARD@

D

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

FCH_SPI_MISO_R FCH_SPI_MOSI_R FCH_SPI_CLK_R1 FCH_SPI_CS1#_R FCH_SPI_WP#

ML_VGA_AUXP_C 8 ML_VGA_AUXN_C 8

ML_VGA_TXP0 8 ML_VGA_TXN0 8 ML_VGA_TXP1 8 ML_VGA_TXN1 8 ML_VGA_TXP2 8 ML_VGA_TXN2 8 ML_VGA_TXP3 8 ML_VGA_TXN3 8

FCH_CRT_HPD 10

C624

@

FCH_SPI_WP# 37

GL-02/10/2011: Please enabled integrated pull-up/pull-down and left unconnected.

SYS BIOS ROM 4MB

+3V_SPI

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

@

1 2

R174 1K_0402_5%

1 2

R175 10K_0402_5%R175 10K_0402_5%

1 2

R176 10K_0402_5%R176 10K_0402_5%

D

FCH_SDCLK FCH_SDCMD FCH_SDCD# FCH_SDWP FCH_SDDATA0 FCH_SDDATA1 FCH_SDDATA2 FCH_SDDATA3

1

C625

2

@

5P_0402_50V_C

FCH_CRT_R 28

FCH_CRT_G 28

FCH_CRT_B 28

FCH_CRT_HSYNC 28 FCH_CRT_VSYNC 28

FCH_CRT_DDC_SDA 28 FCH_CRT_DDC_SCL 28

+VDDAN_11_ML

FCH_SPI_CS1# FCH_SPI_WP# FCH_SPI_HOLD#

E

FCH_SDCLK 32 FCH_SDCMD 32 FCH_SDCD# 32 FCH_SDWP 32 FCH_SDDATA0 32 FCH_SDDATA1 32 FCH_SDDATA2 32 FCH_SDDATA3 32

5P_0402_50V_C

C179

10P_0402_50V8J

+3V_SPI

15 53Wednesday, October 19, 2011

+3V_FCH

R617

R617 10K_0402_5%

10K_0402_5%

@

1 2

GBE_MDIO

Change to PD 20101112

GBE_PHY_INTR

GBE_COL

GBE_CRS

GBE_RXERR

FCH_SPI_CLK

FCH_SPI_MOSI_R

FCH_CRT_HPD

1 3 7 4

Title

Size Document Number Rev

Custom

QML70 LA-8371P

Date: Sheet of

1 2

U6

CS#

VCC

WP#

SCLK HOLD# GND

W25Q32BVSSIG_SO8

SA00003K800

Compal Electronics, Inc.

Hudson-M2/M3-SATA/GBE/HWM

R153

@R153

@

10_0402_5%

R646

33_0402_5% @

22P_0402_50V8J

8 6 5

SI

2

SO

E

1 2

R146 10K_0402_5%R146 10K_0402_5%

1 2

R147 10K_0402_5%R147 10K_0402_5%

1 2

R148 10K_0402_5%R148 10K_0402_5%

1 2

R149 10K_0402_5%R149 10K_0402_5%

1 2

R150 10K_0402_5%R150 10K_0402_5%

@C179

@

1 2

C620

12

@

+FCH_VDDAN_33_DAC_R

12

R16110K_0402_5%

@

25mA

C1800.1U_0402_16V4Z C1800.1U_0402_16V4Z

12

FCH_SPI_CLK FCH_SPI_MOSI FCH_SPI_MISO

0.11

A

STRAP PINS

B

C

D

E

PCI_CLK1

1 1

2 2

PULL HIGH

PULL LOW

PCI_CLK113

PCI_CLK313

PCI_CLK413

LPC_CLK0_EC13,37

LPC_CLK113

EC_PWM214

RTC_CLK13,37

ALLOW PCIE GEN2

DEFAULT

FORCE PCIE GEN1

@

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAP

DEFAULT

R177 10K_0402_5%R177 10K_0402_5%

12

@

R188 10K_0402_ 5%@R188 10K_0402_ 5%

12

PCI_CLK4 LPC_CLK0

NON_FUSION CLOCK MODE

FUSION CLOCK MODE

DEFAULT

R178 10K_0402_5%@R178 10K_0402_5%

12

@

R189 10K_0402_ 5%R189 10K_0402_5%

12

EC ENABLED

EC DISABLED

DEFAULT

R179 10K_0402_5%@R179 10K_0402_5%

12

@

R190 10K_0402_ 5%R190 10K_0402_5%

12

CLKGEN ENABLED

DEFAULT

CLKGEN DISABLE

R180 10K_0402_5%@R180 10K_0402_5%

12

R191 10K_0402_ 5%R191 10K_0402_5%

12

@

EC_PWM2

LPC ROM

DEFAULT

SPI ROM

R181 10K_0402_5%R181 10K_0402_5%

12

@

R192 10K_0402_ 5%@R192 10K_0402_ 5%

12

DEBUG STRAPS

FCH HAS 15K INTERNAL PU FOR PCI_AD[27:23]

3 3

PULL HIGH

PULL LOW

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

DISABLE ILA AUTORUN

DEFAULT

ENABLE ILA AUTORUN

PCI_AD25 PCI_AD24

USE FC PLL

BYPASS FC PLL

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

PCI_AD23

DISABLE PCI MEM BOOT

DEFAULTDEFAULT

ENABLE PCI MEM BOOT

RTC_CLKLPC_CLK1

S5 PLUS MODE DISABLED

DEFAULT

S5 PLUS MODE ENABLED

+3V_FCH+3V_FCH+3V_FCH+3V_FCH+3VS+3VS+3VS

R182 10K_0402_5%@R182 10K_0402_5%

12

R193 2.2K_0402_5%R193 2.2K_0402_5%

12

R183 10K_0402_5%R183 10K_0402_5%

12

R194 2.2K_0402_5%@R194 2.2K_0402_5%

12

@

VGA_PD: Support MLDAC power save if not connect 0: MLDAC power on 1: MLDAC power off

Check VGA_PD states

If support ML DAC power down when no VGA plug

L2

1 2

FBMA-L11-201209-221LMA30T_0805

+3VS +FCH_VDDAN_33_DAC_R

AP2301GN-HF_SOT23-3

VGA_PD#

+1.1VS +FCH_VDDAN_11_MLDA C

AP2301GN-HF_SOT23-3

VGA_PD#

VGA_PD14

220 ohm

Q12

@Q12

@

3 1

2

AO3413 Vgs(max)=1V

R184 0_0402_5%R184 0_0402_5%

1 2

Q13

@Q13

@

3 1

2

R195

1K_0402_5%@R195

1K_0402_5%

@

1 2

R197

C184

2.2K_0402_5%

C184

1 2

@

FBMA-L11-201209-221LMA30T_0805

1 2

R185 0_0402_5%

@

1 2

1U_0402_6.3V4Z

30mil

+FCH_VDDAN_33_DAC

0_0402_5%

R196

@

5

1

2

L3

@L3

@

1 2

20 ohm

2

12

@

34

@

C182

C181

1

2

0.1U_0402_16V4Z

2.2U_0603_6.3V4Z

30mil

+3VS

R187

100K_0402_5%@R187

100K_0402_5%

R186

100K_0402_5%@R186

100K_0402_5%

12

VGA_PD#

DMN66D0LDW-7_SOT363-6@Q14A

DMN66D0LDW-7_SOT363-6

@

Q14B

DMN66D0LDW-7_SOT363-6@Q14B

DMN66D0LDW-7_SOT363-6

@

61

2

1U_0402_6.3V4Z

C183

1

2

@

Q14A

PCI_AD2713

PCI_AD2613

PCI_AD2513

PCI_AD2413

PCI_AD2313

4 4

A

R198 2.2K_0402_5%@R198 2.2K_0402_5%

12

@

R199 2.2K_0402_5%@R199 2.2K_0402_5%

12

@

R200 2.2K_0402_5%@R200 2.2K_0402_5%

12

@

R201 2.2K_0402_5%@R201 2.2K_0402_5%

12

@

B

R202 2.2K_0402_5%@R202 2.2K_0402_5%

12

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Hudson-M2/M3-STRAP

QML70 LA-8371P

E

0.2

16 53Wednesday, October 19, 2011

0.2

A

B

C

D

E

U2C

131mA

R203

12

22U_0805_6.3V6M

+3VS

1 1

+FCH_VDDAN_33_DAC_R

+3VS

+3V_FCH

2 2

+VDDAN_33_USB

+3VS

3 3

L4

1 2

MBK1608221YZF_2P

220ohm / 550mA

R205

L5

@L5

@

Change to 0ohm-AMD request 20110212

+FCH_VDDPL_33_MLDAC+F CH_VDDPL_33_MLDAC

12

0_0603_5%

1 2

MBK1608221YZF_2P

220 ohm

L6

1 2

MBK1608221YZF_2P

220ohm / 550mA

L8

1 2

0_0603_5%

L10

1 2

MBK1608221YZF_2P

220ohm / 550mA

L13

1 2

MBK1608221YZF_2P

220ohm / 550mA

+FCH_VDDPL_33_SSUSB_S

+FCH_VDDPL_33_USB_S

+VDDPL_3.3V

2.2U_0603_6.3V4Z

C195

1

2

2.2U_0603_6.3V4Z

C190

1

2

2.2U_0603_6.3V4Z

C210

1

2

2.2U_0603_6.3V4Z

C220

1

2

+VDDPL_33_PCIE

2.2U_0603_6.3V4Z

C231

1

2

+VDDPL_33_SATA

2.2U_0603_6.3V4Z

C239

1

2

.1U_0402_16V7K

C189

1

2

.1U_0402_16V7K

C200

VDDPL_33_SSUSB_S

1

For Hudson3 USB3.0 only For Hudson2, connect to GND

2

LDO_CAP: Internally generated 1.8V supply for the RGB outputs

+FCH_VDDAN_11_MLDA C

.1U_0402_16V7K

C211

1

2

.1U_0402_16V7K

C221

1

2

.1U_0402_16V7K

C232

1

2

.1U_0402_16V7K

C240

1

2

+3VS

0_0603_5%

+VDDPL_3.3V

+FCH_VDDPL_33_MLDAC

L7

+VDDPL_11_DAC_L +VDDPL_11_DAC

1 2

MBK1608221YZF_2P

2

20ohm / 550mA

+3V_FCH

L9

1 2

FBMA-L11-201209-221LMA30T_0805

220ohm / 3A

+1.1VALW

C363

L12

1 2

MBK1608221YZF_2P

220ohm / 550mA

L38

1 2

MBK1608221YZF_2P

220ohm / 550mA

+FCH_VDD_11_SSUSB_S

40mils

4 4

L40

+1.1VALW

FBMA-L11-201209-221LMA30T_0805

A

12

220ohm / 3A

22U_0805_6.3V6M

C194

1

2

47mA

20mA

R204 0_0402_5%R204 0_0402_5%

20mA

R206 0_0402_5%R206 0_0402_5%

200mA

+FCH_VDDAN_33_DAC_R

20mA

17mA

+FCH_VDDPL_33_USB_S

43mA

+VDDPL_33_PCIE

93mA

+VDDPL_33_SATA

7mA

1 2

R210 0_0402_5%R210 0_0402_5%

226mA

R211

0_0603_5%

658mA

22U_0805_6.3V6M

1U_0402_6.3V6K

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z C362

C362

C226

1

2

140mA

2.2U_0603_6.3V4Z

C235

1

2

197mA

10U_0603_6.3V6M

C241

1

2

1 2

R216 0_0603_5%R216 0_0603_5%

+FCH_VDD_11_SSUSB_S

1 2

R219 0_0603_5%R219 0_0603_5%

B

.1U_0402_16V7K

C201

C188

1

2

1 2

C204 2.2U_0603_6.3V4Z

12

C212

4.7U_0603_6.3V6K

C212

4.7U_0603_6.3V6K

1

2

1 2

R214 0_0402_5%R214 0_0402_5%

1U_0402_6.3V6K

C228

C227

1

2

.1U_0402_16V7K

C364

C236

1

2

.1U_0402_16V7K

C243

C242

1

2

282mA

1U_0402_6.3V6K

C246

1

2

424mA

C253

+VDDIO_33_PCIGP

.1U_0402_16V7K

+VDDPL_33_DAC

+FCH_VDDPL_33_SSUSB_S

1 2

C213

1

2

+VDDAN_33_USB

10U_0603_6.3V6M

1

2

+VDDAN_11_USB_S

.1U_0402_16V7K

1

2

+VDDCR_1.1V_USB

.1U_0402_16V7K

1

2

+VDDAN_SSUSB

C247

+VDDCR_11_SSUSB

10U_0603_6.3V6M

1

2

C202

C361

1

2

+VDDPL_33_ML

@

+VDDAN_11_ML

.1U_0402_16V7K

C214

1

2

10U_0603_6.3V6M

C229

1

2

.1U_0402_16V7K

C248

1

2

1U_0402_6.3V6K

C254

1

2

.1U_0402_16V7K

1

2

C230

1

2

.1U_0402_16V7K

C255

1

2

10mils

20mils

30mils

.1U_0402_16V7K

10mils

20mils

30mils

.1U_0402_16V7K

C256

U2C

AB17

VDDIO_33_PCIGP_1

AB18

VDDIO_33_PCIGP_2

AE9

VDDIO_33_PCIGP_3

AD10

VDDIO_33_PCIGP_4

AG7

VDDIO_33_PCIGP_5

AC13

VDDIO_33_PCIGP_6

AB12

VDDIO_33_PCIGP_7

AB13

VDDIO_33_PCIGP_8

AB14

VDDIO_33_PCIGP_9

AB16

VDDIO_33_PCIGP_10

H24

VDDPL_33_SYS

V22

VDDPL_33_DAC

U22

VDDPL_33_ML

T22

VDDAN_33_DAC

L18

VDDPL_33_SSUSB_S

D7

VDDPL_33_USB_S

AH29

VDDPL_33_PCIE

AG28

VDDPL_33_SATA

M31

LDO_CAP

V21

VDDPL_11_DAC

Y22

VDDAN_11_ML_1

V23

VDDAN_11_ML_2

V24

VDDAN_11_ML_3

V25

VDDAN_11_ML_4

AB10

VDDIO_33_GBE_S

AB11

VDDCR_11_GBE_S_1

AA11

VDDCR_11_GBE_S_2

AA9

VDDIO_GBE_S_1

AA10

VDDIO_GBE_S_2

G7

VDDAN_33_USB_S_1

H8

VDDAN_33_USB_S_2

J8

VDDAN_33_USB_S_3

K8

VDDAN_33_USB_S_4

K9

VDDAN_33_USB_S_5

M9

VDDAN_33_USB_S_6

M10

VDDAN_33_USB_S_7

N9

VDDAN_33_USB_S_8

N10

VDDAN_33_USB_S_9

M12

VDDAN_33_USB_S_10

N12

VDDAN_33_USB_S_11

M11

VDDAN_33_USB_S_12

U12

VDDAN_11_USB_S_1

U13

VDDAN_11_USB_S_2

T12

VDDCR_11_USB_S_1

T13

VDDCR_11_USB_S_2

P16

VDDAN_11_SSUSB_S_1

M14

VDDAN_11_SSUSB_S_2

N14

VDDAN_11_SSUSB_S_3

P13

VDDAN_11_SSUSB_S_4

P14

VDDAN_11_SSUSB_S_5

N16

VDDCR_11_SSUSB_S_1

N17

VDDCR_11_SSUSB_S_2

P17

VDDCR_11_SSUSB_S_3

M17

VDDCR_11_SSUSB_S_4

HUDSON-M3_FCBGA656

.1U_0402_16V7K

1

Security Classification

Issued Date

2

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

HUDSON-2

PCI/GPIO I/O

USB SS USB MAIN LINKGBE LAN

POWER

VDDCR_11_1 VDDCR_11_2 VDDCR_11_3 VDDCR_11_4 VDDCR_11_5 VDDCR_11_6 VDDCR_11_7

CORE S0

VDDCR_11_8 VDDCR_11_9

VDDAN_11_CLK_1 VDDAN_11_CLK_2 VDDAN_11_CLK_3 VDDAN_11_CLK_4 VDDAN_11_CLK_5 VDDAN_11_CLK_6

CLKGEN I/OPCI EXPRESSSERIAL ATA3.3V_S5 I/O

VDDAN_11_CLK_7 VDDAN_11_CLK_8

VDDAN_11_PCIE_1 VDDAN_11_PCIE_2 VDDAN_11_PCIE_3 VDDAN_11_PCIE_4 VDDAN_11_PCIE_5 VDDAN_11_PCIE_6 VDDAN_11_PCIE_7 VDDAN_11_PCIE_8

VDDAN_11_SATA_1 VDDAN_11_SATA_4 VDDAN_11_SATA_2 VDDAN_11_SATA_3 VDDAN_11_SATA_5 VDDAN_11_SATA_6 VDDAN_11_SATA_7 VDDAN_11_SATA_8 VDDAN_11_SATA_9

VDDAN_11_SATA_10

VDDIO_33_S_1 VDDIO_33_S_2 VDDIO_33_S_3 VDDIO_33_S_4 VDDIO_33_S_5 VDDIO_33_S_6 VDDIO_33_S_7 VDDIO_33_S_8

VDDXL_33_S

VDDCR_11_S_1 VDDCR_11_S_2

VDDPL_11_SYS_S

VDDAN_33_HWM _S

VDDIO_AZ_S

2011/07/29 2012/07/29

50mils

T14 T17 T20 U16 U18 V14 V17 V20 Y17

20mils

H26 J25 K24 L22 M22 N21 N22 P22

50mils

AB24 Y21 AE25 AD24 AB23 AA22 AF26 AG27

60mils

AA21 Y20 AB21 AB22 AC22 AC21 AA20 AA18 AB20 AC19

10mils

N18 L19 M18 V12 V13 Y12 Y13 W11

10mils

G24

10mils

N20 M20

10mils

J24

10mils

M8

10mils

AA4

Compal Secret Data

Deciphered Date

1U_0402_6.3V6K

C191

C185

1

2

+1.1VS_CKVDD

1U_0402_6.3V6K

C203

C196

1

2

+PCIE_VDDR_FCH

1U_0402_6.3V6K

C206

C205

1

2

+AVDD_SATA

1U_0402_6.3V6K

C215

C216

1

2

+VDDIO_33_S

1U_0402_6.3V6K

C222

C223

1

2

+VDDXL_3.3V

+VDDCR_1.1V

+VDDPL_1.1V

+VDDAN_33_HWM

+VDDIO_AZ

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

1U_0402_6.3V6K

1

2

+VCC_FCH_R

1007mA

.1U_0402_16V7K

C192

1

2

C197

1

2

C207

1

2

C217

1

2

C224

1

2

C233

1

2

C237

1

2

C244

1

2

C249

1

2

.1U_0402_16V7K

1337mA

.1U_0402_16V7K

1U_0402_6.3V6K

.1U_0402_16V7K

1U_0402_6.3V6K

2.2U_0603_6.3V4Z

.1U_0402_16V7K

C193

C186

1

2

+1.1VS_CKVDD

340mA

.1U_0402_16V7K

C198

C199

1

2

+PCIE_VDDR_FCH

1088mA

.1U_0402_16V7K

C208

C209

1

2

+AVDD_SATA

.1U_0402_16V7K

C219

C218

1

2

59mA

2.2U_0603_6.3V4Z

C225

1

2

5mA

2.2U_0603_6.3V4Z

C234

1

2

187mA

1U_0402_6.3V6K

C238

1

2

70mA

.1U_0402_16V7K

C245

1

2

12mA

.1U_0402_16V7K

C250

1

2

10U_0603_6.3V6M

22U_0805_6.3V6M

MBK1608221YZF_2P

220ohm / 550mA

MBK1608221YZF_2P

220ohm / 550mA

26mA

1 2

C251 2.2U_0603_6.3V4ZC251 2.2U_0603_6.3V4Z

1 2

C252 .1U_0402_16V7KC252 .1U_0402_16V7K

D

10U_0603_6.3V6M

C360

C187

1

2

R213

1 2

0_0402_5%

L11

1 2

R215

0_0603_5%

L39

1 2

R217

1 2

0_0402_5%

R218

1 2

0_0402_5%

10U_0603_6.3V6M

1

2

R208

0_0603_5%

R209

0_0805_5%

R212

0_0805_5%

12

+1.1VS

R207

12

0_0805_5%

12

+3V_FCH

+1.1VALW

+1.1VS

U2E

A3

VSS

A33

VSS

B7

VSS

B13

VSS

D9

VSS

D13

VSS

E5

VSS

E12

VSS

E16

VSS

E29

VSS

F7

VSS

F9

VSS

F11

VSS

F13

VSS

F16

VSS

F17

VSS

F19

VSS

F23

VSS

F25

VSS

F29

VSS

G6

VSS

G16

VSS

G32

VSS

H12

VSS

H15

VSS

H29

VSS

J6

VSS

J9

VSS

J10

VSS

J13

VSS

J28

VSS

J32

VSS

K7

VSS

K16

VSS

K27

VSS

K28

VSS

L6

VSS

L12

VSS

L13

VSS

L15

VSS

L16

VSS

L21

VSS

M13

VSS

M16

VSS

M21

VSS

M25

VSS

N6

VSS

N11

VSS

N13

VSS

N23

VSS

N24

VSS

P12

VSS

P18

VSS

P20

VSS

P21

VSS

P31

VSS

P33

VSS

R4

VSS

R11

VSS

R25

VSS

R28

VSS

T11

VSS

T16

VSS

T18

VSS

N8

VSSAN_HWM

K25

VSSXL

H25

VSSPL_SYS

HUDSON-M3_FCBGA656

HUDSON-2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GROUND

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSPL_DAC VSSAN_DAC

VSSANQ_DAC

VSSIO_DAC

EFUSE

T25 T27 U6 U14 U17 U20 U21 U30 U32 V11 V16 V18 W4 W6 W25 W28 Y14 Y16 Y18 AA6 AA12 AA13 AA14 AA16 AA17 AA25 AA28 AA30 AA32 AB25 AC6 AC18 AC28 AD27 AE6 AE15 AE21 AE28 AF8 AF12 AF16 AF33 AG30 AG32 AH5 AH11 AH18 AH19 AH21 AH23 AH25 AH27 AJ18 AJ28 AJ29 AK21 AK25 AL18 AM21 AM25 AN1 AN18 AN28 AN33

T21 L28 K33 N28

R6

Connected to VSS through a dedicated via.

+3V_FCH

AMD reply: VDDAN_33_HWM_S: Please connect it to +3.3V_S5 directly if HWM is not used.

+3VS

VDDIO_AZ_S should be tied to +3.3/1.5V_S5 rail if Wake on Ring is supported

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Compal Electronics, Inc.

Hudson-M2/M3-POWER/GND

QML70 LA-8371P

17 53Wednesday, October 19, 2011

E

of

0.2

5

PCIE_CTX_GRX_P[15..0]6

PCIE_CTX_GRX_N[15..0]6

PCIE_CTX_GRX_P[15..0]

PCIE_CTX_GRX_N[15..0]

U7A

4

PCIE_CRX_GTX_P[15..0]

PCIE_CRX_GTX_N[15..0]

3

PCIE_CRX_GTX_P[15..0] 6

PCIE_CRX_GTX_N[15..0] 6

2

1

LVDS Interface

PCIE_CTX_GRX_P0

D D

C C

B B

CLK_PEG_VGA13 CLK_PEG_VGA#13

A A

PCIE_CTX_GRX_N0

PCIE_CTX_GRX_P1 PCIE_CTX_GRX_N1

PCIE_CTX_GRX_P2 PCIE_CTX_GRX_N2

PCIE_CTX_GRX_P3 PCIE_CTX_GRX_N3

PCIE_CTX_GRX_P4 PCIE_CTX_GRX_N4

PCIE_CTX_GRX_P5 PCIE_CTX_GRX_N5

PCIE_CTX_GRX_P6 PCIE_CTX_GRX_N6

PCIE_CTX_GRX_P7 PCIE_CTX_GRX_N7

PCIE_CTX_GRX_P8 PCIE_CTX_GRX_N8

PCIE_CTX_GRX_P9 PCIE_CTX_GRX_N9

PCIE_CTX_GRX_P10 PCIE_CTX_GRX_N10

PCIE_CTX_GRX_P11 PCIE_CTX_GRX_N11

PCIE_CTX_GRX_P12 PCIE_CTX_GRX_N12

PCIE_CTX_GRX_P13 PCIE_CTX_GRX_N13

PCIE_CTX_GRX_P14 PCIE_CTX_GRX_N14

PCIE_CTX_GRX_P15 PCIE_CTX_GRX_N15

CLK_PEG_VGA CLK_PEG_VGA#

R223

PX@R223

PX@

10K_0402_5%

GPU_RST#

5

12

PX@

R225

R225 100K_0402_5%

100K_0402_5%

AA38

PCIE_RX0P

Y37

PCIE_RX0N

Y35

PCIE_RX1P

W36

PCIE_RX1N

W38

PCIE_RX2P

V37

PCIE_RX2N

V35

PCIE_RX3P

U36

PCIE_RX3N

U38

PCIE_RX4P

T37

PCIE_RX4N

T35

PCIE_RX5P

R36

PCIE_RX5N

R38

PCIE_RX6P

P37

PCIE_RX6N

P35

PCIE_RX7P

N36

PCIE_RX7N

N38

PCIE_RX8P

M37

PCIE_RX8N

M35

PCIE_RX9P

L36

PCIE_RX9N

L38

PCIE_RX10P

K37

PCIE_RX10N

K35

PCIE_RX11P

J36

PCIE_RX11N

J38

PCIE_RX12P

H37

PCIE_RX12N

H35

PCIE_RX13P

G36

PCIE_RX13N

G38

PCIE_RX14P

F37

PCIE_RX14N

F35

PCIE_RX15P

E37

PCIE_RX15N

CLOCK

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AH16

PWRGOOD

AA30

PERSTB

THAMES XT M2 FCBGA 962P

PX@

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

4

PCIE_CRX_C_GTX_P0

Y33

PCIE_CRX_C_GTX_N0

Y32

PCIE_CRX_C_GTX_P1

W33

PCIE_CRX_C_GTX_N1 PCIE_CRX_GTX_N1

W32

PCIE_CRX_C_GTX_P2

U33

PCIE_CRX_C_GTX_N2

U32

PCIE_CRX_C_GTX_P3

U30

PCIE_CRX_C_GTX_N3 PCIE_CRX_GTX_N3

U29

PCIE_CRX_C_GTX_P4

T33

PCIE_CRX_C_GTX_N4 PCIE_CRX_GTX_N4

T32

PCIE_CRX_C_GTX_P5

T30

PCIE_CRX_C_GTX_N5 PCIE_CRX_GTX_N5

T29

PCIE_CRX_C_GTX_P6

P33

PCIE_CRX_C_GTX_N6

P32

PCIE_CRX_C_GTX_P7

P30

PCIE_CRX_C_GTX_N7 PCIE_CRX_GTX_N7

P29

PCIE_CRX_C_GTX_P8

N33

PCIE_CRX_C_GTX_N8 PCIE_CRX_GTX_N8

N32

PCIE_CRX_C_GTX_P9

N30

PCIE_CRX_C_GTX_N9 PCIE_CRX_GTX_N9

N29

PCIE_CRX_C_GTX_P10

L33

PCIE_CRX_C_GTX_N10 PCIE_CRX_GTX_N10

L32

PCIE_CRX_C_GTX_P11

L30

PCIE_CRX_C_GTX_N11 PCIE_CRX_GTX_N11

L29

PCIE_CRX_C_GTX_P12

K33

PCIE_CRX_C_GTX_N12 PCIE_CRX_GTX_N12

K32

PCIE_CRX_C_GTX_P13

J33

PCIE_CRX_C_GTX_N13 PCIE_CRX_GTX_N13

J32

PCIE_CRX_C_GTX_P14

K30

PCIE_CRX_C_GTX_N14

K29

PCIE_CRX_C_GTX_P15

H33

PCIE_CRX_C_GTX_N15 PCIE_CRX_GTX_N15

H32

R2221.27K_0402_1% PX@ R2221.27K_0402_1 % PX@

R2242K_0402_1% PX@ R2242K_0402_1% PX@

+1.0VSG

2011/07/29 2012/07/29

Issued Date

1 2

Y30

Y29

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN C ONSENT OF COMPAL ELECTRONICS, INC.

3

C2570.1U_0402_16V7K PX@C2570.1U_0402_16V7K PX@

12

C2580.1U_0402_16V7K PX@C2580.1U_0402_16V7K PX@

12

C2640.1U_0402_16V7K

12

C2590.1U_0402_16V7K PX@C2590.1U_0402_16V7K PX@

12

C2600.1U_0402_16V7K

12

C2610.1U_0402_16V7K PX@C2610.1U_0402_16V7K PX@

12

C2620.1U_0402_16V7K

12

C2630.1U_0402_16V7K PX@C2630.1U_0402_16V7K PX@

12

C2650.1U_0402_16V7K

12

C2660.1U_0402_16V7K PX@C2660.1U_0402_16V7K PX@

12

C2670.1U_0402_16V7K

12

C2680.1U_0402_16V7K PX@C2680.1U_0402_16V7K PX@

12

C2690.1U_0402_16V7K

12

C2700.1U_0402_16V7K PX@C2700.1U_0402_16V7K PX@

12

C2710.1U_0402_16V7K

12

C2720.1U_0402_16V7K PX@C2720.1U_0402_16V7K PX@

12

C2730.1U_0402_16V7K

12

C2740.1U_0402_16V7K PX@C2740.1U_0402_16V7K PX@

12

C2750.1U_0402_16V7K

12

C2760.1U_0402_16V7K PX@C2760.1U_0402_16V7K PX@

12

C2770.1U_0402_16V7K

12

C2780.1U_0402_16V7K PX@C2780.1U_0402_16V7K PX@

12

C2790.1U_0402_16V7K

12

C2800.1U_0402_16V7K PX@C2800.1U_0402_16V7K PX@

12

C2810.1U_0402_16V7K

12

C2820.1U_0402_16V7K PX@C2820.1U_0402_16V7K PX@

12

C2830.1U_0402_16V7K

12

C2840.1U_0402_16V7K PX@C2840.1U_0402_16V7K PX@

12

C2850.1U_0402_16V7K

12

C2860.1U_0402_16V7K PX@C2860.1U_0402_16V7K PX@

12

C2870.1U_0402_16V7K

12

C2880.1U_0402_16V7K PX@C2880.1U_0402_16V7K PX@

12

PCIE_CRX_GTX_P0 PCIE_CRX_GTX_N0

PX@

PCIE_CRX_GTX_P1

PX@

PCIE_CRX_GTX_P2 PCIE_CRX_GTX_N2

PX@

PCIE_CRX_GTX_P3

PX@

PCIE_CRX_GTX_P4

PX@

PCIE_CRX_GTX_P5

PX@

PCIE_CRX_GTX_P6 PCIE_CRX_GTX_N6

PX@

PCIE_CRX_GTX_P7

PX@

PCIE_CRX_GTX_P8

PX@

PCIE_CRX_GTX_P9

PX@

PCIE_CRX_GTX_P10

PX@

PCIE_CRX_GTX_P11

PX@

PCIE_CRX_GTX_P12

PX@

PCIE_CRX_GTX_P13

PX@

PCIE_CRX_GTX_P14 PCIE_CRX_GTX_N14

PX@

PCIE_CRX_GTX_P15

Compal Secret Data

Deciphered Date

U7G

LVDS CONTROL

TXCLK_UP_DPF3P

TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_D PF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_D PF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_D PF0N

TXOUT_U3P TXOUT_U3N

LVTMDP

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

TXOUT_L3P TXOUT_L3N

THAMES XT M2 FCBGA 962P

PX@

+3VS+3VSG

R536

R562

0_0402_5%

@

PE_GPIO013,14

R556 0_0402_5%PX@R556 0_0402_5%PX@

PLT_RST#13,30,33

2

12

Title

Size Docum ent Number Rev

B

Date: Sheet of

Date: Sheet

R536 0_0402_5%

0_0402_5%

1 2

5

U8

2

P

B

4

Y

1

A

G

PX@

3

MC74VHC1G08DFT2G SC70 5P

Compal Electronics, Inc.

ATI_Thames XT_M2_PCIE/LVDS

GPU_RST#

QML70 LA-8371P

1

VARY_BL

DIGON

18 53Wednesday, October 19, 2011

AK27 AJ27

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

of

0.2

5

D D

VRAM_ID023 VRAM_ID123 VRAM_ID223 VRAM_ID323

L43

L44

PX@L44

PX@

R561

PX@

200_0402_5%

C305

PX@ C305

PX@

22P_0402_50V8J

STRAPS

1 2 1 2 1 2

1 2

1 2 1 2

1 2 1 2 1 2

1 2

PX@L43

PX@

12

1

75mA

1

C296

2

PX@ C296

PX@

10U_0603_6.3V6M

125mA

1

C299

2

PX@ C299

PX@

10U_0603_6.3V6M

1M_0402_5%

Y2

1

GPU_GPIO0

R22610K_0402_5% PX@ R22610K_0402_5% PX@

GPU_GPIO1

R22710K_0402_5% PX@ R22710K_0402_5% PX@

GPU_GPIO2

R22810K_0402_5% @ R22810K_0402_5% @

GPU_GPIO5

R22910K_0402_5% @ R22910K_0402_5% @

GPU_GPIO8

R23010K_0402_5% @ R23010K_0402_5% @

GPU_GPIO9

R23110K_0402_5% @ R23110K_0402_5% @

GPU_GPIO11

R23210K_0402_5% PX@ R23210K_0402_5% PX@

GPU_GPIO12

R23410K_0402_5% @ R23410K_0402_5% @

GPU_GPIO13

R23510K_0402_5% @ R23510K_0402_5% @

GPIO24_TRSTB

R23710K_0402_5% @ R23710K_0402_5% @

GPIO25_TDI

R23810K_0402_5% @ R23810K_0402_5% @

GPIO27_TMS

R23910K_0402_5% @ R23910K_0402_5% @

GPIO26_TCK

R24210K_0402_5% @ R24210K_0402_5% @

1

C297

2

PX@ C297

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C300

2

PX@ C300

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

R247

PX@

27MHZ_16PF_X3G027000FG1H-HXPX@Y227MHZ_16PF_X3G027000FG1H-HXPX@

3

GND

2

4

5

+DPLL_PVDD

1

C298

2

PX@ C298

PX@

+DPLL_VDDC

1

C301

2

PX@ C301

PX@

3

22P_0402_50V8J

XTALIN

C306

PX@C306

PX@

GPU_CTF37

+1.8VSG

RB751V_SOD323

RB751V_SOD323 D2

ACIN37,41

GPU_VID149

PEG_CLKREQ#14

GPU_CTF

+1.8VSG

PX@

R244 499_0402_1%

PX@

R246 249_0402_1%

C295 0.1U_0402_16V7K

PX@

XTALIN Voltage Swing: 1.8 V

PX@

L45

1 2

BLM15BD121SN1D_0402

@D2

@

GPU_VID049

T19T19

T20T20

R236

R236 10K_0402_5%

10K_0402_5%

1 2

12

GPU_THERM_D+ GPU_THERM_D-

(1.8V@20mA TSVDD)

1

C302

2

PX@ C302

PX@

21

10U_0603_6.3V6M

+3VSG

C C

+3VSG

B B

+1.8VSG

BLM15BD121SN1D_0402

+1.0VSG

BLM15BD121SN1D_0402

XTALOUT

A A

4

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 GPU_GPIO3 GPU_GPIO4 GPU_GPIO5

GPU_GPIO8 GPU_GPIO9

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

GPU_VID0

THM_ALERT#

GPU_CTF

GPU_VID1

GPIO21_BBEN

PEG_CLKREQ#

GPIO24_TRSTB GPIO25_TDI GPIO26_TCK GPIO27_TMS

GPIO28_TDO

0.60 V level, Please VREFG Divider ans cap close to ASIC

+VREFG_GPU

+DPLL_PVDD

+DPLL_VDDC

XTALIN XTALOUT

+TSVDD

1

C304

C303

2

1U_0402_6.3V6K

0.1U_0402_16V4Z

PX@ C304

PX@

PX@ C303

PX@

4

U7B

MUTI GFX

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AJ21

SWAPLOCKA

AK21

SWAPLOCKB

I2C

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF_HPD5

AH24

GENERICG_HPD6

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AW34

XO_IN

AW35

XO_IN2

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AL31

TS_A/NC

AJ32

TSVDD

AJ33

TSVSS

THAMES XT M2 FCBGA 962P

PX@

PLL/CLOCK

THERMAL

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

HSYNC VSYNC

RSET

AVDD

AVSSQ

VDD1DI

VSS1DI

R2/NC

R2B/NC

G2/NC

G2B/NC

B2/NC

B2B/NC

COMP/NC

DAC2

H2SYNC/GENLK_CLK

V2SYNC/GENLK_VSYNC

VDD2DI/NC

VSS2DI/NC

A2VDD/NC

A2VDDQ/NC

A2VSSQ/TSVSSQ

R2SET/NC

DDC/AUX

DDC1CLK

DDC1DATA

AUX1P

AUX1N

DDC2CLK

DDC2DATA

AUX2P

AUX2N

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

DDCCLK_AUX7P

DDCDATA_AUX7N

C/NC Y/NC

3

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36 AC38

R233 499_0402_1%PX@R233 499_0402_1%PX@

AB34

1 2

AD34 AE34

AC33 AC34

AC30 AC31

AD30 AD31

AF30 AF31

AC32 AD32 AF32

AD29 AC29

AG31 AG32

AG33

AD33

AF33

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

+AVDD

+VDD1DI

GENLK_CLK GENLK_VSYNC

(1.8V@65mA AVDD)

(1.8V@100mA VDD1DI)

1

C292

C293

2

PX@ C292

PX@

PX@ C293

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

10U_0603_6.3V6M

T21T21 T22T22

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

1 2

L42

PX@L42

PX@

BLM15BD121SN1D_0402

1

C294

2

PX@ C294

PX@

Issued Date

1

C289

+1.8VSG

2

PX@ C289

PX@

0.1U_0402_16V7K

2011/07/29 2012/07/29

1

C290

C291

2

PX@ C290

PX@

PX@ C291

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

Compal Secret Data

2

CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRAN SMITTER DE-EMPHASIS

RSVD

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS

RSVD

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET

GPIO21 GPIO2

GPIO2

GPIO8

GPIO9 VGA ENABLEDBIF_VGA DIS

GPIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

H2SYNC

GENERICC

HSYNCAUD[ 1]

VSYNCAUD[0]

H2SYNC GENERICC

DESCRIPTION OF DEFAULT SETT INGSPIN

Advertises PCIE speed when compliance test

RESERVED

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort only 1 0 Audio for DisplayPort and HDMI, if dongle is detected. 1 1 Audio for both DisplayPort and HDMI

TX_PWRS_ENB

+1.8VSG

1 2

L41

PX@L41

PX@

BLM15BD121SN1D_0402

VGA_SMB_CK2

VGA_SMB_DA2

PX@

Deciphered Date

2

R564 0_0402_5%PX@R564 0_0402_5%PX@

R565 0_0402_5%PX@R565 0_0402_5%PX@

+3VSG

C357

0.1U_0402_16V4Z

C357

0.1U_0402_16V4Z

1

GPU_THERM_D+ VGA_SMB_DA2

2

GPU_THERM_D-

TX_DEEMPH_EN

10K_0402_5%

12

PX@

R240

GPU_GPIO4

GPU_GPIO3

+3VSG

Internal VGA Thermal Sensor

12

PX@

R241

R241 10K_0402_5%

10K_0402_5%

SM_CK2

DMN66D0LDW-7_SOT363-6

SM_DA2

R553 0_0402_5%PX@R553 0_0402_5%PX@

R558 0_0402_5%PX@R558 0_0402_5%PX@

External VGA Thermal Sensor

U34

1

VDD

2

PX@C356

PX@

ADM1032ARMZ-2REEL_MSOP8

D+

3

D-

THERM#4GND

PX@

Title

Size Document Number Rev

Date: Sheet of

2200P_0402_50V7K

1 2

C356

1

RECOMMEN DED SETTINGS 0= DO N OT INSTALL RESISTOR 1 = I NSTALL 10K RESISTOR X = DESIGN DEPENDANT NA = NOT APPLICABLE

0: 50% swing 1: Full swing

0: disable 1: enable

0: 2.5GT/s 1: 5GT/s

0: disable 1: enable

GPIO8

Transmitter Power Saving Enable

GPIO0

0: 50% Tx output swing for mobile mode 1: full Tx output swing (Default setting for Desktop)

PCI Express Transmitter De-emphasis Enable

GPIO1

0: Tx de-emphasis diabled for mobile mode 1: Tx de-emphasis enabled (Defailt setting for desktop)

+3VS

2

61

5

Q15A

PX@Q15A

PX@

3

4

Q15B

PX@Q15B

DMN66D0LDW-7_SOT363-6

R243 0_0402_5%@ R243 0_0402_5%@

1 2

C

PX@

R245 0_0402_5%@ R245 0_0402_5%@

1 2

SM_CK2

SM_DA2

VGA_SMB_CK2

8

SCLK

7

SDATA

ALERT#

ATI_Thames XT_M2_Main_MSIC

THM_ALERT#

6

5

Compal Electronics, Inc.

1 2

R554 4.7K_0402_5%PX@R554 4.7K_0402_5%PX@

QML70 LA-8371P

1

RECOMMENDED SETTINGS

X

0

X

XXX

0

11

EC_SMB_CK2 8,27,37

EC_SMB_DA2 8,27,37

19 53Wednesday, October 19, 2011

+3VSG

0.2

5

4

3

2

1

Power Sequence of Whistler and Seymour

SUSP# +3VSG

D D

(JUMP form +3VS)

VGA_ON

10ms

VGA_PWR_ON

1.5_VDDC_PWREN

+VGA_CORE

+1.5VSG

VGA Muxless with BACO Status Mapping table

PX_EN

1.5_VDDC_PWREN VDDC_EN

1.0_EN VGA_PWR_ON source signal +3.3VSG ON +1.8VSG +1.0VSG +VGA_CORE +1.5VSG +BIF_VDDC +VGA_CORE

Normal mode

0 1 1 0 VGA Power Enable Signal Mappi ng table 1 0 1

ON +1.8VSG ON ON ON

BACO mode

0

ON ON ON OFF OFF

+1.0VSG

+3.3VSG

+1.0VSG +VDDCI +VGA_CORE +1.5VSG

Whislter VGA_ON

SUSP# VGA_PWR_ON VGA_PWR_ON

Combine with +VGA_CORE

1.5_VDDC_PWREN

+1.0VSG

+1.8VSG

For PX sequence, >2mS delay is required between PE_GPIO1 and VGA_PWR_ON

PE_GPIO1

C C

Delay SUSP# 10ms

PE_GPIO113,14,37

B B

PX@

1 2

R252 0_0402_5%

1 2

R255 10K_0402_1%

VGA_PWR_ON >2ms

VGA_PWR_ON

@

For VGA Power on control

VGA_PWR_ON 26,43,49VGA_ON37

20ms

PX_EN21,37

From +VGA_CORE regulator

VGA_PWRGD13,49

R250 0_0402_5%

12

PX@

R251

5.11K_0402_1%

VGA_PWR_ON

R249 10K_0402_5%

+3VS

PX@

1 2

1.5_VDD_PWREN

1 2

PX@

13

D

2

G

S

PX@ C308

PX@

0.1U_0402_16V4Z

PX@

1 2

R256 0_0402_5%

Q16

PX@

2N7002K_SOT23-3

C308

12

2

1

@

R248 0_0402_5%

1 2

+3VS

C307

0.1U_0402_16V4Z

1 2

PX@

5

U9

2

P

B

4

Y

1

A

G

NC7SZ08P5X_NL_SC70-5

3

1K_0402_5%

+3VS

PX@

5

U10

P

B

4

Y

A

G

NC7SZ08P5X_NL_SC70-5

3

PX@C307

PX@

1.5_VDD_PWREN

+5VS +5VS

PX@

R253

1 2

34

5

Q17B

DMN66D0LDW-7_SOT363-6

PX@Q17B

PX@

1K_0402_5%

2

R254

1.5_VDD_PWREN 26,49

1 2

Q17A

DMN66D0LDW-7_SOT363-6

61

PX@Q17A

PX@

VDDC_EN

1.0_EN

+1.0VSG

AO3416_SOT23-3

1.0_EN

VDDC_EN

+VGA_CORE

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

Q18

PX@

Q18

PX@

D

S

D

S

13

AO3416_SOT23-3

G

2

G

2

30mil

13

D

S

D

S

PX@

Q89

AO3416_SOT23-3

2011/07/29 2012/07/29

Q19

PX@

Q19

PX@

20mil

D

1 3

G

2

G

1 3

PX@

D

S

D

S

Q90

AO3416_SOT23-3

Compal Secret Data

Deciphered Date

+BIF_VDDC

S

2

1

2

@

30mil

1 2

R257 0_0805_5%

PX@

C309

C309 22U_0805_6.3V6M

22U_0805_6.3V6M

AO3416 NMOS Vgs(th)(Max)= 1V Rds(on)(Max)= 22m ohm @Vgs=4.5V

+VGA_CORE

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ATI_Thames XT_M2_BACO POWER

QML70 LA-8371P

1

20 53Wednesday, October 19, 2011

0.2

5

D D

+1.8VSG

R259

1 2

0_0402_5%

PX@

+1.0VSG

R261

1 2

0_0402_5%

+1.8VSG

+1.0VSG

0_0402_5%

PX@

R264

1 2

0_0402_5%

PX@

R266

1 2

0_0402_5%

PX@

1

C319

C320

PX@ C319

PX@

PX@ C320

PX@

2

1U_0402_6.3V6K

10U_0603_6.3V6M

150mA

1

C322

C323

PX@ C322

PX@

PX@ C323

PX@

2

10U_0603_6.3V6M

1

C326

C325

PX@ C325

PX@

PX@ C326

PX@

2

10U_0603_6.3V6M

C C

B B

A A

+DPCD_VDD10

1

C321

PX@ C321

PX@

2

0.1U_0402_16V7K

1

C324

PX@ C324

PX@

2

1U_0402_6.3V6K

+DPEF_VDD10

1

C327

PX@ C327

PX@

2

1U_0402_6.3V6K

1

C313

PX@ C313

PX@

2

10U_0603_6.3V6M

+DPCD_VDD10

1

2

0.1U_0402_16V7K

+DPEF_VDD10

1

2

0.1U_0402_16V7K

1

C314

C315

PX@ C314

PX@

PX@ C315

PX@

2

1U_0402_6.3V6K

0.1U_0402_16V7K

+DPEF_VDD10

+DPCD_VDD18

1

2

+DPCD_VDD18

+DPCD_VDD10

+DPEF_VDD18

+DPEF_VDD10

+DPCD_VDD18

+DPCD_VDD10

+DPEF_VDD18

20mA

R262150_0402_1% PX@ R262150_0402_1% PX@

12

R267150_0402_1% PX@ R267150_0402_1% PX@

12

4

U7H

DP C/D POWER

AP20

DPCD/DPC_VDD18#1

AP21

DPCD/DPC_VDD18#2

AP13

DPCD/DPC_VDD10#1

AT13

DPCD/DPC_VDD10#2

AN17

DP/DPC_VSSR#1

AP16

DP/DPC_VSSR#2

AP17

DP/DPC_VSSR#3

AW14

DP/DPC_VSSR#4

AW16

DP/DPC_VSSR#5

AP22

DPCD/DPD_VDD18#1

AP23

DPCD/DPD_VDD18#2

AP14

DPCD/DPD_VDD10#1

AP15

DPCD/DPD_VDD10#2

AN19

DP/DPD_VSSR#1

AP18

DP/DPD_VSSR#2

AP19

DP/DPD_VSSR#3

AW20

DP/DPD_VSSR#4

AW22

DP/DPD_VSSR#5

AW18

DPCD_CALR

DP E/F POWER

AH34

DPEF/DPE_VDD18#1

AJ34

DPEF/DPE_VDD18#2

AL33

DPEF/DPE_VDD10#1

AM33

DPEF/DPE_VDD10#2

AN34

DP/DPE_VSSR#1

AP39

DP/DPE_VSSR#2

AR39

DP/DPE_VSSR#3

AU37

DP/DPE_VSSR#4

AF34

DPEF/DPF_VDD18#1

AG34

DPEF/DPF_VDD18#2

AK33

DPEF/DPF_VDD10#1

AK34

DPEF/DPF_VDD10#2

AF39

DP/DPF_VSSR#1

AH39

DP/DPF_VSSR#2

AK39

DP/DPF_VSSR#3

AL34

DP/DPF_VSSR#4

AM34

DP/DPF_VSSR#5

AM39

DPEF_CALR

THAMES XT M2 FCBGA 962P

PX@

DP A/B POWER

DPAB/DPA_VDD18#1 DPAB/DPA_VDD18#2

DPAB/DPA_VDD10#1 DPAB/DPA_VDD10#2

DP/DPA_VSSR#1 DP/DPA_VSSR#2 DP/DPA_VSSR#3 DP/DPA_VSSR#4 DP/DPA_VSSR#5

DPAB/DPB_VDD18#1 DPAB/DPB_VDD18#2

DPAB/DPB_VDD10#1 DPAB/DPB_VDD10#2

DP/DPB_VSSR#1 DP/DPB_VSSR#2 DP/DPB_VSSR#3 DP/DPB_VSSR#4 DP/DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DPAB_VDD18/DPA_PVDD

DP_VSSR/DPA_PVSS

DPAB_VDD18/DPB_PVDD

DP_VSSR/DPB_PVSS

DPCD_VDD18/DPC_PVDD

DP_VSSR/DPC_PVSS

DPCD_VDD18/DPD_PVDD

DP_VSSR/DPD_PVSS

DPEF_VDD18/DPE_PVDD

DP_VSSR/DPE_PVSS

DPEF_VDD18/DPF_PVDD

DP_VSSR/DPF_PVSS

1.8V@300mA DPAB_VDD18)

+DPAB_VDD18

1

C310

130mA

AN24 AP24

110mA

AP31 AP32

AN27 AP27 AP28 AW24 AW26

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

20mA

AU28 AV27

20mA

AV29 AR28

+DPCD_VDD18

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

2

PX@ C310

PX@

0.1U_0402_16V7K

(

1.0V@220mA DPAB_VDD10)

+DPAB_VDD10

1

C316

PX@ C316

PX@

2

0.1U_0402_16V7K

+DPAB_VDD18

130mA

+DPAB_VDD10

110mA

R263 150_0402_1%PX@R263 150_0402_1%PX@

1 2

+DPAB_VDD18

+DPCD_VDD18

+DPEF_VDD18

3

R258

1 2

0_0402_5%

PX@

R260

1 2

0_0402_5%

PX@

+1.8VSG

+1.0VSG

NC @ Thames Pro M2

+DPAB_VDD18

1

C312

C311

2

PX@ C312

PX@

PX@ C311

PX@

+DPAB_VDD10

1U_0402_6.3V6K

10U_0603_6.3V6M

1

C317

C318

PX@ C317

PX@

PX@ C318

PX@

2

1U_0402_6.3V6K

10U_0603_6.3V6M

2

U7F

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#100

F17

GND#101

F19

GND#102

F21

GND#103

F23

GND#104

F25

GND#105

F27

GND#106

F29

GND#107

F31

GND#108

F33

GND#109

F7

GND#110

F9

GND#111

G2

GND#112

G6

GND#113

H9

GND#114

J2

GND#115

J27

GND#116

J6

GND#117

J8

GND#118

K14

GND#119

K7

GND#120

L11

GND#121

L17

GND#122

L2

GND#123

L22

GND#124

L24

GND#125

L6

GND#126

M17

GND#127

M22

GND#128

M24

GND#129

N16

GND#130

N18

GND#131

N2

GND#132

N21

GND#133

N23

GND#134

N26

GND#135

N6

GND#136

R15

GND#137

R17

GND#138

R2

GND#139

R20

GND#140

R22

GND#141

R24

GND#142

R27

GND#143

R6

GND#144

T11

GND#145

T13

GND#146

T16

GND#147

T18

GND#148

T21

GND#149

T23

GND#150

T26

GND#151

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#163

V18

GND#164

V21

GND#165

V23

GND#166

V26

GND#167

W2

GND#168

W6

GND#169

Y15

GND#170

Y17

GND#171

Y20

GND#172

Y22

GND#173

Y24

GND#174

Y27

GND#175

U13

GND#152

V13

GND#162

THAMES XT M2 FCBGA 962P

PX@

GND

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60

GND/PX_EN#61

GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

MECH#1 MECH#2 MECH#3

12

R265

4.7K_0402_5%

PX@

T23 PADT23 PAD T24 PADT24 PAD T25 PADT25 PAD

1

PX_EN 20,37

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

ATI_Thames XT_M2_PWR_GND

QML70 LA-8371P

1

of

21 53Wednesday, October 19, 2011

0.2

5

4

3

2

1

+1.5VSG

1

D D

C C

B B

A A

1

C339

+

@

2

220U_B2_2.5VM_R35

1

C332

C334

C333

2

PX@ C332

PX@

PX@ C334

PX@

PX@ C333

PX@

10U_0603_6.3V6M

VDDR1 CRB Design

0.1u 6 6 1u 10 10 10u 6 6

VDD_CT CRB Design

0.1u 1 1 1u 3 3 10u 1 1

VDDR3 CRB Design 1u 3 3 10u 1 1

VDDR4 CRB Design

0.1u 1 1 1u 1 1

MPV18 CRB Design

0.1u 2 2 1u 2 2 10u 1 1

SPV18 CRB Design

0.1u 1 1 1u 1 1 10u 1 1

SPV10 CRB Design

0.1u 1 1 1u 1 1 10u 1 1

1

C342

2

PX@ C342

PX@

10U_0603_6.3V6M

1

C365

C343

C335

2

PX@ C365

PX@

PX@ C343

PX@

PX@ C335

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

GCORE_SEN

1U_0402_6.3V6K

1

C344

2

PX@ C344

PX@

+VGA_CORE

1

C336

2

PX@ C336

PX@

1U_0402_6.3V6K

12

1

C345

C368

C337

2

PX@ C345

PX@

PX@ C368

PX@

PX@ C337

PX@

1U_0402_6.3V6K

+1.8VSG +VDDC_CT

+3VSG

1

C392

C391

2

PX@ C392

PX@

PX@ C391

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

L50

PX@L50

PX@

1 2

BLM15BD121SN1D_0402

+1.0VSG

1 2

MCK1608471YZF 0603

R774

R774 100_0402_5%

100_0402_5%

@

R775

R775 100_0402_5%

100_0402_5%

@

For DDR3/GDDR5, MVDDQ = 1.5V

1

C370

C367

2

PX@ C370

PX@

PX@ C367

PX@

1U_0402_6.3V6K

L47

PX@ L47

PX@

1 2

BLM15BD121SN1D_0402

1

C393

C394

2

PX@ C393

PX@

PX@ C394

PX@

1U_0402_6.3V6K

+1.8VSG

+1.8VSG+1.8VSG

1

C654

2

PX@ C654

PX@

10U_0603_6.3V6M

L51

PX@L51

PX@

1

C366

C338

C369

2

PX@ C366

PX@

PX@ C338

PX@

PX@ C369

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

(1.8V@110mA VDD_CT)

1

C371

2

PX@ C371

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

L48

PX@ L48

PX@

1 2

BLM15BD121SN1D_0402

(M97, Broadway and Madison: 1.8V@150mA MPV18)

L49

PX@L49

PX@

1 2

MCK1608471YZF 0603

1

C656

C655

2

PX@ C656

PX@

PX@ C655

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C673

C672

2

PX@ C673

PX@

PX@ C672

PX@

1U_0402_6.3V6K

10U_0603_6.3V6M

1

C346

2

PX@ C346

PX@

0.1U_0402_16V7K

1

C373

C372

2

PX@ C373

PX@

PX@ C372

PX@

1U_0402_6.3V6K

C403

PX@ C403

PX@

10U_0603_6.3V6M

1

C674

2

PX@ C674

PX@

0.1U_0402_16V7K

GCORE_SEN49

1

C348

C347

C349

2

PX@ C348

PX@

PX@ C347

PX@

PX@ C349

PX@

0.1U_0402_16V7K

1

C375

C374

2

PX@ C375

PX@

PX@ C374

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C395

C396

2

PX@ C395

PX@

PX@ C396

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

1

C657

C652

2

PX@ C657

PX@

PX@ C652

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

(1.8V@75mA SPV18)

(120mA SPV10)

1

C376

2

PX@ C376

PX@

0.1U_0402_16V7K

+VDDR4

1

C658

2

PX@ C658

PX@

0.1U_0402_16V7K

GCORE_SEN

+MPV18

1

C653

2

PX@ C653

PX@

+SPV18

+SPV10

T17T17

U7E

MEM I/O

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

I/O

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR4#4

AF15

VDDR4#5

AG13

VDDR4#7

AG15

VDDR4#8

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#6

M20

NC_VDDRHA

M21

NC_VSSRHA

V12

NC_VDDRHB

U12

NC_VSSRHB

PLL

H7

MPV18#1

H8

MPV18#2

AM10

SPV18

AN9

SPV10

AN10

SPVSS

VOLTAGE

VOLTAGE SENESE

SENESE

AF28

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

THAMES XT M2 FCBGA 962P

PX@

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDR/PCIE_PVDD

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

VDDC#1

CORE

VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15

POWER

VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32

VDDC/BIF_VDDC#33

VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41

VDDC/BIF_VDDC#42

VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8 VDDCI#9

VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15

ISOLATED

VDDCI#16

CORE I/O

VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

AA31 AA32 AA33 AA34 V28 W29 W30 Y31 AB37

G30 G31 H29 H30 J29 J30 L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

(1.8V@504mA PCIE_VDDR)

+PCIE_VDDR

1

C340

2

PX@ C340

PX@

0.1U_0402_16V7K

1

C341

C329

C328

2

PX@ C341

PX@

PX@ C329

PX@

PX@ C328

PX@

1U_0402_6.3V6K

0.1U_0402_16V7K

(1.0V@1920mA PCIE_VDDC)

1

C350

2

PX@ C350

PX@

1U_0402_6.3V6K

1

C401

2

PX@ C401

PX@

1U_0402_6.3V6K

(GDDR3/DDR3 1.12V@4A VDDCI)

(GDDR5 1.12V@16A VDDCI)

VDDCI and VDDC should have seperate regulators with a merge option on PCB For Madison, Park, Capilano, Robson, Seymour and Whistler, VDDCI and VDDC can share one common regulator

1

C353

C352

C351

2

PX@ C353

PX@

PX@ C352

PX@

PX@ C351

PX@

1U_0402_6.3V6K

+VGA_CORE

+BIF_VDDC

For non-BACO designs, connect BIF_VDDC to VDDC. For BACO designs - see BACO reference schematics

1

C402

2

PX@ C402

PX@

1U_0402_6.3V6K

1

C330

2

PX@ C330

PX@

1

C354

2

@ C354

@

+VDDCI

MBK1608121YZF_0603

1

C331

2

PX@ C331

PX@

10U_0603_6.3V6M

+1.0VSG

1

C355

2

PX@ C355

PX@

10U_0603_6.3V6M

PX@ L46

PX@

+1.8VSG

L46

12

PCIE_VDDR CRB Design

0.1u 2 2 1u 3 3 10u 1 1

PCIE_VDDC CRB Design 1u 7 5 (1@) 10u 1 1

VDDC CRB Design 1u 30 30 10u 10 3 22u 0 1

VDDCI CR B Design 1u 10 10 10u 3 4(3@) 22u 0 1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ATI_Thames XT_M2_Power

QML70 LA-8371P

1

22 53Wednesday, October 19, 2011

0.2

5

U7C

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11

D D

C C

+1.5VSG

R274 240_0402_1%PX@R274 240_0402_1%PX@

1 2

R275 240_0402_1%PX@R275 240_0402_1%PX@

1 2

R276 240_0402_1%PX@R276 240_0402_1%PX@

1 2

R277 240_0402_1%PX@R277 240_0402_1%PX@

1 2

R279 240_0402_1%PX@R279 240_0402_1%PX@

1 2

R280 240_0402_1%PX@R280 240_0402_1%PX@

1 2

B B

+1.5VSG +1.5VSG

R284

40.2_0402_1%

PX@

R290

100_0402_1%

PX@

A A

MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+VDD_MEM15_REFDA +VDD_MEM15_REFSA

12

+VDD_MEM15_REFDA

12

C677

0.1U_0402_16V7K

PX@

DDR3

C37

DQA0_0/DQA_0

C35

DQA0_1/DQA_1

A35

DQA0_2/DQA_2

E34

DQA0_3/DQA_3

G32

DQA0_4/DQA_4

D33

DQA0_5/DQA_5

F32

DQA0_6/DQA_6

E32

DQA0_7/DQA_7

D31

DQA0_8/DQA_8

F30

DQA0_9/DQA_9

C30

DQA0_10/DQA_10

A30

DQA0_11/DQA_11

F28

DQA0_12/DQA_12

C28

DQA0_13/DQA_13

A28

DQA0_14/DQA_14

E28

DQA0_15/DQA_15

D27

DQA0_16/DQA_16

F26

DQA0_17/DQA_17

C26

DQA0_18/DQA_18

A26

DQA0_19/DQA_19

F24

DQA0_20/DQA_20

C24

DQA0_21/DQA_21

A24

DQA0_22/DQA_22

E24

DQA0_23/DQA_23

C22

DQA0_24/DQA_24

A22

DQA0_25/DQA_25

F22

DQA0_26/DQA_26

D21

DQA0_27/DQA_27

A20

DQA0_28/DQA_28

F20

DQA0_29/DQA_29

D19

DQA0_30/DQA_30

E18

DQA0_31/DQA_31

C18

DQA1_0/DQA_32

A18

DQA1_1/DQA_33

F18

DQA1_2/DQA_34

D17

DQA1_3/DQA_35

A16

DQA1_4/DQA_36

F16

DQA1_5/DQA_37

D15

DQA1_6/DQA_38

E14

DQA1_7/DQA_39

F14

DQA1_8/DQA_40

D13

DQA1_9/DQA_41

F12

DQA1_10/DQA_42

A12

DQA1_11/DQA_43

D11

DQA1_12/DQA_44

F10

DQA1_13/DQA_45

A10

DQA1_14/DQA_46

C10

DQA1_15/DQA_47

G13

DQA1_16/DQA_48

H13

DQA1_17/DQA_49

J13

DQA1_18/DQA_50

H11

DQA1_19/DQA_51

G10

DQA1_20/DQA_52

G8

DQA1_21/DQA_53

K9

DQA1_22/DQA_54

K10

DQA1_23/DQA_55

G9

DQA1_24/DQA_56

A8

DQA1_25/DQA_57

C8

DQA1_26/DQA_58

E8

DQA1_27/DQA_59

A6

DQA1_28/DQA_60

C6

DQA1_29/DQA_61

E6

DQA1_30/DQA_62

A5

DQA1_31/DQA_63

L18

MVREFDA

L20

MVREFSA

L27

MEM_CALRN0

N12

MEM_CALRN1

AG12

MEM_CALRN2

M12

MEM_CALRP1

M27

MEM_CALRP0

AH12

MEM_CALRP2

THAMES XT M2 FCBGA 962P

PX@

R285

40.2_0402_1%

PX@

R291

100_0402_1%

PX@

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8

MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12

MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0

MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

MEMORY INTERFACE A

EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7

DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7

12

C678

0.1U_0402_16V7K

PX@

ADBIA0/ODTA0 ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B

RASA0B RASA1B

CASA0B CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

MAA0_8 MAA1_8

GDDR5

+VDD_MEM15_REFSA

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27 G27

J14 H14

K23 K19

K20 K17

K24 K27

M13 K16

K21 J20

K26 L15

H23 J19

R611 0_0402_5%@R611 0_0402_5%@

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 A_BA2 A_BA0 A_BA1

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

ODTA0 ODTA1

CLKA0 CLKA0#

CLKA1 CLKA1#

RASA0# RASA1#

CASA0# CASA1#

CSA0#_0

CSA1#_0

CKEA0 CKEA1

WEA0# WEA1#

MAA13

1 2

4

MDA[0..63] MDB[0..63]

MAA[12..0] MAB[12..0]

A_BA[2..0] B_BA[2..0]

DQMA#[7..0] 24

QSA[7..0] 24

MAA[12..0] 24

A_BA[2..0] 24

+1.8VSG

R268 1K_0402_5%X76@R268 1K_0402_5%X76@

1 2

R270 1K_0402_5%X76@R270 1K_0402_5%X76@

1 2

R269 1K_0402_5%X76@R269 1K_0402_5%X76@

1 2

R271 1K_0402_5%X76@R271 1K_0402_5%X76@

1 2

R272 1K_0402_5%X76@R272 1K_0402_5%X76@

1 2

R273 1K_0402_5%X76@R273 1K_0402_5%X76@

1 2

R434 1K_0402_5%X76@R434 1K_0402_5%X76@

1 2

R433 1K_0402_5%X76@R433 1K_0402_5%X76@

1 2

Vendor VRAM_ID0 VRAM_ID1 VRAM_ID2

QSA#[7..0] 24

64MX16 (1G)

128M16 (2G)

MAA14

10K_0402_5%

128M16 (2G)

ODTA0 24 ODTA1 24

CLKA0 24 CLKA0# 24

CLKA1 24 CLKA1# 24

RASA0# 24 RASA1# 24

CASA0# 24 CASA1# 24

CSA0#_0 24

CSA1#_0 24

CKEA0 24 CKEA1 24

WEA0# 24 WEA1# 24

MAA13 24

MAA14

MAA14 24 MAB14 25

H5TQ1G63DFR-11C

Hynix 1GB PN:SA000041S60

K4W1G1646G-BC11

Samsung 1GB PN:SA00004GS30

H5TQ2G63BFR-11C

Hynix 2GB PN:SA00003YO30

K4W2G1646C-HC11

Samsung 2GB PN:SA000047QA0

+1.5VSG +1.5VSG

12

@

R26

R63

R63 0_0402_5%

0_0402_5%

@

1 2

MAB14

10K_0402_5%

Close to U7.W8Close to U7.J19

This basic topology should be used for DRAM_RST for DDR3/GDDR5.These Capacitors and Resistor values are an example only. The Series R and || Cap values will depend on the DRAM load and will have to be calculated for different Memory ,DRAM Load and board to pass Reset Signal Spec. Place all these components very close to GPU (Within 25mm) and keep all component close to each Other (within 5mm) except Rser2

+1.5VSG

12

R283

4.7K_0402_5%

@

R288

DRAM_RST#24,25

1 2

51.1_0402_1%

PX@

C679

120P_0402_50V9

3

R268 R271

1 0

0 0

R268

1 1

R270 R269

0

12

@

R27

R64

R64 0_0402_5%

0_0402_5%

@

1 2

R289

1 2

10_0402_5%

PX@

12

VRAM_ID0

VRAM_ID1

VRAM_ID2

VRAM_ID3

R269R270

1

R271 R272

0

1 1

DRAM_RST#_R

PX@

R292

4.99K_0402_1%

1 2

R273

0

R273

R272

VRAM_ID0 19

VRAM_ID1 19

VRAM_ID2 19

VRAM_ID3 19

VRAM_ID3

R433

0

R433

0

R433

0

R433

0

PX@

R278

1 2

5.11K_0402_1%

+VDD_MEM15_REFDB +VDD_MEM15_REFSB

C675

0.1U_0402_16V7K

R281

51.1_0402_1%

@

TESTEN

12

MDB0 MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31 MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

12

@

C676

0.1U_0402_16V7K

12

@

R282

51.1_0402_1%

2

U7D

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C5

DQB0_0/DQB_0

C3

DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6

G4

DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13

M6

DQB0_14/DQB_14

M1

DQB0_15/DQB_15

M3

DQB0_16/DQB_16

M5

DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20

R4

DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31

AA4

DQB1_0/DQB_32

AB6

DQB1_1/DQB_33

AB1

DQB1_2/DQB_34

AB3

DQB1_3/DQB_35

AD6

DQB1_4/DQB_36

AD1

DQB1_5/DQB_37

AD3

DQB1_6/DQB_38

AD5

DQB1_7/DQB_39

AF1

DQB1_8/DQB_40

AF3

DQB1_9/DQB_41

AF6

DQB1_10/DQB_42

AG4

DQB1_11/DQB_43

AH5

DQB1_12/DQB_44

AH6

DQB1_13/DQB_45

AJ4

DQB1_14/DQB_46

AK3

DQB1_15/DQB_47

AF8

DQB1_16/DQB_48

AF9

DQB1_17/DQB_49

AG8

DQB1_18/DQB_50

AG7

DQB1_19/DQB_51

AK9

DQB1_20/DQB_52

AL7

DQB1_21/DQB_53

AM8

DQB1_22/DQB_54

AM7

DQB1_23/DQB_55

AK1

DQB1_24/DQB_56

AL4

DQB1_25/DQB_57

AM6

DQB1_26/DQB_58

AM1

DQB1_27/DQB_59

AN4

DQB1_28/DQB_60

AP3

DQB1_29/DQB_61

AP1

DQB1_30/DQB_62

AP5

DQB1_31/DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

THAMES XT M2 FCBGA 962P

PX@

route 50ohms single-ended/100o hms diff and keep short Debug only, for clock observation, if not needed, DNI 5mil 5mil

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

P8

MAB0_0/MAB_0

T9

MAB0_1/MAB_1

P9

MAB0_2/MAB_2

N7

MAB0_3/MAB_3

N8

MAB0_4/MAB_4

N9

MAB0_5/MAB_5

U9

MAB0_6/MAB_6

U8

MAB0_7/MAB_7

Y9

MAB1_0/MAB_8

W9

MAB1_1/MAB_9

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

ADBIB0/ODTB0 ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B

RASB0B RASB1B

CASB0B CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

DRAM_RST

GDDR5

12

AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

R612 0_0402_5%@R612 0_0402_5%@

AH11

+VDD_MEM15_REFDB

12

C680

0.1U_0402_16V7K

PX@

MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0

MEMORY INTERFACE B

EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7

+1.5VSG +1.5VSG

R286

40.2_0402_1%

PX@

R293

100_0402_1%

PX@

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 B_BA2 B_BA0 B_BA1

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

QSB#0 QSB#1 QSB#2 QSB#3 QSB#4 QSB#5 QSB#6 QSB#7

ODTB0 ODTB1

CLKB0 CLKB0#

CLKB1 CLKB1#

RASB0# RASB1#

CASB0# CASB1#

CSB0#_0

CSB1#_0

CKEB0 CKEB1

WEB0# WEB1#

MAB13

1 2

DRAM_RST#_R

MDB[0..63]25MDA[0..63]24

R287

40.2_0402_1%

PX@

R294

100_0402_1%

PX@

MAB14

1

ODTB0 25 ODTB1 25

CLKB0 25 CLKB0# 25

CLKB1 25 CLKB1# 25

RASB0# 25 RASB1# 25

CASB0# 25 CASB1# 25

CSB0#_0 25

CSB1#_0 25

CKEB0 25 CKEB1 25

WEB0# 25 WEB1# 25

MAB13 25

12

DQMB#[7..0] 25

QSB[7..0] 25

QSB#[7..0] 25

+VDD_MEM15_REFSB

12

C681

0.1U_0402_16V7K

PX@

MAB[12..0] 25

B_BA[2..0] 25

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

5

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

C

Date: Sheet of

Compal Electronics, Inc.

ATI_Thames XT_M2_MEM IF

QML70 LA-8371P

1

23 53Wednesday, October 19, 2011

0.2

5

U11

VREFC_A1

M8

VREFD_Q1

D D

MDA[0..63]23

MAA[14..0]23

DQMA#[7..0]23

QSA[7..0]23

QSA#[7..0]23

C C

CLKA0

R299 40.2_0402_1%

CLKA0#

R300 40.2_0402_1%

B B

CLKA1

R309 40.2_0402_1%

CLKA1#

R310 40.2_0402_1%

PX@

1 2

PX@

1 2

PX@

1 2

PX@

1 2

MDA[0..63]

MAA[14..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

CLKA_0

CLKA_1

12

C682

0.01U_0402_16V7K

PX@

12

C690

0.01U_0402_16V7K

PX@

A_BA023 A_BA123 A_BA223

CLKA023 CLKA0#23 CKEA023

ODTA023 CSA0#_023 RASA0#23 CASA0#23 WEA0#23

DRAM_RST#23,25

240_0402_1%

QSA1 QSA3

DQMA#1 DQMA#3

QSA#1 QSA#3

R295

PX@

VREFCA

H1

VREFDQ

MAA0

N3

A0

MAA1

P7

A1

MAA2

P3

A2

MAA3

N2

A3

MAA4

P8

A4

MAA5

P2

A5

MAA6

R8

A6

MAA7

R2

A7

MAA8

T8

A8

MAA9

R3

A9

MAA10

L7

A10/AP

MAA11

R7

A11

MAA12

N7

A12

MAA13

T3

A13

MAA14 MAA14 MAA14 MAA14

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

12

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

+1.5VSG +1.5VSG

12

R301

4.99K_0402_1%

PX@

12

R311

4.99K_0402_1%

PX@

12

C691

PX@

4

U12

MDA11

E3

DQL0

MDA13

F7

DQL1

MDA8

F2

DQL2

MDA14

F8

DQL3

MDA10

H3

DQL4

MDA15

H8

DQL5

MDA9

G2

DQL6

MDA12

H7

DQL7

MDA31

D7

DQU0

MDA27

C3

DQU1

MDA30

C8

DQU2

MDA26

C2

DQU3

MDA28

A7

DQU4

MDA24

A2

DQU5

MDA29

B8

DQU6

MDA25

A3

DQU7

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VREFD_Q1 VREFD_Q2

0.1U_0402_16V7K

+1.5VSG

B2

VDD

D9

VDD

G7

VDD

K2

VDD

K8

VDD

N1

VDD

N9

VDD

R1

VDD

R9

VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

X76@

+1.5VSG

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG +1.5VSG

12

R302

4.99K_0402_1%

PX@

12

R314

4.99K_0402_1%

PX@

VREFC_A2 VREFD_Q2

A_BA0 A_BA0 A_BA0 A_BA1 A_BA1 A_BA1 A_BA2 A_BA2 A_BA2

CLKA0 CLKA0# CKEA0 CKEA1

ODTA0 ODTA1 CSA0#_0 CSA1#_0 RASA0# RASA1# CASA0# CASA1# WEA0# WEA1#

QSA2 QSA4 QSA0

DQMA#2 DQMA#4 DQMA#0

QSA#2 QSA#4 QSA#0

DRAM_RST# DRAM_RST# DRAM_RST#

12

R296

240_0402_1%

PX@

VREFC_A1 VREFC_A2

0.1U_0402_16V7K

12

C683

PX@

U12

M8 H1

MAA0 MAA0 MAA0

N3

MAA1 MAA1 MAA1

P7

MAA2 MAA2 MAA2

P3

MAA3 MAA3 MAA3

N2

MAA4 MAA4 MAA4

P8

MAA5 MAA5 MAA5

P2

MAA6 MAA6 MAA6

R8

MAA7 MAA7 MAA7

R2

MAA8 MAA8 MAA8

T8

MAA9 MAA9 MAA9

R3

MAA10 MAA10 MAA10

L7

MAA11 MAA11 MAA11

R7

MAA12 MAA12 MAA12

N7

MAA13 MAA13 MAA13

T3 T7

M7

M2 N8 M3

J7 K7 K9

K1 L2 J3 K3 L3

F3

C7

E7

D3

G3

B7

T2

L8

J1 L1 J9 L9

H5TQ2G63BFR-11C_FBGA96

R303

4.99K_0402_1%

PX@

R315

4.99K_0402_1%

PX@

VREFCA VREFDQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

X76@

0.1U_0402_16V7K

12

C684

PX@

3

MDA22

E3

MDA19

F7

MDA20

F2

MDA18

F8

MDA21

H3

MDA16

H8

MDA23

G2

MDA17 MDA38

H7

MDA0

D7

MDA7

C3

MDA1

C8

MDA4

C2

MDA3

A7

MDA6

A2

MDA2

B8

MDA5

A3

+1.5VSG

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

4.99K_0402_1%

PX@

R304

PX@

R316

+1.5VSG

12

240_0402_1%

C685

PX@

CLKA123 CLKA1#23 CKEA123

ODTA123 CSA1#_023 RASA1#23 CASA1#23 WEA1#23

12

R297

PX@

0.1U_0402_16V7K

12

VREFC_A3 VREFD_Q3

QSA7

DQMA#7

QSA#7

R305

4.99K_0402_1%

PX@

R317

4.99K_0402_1%

PX@

U13

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

H5TQ2G63BFR-11C_FBGA96

12

C686

PX@

VREFC_A3

0.1U_0402_16V7K

12

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

X76@

4.99K_0402_1%

2

U14

MDA33

E3

MDA35

F7

MDA34

F2

MDA39

F8

MDA32

H3

MDA37

H8

MDA36

G2 H7

MDA63

D7

MDA57

C3

MDA62

C8

MDA56

C2

MDA60

A7

MDA59

A2

MDA61

B8

MDA58

A3

+1.5VSG

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VSG

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

12

R306

PX@

12

R312

PX@

240_0402_1%

C687

PX@

R298

PX@

VREFD_Q3

0.1U_0402_16V7K

12

VREFC_A4 VREFD_Q4

CLKA1 CLKA1#

QSA6 QSA5

DQMA#6 DQMA#5

QSA#6 QSA#5

12

M8 H1

N3

P7 P3

N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3

T7 M7

M2 N8 M3

J7

K7

K9

K1

L2

J3

K3

L3

F3 C7

E7 D3

G3

B7

T2

L8

J1

L1

J9

L9

R307

4.99K_0402_1%

PX@

R318

4.99K_0402_1%

PX@

U14

DQL0

VREFCA

DQL1

VREFDQ

DQL2 DQL3

A0

DQL4

A1 A2

DQL5

A3

DQL6

A4

DQL7 A5 A6 A7

DQU0 A8

DQU1 A9

DQU2 A10/AP

DQU3 A11

DQU4 A12

DQU5

DQU6

A13

DQU7

A14 A15/BA3

BA0 BA1 BA2

CK CK CKE/CKE0

ODT/ODT0 CS/CS0 RAS CAS WE

DQSL DQSU

DML DMU

DQSL DQSU

RESET

ZQ/ZQ0

NC/ODT1 NC/CS1 NC/CE1 NCZQ1

H5TQ2G63BFR-11C_FBGA96

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

12

PX@

C688

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ

12

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

X76@

VREFC_A4

0.1U_0402_16V7K

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R308

4.99K_0402_1%

PX@

R313

4.99K_0402_1%

PX@

MDA51 MDA49 MDA52 MDA48 MDA53 MDA50 MDA54 MDA55

MDA41 MDA44 MDA40 MDA45 MDA43 MDA46 MDA42 MDA47

12

+1.5VSG

1

ZZZ3

ZZZ2

1GVRAM-HYNIX

X76L01@

ZZZ4

1GVRAM-SAM

X76L03@

VREFD_Q4

0.1U_0402_16V7K

12

C689

PX@

ZZZ3

2GVRAM-HYNIX

X76L02@

ZZZ5

2GVRAM-SAM

X76L04@

+1.5VSG

1

C693

C692

2

PX@ C693

PX@

PX@ C692

PX@

0.1U_0402_16V7K

A A

0.1U_0402_16V7K

1

C694

C695

2

PX@ C694

PX@

PX@ C695

PX@

0.1U_0402_16V7K

5

1

C696

2

PX@ C696

PX@

0.1U_0402_16V7K

1

C697

2

PX@ C697

PX@

0.1U_0402_16V7K

1

C698

C699

2

PX@ C698

PX@

PX@ C699

PX@

0.1U_0402_16V7K

1

C700

2

PX@ C700

PX@

0.1U_0402_16V7K

1

C701

C702

2

PX@ C701

PX@

PX@ C702

PX@

0.1U_0402_16V7K

1

C704

C703

2

PX@ C704

PX@

PX@ C703

PX@

0.1U_0402_16V7K

4

+1.5VSG

10U_0603_6.3V6M

+1.5VSG +1.5VSG

1

C705

2

PX@ C705

PX@

1

C706

2

PX@ C706

PX@

10U_0603_6.3V6M

C708

C707

2

PX@ C708

PX@

PX@ C707

PX@

10U_0603_6.3V6M

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C709

2

PX@ C709

PX@

1U_0402_6.3V6K

Issued Date

1

C710

2

PX@ C710

PX@

1U_0402_6.3V6K

1

C712

C711

2

PX@ C712

PX@

PX@ C711

PX@

1U_0402_6.3V6K

2011/07/29 2012/07/29

1

C713

2

PX@ C713

PX@

1U_0402_6.3V6K

1

C714

C715

2

PX@ C714

PX@

PX@ C715

PX@

1U_0402_6.3V6K

Compal Secret Data

1

C717

C716

2

PX@ C717

PX@

PX@ C716

PX@

1U_0402_6.3V6K

Deciphered Date

2

1

C718

2

PX@ C718

PX@

1U_0402_6.3V6K

1

C719

C720

2

PX@ C719

PX@

PX@ C720

PX@

1U_0402_6.3V6K

1

C721

2

PX@ C721

PX@

1U_0402_6.3V6K

1

C722

C723

2

PX@ C722

PX@

PX@ C723

PX@

1U_0402_6.3V6K

Title

ATI_Thames XT_M2_VRAM_A

Size Document Number Rev

C 0.2

Date: Sheet of

1

C724

2

PX@ C724

PX@

1U_0402_6.3V6K

Compal Electronics, Inc.

1

C725

C726

2

PX@ C725

PX@

PX@ C726

PX@

1U_0402_6.3V6K

QML70 LA-8371P

1

C727

2

PX@ C727

PX@

1U_0402_6.3V6K

1

C728

2

PX@ C728

PX@

24 53Wednesday, October 19, 2011

5

4

3

2

1

D D

MDB[0..63]

MAB[14..0]

B_BA0 B_BA0 B_BA0 B_BA1 B_BA1 B_BA1

DQMB#[7..0]

QSB[7..0]

QSB#[7..0]

DQMB#1 DQMB#2 DQMB#6 DQMB#3 DQMB#0

C C

CLKB0

CLKB0#

B_BA2 B_BA2 B_BA2

CLKB0 CLKB0# CKEB0 CKEB1

CSB0#_0 CSB1#_0

CASB0# CASB1#

DQMB#5

CLKB1 CLKB1#

DQMB#4 DQMB#7

DRAM_RST# DRAM_RST# DRAM_RST#

CLKB1

CLKB1#

B B

A A

5

4

3

2

1

A

B

C

D

E

Power Button

ON/OFF switch

NTC010-B B1G-C100C

1 1

2 2

NTC010-B B1G-C100C

SW1

2

4

5

1

3

R513 0 _0402_5%

1 2

9012@

ON/OFFBT N#

EC_ON37,42

10K_040 2_5%

1

DAN202U T106_SC70-3

930@

EC_ON

R532

930@

D30

+3VALW

R530

930@

100K_04 02_5%

1 2

2

3

13

D

2

G

S

1 2

51_ON#

Q30

Q30 2N7002_ SOT23-3

2N7002_ SOT23-3

930@

+3VLP

1 2

R531

9012@

100K_04 02_5%

PWR_ ON_LED#37,38

ON/OFF 37

51_ON# 40

PWR_ ON_LED#

19-213A-T 1D-CP2Q2HY-3T_W HITE

PWR_ ON_LED#

2

1

@

LED7

21

ON/OFFBT N#

3

PJSOT24 CH_SOT23-3

PJSOT24 CH_SOT23-3 D31

D31

R722

12

300_040 2_5%

+5VALW

3P0

4P3

3P3

2P9

Screw Hole

H1

H_3P0

1

@

H10

H9

H_3P0

1

@

H23

H_3P3

1

@

H22

H_2P9

1

@

H2

@

1

H_3P0

1

H_3P0

H11

@

1

H18

@

H3

1

@

H_3P0

H_4P3

1

H_3P0

H12

1

@

H_3P0

H19

@

1

H13

1

@

H_4P3

H5

1

@

H_3P0

H14

1

@

H20

1

@

H6

@

H_3P0

H_4P3

1

H_3P0

H25

@

1

H15

@

H21

H_3P0

1

H_4P3

1

H8

H16

H17

H_3P0

H_3P1

1

@

H24

H_3P0

1

@

H_3P1

1

@

FD4

FD2

FD1

3 3

+3VS

R533

10K_040 2_5%

1 2

FAN_SPE ED37

FAN_SPE ED

C529

1000P_0 402_50V7K

1

2

8 7 6 5

APL5607 KI-TRG_SO8

Fan Control Circuit

+5VS

U32

1

EN

GND GND GND GND

2

VIN

3

VOUT

4

VSET

FAN_SET37

C526

1

2.2U_060 3_6.3V4Z

2

1

C528

C528 10U_060 3_6.3V6M

10U_060 3_6.3V6M

2

+5VS_FA N

FAN_SPE ED

1

C527

C527 1000P_0 402_50V7K~D

1000P_0 402_50V7K~D

2

JFAN1

1

2

3

4

GND

5

GND

ACES_85 204-0300N

CONN@

FD1

@

1

FIDUCIAL_C40 M80

FD2

@

1

FIDUCIAL_C40 M80

FD3

@

1

FIDUCIAL_C40 M80

FD4

@

1

FIDUCIAL_C40 M80

place as close as EC

4 4

Security Class ification

2011/07/ 29 2012/07/29

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/ 29 2012/07/29

C

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

PWRBTN/ FAN / Screws

Size Docu ment Number Rev

Custom

QML70 LA-8371P

Date: Sheet of

D

Date: Sheet of

36 53Wednesd ay, October 19, 20 11

E

0.11

5

+3VALW

1 2

R394

R394 0_0805_5%

0_0805_5%

D D

C806

22P_0402_50V8J@

+3VALW

C C

R403 2.2K_0402_5%R403 2.2K_0402_5%

R406 2.2K_0402_5%R406 2.2K_0402_5%

R408 10K_0402_5%@R408 10K_0402_5%@

R559 10K_0402_5%@R559 10K_0402_5%@

R609 2.2K_0402_5%@R609 2.2K_0402_5%@

R610 2.2K_0402_5%@R610 2.2K_0402_5%@

+3VS

B B

FCH_PCIE_WAKE#14,30,33

A A

EC_SMB_CK1_R

1 2

EC_SMB_DA1_R

1 2

FLASH_EN

1 2

S5_CORE_EN

1 2

EC_SMB_CK2

1 2

EC_SMB_DA2

1 2

R411 10K_0402_5%R411 10K_0402_5%

1 2

R413 2.2K_0402_5%R413 2.2K_0402_5%

1 2

R417 2.2K_0402_5%R417 2.2K_0402_5%

EC_SCI#

EC_SMB_CK2

EC_SMB_DA2

1 2

R4310_0402_5%

5

R399 33_0402_5%@R399 33_0402_5%@

12

LPC_CLK0_EC13,16

R400 47K_0402_5%R400 47K_0402_5%

C807 0.1U_0402_16V4ZC807 0.1U_0402_16V4Z

12

EC_SMB_CK140,41 EC_SMB_DA140,41 EC_SMB_CK28,19,27 EC_SMB_DA28,19,27

+3VALW

PM_SLP_S3#14 PM_SLP_S5#14

12

R427

R427 10K_0402_5%

10K_0402_5%

@

EC_PME#

FCH_PWROK

12

EC_SMB_CK1 EC_SMB_CK1_R

R423 0_0402_5%R423 0_0402_5%

1 2

R424 0_0402_5%R424 0_0402_5%

1 2

9012@

R432

1 2

0_0402_5%

0.1U_0402_16V4Z

1

C799

2

0.1U_0402_16V4Z

GATE2014

KB_RST#14

SERIRQ13

LPC_FRAME#13,33

LPC_AD313,33 LPC_AD213,33 LPC_AD113,33 LPC_AD013,33

A_RST#13

EC_SCI#14

PM_CLKRUNEC#13

R421 0_0402_5%R421 0_0402_5%

1 2

R422 0_0402_5%R422 0_0402_5%

1 2

R425 0_0402_5%R425 0_0402_5%

1 2

R426 0_0402_5%R426 0_0402_5%

1 2

EC_SMI#14

FCH_3.3PWR_EN39

FLASH_EN15

S5_CORE_EN13

FAN_SPEED36

PWR_ON_LED#36,38

NUM_LED#38

RTC_CLK13,16

1

C800

2

0.1U_0402_16V4Z

EC_TX33 EC_RX33

C815 20P_0402_50V8C815 20P_0402_50V8

EC_CRY1

1

C595

C595 15P_0402_50V8J

15P_0402_50V8J

@

2

4

0.1U_0402_16V4Z

1

C802

C801

2

1000P_0402_50V7K

GATE20 KB_RST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

EC_RST# EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15

EC_SMB_DA1_REC_SMB_DA1 EC_SMB_CK2_R EC_SMB_DA2_R

PM_SLP_S3#_R PM_SLP_S5#_R EC_SMI# FCH_3.3PWR_EN FLASH_EN

S5_CORE_EN

FAN_SPEED EC_PME#

EC_TX

EC_RX

PWR_ON_LED#

NUM_LED#

EC_CRY1 EC_CRY2

R435 100K_0402_5%R435 100K_0402_5%

12

1 2

Y3

@Y3

@

EC_CRY2

1 2

32.768KHZ_12.5P_1TJF125DP1A000D

4

2

C803

1

U72

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

1

C596

C596 15P_0402_50V8J

15P_0402_50V8J

@

2

+3VALW_EC

C580

1000P_0402_50V7K

20mA

LPC & MISC

Int. K/B

Int. K/B Matrix

Matrix

L36

L36 FBMA-L11-160808-800LMT_0603

FBMA-L11-160808-800LMT_0603

1 2

R395

R395 0_0402_5%

0_0402_5%

930@

1 2

9

22

33

96

111

125

VCC

PWM Output

AD Input

DA Output

PS2 Interface

SPI Device Interface

SPI Flash ROM

GPIO

SM Bus

GPO

GPIO

GPI

GND

11

24

35

94

113

+EC_VCCA

1

0.1U_0402_16V4Z

ECAGND

2

R397

R397 0_0402_5% 9012@

0_0402_5% 9012@

67

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

AC_IN/GPIO59

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

PM_SLP_S4#/GPXID1

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

AGND

KB9012QF A3 LQFP 128P

69

20mil

L37

ECAGND

FBMA-L11-160808-800LMT_0603

C581

12

3

KSI[0..7]

KSO[0..17]

+3VLP

USBSW_EN#

21

FCH_SPI_WP#

23 26 27

BATT_TEMPA

63 64

ADP_I

65

AD_BID0

66

ENBKL

75

AI_CEN#

76

USBAI_PEN#

68

FAN_SET

70

ODD_DA#

71

AC_PRESENT_OK

72

EC_MUTE_R

83

USBAI_EN

84

BT_ON

85

EAPD

86

TP_CLK

87

TP_DATA

88

GPU_CTF

97

EN_WOL

98

VLDT_EN

99

R567

109

0_0402_5% 9012@

119

R414 33_0402_5%930@R414 33_0402_5%930@

120

R416 33_0402_5%930@R416 33_0402_5%930@

126

R418 33_0402_5%930@R418 33_0402_5%930@

128

73

PX_EN

74

SPOK

89

BATT_CHG_LED#

90

CAPS_LED#

91

PE_GPIO1

92

BATT_CHG_LOW_LED#

93

SYSON

95

VR_ON

121

VGATE

127

EC_RSMRST#

100

EC_LID_OUT#

101 102 103 104

BKOFF#

105

PBTN_OUT#

106

WL_BT_LED#EC_INVT_PWM

107

VGA_ON

108

ACIN_D

110

EC_ON

112

ON/OFF

114

LID_SW_IN#

115

SUSP#

116

WL_OFF#_EC

117

FCH_1.1PWR_EN

118

+V18R

124

12

1

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

KSI[0..7] 15,38

KSO[0..17] 38

FCH_SPI_WP# 15

C805 100P_0402_50V8JC805 100P_0402_50V8J

EC_THERMTRIP# 8

ADP_I 40,41

ENBKL 10

USBAI_PEN# 35

FAN_SET 36

ODD_DA# 34 AC_PRESENT_OK 14

R404 0_0402_5%R404 0_0402_5%

1 2 1 2 1 2

R419 0_0402_5%R419 0_0402_5%

R5720_0402_5% 9012@R5720_0402_5% 9012@

C814

4.7U_0805_10V4Z

12

USBAI_EN 35

BT_ON 33

EAPD 31 TP_CLK 38 TP_DATA 38

GPU_CTF 19 EN_WOL 30 VLDT_EN 39,46

12

PX_EN 20,21

SPOK 40,42

BATT_CHG_LED# 38

CAPS_LED# 38

PE_GPIO1 13,14,20

BATT_CHG_LOW_LED# 38

SYSON 39,44 VR_ON 47 VGATE 14,47

EC_RSMRST# 14 EC_LID_OUT# 14

H_PROCHOT#_EC 8,47

BKOFF# 28 PBTN_OUT# 14 WL_BT_LED# 38EC_INVT_PWM28

VGA_ON 20

EC_ON 36,42

ON/OFF 36

LID_SW_IN# 38

SUSP# 39,44

WL_OFF#_EC 33 FCH_1.1PWR_EN 45

USBSW_EN# 35

ECAGND

12

NTC_V 40

2011/07/29 2012/07/29

EC_MUTE#

FRD# FWR# SPI_CLK FSEL#

TL_BKOFF#

Turbo_V 40

BATT_TEMPA 40

AI_CEN# 35

+3VALW_EC

TL_BKOFF# 27,28

Compal Secret Data

EC_MUTE# 31

R409 200K_0402_5%

200K_0402_5%

ACIN_D

R430

2

USBSW_EN#

USBAI_PEN#

TP_CLK

TP_DATA

@

1 2

R407 100K_0402_5%

930@R409

930@

1 2

FCH_PWROK

R429 0_0402_5%9012@ R429 0_0402_5%9012@

930@R430

930@

1 2

0_0402_5%

Reserve for EMI please close t o U74

Deciphered Date

R428

0_0402_5% 9012@

1 2

R412 10K_0402_5%R412 10K_0402_5%

12

FCH_POK_EC

C811

12

@

22P_0402_50V8J

2

1 2

12

MAINPWON 42

R415

1 2

33_0402_5% @

FRD#

+3VALW

R77010K_0402_5% R77010K_0402_5%

R77110K_0402_5% R77110K_0402_5%

+5VS

12

R4014.7K_0402_5% R4014.7K_0402_5%

12

R4024.7K_0402_5% R4024.7K_0402_5%

+3VLP

ACIN 19,41

FCH_POK14

+3VS

SPI_CLK

930@

R761

10K_0402_5%

@

12

R4360_0402_5%

1

Board ID

12

FSEL# SPI_SO

Title

Size Document Number Rev

Custom

Date: Sheet of

+3VALW

R396

R396 100K_0402_5%

100K_0402_5%

Ra

1 2

AD_BID0

1

R398

FCH_1.1PWR_EN

EC_MUTE#

@

D42

RB751V_SOD323

2 1

R762

0_0402_5%

R398

8.2K_0402_5%

Rb

1 2

ACIN

FCH_POK_EC FCH_PWROK

12

C804

0.1U_0402_16V4Z

2

@

1 2

R749 100K_0402_5%

1 2

R405 10K_0402_5%R405 10K_0402_5%

C810 100P_0402_50V8JC810 100P_0402_50V8J

12

9012@

R760

0_0402_5%

128KBSPI ROM

15mA

U74

1

CS#

2

SO

3

WP#

4

GND

MX25L1005AMC-12G_SO8

SA00002C100

SA00002C100 930@

930@

HOLD#

SCLK

8

VCC

7 6 5

SI

Compal Electronics, Inc.

EC ENE-KB930/Co-lay 9012

QML70 LA-8371P

1

12

20mils

930@

+3VALW

1

C813

0.1U_0402_16V4Z

2

SPI_CLK FWR#

37 53Wednesday, October 19, 2011

0.11

KSO10

KSO11

KSO12

KSO15

KSI7

KSI2

KSI3

KSI4

KSI0

KSI5

KSI6

KSI1

KSO2

KSO1

KSO0

KSO4

KSO3

KSO5

KSO14

KSO6

KSO7

KSO13

KSO8

KSO9

LED

@

1 2

C553 100P_0402_50V8J

@

1 2

C554 100P_0402_50V 8J

@

1 2

C555 100P_0402_50V8J

@

1 2

C556 100P_0402_50V8J

@

1 2

C557 100P_0402_50V 8J

@

1 2

C558 100P_0402_50V 8J

@

1 2

C559 100P_0402_50V8J

@

1 2

C560 100P_0402_50V 8J

@

1 2

C561 100P_0402_50V 8J

@

1 2

C562 100P_0402_50V 8J

@

1 2

C563 100P_0402_50V8J

@

1 2

C565 100P_0402_50V8J

@

1 2

C566 100P_0402_50V8J

@

1 2

C567 100P_0402_50V 8J

@

1 2

C568 100P_0402_50V8J

@

1 2

C569 100P_0402_50V 8J

@

1 2

C572 100P_0402_50V8J

@

1 2

C573 100P_0402_50V 8J

@

1 2

C574 100P_0402_50V 8J

@

1 2

C575 100P_0402_50V8J

@

1 2

C576 100P_0402_50V 8J

@

1 2

C577 100P_0402_50V8J

@

1 2

C578 100P_0402_50V8J

@

1 2

C579 100P_0402_50V 8J

+5VALW

PWR_ON_LED#36,37

BATT_CHG_LED#37

BATT_CHG_LOW_LED#37

WL_BT_LED#37

SATA_LED#15

NUM_LED#37

CAPS_LED#37

Green

A

mber

INT_KBD Conn.

KSI[0..7]

KSO[0..17]

1 2

R713 10K_0402_5%R713 10K_0 402_5%

BATT_CHG_LED#

BATT_LOW_LED#

Green

KSO15 KSO14 KSO12 KSO10 KSO11 KSO6 KSO8 KSO4 KSO2 KSO5 KSO13 KSI0 KSI3 KSO1 KSI2 KSI4 KSO3 KSI5 KSI6 KSO9 KSI7 KSI1 KSO0 KSO7

KSI[0..7] 15,37

KSO[0..17] 37

JKB1

26

GND2

25

GND1

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

ACES_88514-02401-071

CONN@

LED1

G

YG

3 12

HT-121UYG_YELLOW-GREEN

LED3

G

YG

3 12

HT-121UYG_YELLOW-GREEN

LED4

G

YG

3 12

HT-121UYG_YELLOW-GREEN

LED5

G

YG

3 12

HT-121UYG_YELLOW-GREEN

LED6

G

YG

3 12

HT-121UYG_YELLOW-GREEN

Touch/B Connector

+5VS

JTP1

8

GND

7

GND

6

5

4

LEFT_BTN#

3

RIGHT_BTN#

2

1

CONN@

1

SATA_LED#

PWR_ON_LED#

BATT_CHG_LOW_LED#

BATT_CHG_LED#

WL_BT_LED#

CAPS_LED#

NUM_LED#

ACES_88514-00601-071

12

R714200_0402_5% R714200_0402_5%

LED2

2

12

R716100_0402_5% R716100_0402_5%

3

12

R715300_0402_5% R715300_0402_5%

HT-210UD/UYG_AMB/GRN

12

R717200_0402_5% R717200_0402_5%

12

R719200_0402_5% R719200_0402_5%

12

R720200_0402_5% R720200_0402_5%

+3VALW

1

+3VALW

+3VS

C594

1 2

0.1U_0402_16V4Z

1

2

1

@

C570

100P_0402_50V8J@C570

100P_0402_50V8J

C571

100P_0402_50V8J@C571

100P_0402_50V8J

2

D35

@

2

1

3

YSDA0502C 3P C/A SOT-23

D36

@

2

1

3

YSDA0502C 3P C/A SOT-23

YSDA0502C 3P C/A SOT-23 D37

D37

@

2

1

3

YSDA0502C 3P C/A SOT-23

D38

@

2

1

3

YSDA0502C 3P C/A SOT-23

TP_CLK 37

TP_DATA 37

TP_CLK

TP_DATA

DTSM-61N-S-V-T-R(756)_4P

2

3

1

2

D33

D33 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

SW3

Lid Switch

(Hall Effect Switch)

2

C582

0.1U_0402_16V4Z

1

APX9131AAI-TRG SOT-23

LEFT_BTN#

RIGHT_BTN#

DTSM-61N-S-V-T-R(756)_4P

3

4

+3VALW

2

U36

VDD

OUTPUT

GND

1

RIGHT_BTN#LEFT_BTN#

12

3

1

2

3

1

2

R578

R578 47K_0402_5%

47K_0402_5%

C583

C583 10P_0402_50V8J

10P_0402_50V8J

@

2

D34

D34 PJDLC05C_SOT23-3

PJDLC05C_SOT23-3

1

SW4

LID_SW_IN# 37

3

4

ESD

12

R721200_0402_5% R721200_0402_5%

+3VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

KB/EC ROM/TP/FUN/LED

Size Document Number Rev

B

QML70 LA-8371P

Date: Sheet of

38 53Wednesday, October 19, 2011

0.2

A

+5VALW TO +5VS (5.35A)

+5VALW TO +5VS (5.35A) +1.1VALW TO +1.1VS (4A)

+5VALW TO +5VS (5.35A)+5VALW TO +5VS (5.35A)

10U_0805_10V4Z

1 1

+VSBP

+3VALW TO +3VS (3A)

+3VALW TO +3VS (3A)+3VALW TO +3VS (3A)

+VSBP

2 2

+1.5V TO +1.5VS (0.5A)

+1.5V TO +1.5VS (0.5A)+1.5V TO +1.5VS (0.5A)

3 3

1 2

R730 47K_0402_5%R730 47K_0402_5%

10U_0603_6.3V6M

1

2

R767 47K_0402_5%R767 47K_0 402_5%

SSM3K7002FU_SC70-3

SUSP#

0.22U_0603_16V4Z

+5VALW

U69

U69 SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8 7

0.1U_0402_16V7K

6 5

C820

C819

1

2

5VS_GATE

13

D

Q73

SUSP

2

G

S

SSM3K7002FU_SC70-3

0.1U_0402_16V7K

C826

12

SUSP

R744

47K_0402_5%

S

+3VALW +3VS

U71

U71 SI4178DY-T1-GE3_SO8

SI4178DY-T1-GE3_SO8

8 7 6 5

1

C827

2

3VS_GATE

13

D

Q77

2

G

S

R739

100K_0402_5%

12

C836

1 2

2

G

1

2

4

1

C824

0.1U_0603_25V7K

2

1 2 3

4

1

C830

0.1U_0603_25V7K

2

AP2301GN-HF_SOT23-3

AP2301GN-HF_SOT23-3 Q78

Q78

3 1

2

13

D

Q83

S

SSM3K7002FU_SC70-3

+5VS

1 2

10U_0805_10V4Z

1U_0402_6.3V4Z

3

10U_0603_6.3V6M

1

2

C817

1

2

1

C828

2

+1.5VS+1.5V

C831

1 2

13

D

S

SSM3K7002FU_SC70-3

1U_0402_6.3V4Z

C829

1

2

R769

R769 470_0603_5%

470_0603_5%

Q81

2

G

1

2

SUSP

C818

R735

R735 470_0603_5%

470_0603_5%

1 2 13

D

Q76

S

SSM3K7002FU_SC70-3

B

R726

R726 470_0603_5%

470_0603_5%

1 2

13

D

Q70

SUSP

2

G

S

SSM3K7002FU_SC70-3

SUSP

2

G

+1.1VALW TO +1.1VS (4A)

+1.1VALW TO +1.1VS (4A)+1.1VALW TO +1.1VS (4A)

R727

1K_0402_5%

1 2

+VSBP

R731 47K_0402_5%R731 47K_0402_5%

VLDT_EN#

SSM3K7002FU_SC70-3

Instant On

20mil 10mil

+VSBP

+1.1VALW

8 7

10U_0603_6.3V6M

12

10U_0805_10V4Z

R743 200K_0402_5%R743 200K_0402_5%

6 5

1

C821

2

1.1VS_GATE

13

D

Q74

2

G

S

+3VALW TO +3V_FCH (1A)

+3VALW TO +3V_FCH (1A)+3VALW TO +3V_FCH (1A)

+3VALW

12

C833

FCH_3.3PWR_EN#

U70

U70 AO4430L_SO8

AO4430L_SO8

12

2

G

C

4

1

2

R737

@

0_0805_5%

AO3404AL_SOT23

D

1 3

13

D

Q84

SSM3K7002FU_SC70-3

S

1 2 3

C825

0.1U_0603_25V7K

12

Q79

S

PX@

G

2

3V_GATE

+1.1VS

10U_0603_6.3V6M

C822

1

2

12

0.1U_0603_25V7K

+3V_FCH

C837

1U_0402_6.3V4Z

1

2

40mil

10U_0805_10V4Z

1

2

C823

1 2 13

D

S

SSM3K7002FU_SC70-3

C832

1U_0603_10V4Z

12

R728

R728 470_0603_5%

470_0603_5%

Q71

VLDT_EN#

2

G

C834

470_0603_5%

1 2

13

D

Q82

S

SSM3K7002FU_SC70-3

FCH_3.3PWR_EN37

R741

FCH_3.3PWR_EN#

2

G

D

VLDT_EN37,46

100K_0402_5%

R729

10K_0402_5%

FCH_3.3PWR_EN#

R748

VLDT_EN#

Q69

2

G

12

2

G

12

+5VALW

R766

R766 100K_0402_5%

100K_0402_5%

1 2

13

D

S

SSM3K7002FU_SC70-3

+5VALW

12

R718

R718 100K_0402_5%

100K_0402_5%

13

D

S

Q61

SSM3K7002FU_SC70-3

SYSON37,44

100K_0402_5%

SUSP26,29,33

SUSP#37,44

10K_0402_5%

R732

E

R734

SYSON#

2

G

12

SUSP

12

Q72

2

G

+5VALW

1 2

13

+5VALW

Q75

R725

R725 100K_0402_5%

100K_0402_5%

D

S

SSM3K7002FU_SC70-3

R733

R733 100K_0402_5%

100K_0402_5%

1 2

13

D

S

SSM3K7002FU_SC70-3

+1.2VS

R745

R745 470_0603_5%

470_0603_5%

1 2

13

D

Q85

VLDT_EN#

2

G

S

SSM3K7002FU_SC70-3

+2.5VS+1.5V

4 4

R746

R746 470_0603_5%

470_0603_5%

1 2

13

D

Q86

2

G

S

SSM3K7002FU_SC70-3

R747

R747 470_0603_5%

470_0603_5%

1 2

13

D

Q87

G

S

SSM3K7002FU_SC70-3

A

2

SUSPSYSON#

SUSP

+0.75VS

12

R623

R623 22_0603_5%~D

22_0603_5%~D

+DDR_CHG

SSM3K7002FU_SC70-3~D

13

D

Q51

2

G

S

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

DC Interface

QML70 LA-8371P

39 53Wednesday, October 19, 2011

E

0.11

A

B

C

D

PL1

DCIN jack P/N:SP02000N000, need doble confirm P/N with ME

ADPIN

CONN@

ACES_88299-0610

1 1

ACES_88299-0610

GND GND

6 5 4 3 2 1

PJPDC1

8 7 6 5 4 3 2 1

12

PC1

1000P_0402_50V7K

Change DC040007T0L to DC040004L00 ( Use DC040001V00 symbol )

PJP2

@PJ P2

@

1

2

3

4

5

6

7

7 GND GND

8

9

10

2 2

11

SUYIN_200275MR009G186ZL

3 3

EC_SMCA EC_SMDA TS_A

1

PD1

@

2

3

PJSOT24CW_SOT323-3

PR27

PR27 1K_0402_1%

1K_0402_1%

1 2

PD2

@PD2

@

PJSOT24CW _SOT323-3

2

3

1 2

PR28 100_0402_1%PR28 100_04 02_1%

1 2

PR31 100_0402_1%PR31 100_04 02_1%

1 2

PR29 100K_0402_5%PR29 100K_0402_5%

1 2

PR30 1K_0402_1%PR30 1K_0402_1%

PL1

HCB2012KF-121T50_0805

1 2

PL2

HCB2012KF-121T50_0805

1 2

12

PC2

100P_0402_50V8J

HCB2012KF-121T50_0805

VMB

HCB2012KF-121T50_0805

12

PC6

PC6 1000P_0402_50V7K

1000P_0402_50V7K

1

12

PL3

1 2

PL4

1 2

+3VALW

BATT_TEMPA 37

PC3

1000P_0402_50V7K

12

PC128

10U_0805_25V6K

EC_SMB_CK1 37, 41

EC_SMB_DA1 37, 41

VIN

12

PC5

100P_0402_50V8J

BATT+

B+

PC7

0.01U_0402_25V7K

SPOK37,42

PR16

100K_0402_1%

VL

1 2

PR18

0_0402_5%

1 2

VSB_N_002

+CHGRTC

VIN

PH901 under CPU botten side :

CPU thermal protection at 90 degree C Recovery at 50 degree C

+3VLP

PR1

13.7K_0402_1%

1 2

NTC_V3 7

100K_0402_1%_TSM0B104F4251RZ

PR14

22K_0402_1%

1 2

VSB_N_003

13

D

PQ4

2

SSM3K7002FU_SC70-3

G

S

PC10

.1U_0402_16V7K

S

PJ3

2

JUMP_43X39

112

12

PH1

12

PR13

PC8

100K_0402_1%

TP0610K-T1-E3_SOT23- 3

0.22U_0603_25V7K

VSB_N_001

+3VLP

ADP_I 37,41

PR2

@PR2

@

5.62K_0402_1%

1 2

Turbo_V37

PR3

@PR3

@

13.7K_0402_1%

13

12

2

PQ3

PC9

0.1U_0603_25V7K

1 2

+VSBP

@PC1 3

@

.1U_0402_16V7K

1 2

PC13

PD3

@PD3

@

RLS4148_LL34-2

PR19

68_1206_5%

12

PC12

0.1U_0603_25V7K

1 2

VS_N_001

12

PR20

PR20 68_1206_5%

68_1206_5%

VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PD4

@PD4

@

LL4148_LL34-2

1 2

PR24 22K_0402_1%@ PR24 22K_0402_1%@

12

PR23

100K_0402_1%

12

N1

12

PC11

0.22U_0603_25V7K

TP0610K-T1-E3_SOT23- 3

VS_N_002

PQ5

13

2

BATT+

4 4

51_ON#36

For KB9012 --> Remove all 51_ON# circuit

A

RTC Battery

PBJ1

2

-

LOTES_AAA-BAT-054- K01

CONN@

Change RTC For Cost Down

SP07000H700

1

+

+RTCBATT

Must close PBJ1

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

2012/07/292011/07/29

Title

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-DCIN / BATT CONN / OTP

QML70 LA-8371P

D

40 53Wednesday, October 19, 2011

0.2

A

B

C

D

for reverse input protection

1

D

PQ106

2

SI1304BDL-T1-E3_SC70-3

G

S

3

PR104

PR103

1 1

1 2

1M_0402_5%

PR104

1 2

3M_0402_5%

VIN B+

2 2

3 3

MDS2659URH_SO8

8 7 6 5

12

PC112

2200P_0402_50 V7K

PQ101

4

BQ24725_ACDRV_1

P1

1 2 3

12

PR105@

PC110

0_0402_5%

0.1U_0402_25V6

12

PR108

4.12K_0603_1%

PQ102

MDS2659URH_SO8

1 2 3

4

PR109

4.12K_0603_1%

+3VALW

ACIN19,37

P2

PL102

1UH_FDSD0630-H-1R 0M-P3_11A_20%

+3VL

VIN

PL102

1 2

8 7 6

12

5

PC129

0.1U_0402_25V6

12

PC117

BQ24725_CMSRC

BQ24725_ACDRV

1 2

PR117 10K_0402_1%

@

PR117 10K_0402_1%

@

1 2

PR126 10K_0402_1%PR126 10K_0402_1%

1 2

PR118 10K_0402_1%PR118 10K_0402_1%

1 2

PR120

255K_0402_1%

10U_0805_25V6K

1 2

PC113

0.1U_0603_25V7K

12

PC130

10U_0805_25V6K

BQ24725_ACN

BQ24725_ACP

BQ24725_ACOK

0.01_2512_1%

1

2

12

1U_0603_25V6K

12

PR101

4

3

VIN

2

3

1

PC115

12

0.1U_0402_25V6

PC118

BQ24725_VCC

1 2

20

PU101

21

PAD

VCC

1

ACN

2

ACP

BQ24725RGRR_VQFN20_3P5X3P5

3

CMSRC

4

ACDRV

5

ACOK

ACDET6IOUT7SDA8SCL9ILIM

PR122

BQ24725_ACDET

154K_0402_1%

12

PC111

10U_0805_25V6K

PD101

PD101 BAS40CW_SOT323-3

BAS40CW_SOT323-3

0.047U_0402_25V7K

PC116

1 2

PR110

10_1206_1%

PR111

0_0603_5%

BQ24725_LX

DH_CHG

19

18

HIDRV

PHASE

12

PC105

12

BQ24725_REGN

BQ24725_BST

17

BTST

BATDRV

12

PC104

10U_0805_25V6K

12

PD102

PD102 RB751V-40_SOD323-2

RB751V-40_SOD323-2

DH_CHG

PC119

1 2

1U_0603_25V6K

16

REGN

15

LODRV

14

GND

13

SRP

12

SRN

11

10

BQ24725_ILIM

12

PR121

100K_0402_1%

12

PC103

10U_0805_25V6K

1 2

PR125

0_0402_5%

DL_CHG

PR115

10_0603_1%

SRP

1 2

PR116

6.8_0603_5%

SRN

1 2

BQ24725_BATDRV

PR119

1 2

210K_0402_1%

PC125

0.01U_0402_25 V7K

12

PC102

@

0.1U_0402_25V6

DH_CHG1

AO4468L_SO8

CSOP1

CSON1

+3VALW

12

PC101

0.1U_0402_25V6

4

PQ105

4

12

PC124

0.1U_0603_16V7K

PQ103

MDS2659URH_SO8

8 7 6 5

4

BQ24725_BATDRV

5

PQ104

PQ104 SIS412DN-T1-GE3_POW ERPAK8-5

SIS412DN-T1-GE3_POW ERPAK8-5

PL101

2.2UH_ETQP3W2R2WFN_8.5A_20%

123

BQ24725_LX

786

5

123

Remember to change PC124 from SE000006S80 to SE025104K80 (2011-02-22)

1 2

12

PR114

@

4.7_1206_5%

12

PC123

@

680P_0402_50V7 K

1 2

PR107

4.12K_0603_1%

CHG

CSOP1

12

BQ24725_BATDRV_1

PR102

0.02_1206_1%

1

2

PC121

0.1U_0402_25V6

1 2 3

12

4

3

CSON1

12

@

PC122

0.1U_0402_25V6

PR106

PC114

PC120

0_0402_5%

@

0.01U_0402_50 V7K

BATT+

12

PC106

10U_0805_25V6K

12

PC107

10U_0805_25V6K

12

PC108

PC109

0.01U_0402_50 V7K

2200P_0402_50 V7K

Vin Dectector

Min. Typ Max. H-->L 17.23V L--> H 17.63V

ILIM and external DPM

3.97A

4 4

12

PR123

PC126

0.1U_0402_25V6

66.5K_0402_1%

100P_0402_50V8J

Please locate the RC Near EC chip 2011-02-22

PC127

PR124

1 2

100_0402_5%

12

EC_SMB_CK1 37,40

EC_SMB_DA1 37,40

ADP_I 37,40

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size D ocument Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-CHARGER

QML70 LA-8371P

D

41 53Wednesday, October 19, 2011

0.2

A

B

C

D

E

2VREF_51125

12

PC308

1 1

13.7K_0402_1%

PC309

0.1U_0402_25V6

EC_ON36,37

12

PC310

+3VALWP

B++

2200P_0402_50V7K

12

VS

12

PC304

4.7U_0805_25V6-K

SSM6N7002FU_US6

1 2

@PR319

@

100K_0402_1%

SIS412DN-T1-GE3_POWERPAK8-5

PL303

4.7UH_ETQP3W4R7W FN_5.5A_20%

1

+

PC303

2

150U_V_6.3VM_R18

PQ307A

PR322

100K_0402_1%

1 2

PR321

0_0402_5%

1 2

PR319

D

S

N_3_5V_002

12

PR320

@

42.2K_0402_1%

12

@

ENTRIP1

61

G

12

PC321

12

PR312

4.7_1206_5%

SNUB_3V

12

PC316

680P_0402_50V7K

N_3_5V_001

2

4.7U_0805_25V6-K

PQ303

13

5

4

123

0_0402_5%

786

5

4

PQ304

123

AO4468L_SO8

ENTRIP2

34

D

5

G

SSM6N7002FU_US6

S

PR317

100K_0402_5%

1 2

PQ308

PQ308 DRC5115E0L_SOD323-3

DRC5115E0L_SOD323-3

+3VLP

133K_0402_1%

12

PC313

10U_0805_6.3V6M

PC314

0.1U_0402_10V7K

PR318

1 2

LX_3V LX_5V

B++

PQ307B

PR308

1 2

2.2_0402_5%

LG_3V

PR314

499K_0402_1%

1 2

EN0

PR315

95.3K_0402_1%

BST_3V

UG_3V

12

VL

+5VALWP

+3VALWP

B+

PC322

@

680P_0603_50V7K

2 2

3 3

PL301

HCB2012KF-121T50_0805

1 2

12

MAINPWON37

4 4

1U_0603_16V6K

PR301

1 2

PR302

20K_0402_1%

1 2

PR303

1 2

PU301

25

P PAD

7

VO2

8

VREG3

9

BOOT2

10

UGATE2

11

PHASE2

12

LGATE2

PC320

PC320 1U_0603_10V6K

1U_0603_10V6K

2VREF_51125

1 2

PC308

FB_3V

ENTRIP2

5

6

FB2

ENTRIP2

SKIPSEL

EN

14

13

B++

PJP305

PAD-OPEN 4x4m

PAD-OPEN 4x4m PJP303

PJP303

PAD-OPEN 4x4m

4

TONSEL

15

30.9K_0402_1%

1 2

20K_0402_1%

FB_5V

1 2

174K_0402_1%

ENTRIP1

1 2

2

3

1

FB1

REF

ENTRIP1

VO1

PGOOD

BOOT1

UGATE1

PHASE1

LGATE1

NC18VREG5

VIN16GND

17

RT8205LZQW(2)_WQFN24_4X4

12

PC318

4.7U_0805_10V6K

12

PC319

0.1U_0603_25V7K

+5VALW

+3VALW

PR305

PR306

PR307

24

23

BST_5VBST1_3V BST1_5V

22

UG_5V

21

20

LG_5V

19

PR309

2.2_0402_5%

1 2

B++

12

VL

(5A,200mils ,Via NO.= 10)

(4A,120mils ,Via NO.= 8)

12

PC311

PC312

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

PC315

0.1U_0402_10V7K

1 2

SPOK 37,40

12

PC306

10U_0805_25V6K

5

PQ305

PQ305 SIS412DN-T1-GE3_POWERPAK8-5

SIS412DN-T1-GE3_POWERPAK8-5

4

123

PR323

0_0402_5%

1 2

5

PQ306

4

123

FDMC7692S_MLP8-5

+3VLP

PL305

2.2UH_ETQP3W2R2W FN_8.5A_20%

1 2

12

+

+3VL

+

PC305

PR313

@

SNUB_5V

12

PC317

@

PJP302

2 1

PAD-OPEN 2x2m

4.7_1206_5%

680P_0402_50V7K

+5VALWP

1

2

150U_V_6.3VM_R18

For KB930 --> Keep PR319, Remove PR322

For KB9012 (Red square) --> Remove PR319 Keep PR322

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

PWR-3.3VALWP/5VALWP

QML70 LA-8371P

42 51Wednesday, October 19, 2011

E

0.01

5

D D

PL402

HCB1608KF-121T30_0603

+5VALW

C C

VGA_PWR_ON20,26,49

1 2

12

PC403

PC403 22U_0805_6.3V6M

22U_0805_6.3V6M

PR404 200K_0402_1%PR404 200K_0402_1%

1 2

PD401

@PD401

@

ISS355_SOD323-2

1 2

EN_1.8V

PR405

1 2

1M_0402_5%

4

PU401

4

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

NC

7

11

SY8033BDBC_DFN10_3X3

12

PC405

0.1U_0402_10V7K

SY8033BDBC_DFN10_3X3

LX_1.8V

2

LX

3

LX

6

FB

NC

1

1UH_FMJ-0630T-1R0 HF_11A_20%

12

FB=0.6Volt

1 2

PR403

4.7_1206_5%

PC406

680P_0603_50V7K

PL401

PR401

20K_0402_1%

FB_1.8V

PR402

10K_0402_1%

3

12

PC404

22P_0402_50V8J

12

PC401

22U_0805_6.3V6M

+1.8VSP

PC402

22U_0805_6.3V6M

2

1

B B

A A

5

4

+1.8VSP + 1.8VSG

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PJP401

2

JUMP_43X118@

2011/07/29

112

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

+1.8VP

QML70 LA-8371P

43 51Wednesday, October 19, 2011

1

0.01

5

4

3

2

1

0.75Volt +/- 5% TDC 0.525A

PL502

HCB1608 KF-121T30_060 3

12

PC516

680P_0603_50V7K

HCB1608 KF-121T30_060 3

1 2

PL501

1UH_VMP I0703AR-1R0M-Z01_ 11A_20%

PL501

12

D D

B+

@

+1.5VP

C C

Mode Level +0.75VSP VTTREF_1.5V S5 L off off S3 L off on S0 H on on

Note: S3 - sleep ; S5 - power off

B B

1

+

PC501

2

330U_D2_2.5VY_R15M

1.5V_B+

BST_1.5V

12

PC505

PC504

0.1U_0402_25V6

0.1U_0402_25V6 2200P_0402_50V7K

2200P_0402_50V7K

12

@P R506

@

4.7_1206 _5%

SNUB_+1.5VP

12

@P C512

@

680P_04 02_50V7K

12

PC502

10U_0805_25V6K

PR506

FDMC769 2S_MLP8-5

PC512

12

PC503

@

4.7U_0805_25V6-K

PQ502

5

4

PQ501

PQ501 SIS412DN-T 1-GE3_POWE RPAK8-5

SIS412DN-T 1-GE3_POWE RPAK8-5

123

5

4

123

SYSON37,39

1 2

PR508

0_0402_ 5%

1 2

PC506

0.22U_0402_10V6K

+5VALW

DH_1.5V_ 1

PR507

5.1_0603 _5%

1 2

1U_0603 _10V6K

12

PC514

@P C514

@

0.1U_040 2_10V7K

PC510

PR504

1 2

2.2_0402 _5%

PR511

1 2

0_0402_ 5%

SW_1 .5V

DL_1.5V

20K_040 2_1%

1U_0603 _10V6K

12

EN_1.5V

PR505

1 2

PC509

1 2

VDD_1.5V

BOOT_1.5 V

DH_1.5V

CS_1.5V

+5VALW

1.5V_B+

15

LGATE

14

PGND

13

CS

12

VDDP

11

VDD

PR503

887K_04 02_1%

1 2

17

16

PHASE

RT8207M ZQW_W QFN20_3X3

PGOOD

9

10

TON_1.5V

19

18

BOOT

UGATE

TON

VLDOIN

S5

S3

8

7

EN_0.75VSP

20

PU501

VTT

PAD

VTTGND

VTTSNS

GND

VTTREF

VDDQ

FB

6

FB_1.5V

21

1

2

3

4

5

VTTREF_ 1.5V

10.2K_04 02_1%

PR502

PR502 10K_040 2_1%

10K_040 2_1%

1 2

PR501

+1.5V

+1.5VP

12

Peak Current 0.75A OCP Current 0.9A

12

PC508

PC507

PC508

10U_0805_6.3V6K

+1.5VP

PC513

PC513 .1U_0402 _16V7K

.1U_0402 _16V7K

12

PC517

@

10U_0805_6.3V6K

12

PC511

0.033U_0 402_16V7K

+0.75VSP

PR510

0_0402_ 5%

PJP501

1 2

PAD-OPEN 4x4m

PJP502

+1.5VP

+0.75VSP

A A

1 2

PAD-OPEN 4x4m

PJP503

1 2

PAD-OPEN 3x3m

5

(9A,360mils ,Via NO.= 18)

+1.5V

(2A,80mils ,Via NO.= 4)

+0.75VS

4

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2011/07/ 29

3

SUSP#37,39

Compal Secret Data

0_0402_ 5%

Deciphered Date

12

PC515

@P C515

@

0.1U_040 2_10V7K

Compal Electronics, Inc.

2012/07/ 29

2

Title

Size Docu ment Number Rev

Date: Sheet of

Compal Electronics, Inc.

PWR-1.5VP / +0.75VSP

Wednesday, October 19, 2011

QML70 LA-8371P

1

44 51

0.01Custom

5

D D

PL801

HCB1608KF-121T30_0603

+5VALW

FCH_1.1PWR_EN37

C C

1 2

22U_0805_6.3V6M

PR801

1 2

0_0402_5%

ISS355_SOD323-2

1 2

PD801

@PD801

@

PC801

@PC801

@

EN_1.1V

12

1.1V_B+

12

PC802

PC802 22U_0805_6.3V6M

22U_0805_6.3V6M

12

PR803

@

47K_0402_5%

4

SY8036DBC_DFN10_3X3

4

PU801

10

PVIN

PG

9

PVIN

8

SVIN

5

EN

TP

SS

7

11

12

PC807

@

0.1U_0402_10V7K

2

LX

3

LX

6

FB

LX

1

10K_0402_1%

PR805

LX_+1.1V

FB_+1.1V

PR804

8.45K_0402_1%

PC808

12

PC808

22P_0402_50V8J

3

0.47UH_FDVE0630-H-R47M=P3_17.7A_20%

1 2

12

SNUB_+1.1V

12

+1.1VALWP

PR802

PC809

PL802

4.7_1206_5%

680P_0603_50V7K

2

1

+1.1VALWP

12

PC803

22U_0805_6.3V6M

12

PC806

PC805

PC804

22U_0805_6.3V6M

PJP801

1 2

PAD-OPEN 4x4m

B B

A A

5

4

+1.1VALW+1.1VALWP

+1.1VALWP Iocp=4.94A

(6A,240mils ,Via NO.= 12)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/29

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet of

Compal Electronics, Inc.

+1.1VALWP

QML70 LA-8371P

45 51Wednesday, October 19, 2011

1

0.01

5

4

3

+1.2VSP_ B+

2

PL701

HCB1608 KF-121T30_060 3

12

1

B+

12

PC703

5

PQ701

D D

PR702

2.2_0603 _5%

PU701

PR703

0.1U_0402_16V7K

1 2

TRIP_+1.2V SP

EN_+1.2V SP

FB_+1.2V SP

RF_+1.2V SP

12

470K_04 02_1%

PR708

PR708 10K_040 2_1%

10K_040 2_1%

PR705

1 2

27.4K_04 02_1%

1 2

27.4K_04 02_1%

12

PC701

@PC701

@

PR701

VLDT_EN37,39

C C

PR701

0_0402_ 5%

1 2

PR710

47K_0402_1%

@

1

2

3

4

5

PR707

7.15K_04 02_1%

VBST

PGOOD

TRIP

DRVH

EN

SW

V5IN

VFB

DRVL

RF

TPS5121 2DSCR_SON10_ 3X3

@

PC710

12

1000P_0 402_50V7K

12

BST_+1.2 VSP

10

UG_+1.2V SP

9

SW_+ 1.2VSP

8

+1.2VSP_ 5V

7

LG_+1.2V SP

6

11

TP

@

PR706

12

1.2K_040 2_1%

1 2

0_0402_ 5%

1 2

0.1U_060 3_25V7K

PR711

12

PC707

PC707 1U_0603 _6.3V6M

1U_0603 _6.3V6M

PC706

+5VALW

4

PQ701

SIS412DN-T 1-GE3_POWE RPAK8-5

123

5

PQ702

123

FDMC7692S_MLP8-5

1UH_ETQ P3W1R0W FN_11.8A_20 %

12

PR704

@P R704

@

4.7_1206 _5%

12

PC709

@P C709

@

1000P_0 603_50V7K

PC703

PC702

0.1U_0402_25V6

PL702

1 2

12

PC704

10U_0805_25V6K

2200P_0402_50V7K

10U_0805_25V6K

+1.2VSP

1

+

PC708

2

330U_D2_2.5VY_R15M

+1.2VSP

PJP701

2

JUMP_43 X118@

+1.2VSP Iocp=13A

112

+1.2VS

B B

PU702

APL5508 -25DC-TRL_SOT8 9-3

+3VS

PC711

1U_0603 _10V6K

A A

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

APL5508 -25DC-TRL_SOT8 9-3

2

12

2011/07/ 29

3

IN

GND

1

3

OUT

12

PC712

4.7U_0805_6.3V6K

Compal Secret Data

Deciphered Date

12

PR709

@P R709

@

10K_120 6_5%

+2.5VSP

2

PJP702

2

112

JUMP_43 X39@

(0.38A,20mils ,Via NO.=1)

Title

Size Docu ment Number Rev

Date: Sheet of

JUMP_43 X39@

Compal Electronics, Inc.

+1.2VSP/+2.5VSP

QML70 LA-8371P

+2.5VS+2.5VSP

46 51Wednesd ay, October 19, 20 11

1

0.01

A

PC202

@PC202

@

PR202

@PR202

@

2K_0402_1%

PR205

PR204

PR203

+APU_CORE_NB

1 1

10K_0402_5%_ERTJ0ER103J

2 2

3 3

4 4

1 2

10_0402_1%

APU_VDDNB_SEN8

2.61K_0402_1%

0.1U_0402_25V6

1 2

PC222

107K_0402_1%

H_PROCHOT#_EC8,37

1 2

+3VS

100K_0402_1%

PC225

1000P_0402_50V7K

1 2

PR237

107K_0402_1%

1 2

PR238

9.76K_0402_1%

PR203

PR206

0_0402_5%

1 2

@PC210

@

330P_0402_50V7K

VSUM+_NB

12

PR210

12

PH202

VSUM-_NB

12

PC215

PR221

9.76K_0402_1%

1000P_0402_50V7K

1 2

PR227

12

PR260

12

PR239

1 2

PH203

10K_0402_5%_ERTJ0ER103J

1000P_0402_50V7K

PC210

1 2

12

PR211

11K_0402_1%

PR222

27.4K_0402_1%

1 2

PH201

APU_PWRGD_L13

27.4K_0402_1%

12

470K_0402_5%_TSM0B474J4702RE

2.61K_0402_1%

0.1U_0402_25V6

A

PR204

137K_0402_1%

1 2

PR207

301_0402_1%

PC213

0.047U_0402_16V7K

+5VS

VSUM-

VSUM+

137K_0402_1%

12

0.1U_0402_25V6

649_0402_1%

1 2

@PR218

@

1 2

100_0402_1%

PR228

1 2

PR231

1 2

PR232

1 2

PR233

1 2

PR234

1 2

PR235

1 2

PR236

1 2

+5VS

12

PR246

12

1 2

PR217

PR218

0_0402_5%

@ PR240

@

1 2

11K_0402_1%

3.57K_0402_1%

PC204

1 2

12

PC212

12

470K_0402_5%_TSM0B474J4702RE

APU_SVC8

APU_SVD8

+1.5VS

APU_SVT8

VR_ON37

PR245

PH204

VSUM-

PC243

100P_0402_50V8J

0_0402_5%

1 2

12

PC203

390P_0402_50V7K

1 2

PC205

1 2

PC216

@PC216

@

1 2

220P_0402_50V7K

PR263

10K_0402_1%

1 2

1

2

3

4

5

6

7

8

9

10

11

12

PR240

PR264

10K_0402_1%@

1 2

12

PC236

PC239

0.22U_0402_10V6K

330P_0402_50V7K

PR208

@ PR208

@

32.4K_0402_1%

1 2

48

PU201

ISEN2_NB

NTC_NB

IMON_NB

SVC

VR_HOT_L

SVD

VDDIO

SVT

ENABLE

PWROK

IMON

NTC

13

ISEN2

1 2

PC232

12

0.022U_0402_16V7K

0.022U_0402_16V7K 590_0402_1%

590_0402_1%

1 2

PR254

@PR254

@

1 2

100_0402_1%

B

45

47

46

VSEN_NB

ISEN1_NB

ISUMP_NB

ISUMN_NB

ISL6277HRTZ-T_TQFN48_6X6

ISEN1

ISUMP

ISEN2

ISEN3

15

16

14

ISEN1

PC233

1 2

0.22U_0402_16V7K

PR251

PC244

@PC244

@

1 2

820P_0402_50V7K

1 2

10_0402_5%

B

44

43

FB_NB

ISUMN

17

18

12

PC241

@

PR255

0_0402_5%

PR257

COMP_NB

VSEN

1 2

FCCM_NB

42

41

FCCM_NB

PGOOD_NB

RTN

FB2

19

20

330P_0402_50V8J

1 2

12

PR219

41.2K_0402_1%

39

38

40

LGATEX

PHASEX

PWM2_NB

COMP

FB21PGOOD

22

23

PC237

1 2

1000P_0402_50V7K

PC245

0.01U_0402_50V7K

12

PR256

PR256 0_0402_5%

0_0402_5%

PR258

1 2

10_0402_5%

APU_VDD_SEN 8APU_VDD_RUN_FB_L8

37

UGATEX

BOOTX

VIN

BOOT2

UGATE2

PHASE2

LGATE2

VDDP

VDD

PWM_Y

LGATE1

PHASE1

UGATE1

BOOT1

24

49

BOOT1

1 2

PR249

1 2

2.74K_0402_1%

C

5

PQ201

PR243

0_0603_5%

UGATE1

PHASE1

BOOT1

LGATE1

PR226

12

1_0603_5%

1 2

12

VGATE 14,37

PR252

PC246

PR226

CPU_B+

0_0603_5%

1 2

PC224

0.22U_0603_50V7K

+5VS

PR201

PC226

1U_0603_16V6K

PC242

1 2

390P_0402_50V7K

1 2

C

12

PC227

PC227 1U_0603_16V6K

1U_0603_16V6K

PR253

@PR253

@

32.4K_0402_1%

2011/07/29

36

35

BOOT2

34

UGATE2

33

PHASE2

32

LGATE2

31

30

29

PWM_Y

28

LGATE1

27

PHASE1

26

UGATE1

25

TP

+3VS

12

PR259

PR259 100K_0402_1%

100K_0402_1%

PC235

1 2

10P_0402_50V8J

PC240

PR247

301_0402_1%

+APU_CORE

PC240

1 2

100P_0402_50V8J

PR250

1 2

137K_0402_1%

@PR252

@

2K_0402_1%

1 2

@PC246

@

680P_0402_50V7K

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

0_0603_5%

1 2

PR209

2.2_0603_5%

1 2

PC211

0.22U_0603_25V7K

1

2

PWM_Y

3

4

ISL6208BCRZ-T_QFN8_2X2

Compal Secret Data

1 2

PU202

UGATE

BOOT

PWM

GND

4

5

PQ202

4

UGATE2

PHASE2

BOOT2

LGATE2

PHASE

FCCM

VCC

LGATE

FCCM_NB

Deciphered Date

123

PR220

2.2_0603_5%

1 2

0.22U_0603_25V7K

8

7

6

5

PQ207

4

MDV1525URH_PDFN33-8-5

MDU1512RH 1N POWERDFN56-8

PR261

0_0603_5%

1 2

PC221

+5VS

12

PC234

1U_0603_16V6K

D

5

123

PQ203

4

PQ204

4

0_0603_5%

1 2

PR241

2.2_0603_5%

1 2

0.22U_0603_25V7K

D

MDV1525URH_PDFN33-8-5

PR262

5

PC231

1 2

CPU_B+

12

PC206

4.7U_0805_25V6-K

12

ISEN1 ISEN2

4.7_1206_5%

PR212

VSUM+

12

PC214

VSUM-

680P_0603_50V7K

PQ208

4

123

MDV1525URH_PDFN33-8-5

123

MDU1512RH 1N POWERDFN56-8

5

PQ205

4

5

PQ206

4

12

PC207

PC208

4.7U_0805_25V6-K

0.36UH_ETQP4LR36WHC_24A _20%

0.36UH_ETQP4LR36WHC_24A _20% PL202

PL202

1

2

PR213

10K_0402_1%

1 2

PR215

3.65K_0402_1%

1 2

PR216

PR216 1_0402_1%

1_0402_1%

1 2

5

123

MDV1525URH_PDFN33-8-5

12

4.7_1206_5%

PR223

12

PC223

680P_0603_50V7K

5

PQ209

4

123

Size Document Number Rev

Custom

Date: Sheet of

123

MDV1525URH_PDFN33-8-5

12

4.7_1206_5%

PR242

VSUM+_NB

12

PC238

VSUM-_NB

680P_0603_50V7K

MDU1512RH 1N POWERDFN56-8

Compal Electronics, Inc.

Title

Compal Electronics, Inc.

E

PL201

HCB2012KF-121T50_0805

1 2

PL205

HCB2012KF-121T50_0805

1

+

100U_25V_M

PC209

2

PC217

PR224

10K_0402_1%

ISEN2

1 2

PR229

3.65K_0402_1%

VSUM+

1 2

PR230

PR230 1_0402_1%

1_0402_1%

VSUM-

1 2

0.36UH_ETQP4LR36WHC_24A _20%

0.36UH_ETQP4LR36WHC_24A _20% PL204

PL204

MDV1525URH_PDFN33-8-5

PR244

3.65K_0402_1%

1 2

PR248

PR248 1_0402_1%

1_0402_1%

1 2

+CPU_CORE/VDDNBP

1 2

1

+

100U_25V_M

PC201

2

4

3

10K_0402_1%

1 2

4.7U_0805_25V6-K

0.36UH_ETQP4LR36WHC_24A _20%

12

PL203

1

2

PR214

PC218

4.7U_0805_25V6-K

1

2

CPU_B+

12

PC228

4.7U_0805_25V6-K

+APU_CORE

12

PC219

4.7U_0805_25V6-K

4

3

1 2

12

PC229

4

3

PR225

10K_0402_1%

NB_B+

12

4.7U_0805_25V6-K

+APU_CORE_NB

QML70 LA-8371P

47 51Wednesday, October 19, 2011

E

+APU_CORE

CPU_B+

12

PC230

10U_0805_25V6K

12

ISEN1

1 2

B+

PC299

@

PJP201

0.01

0.1U_0603_25V7K

PAD-OPEN 4x4m

5

4

3

2

1

+APU_CORE

12

PC247

D D

C C

PC247

22U_0805_6.3V6M

12

PC257

22U_0805_6.3V6M

12

PC273

0.22U_0402_16V7K

12

PC248

22U_0805_6.3V6M

12

PC258

22U_0805_6.3V6M

12

PC277

PC274

PC277

0.01U_0402_50V7K

0.22U_0402_16V7K

0.01U_0402_50V7K

12

PC249

22U_0805_6.3V6M

12

PC261

22U_0805_6.3V6M

12

PC263

@

22U_0805_6.3V6M

12

PC278

0.01U_0402_50V7K

12

PC250

22U_0805_6.3V6M

12

PC262

22U_0805_6.3V6M

12

PC264

@

22U_0805_6.3VAM

12

PC279

PC280

180P_0402_50V8J

0.01U_0402_50V7K

180P_0402_50V8J

12

PC251

22U_0805_6.3V6M

12

PC259

22U_0805_6.3V6M

12

PC265

@

22U_0805_6.3V6M

12

PC281

180P_0402_50V8J

+APU_CORE_NB

12

PC252

PC253

@

22U_0805_6.3V6M

capacitors under processor on bottom side of board

12

PC275

0.22U_0402_16V7K

+VGA_CORE

+VGA_CORE +VGA_CORE

+APU_CORE

Local

1

+

PC268

2

330U_D2_2V_Y

B B

1

+

PC269

2

330U_D2_2V_Y

1

+

PC270

2

330U_D2_2V_Y

1

+

PC271

2

330U_D2_2V_Y

12

PC931

PC932

10U_0603_6.3V6M

12

PC965

PC966

1U_0402_6.3V6K

12

PC944

PC945

1U_0402_6.3V6K

12

PC923

10U_0603_6.3V6M

12

PC964

1U_0402_6.3V6K

12

PC946

1U_0402_6.3V6K

+APU_CORE_NB

1

+

PC266

12

PC256

PC255

PC254

22U_0805_6.3V6M

12

PC276

0.22U_0402_16V7K

VDDC +VDDCI

+

12

PC924

10U_0603_6.3V6M

12

PC937

1U_0402_6.3V6K

12

PC947

1U_0402_6.3V6K

PC283

PC282

180P_0402_50V8J

12

PC925

PC926

10U_0603_6.3V6M

12

PC969

PC938

1U_0402_6.3V6K

12

PC948

PC949

1U_0402_6.3V6K

12

PC260

@

10U_0805_6.3V6K

22U_0805_6.3V6M

12

PC284

180P_0402_50V8J

12

PC927

PC928

10U_0603_6.3V6M

12

PC940

1U_0402_6.3V6K

12

PC950

1U_0402_6.3V6K

PC929

10U_0603_6.3V6M

12

PC941

PC942

1U_0402_6.3V6K

12

PC951

PC952

1U_0402_6.3V6K

2

330U_D2_2V_Y

12

PC933

10U_0603_6.3V6M

12

PC943

1U_0402_6.3V6K

12

PC953

1U_0402_6.3V6K

1

+

2

1

PJP902

1

JUMP_43 X79

@

2

PC934

1U_0402_6.3V6K

PC921

10U_0603_6.3V6M

Local

PC267

330U_D2_2V_Y

12

PC939

12

PC922

12

PC935

1U_0402_6.3V6K

12

PC930

10U_0603_6.3V6M

12

PC968

PC954

1U_0402_6.3V6K

12

+VDDCI

12

PC972

PC967

PC936

PC956

1U_0402_6.3V6K

12

PC973

1U_0402_6.3V6K

12

PC970

PC955

1U_0402_6.3V6K

A A

5

4

1U_0402_6.3V6K

12

PC971

PC957

1U_0402_6.3V6K

Security Class ification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PC958

PC959

1U_0402_6.3V6K

2011/07/ 29

3

12

PC960

1U_0402_6.3V6K

12

PC961

PC962

1U_0402_6.3V6K

Compal Secret Data

Deciphered Date

12

PC963

1U_0402_6.3V6K

Compal Electronics, Inc.

Title

Size Docu ment Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

PROCESSOR DECOUPLING

QML70 LA-8371P

48 51Wednesd ay, October 19, 20 11

1

0.01

A

PL901

PL901 HCB2012 KF-121T50_080 5

HCB2012 KF-121T50_080 5

1 2

B+

PC901

10U_0805_25V6K

1 1

VGA_PW RGD1 3,20

1.5_VDD_ PWREN20,26

2 2

+3VS

10K_040 2_1%

PR906

1 2

0_0402_ 5%

PR902

1 2

73.2K_04 02_1%

12

PC907

@

TRIP_VGA DH_VGA

PR903

EN_VGA

FB_VGA

RF_VGA

0.1U_0402_16V7K

PR908

PR908 470K_04 02_1%

470K_04 02_1%

1 2

10U_0805_25V6K

PU901

1

2

3

4

5

VBST

PGOOD

TRIP

DRVH

EN

SW

V5IN

VFB

DRVL

RF

TPS5121 2DSCR SON 10P

PR912

TP

1 2

17.8K_0402_1%

Rtrip = 73.2K, OCP = 34.42A

Rrf = 470K, FSW = 290KHz

3 3

For Whistler (Thames) 1/2Delta I=4.05A Vtrip=36.5K*10uA=0.365V Iocpmin=0.365V/(8*1.6m)+1/2Delta I=28.51A+4.05A =32.56A

VGA_PW R_ON20,26,43

Thames

4 4

GPU_VID0

Core Voltage Lev el

1

0

0.9V

1.0V

A

VGA_B+

12

10

9

8

7

6

11

PC902

10U_0805_25V6K

B

12

BST_VGA

LX_VGA

DL_VGA

VGA_PW R_ON

B

C

2200P_0402_50V7K

0.1U_0402_25V6

PC905

PC904

12

PC903

4.7U_0805_25V6-K

1 2

2.2_0603 _5%

PR905 0_ 0603_5%P R905 0_0603_5%

V5IN_VGA

2.2U_060 3_6.3V6K

Security Class ification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

PR904

BST1_VG A

12

PR901

1 2

0_0603_ 5%

1 2

PC909

PR910

23.7K_0402_1%

1 2

@

FB1_VGA

13

D

G

PQ905

S

@

SSM3K7002FU_SC70-3

PD901

@P D901

@

RB751V-4 0_SOD323-2

1 2

PR921

40.2K_04 02_1%

1 2

12

PR925

PR925 1K_0402 _5%

1K_0402 _5%

Issued Date

PC906

1 2

0.1U_060 3_25V7K

+5VALW

GPU_VID1_ 1

2

12

PC912

@

PC918

5

PQ901

4

123

MDV1525URH_PDFN33-8-5

5

PQ903

4

123

MDU1512RH 1N POWERDFN56-8

PR911

+3VSG

PR913

@P R913

@

10K_040 2_1%

PR915

@P R915

@

5.1K_040 2_1%

1 2

0.1U_0402_16V7K

PR920

0_0402_ 5%

12

0.1U_0603_25V7K

2011/07/ 29 2012/07/29

PR916

@P R916

@

10K_040 2_5%

+5VALW

12

PR923

PR923 47K_040 2_5%

47K_040 2_5%

1 2

GPU_VID119

1 2

12

PU902

7

POK

8

EN

PR911

PQ906

SSM3K70 02FU_SC70-3

+5VALW

PC914

PC914 1U_0402 _6.3V6K

1U_0402 _6.3V6K

6

5

VIN

4

VOUT

VCNTL

3

VOUT

2

FB

9

VIN

GND

APL5912 -KAC-TRL_SO8

1

Compal Secret Data

Deciphered Date

D

S

PQ904

1 2

FB0_VGA

13

C

PQ902

4

35.7K_0402_1%

GPU_VID0_ 1

2

G

5

123

5

123

PR919

1 2

5.1K_040 2_1%

12

PC913

MDV1525URH_PDFN33-8-5

MDU1512RH 1N POWERDFN56-8

1 2

0.1U_0402_16V7K

+1.5V

12

1.15K_04 02_1%

4.53K_04 02_1%

PL902

1 2

12

PR907

4.7_1206 _5%

SNUB_VGA

12

PC911

680P_04 02_50V7K

+3VSG

PR914

10K_0402_1%

12

PL902

+VGA_CO RE1

1 2

PR918

@P R918

@

10K_040 2_5%

1 2

12

PC916

0.01U_04 02_25V7K

12

GPU_VID019

PC917

0.36UH_P DME104T-R36MS 0R825_37A_20 %

PR917

5.1K_040 2_1%

PC915

4.7U_080 5_6.3V6K

PR922

PR924

+VGA_PCIEP +1.0VSG

Title

Size Docu ment Number Rev

Date: Sheet of

D

1

+

PC919

2

330U_D2_2V_Y

PR909

100_040 2_1%

1

+

PC920

2

12

1

+

PC974

PC910

2

0.1U_0402_10V7K

330U_D2_2V_Y

PR924 4.53K

+VGA_PC IEP

12

22U_0805_6.3V6M

PJP901

2

112

JUMP_43 X79

@

Compal Electronics, Inc.

VGA_CORE

QML70 LA-8371P

D

+VGA_CO RE

1

+

PC984

2

330U_D2_2V_Y

GCORE_S EN 22

1.0VVGA_PCIE

330U_D2_2V_Y

1.1 V

3K

0.01

49 51Wednesd ay, October 19, 20 11

V ersio n C ha nge L ist ( P . I. R . List ) fo r P ow er C ircuit

V ersio n C ha nge L ist ( P . I. R . List ) fo r P ow er C ircuitV ersio n C ha nge L ist ( P . I. R . List ) fo r P ow er C ircuit

R e q u est

P a g e#

P a g e#P ag e#

T itle

T itleTit l e

D ate

D ateD ate

R e q u estR eq ue st

O w ne r

O w ne rO wn er

Iss ue D escri ptio n

Iss ue D escri ptio nI ssue De scrip tio n

So lu t io n D e s c rip tion

So lu t io n D e s c rip tionS o lution D es c ription

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRITT EN CONSENT OF COMPAL ELECTRONICS, INC .

2011/07/29

Compal Secret Data

Deciphered Date

2012/07/29

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Wednesday, October 19, 2011

Date: Sheet of

Power PIR

QML70 LA-8371P

50 53

0.2

5

4

3

2

Version change list (P.I.R. List) Page 1 of 2 for HW

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

Reserve pull-up / pull-down resistor 100ohm on GCORE_SEN

1

D D

2

3

4

These components are for VGA

5

6

For EMI request 0.02 15 Reserve R559, R561, C624, C625 @ FCH_SDCLK / FCH_SDWP

0.02

7

8

9

C C

10

11

12

Set PCIE FULL TX OUTPUT SWING to High (Full Swing)

0.02 23 Reserve pull-high and pull-down resistor of MAA14/MBB14

0.02 21 Modify U7.U13, U7.14 to NCBase on Thames M2 datasheet

0.02

13

14

0.02

15

16

17

B B

18

19

20

21

0.03 31 Modify Analog Microhpone circut base on Vendor suggestion

0.03 22

0.03 17 Change decoupling cap. base on FCH check list 09/06 SR

0.03 27 Change LVDS translator to RTD2136 09/06 SR

0.03 28 Add pull-up resistor R129, R132 (2.2K) of FCH_CRT_DDC_SDA / SCL 09/06 SR

0.03

22

23

24

25

A A

26

27

5

4

0.03 37 Change Board ID, R398: 0ohm

0.03 34 Change Power source of ODD from +5VS to +5VALW

0.03 33 Change Power source of WLAN from +3VALW to +3VS

0.03 32 09/09 SRAdd power source for none Card Reader IC solution

22Base on GPU Reference schematic

15

26 Change Q91.2 from 1.5_VDDC_PWREN# to 1.5VSG_PWREN#

26 Change BOM Structure of R349, R350, R354, R355, Q95, Q96 to PX@

Change pull-up voltage of APU_RST#, APU_PWRGD, APU_SVT, APU_SVC, APU_SVD,

8Base on AMD Comal CRB

ALERT_L, ALLOW_STOP from +1.5V to +1.5VS

Remove USB3.0 Host contorller circuit0.02 36

170.02 Remove componets of HUDSON_M2

190.02 Modify GPU Straps: GPU_GPIO0 pull-high

Add THM_ALERT# to from U7.AG30 (GPU_THERMAL INT) to U34.6 (ADM1032)

19

Add GPU_CTF from U7.AM17 (GPU_CTF) to U72.97 (EC)

310.02 Reserve Analog mircophone circuit

9,

Change contorl singal of 1.1VALWP from SPOK to FCH_1.1PWR_EN

39,45

Change +1.1V_FCH to +1.1VALW

Connect U72.92 (EC) to U2.V1 (FCH)for SYS ROM Write Protect15,370.02

350.02 Co-lay AI Charger

Add decoupling cap. base on GPU check list 09/06 SR

13 Change R99 to 22ohm (CLK_SD_48M) 09/07 SR

Pull-down PEG_CLKREQ#0.03 14

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR1

08/30 SR0.02

08/30 SRModify Netname of SPI signal of U5

08/30 SR

09/01

09/02

09/05 SR

09/08

09/08SRSR

09/09

09/09SRSR

QML70 LA-8371P

1

SR

0.2

51 53Wednesday, October 19, 2011

0.2

5

4

3

2

Version change list (P.I.R. List) Page 2 of 2 for HW

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

D D

2

3

4

5

6

7

8

9

C C

10

11

12

0.2

Change U5 power from +3V_PCH to +3V_FCH15

15 Change GBE_MDIO pull-up voltage from +3VALW to +3V_FCH

25 SWAP QSB7 and QSB#7Blue Screen after install VGA Driver

Delete Net SDCD, SDWP# that connect to EC

32

Add MOSFET inverter of SDWP#

Un-mount pull-high resistor of APU_SVT, APU_SVC, APU_SVD

8

Follow QCL70 pin define

28

38 Modify Touch Pad pin define

Change pull-high voltage of APU_PROCHOT#, APU_THERMTRIP#, APU_SVT, APU_SVC,

8For voltage leakage

APU_SVD, ALERT_L, ALLOW_STOP, APU_RST#, APU_PWRGD, APU_SIC, APU_SID

24, 25 Change R299, R300, R309, R310, R319, R320, R325, R326 from 56ohm to 40.2ohmBase on AMD recommend

22 Seperate VDDC and VDDCI of VGA 10/14 SR2

Reserve R611, R612 for MAA14, MAB1423 10/14 SR2

10/11 SR20.2

10/11

10/13 SR237 Change Board ID to "1" for SR2

SR2

13

14

15

16

17

B B

18

19

20

21

22

23

24

25

A A

26

27

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COM PAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFER ED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2011/07/29 2012/07/29

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

HW-PIR2

QML70 LA-8371P

1

52 53Wednesday, October 19, 2011

0.2

ASUS K75D Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual