ASUS K52N Schematics
5
4
3
2
1
1.5A
U0301A
CPU_VLDT CPU_VLDT
D D
HT_CPU_RXD[0..15]10 HT_CPU_TXD[0..15] 10
HT_CPU_RXD#[0..15]10
C C
HT_CPU_RX_CLK010
HT_CPU_RX_CLK#010
HT_CPU_RX_CLK110
HT_CPU_RX_CLK#110
HT_CPU_RX_CT L010
HT_CPU_RX_CT L#010
HT_CPU_RX_CT L110
HT_CPU_RX_CT L#110
B B
HT_CPU_RXD0
HT_CPU_RXD#0
HT_CPU_RXD1
HT_CPU_RXD#1
HT_CPU_RXD2
HT_CPU_RXD#2
HT_CPU_RXD3
HT_CPU_RXD#3
HT_CPU_RXD4
HT_CPU_RXD#4
HT_CPU_RXD5
HT_CPU_RXD#5
HT_CPU_RXD6
HT_CPU_RXD#6
HT_CPU_RXD7
HT_CPU_RXD#7
HT_CPU_RXD8
HT_CPU_RXD#8
HT_CPU_RXD9
HT_CPU_RXD#9
HT_CPU_RXD10
HT_CPU_RXD#10
HT_CPU_RXD11
HT_CPU_RXD#11
HT_CPU_RXD12
HT_CPU_RXD#12
HT_CPU_RXD13
HT_CPU_RXD#13
HT_CPU_RXD14
HT_CPU_RXD#14
HT_CPU_RXD15
HT_CPU_RXD#15
HT_CPU_RX_CLK0
HT_CPU_RX_CLK#0
HT_CPU_RX_CLK1
HT_CPU_RX_CLK#1
HT_CPU_RX_CT L0
HT_CPU_RX_CT L#0
HT_CPU_RX_CT L1
HT_CPU_RX_CT L#1
+1.1VS
1MM_OPEN_5MIL
1MM_OPEN_5MIL
JP301
JP301
2
112
12
c0805_h37
c0805_h37
12
C0302
C0302
c0805_h37
c0805_h37
10UF/6.3V
10UF/6.3V
GND
c0805_h37
c0805_h37
12
C0303
C0303
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
Place close to socket
A A
12
C0304
C0304
0.1UF/16V
0.1UF/16V
* If VLDT is connected only on one side,
one 4.7uF cap should be added to
the island side
5
C0305
C0305
12
C0306
C0306
0.1UF/16V
0.1UF/16V
4
12
C0308
C0308
180PF/50V
180PF/50V
U0301A
D1
VLDT_A2
D2
VLDT_A3
D3
VLDT_A1
D4
VLDT_A4
E3
L0_CADIN_H[0]
E2
L0_CADIN_L[0]
E1
L0_CADIN_H[1]
F1
L0_CADIN_L[1]
G3
L0_CADIN_H[2]
G2
L0_CADIN_L[2]
G1
L0_CADIN_H[3]
H1
L0_CADIN_L[3]
J1
L0_CADIN_H[4]
K1
L0_CADIN_L[4]
L3
L0_CADIN_H[5]
L2
L0_CADIN_L[5]
L1
L0_CADIN_H[6]
M1
L0_CADIN_L[6]
N3
L0_CADIN_H[7]
N2
L0_CADIN_L[7]
E5
L0_CADIN_H[8]
F5
L0_CADIN_L[8]
F3
L0_CADIN_H[9]
F4
L0_CADIN_L[9]
G5
L0_CADIN_H[10]
H5
L0_CADIN_L[10]
H3
L0_CADIN_H[11]
H4
L0_CADIN_L[11]
K3
L0_CADIN_H[12]
K4
L0_CADIN_L[12]
L5
L0_CADIN_H[13]
M5
L0_CADIN_L[13]
M3
L0_CADIN_H[14]
M4
L0_CADIN_L[14]
N5
L0_CADIN_H[15]
P5
L0_CADIN_L[15]
J3
L0_CLKIN_H[0]
J2
L0_CLKIN_L[0]
J5
L0_CLKIN_H[1]
K5
L0_CLKIN_L[1]
N1
L0_CTLIN_H[0]
P1
L0_CTLIN_L[0]
P3
L0_CTLIN_H[1]
P4
L0_CTLIN_L[1]
HT LINK
HT LINK
SOCKET638
SOCKET638
Change P/N to 12G011306380
071113
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
L0_CADOUT_H[0]
L0_CADOUT_L[0]
L0_CADOUT_H[1]
L0_CADOUT_L[1]
L0_CADOUT_H[2]
L0_CADOUT_L[2]
L0_CADOUT_H[3]
L0_CADOUT_L[3]
L0_CADOUT_H[4]
L0_CADOUT_L[4]
L0_CADOUT_H[5]
L0_CADOUT_L[5]
L0_CADOUT_H[6]
L0_CADOUT_L[6]
L0_CADOUT_H[7]
L0_CADOUT_L[7]
L0_CADOUT_H[8]
L0_CADOUT_L[8]
L0_CADOUT_H[9]
L0_CADOUT_L[9]
L0_CADOUT_H[10]
L0_CADOUT_L[10]
L0_CADOUT_H[11]
L0_CADOUT_L[11]
L0_CADOUT_H[12]
L0_CADOUT_L[12]
L0_CADOUT_H[13]
L0_CADOUT_L[13]
L0_CADOUT_H[14]
L0_CADOUT_L[14]
L0_CADOUT_H[15]
L0_CADOUT_L[15]
L0_CLKOUT_H[0]
L0_CLKOUT_L[0]
L0_CLKOUT_H[1]
L0_CLKOUT_L[1]
L0_CTLOUT_H [0]
L0_CTLOUT_L [0]
L0_CTLOUT_H [1]
L0_CTLOUT_L [1]
CPU_VLDT
12
C0307
C0307
180PF/50V
180PF/50V
GND
AE2
AE3
AE4
AE5
HT_CPU_TXD0
AD1
HT_CPU_TXD#0
AC1
HT_CPU_TXD1
AC2
HT_CPU_TXD#1
AC3
HT_CPU_TXD2
AB1
HT_CPU_TXD#2
AA1
HT_CPU_TXD3
AA2
HT_CPU_TXD#3
AA3
HT_CPU_TXD4
W2
HT_CPU_TXD#4
W3
HT_CPU_TXD5
V1
HT_CPU_TXD#5
U1
HT_CPU_TXD6
U2
HT_CPU_TXD#6
U3
HT_CPU_TXD7
T1
HT_CPU_TXD#7
R1
HT_CPU_TXD8
AD4
HT_CPU_TXD#8
AD3
HT_CPU_TXD9
AD5
HT_CPU_TXD#9
AC5
HT_CPU_TXD10
AB4
HT_CPU_TXD#10
AB3
HT_CPU_TXD11
AB5
HT_CPU_TXD#11
AA5
HT_CPU_TXD12
Y5
HT_CPU_TXD#12
W5
HT_CPU_TXD13
V4
HT_CPU_TXD#13
V3
HT_CPU_TXD14
V5
HT_CPU_TXD#14
U5
HT_CPU_TXD15
T4
HT_CPU_TXD#15
T3
HT_CPU_TX_CLK0
Y1
HT_CPU_TX_CLK#0
W1
HT_CPU_TX_CLK1
Y4
HT_CPU_TX_CLK#1
Y3
HT_CPU_TX_CT L0
R2
HT_CPU_TX_CT L#0
R3
HT_CPU_TX_CT L1
T5
HT_CPU_TX_CT L#1
R5
HT_CPU_TX_CLK0 10
HT_CPU_TX_CLK#0 10
HT_CPU_TX_CLK1 10
HT_CPU_TX_CLK#1 10
HT_CPU_TX_CT L0 10
HT_CPU_TX_CT L#0 1 0
HT_CPU_TX_CT L1 10
HT_CPU_TX_CT L#1 1 0
Do not cross plane.
K26
J26
F26
G26
H26
D26
E26
G25
C25
F25
B25
K25
H25
E25
D25
J25
G24
A24
C24
F24
K24
H24
E24
B24
D24
J24
C23
G23
F23
H23
K23
A23
E23
J23
B23
D23
H22
F22
A22
K22
E22
J22
C22
G22
B22
D22
D21
H21
J21
F21
A21
K21
E21
C21
G21
B21
A20
F20
K20
E20
C20
J20
H20
B20
D20
A19
E19
H19
F19
K19
D19
C19
B19
A18
F18
G18
E18
H18
K18
D18
J18
C18
B18
G17
K17
H17
E17
F17
A17
J17
B17
D17
C17
K16
B16B3H16
E16
F16
A16
J16
D16
C16
G16
K15
A15
E15
D15
C15
G15
B15
F15
G14
J14
K14
E14
H14
A14
F14
D14
B14
C14
B13
K13
D13
J13
E13
H13
A13
F13
G13
C13
F12
C12
K12
E12
D12
H12
A12
G12
J12
B12
F11
H11
G11 AD11
C11
K11
D11
E11
J11
A11
B11 AB11
J10
G10
K10
F10
C10
D10
H10
B10
A10
E10
C9
K9
D9
J9
H9
F9
A9
E9
G9
B9
K8
H8
F8
D8
A8
C8
J8
B8
E8
B7
H7
K7
C7
D7
A7
F7
E7
J7
J6
G6
H6
D6
C6
K6
A6
B6
F6
E6
J5
K5
H5
D5
G5
A5
B5
C5
E5
H4
A4
D4
C4
B4
J4
F4
E4
K4
J3 W3
F3
E3
H3
A3
G3
C3
D2
H2
E2
C2
J2
G2
K2
F2
D1
E1
F1
H1
J1
C1
K1
G1
A1
BGA638_50_26SQ_S1G2_OEM
AB26
L26
Y26
U26
R26
N26
V26
M26C26
AA26
T26
P26
W26
AB25
U25
P25
L25
R25
AA25
Y25
N25
V25
T25
M25
W25
M24
AB24
P24
W24
L24
U24
N24
R24
V24
Y24
AA24
T24
M23
W23
U23
L23
R23
V23P23
T23
N23
AA23
AB23
Y23
U22
W22
L22
P22
V22
N22
AA22
T22
R22
Y22
M22
AB22
U21
W21
V21
P21
N21
L21
T21
AA21
R21
Y21
M21
AB21
N20
R20
AA20
V20
M20
U20
Y20
P20
AB20
L20
T20
U19N19
AA19
Y19
V19J19 P19
R19
M19
L19
AB19
P18
AA18
V18
U18
N18
W18
L18
Y18
R18
T18
M18
AB18
T17
P17
U17
W17
N17
L17
AA17
Y17
R17
V17
M17
AB17
T16
L16
AA16
R16
N16
M16
W16
V16
U16
Y16
P16
AB16
L15
AA15
Y15
W15
AB15J15
T15
U15
V15
T14
U14
L14
Y14
AB14
W14
V14
AA14
U13
AA13
L13
W13
Y13
V13
T13
AB13
T12
Y12
AA12
U12
W12
V12
L12
AB12
P11
T11
L11 AE11
AA11
U11
M11
N11
V11
R11
W11
Y11
L10
P10 AA10
U10
M10
Y10
W10
N10
R10
V10
T10 AE10
AB10
R9
L9
U9W8W9
N9 P9
V9
Y9
T9
M9
AA9
AB9
R8
L8
U8N8
M8
AA8
T8
V8
P8
AB8
L7
U7
N7
M7
P7
V7R6AA7
AB7
R7
T7
W7
N6
W6
P6
V6
M6
U6
AA6
Y6
L6
T6
AB6
W5
AA5
P5
R5
M5
V5
U5
Y5
N5K3F5
L5
AB5
T5
W4
N4
AA4
V4
M4
P4G4
R4
U4
L4
Y4
AB4
T4
L3
V3D3
AA3
Y3
P3
R3
T3
U3
M3
N3
AB3
R2 V2
U2
T2
P2
Y2
W2
AB2
M2
AA2
N2
L2
Y1
L1
M1
T1
V1
AA1
P1
W1
N1
AB1
U1
R1
3
AD26
AC26
AE25
AD25
AC25
AD24
AE24
AC24
AF24
AD23
AE23
AC23
AF23
AD22
AE22
AC22
AF22
AF21
AC21
AD21
AE21
AE20
AC20
AD20
AF20
AE19
AD19
AF19T19
AC19
AC18
AF18
AD18
AE18
AF17
AD17
AC17
AE17
AF16
AD16
AE16
AC16
AF15
AD15
AE15H15
AC15
AD14
AF14
AC14
AE14
AD13
AF13
AE13
AC13
AD12
AF12
AE12
AC12
AC11
AF11
AD10
AC10
AF10
AE9
AC9
AD9
AF9
AC8
AE8
AD8
AF8
AD7
AC7
AE7
AF7
AD6
AC6
AF6
AE6
AE5
AC5
AD5
AF5
AF4
AE4
AD4
AC4
AC3
AE3
AD3
AD2
AC2
AE2
AC1
AD1
HT_CPU_TXD#[0..15] 10
2
Griffin HT I/F
Griffin HT I/F
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
B
B
B
Monday, February 08, 2010
Date: Sheet of
Monday, February 08, 2010
Date: Sheet of
Monday, February 08, 2010
Date: Sheet
K52N
K52N
K52N
Engineer:
Griffin HT I/F
Vincent_Chiang
Vincent_Chiang
Vincent_Chiang
1
3 93
3 93
3 93
Rev
Rev
Rev
1.0
1.0
1.0
of
5
4
3
2
1
place close to socket
12
12
C0414
C0414
C0407
C0407
1000PF/16V
1000PF/16V
1000PF/16V
12
C0409
C0409
C0410
C0410
10UF/6.3V
10UF/6.3V
c0805_h37
c0805_h37
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT_SENSE
MB0_ODT[0]
MB0_ODT[1]
MB1_ODT[0]
MB0_CS_L[0]
MB0_CS_L[1]
MB1_CS_L[0]
MB_CLK_H[5]
MB_CLK_L[5]
MB_CLK_H[1]
MB_CLK_L[1]
MB_CLK_H[7]
MB_CLK_L[7]
MB_CLK_H[4]
MB_CLK_L[4]
MB_ADD[10]
MB_ADD[11]
MB_ADD[12]
MB_ADD[13]
MB_ADD[14]
MB_ADD[15]
MB_BANK[0]
MB_BANK[1]
MB_BANK[2]
CPU_M_VREF
sensing point for
op-amp feedback
routed near CPU
12
C0403
C0403
0.1UF/16V
0.1UF/16V
GND
1000PF/16V
c0805_h37
c0805_h37
VTT4
VTT5
VTT6
VTT7
VTT9
M_VREF
RSVD6
MB_CKE[0]
MB_CKE[1]
MB_ADD[0]
MB_ADD[1]
MB_ADD[2]
MB_ADD[3]
MB_ADD[4]
MB_ADD[5]
MB_ADD[6]
MB_ADD[7]
MB_ADD[8]
MB_ADD[9]
MB_RAS_L
MB_CAS_L
MB_WE_L
12
C0406
C0406
10UF/6.3V
10UF/6.3V
12
C0405
C0405
0.01UF/16V
0.01UF/16V
D D
+1.1VS
PLACE THEM CLOSE TO
CPU WITHIN 1"
+1.5V
MEM_MA_RESET#16
M_ODT016
M_ODT116
M_CS#016
M_CS#116
M_CKE016
C C
B B
M_CKE116
M_CLK_DDR016
M_CLK_DDR#016
M_CLK_DDR116
M_CLK_DDR#116
M_A_BS016
M_A_BS116
M_A_BS216
M_A_RAS#16
M_A_CAS#16
M_A_WE#16
JP0401
JP0401
1.75A
2
112
1MM_OPEN_5MIL
1MM_OPEN_5MIL
GND
T0402TPC28T T0402TPC28T
T0403TPC28T T0403TPC28T
R0401 39.2OHMR0401 39.2OHM
1 2
1 2
R0402 39.2OHMR0402 39.2OHM
MEM_MA_RESET#
MEM_MA1_ODT0
1
MEM_MA1_ODT1
1
M_ZP
M_ZN
Follow ref design Follow ref design
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
AD10
AF10
AE10
AA16
D10
C10
B10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
P19
P20
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
R20
R23
J21
R19
T22
T24
12
10UF/6.3V
10UF/6.3V
c0805_h37
c0805_h37
U0301B
U0301B
VTT2
VTT8
VTT3
VTT1
M_ZP
M_ZN
RSVD8
MA0_ODT[0]
MA0_ODT[1]
MA1_ODT[0]
MA1_ODT[1]
MA0_CS_L[0]
MA0_CS_L[1]
MA1_CS_L[0]
MA1_CS_L[1]
MA_CKE[0]
MA_CKE[1]
MA_CLK_H[5]
MA_CLK_L[5]
MA_CLK_H[1]
MA_CLK_L[1]
MA_CLK_H[7]
MA_CLK_L[7]
MA_CLK_H[4]
MA_CLK_L[4]
MA_ADD[0]
MA_ADD[1]
MA_ADD[2]
MA_ADD[3]
MA_ADD[4]
MA_ADD[5]
MA_ADD[6]
MA_ADD[7]
MA_ADD[8]
MA_ADD[9]
MA_ADD[10]
MA_ADD[11]
MA_ADD[12]
MA_ADD[13]
MA_ADD[14]
MA_ADD[15]
MA_BANK[0]
MA_BANK[1]
MA_BANK[2]
MA_RAS_L
MA_CAS_L
MA_WE_L
SOCKET638
SOCKET638
+1.5V
R0403
R0403
1KOhm
1KOhm
1 2
R0404
R0404
1KOhm
1KOhm
1 2
12
C0408
C0408
1000PF/16V
1000PF/16V
12
0.1UF/16V
0.1UF/16V
W10
AC10
AB10
AA10
A10
Y10
W17
B18
W26
W23
MEM_MB1_ODT0
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
12
12
C0411
C0411
0.1UF/16V
0.1UF/16V
VDDR_SENSE
MEM_MB_RESET#
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
C0401
C0401
180PF/50V
180PF/50V
C0412
C0412
1
1
12
12
C0413
C0413
0.1UF/16V
0.1UF/16V
GND
T0404 TPC28TT0404 TPC28T
M_CKE2 17
M_CKE3 17
M_B_BS0 17
M_B_BS1 17
M_B_BS2 17
M_B_RAS# 17
M_B_CAS# 17
M_B_WE# 17
12
C0402
C0402
180PF/50V
180PF/50V
GND
T0405 TPC28TT0405 TPC28T
MEM_MB_RESET# 17
M_ODT2 17
M_ODT3 17
M_CS#2 17
M_CS#3 17
M_B_A[15:0] 17M_A_A[15:0]16
C0404
C0404
180PF/50V
180PF/50V
CPU_M_VREF
M_CLK_DDR2 17
M_CLK_DDR#2 17
M_CLK_DDR3 17
M_CLK_DDR#3 17
M_B_DQ[63:0]17
To SODIMM socket 1
M_B_DM[7:0]17 M_A_DM[7:0] 16
Processor Memory Interface
U0301C
U0301C
MEM:DATA
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS#0
M_B_DQS1
M_B_DQS#1
M_B_DQS2
M_B_DQS#2
M_B_DQS3
M_B_DQS#3
M_B_DQS4
M_B_DQS#4
M_B_DQS5
M_B_DQS#5
M_B_DQS6
M_B_DQS#6
M_B_DQS7
M_B_DQS#7
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y11
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
M_A_DQS[7:0]16
M_A_DQS#[7:0]16
M_B_DQS#[7:0]17
M_B_DQS[7:0]17
MB_DATA[0]
MB_DATA[1]
MB_DATA[2]
MB_DATA[3]
MB_DATA[4]
MB_DATA[5]
MB_DATA[6]
MB_DATA[7]
MB_DATA[8]
MB_DATA[9]
MB_DATA[10]
MB_DATA[11]
MB_DATA[12]
MB_DATA[13]
MB_DATA[14]
MB_DATA[15]
MB_DATA[16]
MB_DATA[17]
MB_DATA[18]
MB_DATA[19]
MB_DATA[20]
MB_DATA[21]
MB_DATA[22]
MB_DATA[23]
MB_DATA[24]
MB_DATA[25]
MB_DATA[26]
MB_DATA[27]
MB_DATA[28]
MB_DATA[29]
MB_DATA[30]
MB_DATA[31]
MB_DATA[32]
MB_DATA[33]
MB_DATA[34]
MB_DATA[35]
MB_DATA[36]
MB_DATA[37]
MB_DATA[38]
MB_DATA[39]
MB_DATA[40]
MB_DATA[41]
MB_DATA[42]
MB_DATA[43]
MB_DATA[44]
MB_DATA[45]
MB_DATA[46]
MB_DATA[47]
MB_DATA[48]
MB_DATA[49]
MB_DATA[50]
MB_DATA[51]
MB_DATA[52]
MB_DATA[53]
MB_DATA[54]
MB_DATA[55]
MB_DATA[56]
MB_DATA[57]
MB_DATA[58]
MB_DATA[59]
MB_DATA[60]
MB_DATA[61]
MB_DATA[62]
MB_DATA[63]
MB_DM[0]
MB_DM[1]
MB_DM[2]
MB_DM[3]
MB_DM[4]
MB_DM[5]
MB_DM[6]
MB_DM[7]
MB_DQS_H[0]
MB_DQS_L[0]
MB_DQS_H[1]
MB_DQS_L[1]
MB_DQS_H[2]
MB_DQS_L[2]
MB_DQS_H[3]
MB_DQS_L[3]
MB_DQS_H[4]
MB_DQS_L[4]
MB_DQS_H[5]
MB_DQS_L[5]
MB_DQS_H[6]
MB_DQS_L[6]
MB_DQS_H[7]
MB_DQS_L[7]
SOCKET638
SOCKET638
MEM:DATA
MA_DATA[0]
MA_DATA[1]
MA_DATA[2]
MA_DATA[3]
MA_DATA[4]
MA_DATA[5]
MA_DATA[6]
MA_DATA[7]
MA_DATA[8]
MA_DATA[9]
MA_DATA[10]
MA_DATA[11]
MA_DATA[12]
MA_DATA[13]
MA_DATA[14]
MA_DATA[15]
MA_DATA[16]
MA_DATA[17]
MA_DATA[18]
MA_DATA[19]
MA_DATA[20]
MA_DATA[21]
MA_DATA[22]
MA_DATA[23]
MA_DATA[24]
MA_DATA[25]
MA_DATA[26]
MA_DATA[27]
MA_DATA[28]
MA_DATA[29]
MA_DATA[30]
MA_DATA[31]
MA_DATA[32]
MA_DATA[33]
MA_DATA[34]
MA_DATA[35]
MA_DATA[36]
MA_DATA[37]
MA_DATA[38]
MA_DATA[39]
MA_DATA[40]
MA_DATA[41]
MA_DATA[42]
MA_DATA[43]
MA_DATA[44]
MA_DATA[45]
MA_DATA[46]
MA_DATA[47]
MA_DATA[48]
MA_DATA[49]
MA_DATA[50]
MA_DATA[51]
MA_DATA[52]
MA_DATA[53]
MA_DATA[54]
MA_DATA[55]
MA_DATA[56]
MA_DATA[57]
MA_DATA[58]
MA_DATA[59]
MA_DATA[60]
MA_DATA[61]
MA_DATA[62]
MA_DATA[63]
MA_DM[0]
MA_DM[1]
MA_DM[2]
MA_DM[3]
MA_DM[4]
MA_DM[5]
MA_DM[6]
MA_DM[7]
MA_DQS_H[0]
MA_DQS_L[0]
MA_DQS_H[1]
MA_DQS_L[1]
MA_DQS_H[2]
MA_DQS_L[2]
MA_DQS_H[3]
MA_DQS_L[3]
MA_DQS_H[4]
MA_DQS_L[4]
MA_DQS_H[5]
MA_DQS_L[5]
MA_DQS_H[6]
MA_DQS_L[6]
MA_DQS_H[7]
MA_DQS_L[7]
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS#0
M_A_DQS1
M_A_DQS#1
M_A_DQS2
M_A_DQS#2
M_A_DQS3
M_A_DQS#3
M_A_DQS4
M_A_DQS#4
M_A_DQS5
M_A_DQS#5
M_A_DQS6
M_A_DQS#6
M_A_DQS7
M_A_DQS#7
M_A_DQ[63:0] 16
To SODIMM socket 0
A A
Griffin DDR2 MEMORY I/F
Griffin DDR2 MEMORY I/F
Griffin DDR2 MEMORY I/F
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
Vincent_Chiang
Vincent_Chiang
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
K52N
K52N
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
K52N
Monday, February 08, 2010
Monday, February 08, 2010
Monday, February 08, 2010
1
Vincent_Chiang
4 93
4 93
4 93
Rev
Rev
Rev
1.0
1.0
1.0
5
4
3
2
1
+1.5VS
D D
NB_ALLOW_LDTSTOP12,20
C C
+1.5V
12
R0517
R0517
1KOhm
1KOhm
RN0501C
RN0501C
300Ohm
300Ohm
CPU_PWRGD20
CPU_LDT_STOP#12,20
CPU_LDT_RST#20
+1.5V
08/11 change to 390OHM
R0502 390OhmR0502 390Ohm
1 2
R0503 390OhmR0503 390Ohm
1 2
12
R0504
R0504
1KOhm
1KOhm
TPC28T
TPC28T
T0535
T0535
1
1
T0536
T0536
TPC28T
TPC28T
RN0501B
RN0501B
RN0501D
RN0501D
300Ohm
300Ohm
300Ohm
300Ohm
5 6
7 8
R0501
R0501
1 2
CPU_SIC
CPU_SID
route as diff
pair
5/5/5,10mil
CPU_SVC 80
CPU_SVD 80
RN0501A
RN0501A
300Ohm
300Ohm
3 4
1 2
@
@
0Ohm
0Ohm
K52Dr
Serial VID Interface clock/data
B B
CPU_PWRGD
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#
CPU_LDT_REQ#_CPU
2008.03.04
add C503 optional to /X
5PF/50V
5PF/50V
1 2
C0503
C0503
SRC_CPU_HT_CLKP20,29
SRC_CPU_HT_CLKN20,29
080424
add R554 R555 R556
place them to CPU within 1.5"
CPU_VLDT
CPU_VDD0_RUN_FB_H80
CPU_VDD0_RUN_FB_L80
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
GND
keep trace fromresistor to
CPU within 0.6"
keep trace from caps to
CPU within 1.2"
C0501
C0501
12
3900PF/50V
3900PF/50V
C0507
C0507
12
3900PF/50V
3900PF/50V
20080716
20080716
GND
GND
CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
R0506 44.2OhmR0506 44.2Ohm
1 2
R0507 44.2OhmR0507 44.2Ohm
1 2
T0513 TPC28TT0513 TPC28T
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
U0301D
F10
AF4
AF5
AE6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
AB8
AF7
AE7
AE8
AC8
AF8
AA6
F8
F9
A9
A8
B7
A7
C6
R6
P6
F6
E6
Y6
G9
E9
E8
C2
A3
A5
B3
B5
C1
U0301D
VDDA2
VDDA1
CLKIN_H
CLKIN_L
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
SIC
SID
ALERT_L
HTREF0
HTREF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD7
RSVD10
RSVD2
RSVD11
RSVD9
R0505
R0505
169Ohm
169Ohm
1 2
CPU_LDT_REQ#_CPU
CPU_SIC
CPU_SID
CPU_TEST23
CPU_TEST18
CPU_TEST19
CPU_TEST25_H
CPU_TEST25_L
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
CPU_TEST9_ANALOGIN
CPU_TEST6_DIECRACKMON
1
CPU_CLK_H_C
CPU_CLK_L_C
CPU_HTREF0
CPU_HTREF1
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
0.25A
VDDA
SOCKET638
SOCKET638
KEY1
KEY2
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD4
RSVD3
RSVD1
RSVD5
RSVD12
M11
W18
A6
SVC
A4
SVD
AF6
AC7
AA8
W7
W8
W9
Y9
H6
G6
E10
AE9
TDO
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
GND
RN0502D
RN0502D
CPU_SVC
300Ohm
300Ohm
CPU_SVD
CPU_THRMTRIP#_1.8V
CPU_PROCHOT#
CPU_PROCHOT#
CPU_MEMHOT#_1.8V
CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L
CPU_VDDNB_RUN_FB_H
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H
CPU_TEST28_L
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST7_ANALOG_T
CPU_TEST10_ANALOGOUT
CPU_TEST8_DIG_T
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
放放
power
+1.5V
RN0502B
RN0502B
300Ohm
300Ohm
7 8
CPU_THRM_DC 50
CPU_THRM_DA 50
1
T0534 TPC28TT0534 TPC28T
1
T0533 TPC28TT0533 TPC28T
CPU_VDDNB_RUN_FB_H 80
1
1
1
1
1
20080719
100UF/6.3V
100UF/6.3V
RN0502C
RN0502C
300Ohm
300Ohm
3 4
1
1
T0524TPC28T T0524TPC28T
T0525TPC28T T0525TPC28T
T0528TPC28T T0528TPC28T
T0529TPC28T T0529TPC28T
T0530TPC28T T0530TPC28T
R0508
R0508
80.6Ohm
80.6Ohm
1%
1%
1 2
+2.5VS
R0518
C0504
C0504
@
@
R0518
1 2
12
GND
5 6
R0510
R0510
4.7KOhm
4.7KOhm
0Ohm
0Ohm
12
C0505
C0505
4.7UF/6.3V
4.7UF/6.3V
GND
12
12
E12
E12
Q0501
Q0501
PMBS3904
PMBS3904
0.1UF/10V
0.1UF/10V
B
B
C
C
C0508
C0508
R0509
R0509
4.7KOhm
4.7KOhm
C0502
C0502
1 2
3
3
VDDA
S1G4 does not support MEMHOT_L
T0522TPC28T T0522TPC28T
T0523TPC28T T0523TPC28T
12
12
C0506
C0506
0.01UF/16V
0.01UF/16V
0.1UF/16V
0.1UF/16V
BUF_PLT_RST# 20,30,45,53,68
GND
CPU_PROCHOT# 20
T0514 TPC28TT0514 TPC28T
T0515 TPC28TT0515 TPC28T
T0516 TPC28TT0516 TPC28T
T0517 TPC28TT0517 TPC28T
T0518 TPC28TT0518 TPC28T
T0519 TPC28TT0519 TPC28T
T0520 TPC28TT0520 TPC28T
T0521 TPC28TT0521 TPC28T
FORCE_OFF# 32,69,81
RN0502A
CPU_TEST25_L
CPU_TEST25_H
CPU_TEST22
CPU_TEST12
CPU_TEST21
CPU_TEST23
CPU_TEST15
CPU_TEST14
RN0502A
1 2
300Ohm
300Ohm
3 4
300Ohm
300Ohm
1 2
300Ohm
300Ohm
5 6
300Ohm
300Ohm
7 8
300Ohm
300Ohm
3 4
300Ohm
300Ohm
R0528 510OhmR0528 510Ohm
R0530 510OhmR0530 510Ohm
1 2
5 6
7 8
1 2
5 6
7 8
@
@
3 4
@
@
@
@
@
@
CPU_DBREQ#
CPU_TEST27
CPU_TEST20
CPU_TEST19
CPU_TEST18
CPU_TEST24
0103 change R0527 R0529 R0533 TO 300ohm
CPU_CLK_H_C
1
CPU_CLK_L_C
1
CPU_LDT_STOP#
1
CPU_PWRGD
1
CPU_VDD0_RUN_FB_H
1
CPU_VDD0_RUN_FB_L
1
CPU_VDD1_RUN_FB_H
1
CPU_VDD1_RUN_FB_L
1
+1.5V
RN0506B
RN0506B
RN0503A
RN0503A
RN0503C
RN0503C
RN0503D
RN0503D
RN0503B
RN0503B
GND
1 2
1 2
RN0506A
RN0506A
300Ohm
300Ohm
RN0506C
RN0506C
300Ohm
300Ohm
RN0506D
RN0506D
300Ohm
300Ohm
RN0505A
RN0505A
300Ohm
300Ohm
RN0505C
RN0505C
300Ohm
300Ohm
RN0505D
RN0505D
300Ohm
300Ohm
RN0505B
RN0505B
300Ohm
300Ohm
+1.5V
GND
to CPU
CPU_PROCHOT#
N/A
N/A
VRHOT#80
P0501
R0515
R0515
@
1 2
1 2
@
+1.5V
@
0Ohm
0Ohm
CPU_DBREQ#
0Ohm@0Ohm
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
CPU_LDT_RST#
CPU_PWRGD
A A
5
P0501
1
NC
3
DBREQ_L1
5
DBRDY1
7
DBREQ_L2
9
DBRDY2
11
DBREQ_L3
13
DBRDY3
15
DBREQ_L4
17
DBRDY4
19
DBREQ_L5
21
DBRDY5
23
DBREQ_L6
ASP_68200_07_K25
ASP_68200_07_K25
2
GND1
4
GND2
6
GND3
8
GND4
10
GND5
12
GND6
14
GND7
16
GND8
18
DBRDY7
20
DBREQ_L7
22
DBRDY6
24
GND9
26
GND10
@
@
4
+3VS +1.5V
12
R0514
R0514
10KOhm
10KOhm
@
@
@
@
C
C
3
3
PMBS3904
PMBS3904
12
B
B
Q0503
Q0503
@
@
R0513
R0513
10KOhm
10KOhm
E12
E12
CPU_LDT_RST#
3
EC to CPU/PWR
12
D0501 RB751V-40
D0501 RB751V-40
2N7002
2N7002
Q0502
Q0502
R0519
R0519
@
@
0Ohm
0Ohm
12
THRO_CPU 30
From EC.
PWRLIMIT# 30,88
Title :
Title :
Title :
Griffin CNTL/DEBUG/THERM
Griffin CNTL/DEBUG/THERM
Griffin CNTL/DEBUG/THERM
Engineer:
Engineer:
Engineer:
Vincent_Chiang
Vincent_Chiang
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
K52N
K52N
Date: Sheet of
Date: Sheet of
Date: Sheet of
K52N
Monday, February 08, 2010
Monday, February 08, 2010
Monday, February 08, 2010
1
Vincent_Chiang
5 93
5 93
5 93
Rev
Rev
Rev
1.0
1.0
1.0
32
3
3
D
D
1
1
1
G
G
S
S
2
2
GND
2
5
+CPU_VDD +CPU_VDD
D D
4A
+CPU_VDDNB
+CPU_VDD
12
C0612
C0612
22UF/6.3V
22UF/6.3V
+CPU_VDD
12
C0609
C0609
22UF/6.3V
22UF/6.3V
+CPU_VDDNB
+1.5V
3A
Bottom side decoupling Decoupling between Processor and
12
C0613
C0613
22UF/6.3V
22UF/6.3V
12
C0610
C0610
22UF/6.3V
22UF/6.3V
C C
B B
C0611
C0611
22UF/6.3V
22UF/6.3V
C0603
C0603
22UF/6.3V
22UF/6.3V
18A 18A
U0301E
U0301E
G4
VDD0_22
H2
VDD0_2
J9
VDD0_15
J11
VDD0_5
J13
VDD0_6
J15
VDD0_7
K6
VDD0_21
K10
VDD0_4
K12
VDD0_8
K14
VDD0_9
L4
VDD0_23
L7
VDD0_10
L9
VDD0_11
L11
VDD0_16
L13
VDD0_17
L15
VDD0_18
M2
VDD0_1
M6
VDD0_3
M8
VDD0_12
M10
VDD0_19
N7
VDD0_13
N9
VDD0_14
N11
VDD0_20
K16
VDDNB1
M16
VDDNB3
P16
VDDNB4
T16
VDDNB5
V16
VDDNB2
H25
VDDIO27
J17
VDDIO13
K18
VDDIO14
K21
VDDIO8
K23
VDDIO7
K25
VDDIO11
L17
VDDIO20
M18
VDDIO15
M21
VDDIO9
M23
VDDIO10
M25
VDDIO12
N17
VDDIO21
SOCKET638
SOCKET638
12
C0614
C0614
22UF/6.3V
22UF/6.3V
12
C0620
C0620
22UF/6.3V
22UF/6.3V
12
12
C0602
C0602
0.1UF/16V
0.1UF/16V
12
12
C0616
C0616
0.1UF/16V
0.1UF/16V
+CPU_VDD
VDD1_8
VDD1_20
VDD1_2
VDD1_9
VDD1_10
VDD1_21
VDD1_4
VDD1_25
VDD1_17
VDD1_24
VDD1_22
VDD1_23
VDD1_18
VDD1_19
VDD1_11
VDD1_12
VDD1_13
VDD1_26
VDD1_7
VDD1_14
VDD1_15
VDD1_16
VDD1_6
VDD1_3
VDD1_5
VDD1_1
VDDIO26
VDDIO25
VDDIO23
VDDIO24
VDDIO19
VDDIO18
VDDIO5
VDDIO6
VDDIO3
VDDIO17
VDDIO22
VDDIO4
VDDIO1
VDDIO2
VDDIO16
12
C0615
C0615
0.01UF/16V
0.01UF/16V
12
C0621
C0621
0.01UF/16V
0.01UF/16V
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
12
GND
12
GND
4
C0604
C0604
180PF/50V
180PF/50V
C0622
C0622
180PF/50V
180PF/50V
+1.5V
3
U0301F
U0301F
GND
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
F11
F13
F15
F17
F19
F21
F23
F25
H21
H23
B4
B6
B8
B9
D6
D8
D9
E4
F2
H7
H9
J4
VSS49
VSS128
VSS78
VSS75
VSS77
VSS79
VSS48
VSS39
VSS90
VSS93
VSS97
VSS129
VSS86
VSS85
VSS83
VSS82
VSS74
VSS40
VSS91
VSS94
VSS73
VSS87
VSS84
VSS88
VSS81
VSS80
VSS76
VSS122
VSS123
VSS124
VSS42
VSS119
VSS13
VSS20
VSS21
VSS23
VSS17
VSS18
VSS4
VSS92
VSS125
VSS41
VSS24
VSS19
VSS16
VSS22
VSS14
VSS15
VSS3
VSS7
VSS47
VSS45
VSS126
VSS1
VSS9
VSS10
VSS2
VSS11
VSS5
VSS12
VSS113
VSS89
VSS8
VSS6
VSS44
SOCKET638
SOCKET638
VSS30
VSS116
VSS115
VSS26
VSS27
VSS28
VSS29
VSS46
VSS35
VSS69
VSS31
VSS32
VSS33
VSS34
VSS120
VSS37
VSS98
VSS99
VSS100
VSS101
VSS36
VSS38
VSS52
VSS25
VSS102
VSS71
VSS54
VSS103
VSS104
VSS53
VSS72
VSS55
VSS56
VSS105
VSS106
VSS58
VSS107
VSS108
VSS57
VSS117
VSS118
VSS109
VSS110
VSS111
VSS112
VSS50
VSS63
VSS114
VSS127
VSS59
VSS60
VSS61
VSS62
VSS51
VSS70
VSS121
VSS64
VSS65
VSS66
VSS67
VSS68
VSS96
VSS95
VSS43
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
GND
2
DIMMs, Place close to Porcessor as
1
possible
place close to socket
+1.5V
C0625
C0625
22UF/6.3V
22UF/6.3V
12
C0624
C0624
22UF/6.3V
22UF/6.3V
12
12
12
C0607
C0607
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
c0805_h37
c0805_h37
c0805_h37
c0805_h37
C0605
C0605
12
C0606
C0606
10UF/6.3V
10UF/6.3V
c0805_h37
c0805_h37
12
C0627
C0627
1UF/6.3V
1UF/6.3V
12
C0626
C0626
1UF/6.3V
1UF/6.3V
12
C0619
C0619
0.1UF/16V
0.1UF/16V
GND
12
C0617
C0617
0.1UF/16V
0.1UF/16V
12
C0618
C0618
0.01UF/16V
0.01UF/16V
12
C0601
C0601
180PF/50V
180PF/50V
12
12
12
C0623
A A
C0628
C0628
22UF/6.3V
22UF/6.3V
22UF/6.3V
22UF/6.3V
5
C0623
22UF/6.3V
22UF/6.3V
GND
C0629
C0629
12
C0630
C0630
0.1UF/16V
0.1UF/16V
C0633
C0633
0.1UF/16V
0.1UF/16V
1 2
C0634
C0634
0.1UF/16V
0.1UF/16V
1 2
C0632
C0632
0.1UF/16V
0.1UF/16V
1 2
R1.1 100202_2 EMI REQUEST
4
C0631
C0631
0.1UF/16V
0.1UF/16V
1 2
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
K52N
K52N
K52N
Monday, February 08, 2010
Monday, February 08, 2010
Monday, February 08, 2010
Engineer:
1
Vincent_Chiang
Vincent_Chiang
Vincent_Chiang
6 93
6 93
6 93
Rev
Rev
Rev
1.0
1.0
1.0
Griffin POWER
Griffin POWER
Griffin POWER
Title :
Title :
Title :
Engineer:
Engineer:
Loading...