ASUS K50AA, k40aa Schematics
5
4
3
2
1
K40AA SCHEMATIC R1.2
D D
PAGE
Content
PAGE
SYSTEM PAGE REF.
SCHEMATIC INFORMATION
3
4
CPU-PENRYN(1)
5
CPU-PENRYN(2)
6
CPU CAP
7
DDR2 SO-DIMM_0
8
DDR2 SO-DIMM_1
9
DDR2 ADDRESS TERMINATION
10
NB_-CANTIGA--CPU (1)
NB_-CANTIGA--DDR2/PEG (2)
11
NB_-CANTIGA--DDR2 bus (3)
12
NB_-CANTIGA--POWER (4)
C C
B B
A A
13
NB_CANTIGA--POWER (5)
14
NB_-CANTIGA--GND/Strapping (6)
15
SB_-ICH9M--(1)-SATA,AUDIO,ACZ
20
SB_-ICH9M--(2)-PCI,PCI-E,USB
21
SB_-ICH9M--(3)-GPIO
22
SB_-ICH9M--(4)-PWR/GND
23
SB_-ICH9M--Other
24
SPI ROM
25
CLK-ICS9LPR363DGLF-T
29
EC-IT8512 (1)
30
EC-IT8512 (2)
31
32
POWER-ON SEQUENCE
33
PCI-E LAN_RTL8111C
RJ45
34
35
MDC
CODEC-ALC663
36
37
AUDIO_AMP-1431&HP
38
Microphone&Line-in
40
CARDBUS R5C833(PCI I/F)
41
CARDBUS R5C833(1394 & SD)
42
7 in 1 CARD READER
43
EXPRESS CARD
44
Debug
45
LVDS&INVERTER CONNECTOR
46
CRT
48
HDMI
50
Thermal Sensor
51
HDD & CDROM
52
USB Port X3
53
WLAN(MINI CARD)
56
LED & SW
57
DISCHARGE
58
ROBSON
60
DC & BAT IN
61
BLUE TOOTH
62
TPM & CAP sensor
63
Finger Print
65
SCREW HOLE & NUT & SPRING
66
E-SATA
69
History
70
VGA_nVIDIA_NB9X_PCIE
71
VGA_nVIDIA_NB9X_FB
72
VGA_nVIDIA_NB9X_Display
73
VGA_nVIDIA_NB9X_XTAL/Other
74
VGA_nVIDIA_NB9MGS_PCIE
75
VGA_nVIDIA_NB9X_GPIO
76
VGA_nVIDIA_NB9X_VRAM
77
VGA_nVIDIA_NB9X_VRAM
POWER PAGE REF.
80_POWER_VCORE
81_POWER_SYSTEM
82_POWER_I/O_1.5VS & 1.05VS
83_POWER_I/O_DDR & VTT
85_POWER_VGA_CORE & +1.1VO
87_POWER_SHUTDOWN#
88_POWER_CHARGER
90_POWER_PROTECT
91_POWER_LOAD SWITCH
92_POWER_PROTECT
93_POWER_SIGNAL
94_POWER_FLOWCHART
Content
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
1
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
194
of
194
of
194
Rev
Rev
Rev
1.00
1.00
1.00
Page Reference
Page Reference
Page Reference
Title :
Title :
Title :
Engineer:
Engineer:
5
4
3
2
1
K40AA Block Diagram
AMD
D D
GDDR2 64M*16 x8
CRT
PAGE 46
LVDS & INV
PAGE 45
PAGE 74, 75
ATI
M92/96
PAGE 70~76
FAN + SENSOR CPU VCORE
PCI-E x16
PAGE 50
S1G2 CPU
HT 3.0
2.6GHZ
AMD
RS780M
PAGE 3,4,5
PAGE 80
DDR2 800MHz
CLOCK GEN
ICS/9LPR363
Dual Channel DDR2
SO-DIMM x2
PAGE 7,8,9
PAGE 29
SYSTEM PWR
BAT & CHARGER
Other PWR
PAGE 82, 83, 84, 85, 90, 91, 92, 93, 94
PAGE 81
PAGE 88
C C
PAGE 10,11,12,13,14,15
A-LINK Interface
PCI 33MHz
LPC 33MHz
INTERNAL
KEYBOARD
BIOS SPI ROM
B B
PAGE 31
PAGE 31
OPAMP
PAGE 37
EC
ITE/IT8512
PAGE 30,31
Azalia Codec
HP&SPDIF OUT
MIC IN
PAGE 37
PAGE 38
VIA 1708S
PAGE 36, 37, 38, 39
SATA HDD
PAGE 51
Azalia
AMD
SB700
PAGE 20,21,22,23,24
SATA
USB
PCI-E x1
USB
USB
USB 2.0 CON x4
CMOS Camera
PAGE 52
PAGE 61
PAGE 45
PAGE 63
10/100/1000 LAN
Realtek RTL8112
NewCard
PAGE 33
PAGE 53
PAGE 43,44
RJ-45 CON
PAGE 34
A A
5
SATA ODD
4
PAGE 51
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
294
294
1
294
Rev
Rev
Rev
1.00
1.00
1.00
of
of
of
Block Diagram
Block Diagram
Block Diagram
Title :
Title :
Title :
Engineer:
Engineer:
5
4
3
2
1
D D
1.5A
U0301A
CPU_VLDT CPU_VLDT
HT_CPU_RXD0
HT_CPU_RXD#0
HT_CPU_RXD1
HT_CPU_RXD#1
HT_CPU_RXD2
HT_CPU_RXD#2
HT_CPU_RXD3
HT_CPU_RXD#3
HT_CPU_RXD4
HT_CPU_RXD#4
HT_CPU_RXD5
HT_CPU_RXD#5
HT_CPU_RXD6
HT_CPU_RXD#6
HT_CPU_RXD7
HT_CPU_RXD#7
HT_CPU_RXD8
C C
HT_CPU_RXD[0..15](10)
HT_CPU_RXD#[0..15](10)
HT_CPU_RX_CLK0(10)
HT_CPU_RX_CLK#0(10)
HT_CPU_RX_CLK1(10)
HT_CPU_RX_CLK#1(10)
HT_CPU_RX_CTL0(10)
HT_CPU_RX_CTL#0(10)
HT_CPU_RX_CTL1(10)
HT_CPU_RX_CTL#1(10)
B B
HT_CPU_RXD#8
HT_CPU_RXD9
HT_CPU_RXD#9
HT_CPU_RXD10
HT_CPU_RXD#10
HT_CPU_RXD11
HT_CPU_RXD#11
HT_CPU_RXD12
HT_CPU_RXD#12
HT_CPU_RXD13
HT_CPU_RXD#13
HT_CPU_RXD14
HT_CPU_RXD#14
HT_CPU_RXD15
HT_CPU_RXD#15
HT_CPU_RX_CLK0
HT_CPU_RX_CLK#0
HT_CPU_RX_CLK1
HT_CPU_RX_CLK#1
HT_CPU_RX_CTL0
HT_CPU_RX_CTL#0
HT_CPU_RX_CTL1
HT_CPU_RX_CTL#1
U0301A
HT LINK
D1
D2
D3
D4
E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5
J3
J2
J5
K5
N1
P1
P3
P4
HT LINK
VLDT_A2
VLDT_A3
VLDT_A1
VLDT_A4
L0_CADIN_H[0]
L0_CADIN_L[0]
L0_CADIN_H[1]
L0_CADIN_L[1]
L0_CADIN_H[2]
L0_CADIN_L[2]
L0_CADIN_H[3]
L0_CADIN_L[3]
L0_CADIN_H[4]
L0_CADIN_L[4]
L0_CADIN_H[5]
L0_CADIN_L[5]
L0_CADIN_H[6]
L0_CADIN_L[6]
L0_CADIN_H[7]
L0_CADIN_L[7]
L0_CADIN_H[8]
L0_CADIN_L[8]
L0_CADIN_H[9]
L0_CADIN_L[9]
L0_CADIN_H[10]
L0_CADIN_L[10]
L0_CADIN_H[11]
L0_CADIN_L[11]
L0_CADIN_H[12]
L0_CADIN_L[12]
L0_CADIN_H[13]
L0_CADIN_L[13]
L0_CADIN_H[14]
L0_CADIN_L[14]
L0_CADIN_H[15]
L0_CADIN_L[15]
L0_CLKIN_H[0]
L0_CLKIN_L[0]
L0_CLKIN_H[1]
L0_CLKIN_L[1]
L0_CTLIN_H[0]
L0_CTLIN_L[0]
L0_CTLIN_H[1]
L0_CTLIN_L[1]
SOCKET638
SOCKET638
Change P/N to 12G011306380
L0_CADOUT_H[0]
L0_CADOUT_L[0]
L0_CADOUT_H[1]
L0_CADOUT_L[1]
L0_CADOUT_H[2]
L0_CADOUT_L[2]
L0_CADOUT_H[3]
L0_CADOUT_L[3]
L0_CADOUT_H[4]
L0_CADOUT_L[4]
L0_CADOUT_H[5]
L0_CADOUT_L[5]
L0_CADOUT_H[6]
L0_CADOUT_L[6]
L0_CADOUT_H[7]
L0_CADOUT_L[7]
L0_CADOUT_H[8]
L0_CADOUT_L[8]
L0_CADOUT_H[9]
L0_CADOUT_L[9]
L0_CADOUT_H[10]
L0_CADOUT_L[10]
L0_CADOUT_H[11]
L0_CADOUT_L[11]
L0_CADOUT_H[12]
L0_CADOUT_L[12]
L0_CADOUT_H[13]
L0_CADOUT_L[13]
L0_CADOUT_H[14]
L0_CADOUT_L[14]
L0_CADOUT_H[15]
L0_CADOUT_L[15]
L0_CLKOUT_H[0]
L0_CLKOUT_L[0]
L0_CLKOUT_H[1]
L0_CLKOUT_L[1]
L0_CTLOUT_H[0]
L0_CTLOUT_L[0]
L0_CTLOUT_H[1]
L0_CTLOUT_L[1]
071113
VLDT_B1
VLDT_B2
VLDT_B3
VLDT_B4
AE2
AE3
AE4
AE5
HT_CPU_TXD0
AD1
HT_CPU_TXD#0
AC1
HT_CPU_TXD1
AC2
HT_CPU_TXD#1
AC3
HT_CPU_TXD2
AB1
HT_CPU_TXD#2
AA1
HT_CPU_TXD3
AA2
HT_CPU_TXD#3
AA3
HT_CPU_TXD4
W2
HT_CPU_TXD#4
W3
HT_CPU_TXD5
V1
HT_CPU_TXD#5
U1
HT_CPU_TXD6
U2
HT_CPU_TXD#6
U3
HT_CPU_TXD7
T1
HT_CPU_TXD#7
R1
HT_CPU_TXD8
AD4
HT_CPU_TXD#8
AD3
HT_CPU_TXD9
AD5
HT_CPU_TXD#9
AC5
HT_CPU_TXD10
AB4
HT_CPU_TXD#10
AB3
HT_CPU_TXD11
AB5
HT_CPU_TXD#11
AA5
HT_CPU_TXD12
Y5
HT_CPU_TXD#12
W5
HT_CPU_TXD13
V4
HT_CPU_TXD#13
V3
HT_CPU_TXD14
V5
HT_CPU_TXD#14
U5
HT_CPU_TXD15
T4
HT_CPU_TXD#15
T3
HT_CPU_TX_CLK0
Y1
W1
Y4
Y3
R2
R3
T5
R5
HT_CPU_TX_CLK#0
HT_CPU_TX_CLK1
HT_CPU_TX_CLK#1
HT_CPU_TX_CTL0
HT_CPU_TX_CTL#0
HT_CPU_TX_CTL1
HT_CPU_TX_CTL#1
HT_CPU_TX_CLK0 (10)
HT_CPU_TX_CLK#0 (10)
HT_CPU_TX_CLK1 (10)
HT_CPU_TX_CLK#1 (10)
HT_CPU_TX_CTL0 (10)
HT_CPU_TX_CTL#0 (10)
HT_CPU_TX_CTL1 (10)
HT_CPU_TX_CTL#1 (10)
Do not cross plane.
HT_CPU_TXD[0..15] (10)
HT_CPU_TXD#[0..15] (10)
+1.2VS
2009.01.02
del L0302
12
C0302
c0805_h37
c0805_h37
C0302
10UF/6.3V
10UF/6.3V
C0304
C0304
1UF/6.3V
1UF/6.3V
12
GND
A A
Place close to socket
* If VLDT is connected only on one side,
one 4.7uF cap should be added to
the island side
5
4
CPU_VLDT
12
C0305
C0305
1UF/6.3V
1UF/6.3V
GND
E26
T26
H26
F26
G26
K26
D26
J26
J25
E25
K25
B25
G25
C25
H25
F25
D25
D24
J24
B24
G24
A24
E24
H24
K24
C24
F24
B23
H23
E23
K23
C23
G23
J23
F23
A23
D23
G22
B22
J22
E22
A22
K22
H22
C22
F22
D22
G21
E21
F21
A21
K21
B21
D21
H21
J21
C21
H20
C20
J20
A20
B20
D20
E20
F20
B19
C19
E19
K19
A19
H19
F19
D19
C18
J18
G18
E18
A18
H18
B18
D18
F18
K18
C17
J17
F17
A17
D17
H17
G17
E17
B17
K17
C16
G16
J16
B16B3H16
F16
A16
E16
K16
D16
G15
C15
A15
E15
B15
F15
K15
D15
B14
E14
G14
J14
A14
H14
C14
F14
D14
K14
C13
H13
A13
J13
E13
F13
G13
K13
D13
B13
B12
J12
E12
H12
F12
C12
K12
A12
G12
D12
A11
J11
D11
F11
G11 AD11
E11
H11
C11
K11
B11 AB11
E10
A10
B10
D10
J10
G10
K10
H10
F10
C10
A9
E9
F9
J9
H9
G9
D9
B9
C9
E8
B8
C8
J8
F8
K8
A8
H8
D8
J7
A7
D7
E7
H7
B7
F7
K7
C7
E6
K6
F6
H6
J6
A6
D6
C6
B6
G6
E5
A5
B5
J5
K5
D5
H5
C5
G5
J4
B4
C4
D4
A4
F4
E4
K4
H4
C3
A3
E3
H3
J3 W3
G3
F3
E2
D2
J2
C2
F2
G2
H2
K2
H1
D1
F1
C1
K1
J1
E1
G1
A1
BGA638_50_26SQ_S1G2_OEM
3
V26
M26C26
N26
R26
P26
W26
L26
Y26
U26
AA26
T25
AA25
Y25
R25
V25
M25
L25
N25
W25
U25
P25
AA24
T24
Y24
R24
V24
P24
W24
N24
M24
L24
U24
AA23
W23
N23
M23
U23
L23
R23
V23P23
T23
Y23
M22
Y22
T22
AA22
U22
W22
P22
L22
R22
V22
N22
M21
Y21
AA21
L21
U21
W21
V21
T21
N21
R21
P21
L20
P20
N20
M20
U20
Y20
R20
AA20
V20K9K20
T20
M19
L19
Y19
U19N19
V19J19 P19
R19
AA19
Y18
W18
L18
P18
AA18
V18
U18
N18
R18
T18
M18
Y17
R17
L17
T17
P17
U17
N17
W17
V17
M17
AA17
Y16
U16
T16
L16
W16
M16
V16
P16
AA16
R16
N16
Y15
L15
W15
U15
V15
AA15
T15
AA14
Y14
T14
W14
U14
V14
L14
V13
Y13
T13
W13
U13
AA13
L13
V12
W12
T12
Y12
AA12
U12
L12
W11
V11
R11
M11
P11
T11
L11 AE11
N11
Y11
AA11
U11
V10
M10
Y10
R10
L10
W10
N10
T10 AE10
P10 AA10
U10
V9
L9
N9 P9
R9
M9
U9W8W9
Y9
T9
AA9
U8N8
M8
P8
L8
R8
V8
AA8
T8
R7
V7R6AA7
P7
L7
U7
N7
M7
T7
W7
Y6
U6
AA6
V6
N6
W6
P6
M6
L6
T6
Y5
U5
R5
W5
AA5
V5
M5
N5K3F5
L5
T5
P5
P4G4
Y4
L4
M4
W4
N4
AA4
R4
V4
T4
U4
N3
R3
V3D3
AA3
Y3
L3
T3
U3
P3
T2
Y2
M2M3AA2
R2 V2
N2
L2
U2
W2
P2
U1
W1
Y1
N1
R1
L1
M1
T1
V1
AA1
P1
AD26
AB26
AC26
AC25
AE25
AB25
AD25
AC24
AF24
AE24
AB24
AD24
AF23
AC23
AB23
AE23
AD23
AF22
AD22
AC22
AE22
AB22
AE21
AD21
AB21
AC21
AF21
AC20
AF20
AE20
AB20
AD20
AE19
AF19T19
AD19
AC19
AB19
AC18
AF18
AD18
AE18
AB18
AC17
AF17
AD17
AE17
AB17
AC16
AE16
AF16
AD16
AB16
AB15J15
AC15
AF15
AE15H15
AD15
AD14
AE14
AB14
AC14
AF14
AC13
AF13
AE13
AD13
AB13
AC12
AD12
AF12
AE12
AB12
AF11
AC11
AD10
AF10
AB10
AC10
AE9
AD9
AF9
AB9
AC9
AB8
AE8
AC8
AD8
AF8
AB7
AE7
AD7
AC7
AF7
AC6
AE6
AD6
AF6
AB6
AD5
AF5
AB5
AE5
AC5
AC4
AD4
AE4
AF4
AB4
AD3
AB3
AC3
AE3
AE2
AB2
AD2
AC2
AD1
AC1
AB1
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
Title :
Title :
Title :
1
Griffin HT I/F
Griffin HT I/F
Griffin HT I/F
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
394
of
394
of
394
Rev
Rev
Rev
1.00
1.00
1.00
5
4
3
2
1
place close to PROCESSOR within 1.5 inch place close to PROCESSOR within 1.5 inch
MEM_MA0_CLK_H7
12
0.75A
PLACE THEM CLOSE TO
CPU WITHIN 1"
D D
T0401 TPC28TT0401 TPC28T
T0402TPC28T T0402TPC28T
T0403TPC28T T0403TPC28T
MEM_MA0_CS#0(7,9)
MEM_MA0_CS#1(7,9)
MEM_MA_ADD[0..15](7,9)
C C
1KOhm
1KOhm
B B
1KOhm
1KOhm
c0805_h37
c0805_h37
A A
+1.8V
R0403
R0403
1%
1%
R0404
R0404
1%
1%
+1.8V
+0.9V
12
0.1UF/16V
0.1UF/16V
1
1 2
1 2
C0434
C0434
1
1
+0.9V
12
10UF/6.3V
10UF/6.3V
GND
MEM_MA1_ODT0
MEM_MA1_ODT1
MEM_MA_CKE0(7,9)
MEM_MA_CKE1(7,9)
MEM_MA0_CLK_H1
MEM_MA0_CLK_L1
MEM_MA0_CLK_H7
MEM_MA0_CLK_L7
MEM_MA_BANK0(7,9)
MEM_MA_BANK1(7,9)
MEM_MA_BANK2(7,9)
MEM_MA_RAS#(7,9)
MEM_MA_CAS#(7,9)
MEM_MA_WE#(7,9)
C0432
C0432
12
C0435
C0435
0.1UF/16V
0.1UF/16V
5
R0401 39.2OHMR0401 39.2OHM
1 2
1 2
R0402 39.2OHMR0402 39.2OHM
MEM_MA0_ODT0(7,9)
MEM_MA0_ODT1(7,9)
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
CPU_M_VREF
12
C0403
C0403
0.1UF/16V
0.1UF/16V
GND
12
10UF/6.3V
10UF/6.3V
GND
12
0.1UF/16V
0.1UF/16V
MEM_MA_RESET#
sensing point for
op-amp feedback
routed near CPU
c0805_h37
c0805_h37
C0433
C0433
12
C0436
C0436
0.1UF/16V
0.1UF/16V
GND
M_ZP
M_ZN
C0437
C0437
AD10
AF10
AE10
AA16
D10
C10
B10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
P19
P20
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
R20
R23
J21
R19
T22
T24
U0301B
U0301B
VTT2
VTT8
VTT3
VTT1
M_ZP
M_ZN
RSVD8
MA0_ODT[0]
MA0_ODT[1]
MA1_ODT[0]
MA1_ODT[1]
MA0_CS_L[0]
MA0_CS_L[1]
MA1_CS_L[0]
MA1_CS_L[1]
MA_CKE[0]
MA_CKE[1]
MA_CLK_H[5]
MA_CLK_L[5]
MA_CLK_H[1]
MA_CLK_L[1]
MA_CLK_H[7]
MA_CLK_L[7]
MA_CLK_H[4]
MA_CLK_L[4]
MA_ADD[0]
MA_ADD[1]
MA_ADD[2]
MA_ADD[3]
MA_ADD[4]
MA_ADD[5]
MA_ADD[6]
MA_ADD[7]
MA_ADD[8]
MA_ADD[9]
MA_ADD[10]
MA_ADD[11]
MA_ADD[12]
MA_ADD[13]
MA_ADD[14]
MA_ADD[15]
MA_BANK[0]
MA_BANK[1]
MA_BANK[2]
MA_RAS_L
MA_CAS_L
MA_WE_L
SOCKET638
SOCKET638
+0.9V
12
C0430
C0430
0.1UF/16V
0.1UF/16V
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT_SENSE
MB0_ODT[0]
MB0_ODT[1]
MB1_ODT[0]
MB0_CS_L[0]
MB0_CS_L[1]
MB1_CS_L[0]
MB_CKE[0]
MB_CKE[1]
MB_CLK_H[5]
MB_CLK_L[5]
MB_CLK_H[1]
MB_CLK_L[1]
MB_CLK_H[7]
MB_CLK_L[7]
MB_CLK_H[4]
MB_CLK_L[4]
MB_ADD[0]
MB_ADD[1]
MB_ADD[2]
MB_ADD[3]
MB_ADD[4]
MB_ADD[5]
MB_ADD[6]
MB_ADD[7]
MB_ADD[8]
MB_ADD[9]
MB_ADD[10]
MB_ADD[11]
MB_ADD[12]
MB_ADD[13]
MB_ADD[14]
MB_ADD[15]
MB_BANK[0]
MB_BANK[1]
MB_BANK[2]
MB_RAS_L
MB_CAS_L
MB_WE_L
12
C0431
C0431
0.1UF/16V
0.1UF/16V
GND
VTT4
VTT5
VTT6
VTT7
VTT9
M_VREF
RSVD6
W10
AC10
AB10
AA10
A10
VTT_SENSE
Y10
W17
MEM_MB_RESET#
B18
W26
W23
MEM_MB1_ODT0
Y26
V26
W25
U22
J25
H26
P22
R22
MEM_MB0_CLK_H1
A17
MEM_MB0_CLK_L1
A18
MEM_MB0_CLK_H7
AF18
MEM_MB0_CLK_L7
AF17
R26
R25
MEM_MB_ADD0
P24
MEM_MB_ADD1
N24
MEM_MB_ADD2
P26
MEM_MB_ADD3
N23
MEM_MB_ADD4
N26
MEM_MB_ADD5
L23
MEM_MB_ADD6
N25
MEM_MB_ADD7
L24
MEM_MB_ADD8
M26
MEM_MB_ADD9
K26
MEM_MB_ADD10
T26
MEM_MB_ADD11
L26
MEM_MB_ADD12
L25
MEM_MB_ADD13
W24
MEM_MB_ADD14
J23
MEM_MB_ADD15
J24
R24
U26
J26
U25
U24
U23
PLACE CLOSE TO CPU
MEM_MA_DQS[0..7](7)
MEM_MA_DQS#[0..7](7)
MEM_MB_DQS[0..7](8)
MEM_MB_DQS#[0..7](8)
4
+0.9V+0.9V
071115
1
T0417 TPC28TT0417 TPC28T
1
T0411 TPC28TT0411 TPC28T
MEM_MB_CKE0 (8,9)
MEM_MB_CKE1 (8,9)
MEM_MB_BANK0 (8,9)
MEM_MB_BANK1 (8,9)
MEM_MB_BANK2 (8,9)
MEM_MB_RAS# (8,9)
MEM_MB_CAS# (8,9)
MEM_MB_WE# (8,9)
09/23 2.0
T0410TPC28T T0410TPC28T
1
MEM_MB0_ODT0 (8,9)
MEM_MB0_ODT1 (8,9)
MEM_MB0_CS#0 (8,9)
MEM_MB0_CS#1 (8,9)
MEM_MB_ADD[0..15] (8,9)
CPU_M_VREF
MEM_MA0_CLK#1(7)
MEM_MB_DATA[0..63](8)
MEM_MB_DM[0..7](8) MEM_MA_DM[0..7] (7)
3
C0405 1.5PF/50V MLCC/+/-0.1PFC0405 1.5PF/50V MLCC/+/-0.1PF
MEM_MA0_CLK_L7
MEM_MA0_CLK_H1
12
C0406 1.5PF/50V MLCC/+/-0.1PFC0406 1.5PF/50V MLCC/+/-0.1PF
MEM_MA0_CLK_L1
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
To SODIMM socket 1
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
MEM_MB_DQS0
MEM_MB_DQS#0
MEM_MB_DQS1
MEM_MB_DQS#1
MEM_MB_DQS2
MEM_MB_DQS#2
MEM_MB_DQS3
MEM_MB_DQS#3
MEM_MB_DQS4
MEM_MB_DQS#4
MEM_MB_DQS5
MEM_MB_DQS#5
MEM_MB_DQS6
MEM_MB_DQS#6
MEM_MB_DQS7
MEM_MB_DQS#7
Processor Memory Interface
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y11
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
071114
U0301C
U0301C
MB_DATA[0]
MB_DATA[1]
MB_DATA[2]
MB_DATA[3]
MB_DATA[4]
MB_DATA[5]
MB_DATA[6]
MB_DATA[7]
MB_DATA[8]
MB_DATA[9]
MB_DATA[10]
MB_DATA[11]
MB_DATA[12]
MB_DATA[13]
MB_DATA[14]
MB_DATA[15]
MB_DATA[16]
MB_DATA[17]
MB_DATA[18]
MB_DATA[19]
MB_DATA[20]
MB_DATA[21]
MB_DATA[22]
MB_DATA[23]
MB_DATA[24]
MB_DATA[25]
MB_DATA[26]
MB_DATA[27]
MB_DATA[28]
MB_DATA[29]
MB_DATA[30]
MB_DATA[31]
MB_DATA[32]
MB_DATA[33]
MB_DATA[34]
MB_DATA[35]
MB_DATA[36]
MB_DATA[37]
MB_DATA[38]
MB_DATA[39]
MB_DATA[40]
MB_DATA[41]
MB_DATA[42]
MB_DATA[43]
MB_DATA[44]
MB_DATA[45]
MB_DATA[46]
MB_DATA[47]
MB_DATA[48]
MB_DATA[49]
MB_DATA[50]
MB_DATA[51]
MB_DATA[52]
MB_DATA[53]
MB_DATA[54]
MB_DATA[55]
MB_DATA[56]
MB_DATA[57]
MB_DATA[58]
MB_DATA[59]
MB_DATA[60]
MB_DATA[61]
MB_DATA[62]
MB_DATA[63]
MB_DM[0]
MB_DM[1]
MB_DM[2]
MB_DM[3]
MB_DM[4]
MB_DM[5]
MB_DM[6]
MB_DM[7]
MB_DQS_H[0]
MB_DQS_L[0]
MB_DQS_H[1]
MB_DQS_L[1]
MB_DQS_H[2]
MB_DQS_L[2]
MB_DQS_H[3]
MB_DQS_L[3]
MB_DQS_H[4]
MB_DQS_L[4]
MB_DQS_H[5]
MB_DQS_L[5]
MB_DQS_H[6]
MB_DQS_L[6]
MB_DQS_H[7]
MB_DQS_L[7]
SOCKET638
SOCKET638
MEM_MB0_CLK7(8)MEM_MA0_CLK7(7)
MEM_MB0_CLK#7(8)MEM_MA0_CLK#7(7)
MEM_MB0_CLK1(8)MEM_MA0_CLK1(7)
MEM_MB0_CLK#1(8)
MEM:DATA
MEM:DATA
MA_DATA[10]
MA_DATA[11]
MA_DATA[12]
MA_DATA[13]
MA_DATA[14]
MA_DATA[15]
MA_DATA[16]
MA_DATA[17]
MA_DATA[18]
MA_DATA[19]
MA_DATA[20]
MA_DATA[21]
MA_DATA[22]
MA_DATA[23]
MA_DATA[24]
MA_DATA[25]
MA_DATA[26]
MA_DATA[27]
MA_DATA[28]
MA_DATA[29]
MA_DATA[30]
MA_DATA[31]
MA_DATA[32]
MA_DATA[33]
MA_DATA[34]
MA_DATA[35]
MA_DATA[36]
MA_DATA[37]
MA_DATA[38]
MA_DATA[39]
MA_DATA[40]
MA_DATA[41]
MA_DATA[42]
MA_DATA[43]
MA_DATA[44]
MA_DATA[45]
MA_DATA[46]
MA_DATA[47]
MA_DATA[48]
MA_DATA[49]
MA_DATA[50]
MA_DATA[51]
MA_DATA[52]
MA_DATA[53]
MA_DATA[54]
MA_DATA[55]
MA_DATA[56]
MA_DATA[57]
MA_DATA[58]
MA_DATA[59]
MA_DATA[60]
MA_DATA[61]
MA_DATA[62]
MA_DATA[63]
MA_DQS_H[0]
MA_DQS_L[0]
MA_DQS_H[1]
MA_DQS_L[1]
MA_DQS_H[2]
MA_DQS_L[2]
MA_DQS_H[3]
MA_DQS_L[3]
MA_DQS_H[4]
MA_DQS_L[4]
MA_DQS_H[5]
MA_DQS_L[5]
MA_DQS_H[6]
MA_DQS_L[6]
MA_DQS_H[7]
MA_DQS_L[7]
2
MEM_MB0_CLK_H7
12
C0407 1.5PF/50V MLCC/+/-0.1PFC0407 1.5PF/50V MLCC/+/-0.1PF
MEM_MB0_CLK_L7
MEM_MB0_CLK_H1
12
C0408 1.5PF/50V MLCC/+/-0.1PFC0408 1.5PF/50V MLCC/+/-0.1PF
MEM_MB0_CLK_L1
MEM_MA_DATA0
G12
MA_DATA[0]
MA_DATA[1]
MA_DATA[2]
MA_DATA[3]
MA_DATA[4]
MA_DATA[5]
MA_DATA[6]
MA_DATA[7]
MA_DATA[8]
MA_DATA[9]
MA_DM[0]
MA_DM[1]
MA_DM[2]
MA_DM[3]
MA_DM[4]
MA_DM[5]
MA_DM[6]
MA_DM[7]
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DQS0
MEM_MA_DQS#0
MEM_MA_DQS1
MEM_MA_DQS#1
MEM_MA_DQS2
MEM_MA_DQS#2
MEM_MA_DQS3
MEM_MA_DQS#3
MEM_MA_DQS4
MEM_MA_DQS#4
MEM_MA_DQS5
MEM_MA_DQS#5
MEM_MA_DQS6
MEM_MA_DQS#6
MEM_MA_DQS7
MEM_MA_DQS#7
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Date: Sheet
Date: Sheet
Date: Sheet
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
MEM_MA_DATA[0..63] (7)
To SODIMM socket 0
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
K40AA
K40AA
K40AA
1
Griffin DDR2 MEMORY I/F
Griffin DDR2 MEMORY I/F
Griffin DDR2 MEMORY I/F
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
494
494
494
Rev
Rev
Rev
1.00
1.00
1.00
of
of
of
5
E
E
E
+1.8VS
RN0501C
RN0501C
300Ohm
300Ohm
CPU_PWRGD(20)
D D
CPU_LDT_STOP#(12,20)
CPU_LDT_RST#(20)
NB_ALLOW_LDTSTOP(12,20)
+1.8V
R0504 390OhmR0504 390Ohm
R0505 390OhmR0505 390Ohm
08/11 change to 390OHM
1 2
1 2
RN0501D
RN0501D
300Ohm
300Ohm
5 6
RN0501B
RN0501B
300Ohm
300Ohm
7 8
CPU_SIC
CPU_SID
RN0501A
RN0501A
300Ohm
300Ohm
3 4
1 2
CPU_PWRGD
CPU_PWRGD
CPU_LDT_STOP#
CPU_LDT_RST#
CPU_LDT_REQ#_CPU
2008.03.04
add C503 optional to /X
5PF/50V
5PF/50V
1 2
C0503
C0503
/X
/X
SRC_CPU_HT_CLKP(29)
SRC_CPU_HT_CLKN(29)
080424
add R554 R555 R556
place them to CPU within 1.5"
+1.8V
12
12
C C
R0560
R0560
1KOhm
1KOhm
R0507
R0507
1KOhm
1KOhm
TPC28T
TPC28T
TF14
TF14
1
1
TF15
TF15
TPC28T
TPC28T
route as diff
pair
5/5/5,10mil
CPU_SVC (81)
CPU_SVD (81)
Serial VID Interface clock/data
B B
CPU_VLDT
CPU_VDD0_RUN_FB_H(81)
CPU_VDD0_RUN_FB_L(81)
CPU_VDD1_RUN_FB_H(81)
CPU_VDD1_RUN_FB_L(81)
4
GND
keep trace fromresistor to
CPU within 0.6"
keep trace from caps to
CPU within 1.2"
3900PF/50V
3900PF/50V
3900PF/50V
3900PF/50V
20080716
20080716
R1.1
GND
R0513 44.2OhmR0513 44.2Ohm
GND
R0514 44.2OhmR0514 44.2Ohm
T0501 TPC28TT0501 TPC28T
T0502 TPC28TT0502 TPC28T
T0503 TPC28TT0503 TPC28T
T0504 TPC28TT0504 TPC28T
T0505 TPC28TT0505 TPC28T
T0506 TPC28TT0506 TPC28T
T0507 TPC28TT0507 TPC28T
T0508 TPC28TT0508 TPC28T
T0509 TPC28TT0509 TPC28T
T0510 TPC28TT0510 TPC28T
T0511 TPC28TT0511 TPC28T
T0513 TPC28TT0513 TPC28T
GND
C0501
C0501
12
169Ohm
169Ohm
C0507
C0507
12
CPU_LDT_RST#
CPU_PWRGD
CPU_LDT_STOP#
12
C0540
C0540
1000PF/50V
1000PF/50V
N/A
N/A
1 2
1 2
1
1
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
U0301D
F10
AF4
AF5
AE6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
AB8
AF7
AE7
AE8
AC8
AF8
AA6
F8
F9
A9
A8
B7
A7
C6
R6
P6
F6
E6
Y6
G9
E9
E8
C2
A3
A5
B3
B5
C1
U0301D
VDDA2
VDDA1
CLKIN_H
CLKIN_L
RESET_L
PWROK
LDTSTOP_L
LDTREQ_L
SIC
SID
ALERT_L
HTREF0
HTREF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST_L
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD7
RSVD10
RSVD2
RSVD11
RSVD9
SOCKET638
SOCKET638
R0512
R0512
CPU_CLK_H_C
1 2
CPU_CLK_L_C
CPU_LDT_REQ#_CPU
CPU_SIC
CPU_SID
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST23
1
CPU_TEST18
1
CPU_TEST19
1
CPU_TEST25_H
CPU_TEST25_L
CPU_TEST21
1
CPU_TEST20
1
CPU_TEST24
1
CPU_TEST22
1
CPU_TEST12
1
CPU_TEST27
1
CPU_TEST9_ANALOGIN
CPU_TEST6_DIECRACKMON
1
0.25A
VDDA
CPU_HTREF0
CPU_HTREF1
3
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD4
RSVD3
RSVD1
RSVD5
RSVD12
KEY1
KEY2
SVC
SVD
TDO
M11
W18
A6
A4
AF6
AC7
AA8
W7
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
放在
RN0502A
RN0502A
CPU_SVC
CPU_SVD
300Ohm
300Ohm
CPU_THRMTRIP#_1.8V
CPU_PROCHOT#
CPU_MEMHOT#_1.8V
CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L
CPU_VDDNB_RUN_FB_H
CPU_DBREQ#
CPU_TDO
CPU_TEST28_H
CPU_TEST28_L
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST7_ANALOG_T
CPU_TEST10_ANALOGOUT
CPU_TEST8_DIG_T
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
20080719
power
100UF/6.3V
100UF/6.3V
+1.8V
RN0502C
RN0502C
RN0502B
RN0502B
300Ohm
300Ohm
300Ohm
300Ohm
1 2
3 4
CPU_THRM_DC (50)
CPU_THRM_DA (50)
1
T0534 TPC28TT0534 TPC28T
1
T0533 TPC28TT0533 TPC28T
CPU_VDDNB_RUN_FB_H (81)
1
1
T0524TPC28T T0524TPC28T
1
T0525TPC28T T0525TPC28T
1
T0526TPC28T T0526TPC28T
1
T0527TPC28T T0527TPC28T
1
T0528TPC28T T0528TPC28T
1
T0529TPC28T T0529TPC28T
1
T0530TPC28T T0530TPC28T
1
1
1
+2.5V_CPU_VDDA
12
C504
C504
5 6
T0522TPC28T T0522TPC28T
T0523TPC28T T0523TPC28T
T0531TPC28T T0531TPC28T
T0532TPC28T T0532TPC28T
2
R0580
R0580
1 2
C0504
C0504
1UF/6.3V
1UF/6.3V
0Ohm
0Ohm
12
GND
1 2
B
B
E12
E12
Q0503
Q0503
PMBS3904
PMBS3904
VDDA
C0570
C0570
CPU_PWRGD
R0523
R0523
10KOhm
10KOhm
C0502
C0502
1 2
C
C
3
3
12
0.1UF/16V
0.1UF/16V
0.1UF/10V
0.1UF/10V
GND
CPU_PROCHOT# (20)
1
T0514 TPC28TT0514 TPC28T
T0515 TPC28TT0515 TPC28T
T0516 TPC28TT0516 TPC28T
T0517 TPC28TT0517 TPC28T
T0518 TPC28TT0518 TPC28T
T0519 TPC28TT0519 TPC28T
T0520 TPC28TT0520 TPC28T
T0521 TPC28TT0521 TPC28T
1
1
1
G
G
3
2
3
2
32
D
D
S
S
2N7002
2N7002
Q0580
Q0580
CPU_DBREQ#
CPU_TEST27
CPU_TEST20
CPU_TEST21
CPU_TEST22
CPU_TEST24
0103 change R0527 R0529 R0533 TO 300ohm
CPU_TEST25_L
CPU_TEST25_H
CPU_TEST12
CPU_TEST15
CPU_TEST14
CPU_TEST18
CPU_TEST19
CPU_TEST23
5 6
1 2
3 4
7 8
3 4
1 2
1
1
1
1
1
1
1
1
BUF_PLT_RST# (20,30,70)
FORCE_OFF# (30,57,60,86,87)
7 8
300Ohm
300Ohm
RN0503C
RN0503C
300Ohm
300Ohm
RN0503A
RN0503A
300Ohm
300Ohm
RN0506B
RN0506B
300Ohm
300Ohm
RN0503D
RN0503D
300Ohm
300Ohm
RN0503B
RN0503B
300Ohm
300Ohm
N/A
N/A
R0528 510Ohm
R0528 510Ohm
1 2
R0530 510OhmN/AR0530 510OhmN/A
1 2
RN0506A
RN0506A
300Ohm
300Ohm
5 6
300Ohm
300Ohm
7 8
300Ohm
300Ohm
1 2
300Ohm
300Ohm
3 4
300Ohm
300Ohm
5 6
300Ohm
300Ohm
CPU_CLK_H_C
CPU_CLK_L_C
CPU_LDT_STOP#
CPU_PWRGD
CPU_VDD0_RUN_FB_H
CPU_VDD0_RUN_FB_L
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
+1.8V
RN0502D
RN0502D
GND
+1.8V
RN0505C
RN0505C
RN0505D
RN0505D
RN0505A
RN0505A
RN0505B
RN0505B
RN0506C
RN0506C
GND
to CPU
CPU_PROCHOT#
N/A
N/A
VRHOT#(81)
P0500
P0500
1
CPU_LDT_RST#
1 2
CPU_PWRGD
A A
5
R05440Ohm /XR05440Ohm /X
1 2
R05450Ohm /XR05450Ohm /X
+1.8V
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO
NC
3
DBREQ_L1
5
DBRDY1
7
DBREQ_L2
9
DBRDY2
11
DBREQ_L3
13
DBRDY3
15
DBREQ_L4
17
DBRDY4
19
DBREQ_L5
21
DBRDY5
23
DBREQ_L6
ASP_68200_07_K25
ASP_68200_07_K25
/X
/X
4
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
DBRDY7
DBREQ_L7
DBRDY6
GND9
GND10
2
4
6
8
10
12
14
16
18
20
22
24
26
+3VS +1.8V
12
R0541
R0541
/X
10KOhm
10KOhm
/X
PMBS3904
PMBS3904
/X
/X
12
R0540
R0540
10KOhm
10KOhm
/X
/X
B
B
Q0505
Q0505
E12
E12
CPU_LDT_RST#
3
C
C
3
3
EC to CPU/PWR
12
D502 RB751V-40
D502 RB751V-40
2
2N7002
2N7002
Q0504
Q0504
S
S
GND
32
3
3
D
D
1
1
1
G
G
2
2
THRO_CPU (30)
From EC.
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
1
Griffin CNTL/DEBUG/TH
Griffin CNTL/DEBUG/TH
Griffin CNTL/DEBUG/TH
Title :
Title :
Title :
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Rev
Rev
Rev
1.00
1.00
1.00
of
594
of
594
of
594
5
4
3
2
1
D D
MEM_MA_ADD[0..15](4,9)
MEM_MA0_CS#[0..1](4,9)
MEM_MA_BANK2(4,9)
MEM_MA_BANK0(4,9)
MEM_MA_BANK1(4,9)
MEM_MA0_CLK1(4)
MEM_MA0_CLK#1(4)
MEM_MA0_CLK7(4)
MEM_MA0_CLK#7(4)
C C
MEM_MA_DM[0..7](4)
B B
MEM_MA_CKE0(4,9)
MEM_MA_CKE1(4,9)
MEM_MA_CAS#(4,9)
MEM_MA_RAS#(4,9)
MEM_MA_WE#(4,9)
SMBCLK_DRAM(8,21,29)
SMBDATA_DRAM(8,21,29)
MEM_MA0_ODT0(4,9)
MEM_MA0_ODT1(4,9)
MEM_MA_DQS[0..7](4)
MEM_MA_DQS#[0..7](4)
20080716 Change to 12G025C22004
J0701A
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA0_CS#0
MEM_MA0_CS#1
MEM_MA_DM0
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM1
MEM_MA_DM6
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM7
MEM_MA_DQS0
MEM_MA_DQS2
MEM_MA_DQS3
MEM_MA_DQS1
MEM_MA_DQS6
MEM_MA_DQS4
MEM_MA_DQS5
MEM_MA_DQS7
MEM_MA_DQS#0
MEM_MA_DQS#2
MEM_MA_DQS#3
MEM_MA_DQS#1
MEM_MA_DQS#6
MEM_MA_DQS#4
MEM_MA_DQS#5
MEM_MA_DQS#7
J0701A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR2_DIMM_200P
DDR2_DIMM_200P
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
MEM_MA_DATA1
5
MEM_MA_DATA0
7
MEM_MA_DATA7
17
MEM_MA_DATA6
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA3
14
MEM_MA_DATA2
16
MEM_MA_DATA22
23
MEM_MA_DATA21
25
MEM_MA_DATA18
35
MEM_MA_DATA19
37
MEM_MA_DATA20
20
MEM_MA_DATA17
22
MEM_MA_DATA16
36
MEM_MA_DATA23
38
MEM_MA_DATA25
43
MEM_MA_DATA29
45
MEM_MA_DATA30
55
MEM_MA_DATA27
57
MEM_MA_DATA24
44
MEM_MA_DATA28
46
MEM_MA_DATA31
56
MEM_MA_DATA26
58
MEM_MA_DATA14
61
MEM_MA_DATA15
63
MEM_MA_DATA9
73
MEM_MA_DATA8
75
MEM_MA_DATA11
62
MEM_MA_DATA10
64
MEM_MA_DATA12
74
MEM_MA_DATA13
76
123
125
135
137
124
126
134
136
MEM_MA_DATA36
141
MEM_MA_DATA39
143
MEM_MA_DATA33
151
MEM_MA_DATA38
153
MEM_MA_DATA32
140
MEM_MA_DATA37
142
MEM_MA_DATA34
152
MEM_MA_DATA35
154
MEM_MA_DATA44
157
MEM_MA_DATA40
159
MEM_MA_DATA42
173
MEM_MA_DATA43
175
MEM_MA_DATA41
158
MEM_MA_DATA45
160
MEM_MA_DATA47
174
MEM_MA_DATA46
176
MEM_MA_DATA56
179
MEM_MA_DATA57
181
MEM_MA_DATA63
189
MEM_MA_DATA62
191
MEM_MA_DATA60
180
MEM_MA_DATA61
182
MEM_MA_DATA59
192
MEM_MA_DATA58
194
MEM_MA_DATA54
MEM_MA_DATA51
MEM_MA_DATA53
MEM_MA_DATA48
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA52
MEM_MA_DATA55
MEM_MA_DATA[0..63] (4)
+1.8V
GND
1 2
1 2
R0701
R0701
1KOhm
1KOhm
1%
1%
R0702
R0702
1KOhm
1KOhm
1%
1%
M_VREF_DIMM(8)
12
C0713
C0713
0.1UF/16V
0.1UF/16V
12
c0805_h37 C0705
c0805_h37
C0705
10UF/6.3V
10UF/6.3V
+1.8V
12
M_VREF_DIMM
2A
C0711
C0711
0.1UF/10V
0.1UF/10V
+3VS
12
C712
/X C712
/X
0.1UF/10V
0.1UF/10V
J0701B
J0701B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
203
NP_NC1
204
NP_NC2
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DDR2_DIMM_200P
DDR2_DIMM_200P
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
High
A A
DDR2 SO-DIMM0
DDR2 SO-DIMM0
DDR2 SO-DIMM0
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
1
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
794
of
794
of
794
1.00
1.00
1.00
Rev
Rev
Rev
5
D D
MEM_MB_ADD[0..15](4,9)
MEM_MB0_CS#[0..1](4,9)
MEM_MB_BANK2(4,9)
MEM_MB_BANK0(4,9)
R0802
R0802
4.7KOhm
4.7KOhm
MEM_MB_DQS[0..7](4)
MEM_MB_DQS#[0..7](4)
MEM_MB_BANK1(4,9)
MEM_MB0_CLK1(4)
MEM_MB0_CLK#1(4)
MEM_MB0_CLK7(4)
MEM_MB0_CLK#7(4)
MEM_MB_CKE0(4,9)
MEM_MB_CKE1(4,9)
MEM_MB_CAS#(4,9)
MEM_MB_RAS#(4,9)
MEM_MB_WE#(4,9)
SMBCLK_DRAM(7,21,29)
SMBDATA_DRAM(7,21,29)
MEM_MB0_ODT0(4,9)
MEM_MB0_ODT1(4,9)
+3VS
C C
12
GND
MEM_MB_DM[0..7](4)
B B
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB0_CS#0
MEM_MB0_CS#1
MEM_MB_DM0
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM1
MEM_MB_DM6
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM7
MEM_MB_DQS0
MEM_MB_DQS2
MEM_MB_DQS3
MEM_MB_DQS1
MEM_MB_DQS6
MEM_MB_DQS4
MEM_MB_DQS5
MEM_MB_DQS7
MEM_MB_DQS#0
MEM_MB_DQS#2
MEM_MB_DQS#3
MEM_MB_DQS#1
MEM_MB_DQS#6
MEM_MB_DQS#4
MEM_MB_DQS#5
MEM_MB_DQS#7
J0802A
J0802A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR_DIMM_200P
DDR_DIMM_200P
4
MEM_MB_DATA6
5
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
MEM_MB_DATA1
7
MEM_MB_DATA3
17
MEM_MB_DATA2
19
MEM_MB_DATA0
4
MEM_MB_DATA5
6
MEM_MB_DATA7
14
MEM_MB_DATA4
16
23
25
35
37
20
22
36
38
MEM_MB_DATA29
43
MEM_MB_DATA25
45
MEM_MB_DATA30
55
MEM_MB_DATA31
57
MEM_MB_DATA24
44
MEM_MB_DATA28
46
MEM_MB_DATA27
56
MEM_MB_DATA26
58
MEM_MB_DATA14
61
MEM_MB_DATA15
63
MEM_MB_DATA9
73
MEM_MB_DATA8
75
MEM_MB_DATA11
62
MEM_MB_DATA10
64
MEM_MB_DATA13
74
MEM_MB_DATA12
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
MEM_MB_DATA46
157
MEM_MB_DATA40
159
MEM_MB_DATA42
173
MEM_MB_DATA43
175
MEM_MB_DATA45
158
MEM_MB_DATA44
160
MEM_MB_DATA41
174
MEM_MB_DATA47
176
179
181
189
191
180
182
192
194
MEM_MB_DATA20
MEM_MB_DATA17
MEM_MB_DATA22
MEM_MB_DATA16
MEM_MB_DATA21
MEM_MB_DATA23
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA53
MEM_MB_DATA48
MEM_MB_DATA52
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA59
MEM_MB_DATA58
3
MEM_MB_DATA[0..63] (4)
c0805_h37 C0805
c0805_h37
M_VREF_DIMM(7)
2
12
C0805
10UF/6.3V
10UF/6.3V
M_VREF_DIMM
12
C0808
C0808
0.1UF/10V
0.1UF/10V
/X
/X
+1.8V
12
C0811
C0811
0.1UF/10V
0.1UF/10V
+3VS
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
203
NP_NC1
204
NP_NC2
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
J0802B
J0802B
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
DDR_DIMM_200P
DDR_DIMM_200P
1
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
low
A A
DDR2 SO-DIMM1
DDR2 SO-DIMM1
DDR2 SO-DIMM1
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
1
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
894
of
894
of
894
1.00
1.00
1.00
Rev
Rev
Rev
5
D D
C C
MEM_MA_CKE1(4,7)
MEM_MA_ADD11(4,7)
MEM_MA_BANK0(4,7)
MEM_MA_WE#(4,7)
MEM_MA0_CS#0(4,7)
MEM_MA_RAS#(4,7)
MEM_MA_BANK1(4,7)
MEM_MA_CAS#(4,7)
MEM_MA_ADD13(4,7)
MEM_MA0_ODT0(4,7)
MEM_MA0_CS#1(4,7)
MEM_MA0_ODT1(4,7)
MEM_MA_CKE0(4,7)
MEM_MA_BANK2(4,7)
MEM_MA_ADD12(4,7)
MEM_MA_ADD9(4,7)
MEM_MA_ADD8(4,7)
MEM_MA_ADD5(4,7)
MEM_MA_ADD3(4,7)
MEM_MA_ADD1(4,7)
MEM_MA_ADD4(4,7)
MEM_MA_ADD6(4,7)
MEM_MA_ADD7(4,7)
MEM_MA_ADD14(4,7)
MEM_MA_ADD15(4,7)
MEM_MA_ADD2(4,7)
MEM_MA_ADD0(4,7)
MEM_MA_ADD10(4,7)
20080803 Remove R907
4
MEM_MA_CKE1
MEM_MA_ADD11
MEM_MA_BANK0
MEM_MA_WE#
MEM_MA0_CS#0
MEM_MA_RAS#
MEM_MA_BANK1
MEM_MA_CAS#
MEM_MA_ADD13
MEM_MA0_ODT0
MEM_MA0_CS#1
MEM_MA0_ODT1
MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD12
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD5
MEM_MA_ADD3
MEM_MA_ADD1
MEM_MA_ADD4
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_ADD2
MEM_MA_ADD0
MEM_MA_ADD10
RN0901A
RN0901A
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
12
34
56
78
116
215
314
RN0902D
RN0902D
413
RN0902E
RN0902E
512
RN0902F
RN0902F
611
RN0902H
RN0902H
89
RN0902G
RN0902G
710
RN0904C
RN0904C
314
RN0904B
RN0904B
215
RN0904G
RN0904G
710
RN0904F
RN0904F
611
RN0904D
RN0904D
413
RN0903E
RN0903E
512
RN0903F
RN0903F
611
RN0903C
RN0903C
314
RN0904H
RN0904H
89
RN0903A
RN0903A
116
RN0903B
RN0903B
215
RN0904E
RN0904E
512
RN0904A
RN0904A
116
RN0903D
RN0903D
413
RN0903G
RN0903G
710
RN0903H
RN0903H
89
RN0901B
RN0901B
RN0901C
RN0901C
RN0901D
RN0901D
RN0902A
RN0902A
RN0902B
RN0902B
RN0902C
RN0902C
+0.9V
0.3A
C0901 0.1UF/16VC0901 0.1UF/16V
1 2
C0903 0.1UF/16VC0903 0.1UF/16V
1 2
C0913 0.1UF/16VC0913 0.1UF/16V
1 2
C0914 0.1UF/16VC0914 0.1UF/16V
1 2
C0916 0.1UF/16VC0916 0.1UF/16V
1 2
+0.9V
3
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
C0904
C0904
0.1UF/16V
0.1UF/16V
+0.9V
2
12
0.1UF/16V
0.1UF/16V
C0905
C0905
12
0.1UF/16V
0.1UF/16V
C0906
C0906
12
0.1UF/16V
0.1UF/16V
C0907
C0907
12
0.1UF/16V
0.1UF/16V
C0908
C0908
12
0.1UF/16V
0.1UF/16V
C0909
C0909
1
12
GND
0.3A
RN0906E
MEM_MB_ADD14(4,8)
MEM_MB_ADD1(4,8)
MEM_MB_ADD11(4,8)
MEM_MB_ADD7(4,8)
MEM_MB_ADD6(4,8)
MEM_MB_ADD4(4,8)
MEM_MB_ADD0(4,8)
MEM_MB_ADD2(4,8)
MEM_MB_ADD12(4,8)
MEM_MB_ADD9(4,8)
MEM_MB_ADD8(4,8)
MEM_MB_CKE1(4,8)
MEM_MB_ADD15(4,8)
MEM_MB_ADD5(4,8)
MEM_MB_ADD3(4,8)
MEM_MB_BANK2(4,8)
MEM_MB_RAS#(4,8)
B B
MEM_MB_BANK1(4,8)
MEM_MB_CAS#(4,8)
MEM_MB0_ODT1(4,8)
MEM_MB_WE#(4,8)
MEM_MB_BANK0(4,8)
MEM_MB_ADD10(4,8)
MEM_MB0_CS#1(4,8)
MEM_MB0_CS#0(4,8)
MEM_MB0_ODT0(4,8)
MEM_MB_ADD13(4,8)
MEM_MB_CKE0(4,8)
MEM_MB_ADD14
MEM_MB_ADD1
MEM_MB_ADD11
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD4
MEM_MB_ADD0
MEM_MB_ADD2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_CKE1
MEM_MB_ADD15
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_BANK2
MEM_MB_RAS#
MEM_MB_BANK1
MEM_MB_CAS#
MEM_MB0_ODT1
MEM_MB_WE#
MEM_MB_BANK0
MEM_MB_ADD10
MEM_MB0_CS#1
MEM_MB0_CS#0
MEM_MB0_ODT0
MEM_MB_ADD13
MEM_MB_CKE0
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
47Ohm
512
710
611
413
512
413
116
215
314
215
116
89
611
89
314
710
116
413
512
215
611
89
710
314
12
34
56
78
RN0906E
RN0905G
RN0905G
RN0905F
RN0905F
RN0906D
RN0906D
RN0905E
RN0905E
RN0905D
RN0905D
RN0905A
RN0905A
RN0905B
RN0905B
RN0906C
RN0906C
RN0906B
RN0906B
RN0906A
RN0906A
RN0906H
RN0906H
RN0906F
RN0906F
RN0905H
RN0905H
RN0905C
RN0905C
RN0906G
RN0906G
RN0907A
RN0907A
RN0907D
RN0907D
RN0907E
RN0907E
RN0907B
RN0907B
RN0907F
RN0907F
RN0907H
RN0907H
RN0907G
RN0907G
RN0907C
RN0907C
RN0908A
RN0908A
RN0908B
RN0908B
RN0908C
RN0908C
RN0908D
RN0908D
C0917 0.1UF/16VC0917 0.1UF/16V
1 2
C0919 0.1UF/16VC0919 0.1UF/16V
1 2
C0929 0.1UF/16VC0929 0.1UF/16V
1 2
C0930 0.1UF/16VC0930 0.1UF/16V
1 2
C932 0.1UF/16VC932 0.1UF/16V
1 2
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+0.9V
12
C0920
C0920
0.1UF/16V
0.1UF/16V
12
C0921
C0921
0.1UF/16V
0.1UF/16V
12
C0922
C0922
0.1UF/16V
0.1UF/16V
12
C0923
C0923
0.1UF/16V
0.1UF/16V
12
C0924
C0924
0.1UF/16V
0.1UF/16V
GND
12
C0925
C0925
0.1UF/16V
0.1UF/16V
+1.8V
C0933
C0933
0.1UF/16V
0.1UF/16V
12
12
C0934
C0934
0.1UF/16V
0.1UF/16V
12
C0935
C0935
0.1UF/16V
0.1UF/16V
12
C0936
C0936
0.1UF/16V
0.1UF/16V
PLACE CLOSE TO SOCKET( PER EMI/EMC)
A A
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
5
4
3
2
Date: Sheet
12
C0937
C0937
0.1UF/16V
0.1UF/16V
K40AA
K40AA
K40AA
12
C0938
C0938
0.1UF/16V
0.1UF/16V
GND
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
DDR2_TERMINATIONS
DDR2_TERMINATIONS
DDR2_TERMINATIONS
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
Rev
Rev
Rev
1.00
1.00
1.00
of
994
of
994
of
994
5
D D
HT_CPU_TXD[0..15](3)
C C
B B
HT_CPU_TXD#[0..15](3)
HT_CPU_TX_CLK0(3)
HT_CPU_TX_CLK#0(3)
HT_CPU_TX_CLK1(3)
HT_CPU_TX_CLK#1(3)
HT_CPU_TX_CTL0(3)
HT_CPU_TX_CTL#0(3)
HT_CPU_TX_CTL1(3)
HT_CPU_TX_CTL#1(3)
4
1 2
R1001 301OhmR1001 301Ohm
HT_CPU_TXD0
HT_CPU_TXD#0
HT_CPU_TXD1
HT_CPU_TXD#1
HT_CPU_TXD2
HT_CPU_TXD#2
HT_CPU_TXD3
HT_CPU_TXD#3
HT_CPU_TXD4
HT_CPU_TXD#4
HT_CPU_TXD5
HT_CPU_TXD#5
HT_CPU_TXD6
HT_CPU_TXD#6
HT_CPU_TXD7
HT_CPU_TXD#7
HT_CPU_TXD8
HT_CPU_TXD#8
HT_CPU_TXD9
HT_CPU_TXD#9
HT_CPU_TXD10
HT_CPU_TXD#10
HT_CPU_TXD11
HT_CPU_TXD#11
HT_CPU_TXD12
HT_CPU_TXD#12
HT_CPU_TXD13
HT_CPU_TXD#13
HT_CPU_TXD14
HT_CPU_TXD#14
HT_CPU_TXD15
HT_CPU_TXD#15
HT_CPU_TX_CLK0
HT_CPU_TX_CLK#0
HT_CPU_TX_CLK1
HT_CPU_TX_CLK#1
HT_CPU_TX_CTL0
HT_CPU_TX_CTL#0
HT_CPU_TX_CTL1
HT_CPU_TX_CTL#1
HT_RXCALP
HT_RXCALN
AC24
AC25
AB25
AB24
AA24
AA25
W21
W20
AB23
AA22
M22
M23
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
Y22
Y23
V21
V20
U20
U21
U19
U18
T22
T23
R21
R20
C23
A24
U1001A
U1001A
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
RS780MN
RS780MN
02G050001122
02G050001122
3
HT_CPU_RXD0
HT_TXCALP
HT_TXCALN
D24
HT_CPU_RXD#0
D25
HT_CPU_RXD1
E24
HT_CPU_RXD#1
E25
HT_CPU_RXD2
F24
HT_CPU_RXD#2
F25
HT_CPU_RXD3
F23
HT_CPU_RXD#3
F22
HT_CPU_RXD4
H23
HT_CPU_RXD#4
H22
HT_CPU_RXD5
J25
HT_CPU_RXD#5
J24
HT_CPU_RXD6
K24
HT_CPU_RXD#6
K25
HT_CPU_RXD7
K23
HT_CPU_RXD#7
K22
HT_CPU_RXD8
F21
HT_CPU_RXD#8
G21
HT_CPU_RXD9
G20
HT_CPU_RXD#9
H21
HT_CPU_RXD10
J20
HT_CPU_RXD#10
J21
HT_CPU_RXD11
J18
HT_CPU_RXD#11
K17
HT_CPU_RXD12
L19
HT_CPU_RXD#12
J19
HT_CPU_RXD13
M19
HT_CPU_RXD#13
L18
HT_CPU_RXD14
M21
HT_CPU_RXD#14
P21
HT_CPU_RXD15
P18
HT_CPU_RXD#15
M18
HT_CPU_RX_CLK0
H24
HT_CPU_RX_CLK#0
H25
HT_CPU_RX_CLK1
L21
HT_CPU_RX_CLK#1
L20
HT_CPU_RX_CTL0
M24
HT_CPU_RX_CTL#0
M25
HT_CPU_RX_CTL1
P19
HT_CPU_RX_CTL#1
R18
B24
B25
HT_TXCALP
HT_TXCALN
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_CPU_RX_CLK0 (3)
HT_CPU_RX_CLK#0 (3)
HT_CPU_RX_CLK1 (3)
HT_CPU_RX_CLK#1 (3)
HT_CPU_RX_CTL0 (3)
HT_CPU_RX_CTL#0 (3)
HT_CPU_RX_CTL1 (3)
HT_CPU_RX_CTL#1 (3)
1 2
R1003 301OhmR1003 301Ohm
2
HT_CPU_RXD[0..15] (3)
HT_CPU_RXD#[0..15] (3)
1
A A
RS780M-HT LINK I/F
RS780M-HT LINK I/F
RS780M-HT LINK I/F
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
1
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
10 94
of
10 94
of
10 94
Rev
Rev
Rev
1.00
1.00
1.00
5
4
3
2
1
PCIENB_TXN0
PCIENB_TXN1
PCIENB_TXN2
PCIENB_TXN3
PCIENB_TXN4
D D
C C
B B
GFX_VGA_RXP[0..7](70)
GFX_VGA_RXN[0..7](70)
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
GFX_VGA_RXP7
GFX_VGA_RXN7
GFX_VGA_RXP6
GFX_VGA_RXN6
GFX_VGA_RXP5
GFX_VGA_RXN5
GFX_VGA_RXP4
GFX_VGA_RXN4
GFX_VGA_RXP3
GFX_VGA_RXN3
GFX_VGA_RXP2
GFX_VGA_RXN2
GFX_VGA_RXP1
GFX_VGA_RXN1
GFX_VGA_RXP0
GFX_VGA_RXN0
PCIE_RXP1_LAN(33)
PCIE_RXN1_LAN(33)
PCIE_RXP2_WLAN(53) PCIE_TXP2_WLAN (53)
PCIE_RXN2_WLAN(53)
PCIE_SB_NB_RX0P(20)
PCIE_SB_NB_RX0N(20)
PCIE_SB_NB_RX1P(20)
PCIE_SB_NB_RX1N(20)
PCIE_SB_NB_RX2P(20)
PCIE_SB_NB_RX2N(20)
PCIE_SB_NB_RX3P(20)
PCIE_SB_NB_RX3N(20)
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
U1001B
U1001B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
RS780MN
RS780MN
PCI-E:
0~3 HDMI@ RS780M
4~7 NC
8~15 VGA8x
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCE_CALRP
PCE_CALRN
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
PCIENB_TXP7
H1
PCIENB_TXN7
H2
PCIENB_TXP6
J2
PCIENB_TXN6
J1
PCIENB_TXP5
K4
PCIENB_TXN5
K3
PCIENB_TXP4
K1
PCIENB_TXN4
K2
PCIENB_TXP3
M4
PCIENB_TXN3
M3
PCIENB_TXP2
M1
PCIENB_TXN2
M2
PCIENB_TXP1
N2
PCIENB_TXN1
N1
PCIENB_TXP0
P1
PCIENB_TXN0
P2
AC1
AC2
PCIE_TXP1_LAN_C
AB4
PCIE_TXN1_LAN_C
AB3
PCIE_TXP2_WLAN_C
AA2
PCIE_TXN2_WLAN_C
AA1
Y1
Y2
Y4
Y3
V1
V2
A_TX0P_CA_TX0P_C
AD7
A_TX0N_CA_TX0N_C
AE7
A_TX1P_CA_TX1P_C
AE6
A_TX1N_CA_TX1N_C
AD6
A_TX2P_C
AB6
A_TX2N_C
AC6
A_TX3P_C
AD5
A_TX3N_C
AE5
AC8
AB8
C1102 0.1UF/10VC1102 0.1UF/10V
C1128 0.1UF/10VC1128 0.1UF/10V
C1107 0.1UF/10VC1107 0.1UF/10V
C1108 0.1UF/10VC1108 0.1UF/10V
C1110 0.1UF/10VC1110 0.1UF/10V
C1111 0.1UF/10VC1111 0.1UF/10V
R11011.27KOHM R11011.27KOHM
1 2
1 2
R11022KOHM R11022KOHM
12
C1105 0.1UF/10VC1105 0.1UF/10V
12
C1129 0.1UF/10VC1129 0.1UF/10V
12
C1109 0.1UF/10VC1109 0.1UF/10V
12
C1112 0.1UF/10VC1112 0.1UF/10V
12
C1114 0.1UF/10VC1114 0.1UF/10V
12
C1116 0.1UF/10VC1116 0.1UF/10V
+1.1V_NB
PCIENB_TXN5
PCIENB_TXN6
PCIENB_TXN7
12
12
12
12
12
12
GND
C1142 0.1UF/10VC1142 0.1UF/10V
12
C1144 0.1UF/10VC1144 0.1UF/10V
12
C1141 0.1UF/10VC1141 0.1UF/10V
12
C1148 0.1UF/10VC1148 0.1UF/10V
12
C1145 0.1UF/10VC1145 0.1UF/10V
12
C1147 0.1UF/10VC1147 0.1UF/10V
12
C1143 0.1UF/10VC1143 0.1UF/10V
12
C1146 0.1UF/10VC1146 0.1UF/10V
12
PCIE_TXP1_LAN (33)
PCIE_TXN1_LAN (33)
PCIE_TXN2_WLAN (53)
PCIE_NB_SB_TX0P (20)
PCIE_NB_SB_TX0N (20)
PCIE_NB_SB_TX1P (20)
PCIE_NB_SB_TX1N (20)
PCIE_NB_SB_TX2P (20)
PCIE_NB_SB_TX2N (20)
PCIE_NB_SB_TX3P (20)
PCIE_NB_SB_TX3N (20)
GFX_VGA_TXN0
GFX_VGA_TXN1
GFX_VGA_TXN2
GFX_VGA_TXN3
GFX_VGA_TXN4
GFX_VGA_TXN5
GFX_VGA_TXN6
GFX_VGA_TXN7
PCIENB_TXP0
PCIENB_TXP1
PCIENB_TXP2
PCIENB_TXP3
PCIENB_TXP4
PCIENB_TXP5
PCIENB_TXP6
PCIENB_TXP7
C1149 0.1UF/10VC1149 0.1UF/10V
12
C1150 0.1UF/10VC1150 0.1UF/10V
12
C1151 0.1UF/10VC1151 0.1UF/10V
12
C1156 0.1UF/10VC1156 0.1UF/10V
12
C1152 0.1UF/10VC1152 0.1UF/10V
12
C1155 0.1UF/10VC1155 0.1UF/10V
12
C1153 0.1UF/10VC1153 0.1UF/10V
12
C1154 0.1UF/10VC1154 0.1UF/10V
12
GFX_VGA_TXP[0..7](70)GFX_VGA_TXN[0..7](70)
GFX_VGA_TXP0
GFX_VGA_TXP1
GFX_VGA_TXP2
GFX_VGA_TXP3
GFX_VGA_TXP4
GFX_VGA_TXP5
GFX_VGA_TXP6
GFX_VGA_TXP7
A A
RS780M-PCIE LINK I/F
RS780M-PCIE LINK I/F
RS780M-PCIE LINK I/F
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Engineer:
1
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
11 94
of
11 94
of
11 94
Rev
Rev
Rev
1.00
1.00
1.00
5
4
3
2
1
+3VS
r0603_h24
r0603_h24
1 2
0Ohm
0Ohm
L1201
L1201
D D
NB_PWRGD
IN
ALLOW_LDTSTOP
OUT(default)/IN
LDT_STOP#
IN(default)/IN
RS780 POWERGOOD
is 1.8VS rail
C C
OSC_14M_NB
1.1V 158R/90.9R
+1.8VS
L1204 220Ohm/100MhzL1204 220Ohm/100Mhz
1.8V IN
OC/1.8V IN
3.3V IN/OC
+1.8V_VDDPLL_PCIE
+3VS
EDID_DAT_GM(78)
EDID_CLK_GM(78)
+1.8V_VDDPLL_PCIE
21
12
C1204
C1204
22UF/6.3V
22UF/6.3V
GND
2008.03.03
add R1203 R1204 R1205
R1203 140OHM for RS780 A13
CRT_RED_GM(78)
CRT_GREEN_GM(78)
CRT_BLUE_GM(78)
+1.1V_NB
L1206 0Ohm
L1206 0Ohm
NB_PWRGD(21)
+1.1V_NB GND
0103 PAGE45 has pu
5 6
4.7KOhm
4.7KOhm
7 8
4.7KOhm
4.7KOhm
20080716 HDMI Power DDC???
r0603_h24
r0603_h24
1 2
+1.8VS
NB_OSC(29)
RN1201A
RN1201A
RN1201C
RN1201C
RN1201D
RN1201D
+1.8VS
r0603_h24
r0603_h24
1 2
R1202 0Ohm
R1202 0Ohm
+1.8V_VDDPLL_PCIE
150R termination < 1 inch trace
CRT_HSYNC_GM(13,78)
CRT_VSYNC_GM(13,78)
NB_DACSDA(46,78)
NB_DACSCL(46,78)
12
C1206
C1206
2.2UF/6.3V
R1207 301OhmR1207 301Ohm
1 2
1 2
4.7KOhm
4.7KOhm
SRC_NB_GFX_REFCLKP(29)
SRC_NB_GFX_REFCLKN(29)
2.2UF/6.3V
GND
SRC_NB_HT_CLKP(29)
SRC_NB_HT_CLKN(29)
4.7KOhm
4.7KOhm
SRC_NB_PCIE_RCLKP(29)
SRC_NB_PCIE_RCLKN(29)
PLLVDD18
NB_RST#(20,33,53)
PE_GPIO2_1.8V(78)
PU@ conn side.
STRP_DATA 01
B B
VCC_NB 1.0V 1.1V
GND
GND
GND
R1203150Ohm 1%R1203150Ohm 1%
12
R1204150Ohm 1%R1204150Ohm 1%
12
R1205150Ohm 1%R1205150Ohm 1%
12
RN1201B
RN1201B
34
12
C1201
C1201
2.2UF/6.3V
2.2UF/6.3V
12
C1205
C1205
2.2UF/6.3V
2.2UF/6.3V
12
C1207
C1207
2.2UF/6.3V
2.2UF/6.3V
GND
AVDD1
AVDDDI
AVDDQ_L
GND
GND
GND
GND
GND
GND
R1206 715OhmR1206 715Ohm
1 2
PLLVDD
GND
12
C1208
C1208
2.2UF/6.3V
2.2UF/6.3V
NB_LDT_STOP#
NB_ALLOW_LDTSTOP_NB
1 2
GND
VDDA18HTPLL
VDDA18PCIEPLL
NB_HT_REFCLKP
NB_HT_REFCLKN
NB_REFCLKN
R1208 0Ohm
R1208 0Ohm
1 2
N/A
N/A
R1230
R1230
T1214 TPC28TT1214 TPC28T
2KOHM
2KOHM
/X
/X
net AUC_CAL Refence F50z
F12
E12
F14
G15
H15
H14
E17
F17
F15
G18
G17
E18
F18
E19
F19
A11
B11
E8
F8
G14
A12
D14
B12
H17
D7
E7
D8
A10
C10
C12
C25
C24
E11
F11
T2
T1
U1
U2
V4
V3
A9
B9
B8
A8
B7
A7
B10
G11
1
C8
U1001C
U1001C
AVDD1
AVDD2
AVDDDI
AVSSDI
AVDDQ
AVSSQ
C
Y
COMP
RED
RED#
GREEN
GREEN#
BLUE
BLUE#
DAC_HSYNC
DAC_VSYNC
DAC_SDA
DAC_SCL
DAC_RSET
PLLVDD
PLLVDD18
PLLVSS
VDDA18HTPLL
VDDA18PCIEPLL1
VDDA18PCIEPLL2
SYSRESET#
POWERGOOD
LDTSTOP#
ALLOW_LDTSTOP
HT_REFCLKP
HT_REFCLKN
REFCLK_P
REFCLK_N
GFX_REFCLKP
GFX_REFCLKN
GPP_REFCLKP
GPP_REFCLKN
GPPSB_REFCLKP
GPPSB_REFCLKN
I2C_DATA
I2C_CLK
DDC_DATA0/AUX0N
DDC_CLK0/AUX0P
DDC_CLK1/AUX1P
DDC_DATA1/AUX1N
STRP_DATA
RESERVED
AUX_CAL
RS780MN
RS780MN
0104 ADD
20080716 Remove the STRP_DATA Solution
R1.1
GND
NB_ALLOW_LDTSTOP_NB
NB_LDT_STOP#
12
C1240
C1240
1000PF/50V
1000PF/50V
/X
/X
CPU_LDT_STOP#(5,20)
NB_ALLOW_LDTSTOP(5,20)
+1.8V_VDDPLL_PCIE
12
C1203
C1203
2.2UF/6.3V
2.2UF/6.3V
GND
PART 3 OF 6
PART 3 OF 6
CRT/TVOUT
CRT/TVOUT
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
VDDA18HTPLL
LVTM
LVTM
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
VDDLTP18
VSSLTP18
VDDLT18_1
VDDLT18_2
VDDLT33_1
VDDLT33_2
VSSLT1
VSSLT2
VSSLT3
VSSLT4
VSSLT5
VSSLT6
VSSLT7
LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL
TMDS_HPD
SUS_STAT#
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
HPD
1.8KOHM
1.8KOHM
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
D9
D10
D12
AE8
AD8
D13
R1218
R1218
1
1
VDDLT33 for 740 only
GND
R1210 0Ohm
R1210 0Ohm
1 2
R1209 0Ohm
R1209 0Ohm
1 2
N/A
N/A
T1212 TPC28TT1212 TPC28T
1
T1211 TPC28TT1211 TPC28T
1
1 2
GND
GND
T1202 TPC28TT1202 TPC28T
T1203 TPC28TT1203 TPC28T
/X
/X
LVDS_L0P_GM (78)
LVDS_L0N_GM (78)
LVDS_L1P_GM (78)
LVDS_L1N_GM (78)
LVDS_L2P_GM (78)
LVDS_L2N_GM (78)
LVDS_LCLKP_GM (78)
LVDS_LCLKN_GM (78)
VDDLTP18_PLL_L
VDDLTP18_L
12
C1212
C1212
4.7UF/6.3V
4.7UF/6.3V
GND
R1.1 AMD advice
SUS_STAT# (21)
r0603_h24
r0603_h24
1 2
L1207 0Ohm
L1207 0Ohm
12
C1209
C1209
2.2UF/6.3V
2.2UF/6.3V
GND
LCD_VDD_EN_GM (78)
LCD_BACKEN_GM (78)
2008.08.04
the U and L of LVDS exchange
+1.8V_VDDPLL_PCIE
r0603_h24
r0603_h24
1 2
L1208 0Ohm
L1208 0Ohm
+1.8VS
change backlight enable
change backlight enable
pin from LVDS_ENA_BL to
pin from LVDS_ENA_BL to
LVDS_BLON
LVDS_BLON
A A
?? for external graphic
RS780M-SYSTEM I/F
RS780M-SYSTEM I/F
RS780M-SYSTEM I/F
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
<OrgAddr1>
<OrgAddr1>
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Friday, April 10, 2009
Friday, April 10, 2009
Friday, April 10, 2009
<OrgAddr1>
1
of
12 94
of
12 94
of
12 94
Rev
Rev
Rev
1.00
1.00
1.00
5
4
3
2
1
DFT_GPIO1: LOAD_EEPROM_STRAPS
D D
R1.11 080319
Change the NB Part number to RS780 (A13)
U1001D
U1001D
PAR 4 OF 6
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_BA0
MEM_BA1
MEM_BA2
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
MEM_CKP
MEM_CKN
MEM_COMPP
MEM_COMPN
RS780MN
RS780MN
PAR 4 OF 6
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
MEM_DQ0
MEM_DQ1
MEM_DQ2
MEM_DQ3
MEM_DQ4
MEM_DQ5
MEM_DQ6
MEM_DQ7
MEM_DQ8
MEM_DQ9
MEM_DQ10
MEM_DQ11
MEM_DQ12
MEM_DQ13
MEM_DQ14
MEM_DQ15
MEM_DQS0P
MEM_DQS0N
MEM_DQS1P
MEM_DQS1N
MEM_DM0
MEM_DM1
IOPLLVDD18
IOPLLVDD
IOPLLVSS
MEM_VREF
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
GND
AE18
080118
Disable Side Port Memory
R1.1
2008/08/11 Remove C1307/L1301/C1308/L1302
+1.8V_VDDPLL_PCIE
+1.1V_NB
080201
R1.1
Change to +1.1V_NB
form NB_VDD_MUX
AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14
AD16
AE17
AD17
W12
Y12
AD18
AB13
AD12
AB18
AE12
V14
V15
W14
C C
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use
default values if not connected
RS780:SUS_STAT
STRAP_DEBUG_BUS_PCIE_ENABLE
Enables the Test Debug Bus using PCIE bus:
1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS780: configurable thru register setting only
RS740/RS780: Enables Side port memory
RS780:HSYNC#
Selects if Memory SIDE PORT is available or not
1 = Memory Side port Not available
0 = Memory Side port available
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
R1302
R1302
4.7KOhm
4.7KOhm
CRT_VSYNC_GM(12,78)
B B
CRT_HSYNC_GM(12,78)
A A
5
1 2
1 2
R1303 4.7KOhm /XR1303 4.7KOhm /X
R1305
R1305
4.7KOhm
4.7KOhm
1 2
1 2
R1306 4.7KOhm /XR1306 4.7KOhm /X
+3VS
GND
+3VS
GND
RS780M-SPMEM/STRAPS
RS780M-SPMEM/STRAPS
RS780M-SPMEM/STRAPS
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
<OrgAddr1>
<OrgAddr1>
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
<OrgAddr1>
1
of
13 94
of
13 94
of
13 94
Rev
Rev
Rev
1.00
1.00
1.00
5
4
3
2
1
D D
+1.1V_NB
0.68A
+1.2VS
0.68A
080424
add l1405 is /X
600 mA
C C
B B
+1.8VS
+3VS
+1.8VS
3.3V rails ramp high relative to 1.8V
Display and PLL rails. max 2.1V
R1405
R1405
1 2
12
C1413
C1413
1UF/6.3V
1UF/6.3V
GND
D1401
D1401
1
2
BAV99
BAV99
/X
/X
12
0Ohm
0Ohm
C1429
C1429
4.7UF/6.3V
4.7UF/6.3V
D1402
D1402
1
3
2
BAV99 /X
BAV99 /X
12
C1414
C1414
4.7UF/6.3V
4.7UF/6.3V
+1.8VS
3
12
C1415
C1415
0.1UF/10V
0.1UF/10V
VDDA18PCIE
12
C1431
C1431
0.1UF/10V
0.1UF/10V
GND
12
C1439
C1439
1UF/6.3V
1UF/6.3V
GND
GND
12
C1401
C1401
4.7UF/6.3V
4.7UF/6.3V
GND
12
C1402
C1402
0.1UF/10V
0.1UF/10V
12
C1416
C1416
0.1UF/10V
0.1UF/10V
1.2V(RS740) 1.1V(RX780;RS780)
NB_VDD_MUX_VDDHT
12
C1412
C1412
c0805_h37
c0805_h37
10UF/6.3V
10UF/6.3V
1.2V(RS740) 1.1V(RX780;RS780)
12
C1403
C1403
1UF/6.3V
1UF/6.3V
VDDHTTX
12
C1417
C1417
c0805_h37
c0805_h37
10UF/6.3V
10UF/6.3V
GND
12
C1432
C1432
1UF/6.3V
1UF/6.3V
12
C1447
C1447
1UF/6.3V
1UF/6.3V
GND
VDDHTRX
AD24
AC23
AD11
AE25
AB22
AA21
AE11
K16
M16
P16
R16
T16
H18
G19
E21
D22
B23
A23
Y20
W19
V18
U17
T17
R17
P17
M17
P10
K10
M10
T10
R10
AA9
AB9
AD9
AE9
U10
J17
L16
F20
J10
L10
W9
H9
Y9
F9
G9
U1001E
U1001E
VDDHT1
VDDHT2
VDDHT3
VDDHT4
VDDHT5
VDDHT6
VDDHT7
VDDHTRX1
VDDHTRX2
VDDHTRX3
VDDHTRX4
VDDHTRX5
VDDHTRX6
VDDHTRX7
VDDHTTX1
VDDHTTX2
VDDHTTX3
VDDHTTX4
VDDHTTX5
VDDHTTX6
VDDHTTX7
VDDHTTX8
VDDHTTX9
VDDHTTX10
VDDHTTX11
VDDHTTX12
VDDHTTX13
VDDA18PCIE1
VDDA18PCIE2
VDDA18PCIE3
VDDA18PCIE4
VDDA18PCIE5
VDDA18PCIE6
VDDA18PCIE7
VDDA18PCIE8
VDDA18PCIE9
VDDA18PCIE10
VDDA18PCIE11
VDDA18PCIE12
VDDA18PCIE13
VDDA18PCIE14
VDDA18PCIE15
VDD18_1
VDD18_2
VDD18_MEM1
VDD18_MEM2
RS780MN
RS780MN
PART 5/6
PART 5/6
VDDPCIE1
VDDPCIE2
VDDPCIE3
VDDPCIE4
VDDPCIE5
VDDPCIE6
VDDPCIE7
VDDPCIE8
VDDPCIE9
VDDPCIE10
VDDPCIE11
VDDPCIE12
VDDPCIE13
VDDPCIE14
VDDPCIE15
VDDPCIE16
VDDPCIE17
VDDC1
VDDC2
VDDC3
VDDC4
VDDC5
VDDC6
VDDC7
VDDC8
VDDC9
VDDC10
VDDC11
VDDC12
POWER
POWER
VDDC13
VDDC14
VDDC15
VDDC16
VDDC17
VDDC18
VDDC19
VDDC20
VDDC21
VDDC22
VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDD33_1
VDD33_2
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
VDD_PCIE
1.2V(RS740)/1.1V(RX780;RS780)
12
C1405
C1405
0.1UF/10V
0.1UF/10V
GND
12
C1407
C1407
1UF/6.3V
1UF/6.3V
12
C1408
C1408
1UF/6.3V
1UF/6.3V
12
C1409
C1409
10UF/6.3V c0805_h37
10UF/6.3V c0805_h37
AMD recommended: side port not used, connect to GND
GND
GND
VDD33_R
12
C1441
C1441
0.1UF/10V
0.1UF/10V
1 2
R1407 0OhmR1407 0Ohm
+3VS
GND
12
C1423
C1423
0.1UF/10V
0.1UF/10V
+1.1V_NB
VDDC_R
12
C1424
C1424
0.1UF/10V
0.1UF/10V
1.1A
12
C1425
C1425
0.1UF/10V
0.1UF/10V
c0805_h37
c0805_h37
c0805_h37
c0805_h37
12
C1426
C1426
10UF/6.3V
10UF/6.3V
12
C1427
C1427
10UF/6.3V
10UF/6.3V
+VCC_NB
7.6A
H7
L7
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
PART 6/6
PART 6/6
VSSAHT1
VSSAHT2
A25
D23
A A
5
4
VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15
VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT20
J22
L17
L22
L24
E22
G22
L25
P20
H19
G24
G25
N22
M20
V19
R19
R22
R24
R25
U22
H20
W22
W24
3
W25
VSSAHT25
VSSAHT26
Y21
VSSAHT27
VSS1
L12
AD25
AA4
AB5
AB1
AB7
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
GROUND
GROUND
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
P12
P15
N13
R11
R14
M14
AC3
T12
VSSAPCIE36
VSS8
D11
E14
E15
J12
K14
AE14
AC4
AE1
AE4
AB2
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSS9
VSS10
VSS11
V12
U14
U11
U15
J15
VSS33
VSS32G8VSS31
VSS30
VSS28
VSS27
VSS34
VSS29
VSSAPCIE40
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
Y18
W11
W15
AA14
AB11
AB15
AB17
AB19
AE20
AC12
GND
M11
L15
U1001F
U1001F
RS780MN
RS780MN
VSS26
VSS25
VSS24
VSS23
K11
AB21
GND
RS780M-POWER
RS780M-POWER
RS780M-POWER
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
<OrgAddr1>
<OrgAddr1>
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
K40AA
K40AA
K40AA
Wednesday, April 08, 2009
Wednesday, April 08, 2009
Wednesday, April 08, 2009
<OrgAddr1>
1
of
14 94
of
14 94
of
14 94
Rev
Rev
Rev
1.00
1.00
1.00
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Wednesday, April 08, 2009
Wednesday, April 08, 2009
5
4
3
Wednesday, April 08, 2009
2
K40AA
K40AA
K40AA
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
15 94
15 94
15 94
1
Rev
Rev
Rev
1.00
1.00
1.00
5
D D
C C
4
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
K40AA
K40AA
K40AA
Engineer:
3
BLANK
BLANK
BLANK
16 94Wednesday, April 08, 2009
16 94Wednesday, April 08, 2009
16 94Wednesday, April 08, 2009
2
Rev
Rev
Rev
1.00
1.00
1.00
of
of
of
1
B B
A A
5
4
3
2
1
5
D D
C C
4
3
2
1
B B
A A
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
K40AA
K40AA
K40AA
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
BLANK
BLANK
BLANK
17 94Wednesday, April 08, 2009
17 94Wednesday, April 08, 2009
17 94Wednesday, April 08, 2009
1
Rev
Rev
Rev
1.00
1.00
1.00
of
of
of
5
D D
C C
4
3
2
1
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
B B
A A
K40AA
K40AA
K40AA
Engineer:
BLANK
BLANK
BLANK
18 94Wednesday, April 08, 2009
18 94Wednesday, April 08, 2009
18 94Wednesday, April 08, 2009
Rev
Rev
Rev
1.00
1.00
1.00
of
of
of
5
4
3
2
1
5
D D
C C
4
3
2
1
B B
A A
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
K40AA
K40AA
K40AA
2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
BLANK
BLANK
BLANK
19 94Wednesday, April 08, 2009
19 94Wednesday, April 08, 2009
19 94Wednesday, April 08, 2009
Rev
Rev
Rev
1.00
1.00
1.00
of
of
of
1
5
4
3
2
1
2008/08/11 AMD Review
T2048
T2048
1
TPC28T
TPC28T
A_RST#
12
C2008 0.1UF/10VC2008 0.1UF/10V
12
C2002 0.1UF/10VC2002 0.1UF/10V
12
C2003 0.1UF/10VC2003 0.1UF/10V
12
C2004 0.1UF/10VC2004 0.1UF/10V
R2005 562OhmR2005 562Ohm
GND
1 2
1 2
R2004 2.05KOHMR2004 2.05KOHM
12
C2006
C2006
1UF/6.3V
1UF/6.3V
R1408
R1408
0Ohm
0Ohm
SRC_SB_PCIE_RCLKP(29)
SRC_SB_PCIE_RCLKN(29)
C2001 0.1UF/10VC2001 0.1UF/10V
C2007 0.1UF/10VC2007 0.1UF/10V
C2009 0.1UF/10VC2009 0.1UF/10V
C2010 0.1UF/10VC2010 0.1UF/10V
PCIE_VDDR
PCIE_PVDD_L
PCIE_SB_NB_RX0P(11)
PCIE_SB_NB_RX0N(11)
D D
C C
PCIE_SB_NB_RX1P(11)
PCIE_SB_NB_RX1N(11)
PCIE_SB_NB_RX2P(11)
PCIE_SB_NB_RX2N(11)
PCIE_SB_NB_RX3P(11)
PCIE_SB_NB_RX3N(11)
PCIE_NB_SB_TX0P(11)
PCIE_NB_SB_TX0N(11)
PCIE_NB_SB_TX1P(11)
PCIE_NB_SB_TX1N(11)
PCIE_NB_SB_TX2P(11)
PCIE_NB_SB_TX2N(11)
PCIE_NB_SB_TX3P(11)
PCIE_NB_SB_TX3N(11)
+1.2VS
1 2
0104 CHANGE P/N
A_RX0P_C
A_RX0N_C
12
A_RX1P_C
A_RX1N_C
12
A_RX2P_C
A_RX2N_C
12
A_RX3P_C
A_RX3N_C
12
1%
PCIE_CALRP
PCIE_CALRN
1%
Refence F50z
32K_XIN
B B
CPU_PWRGD(5)
NB_ALLOW_LDTSTOP(5,12)
HT_CPU_PWRGD(81)
R2021
R2021
10KOhm
10KOhm
1 2
+3VS
+3VS
R2039
R2039
10KOhm
10KOhm
34
1 2
A A
61
2
5
5
Q2001A
Q2001A
UM6K1N
UM6K1N
Q2001B
Q2001B
UM6K1N
UM6K1N
CPU_PROCHOT#(5)
CPU_LDT_STOP#(5,12)
CPU_LDT_RST#(5)
080423
ADD R2039 Q2001
12
C2015
C2015
18PF/50V
18PF/50V
20080716
20080716
080424
add R2042 R2041 R2040
2
X2001
X2001
112
32.768KHZ
32.768KHZ
SIDE
3
07G010N23272
07G010N23272
12
R202810MOhm R202810MOhm
4
12
32K_XOUT
32K_XIN
32K_XOUT
C2016
C2016
18PF/50V
18PF/50V
U2001A
U2001A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700
SB700
02G050001810
02G050001810
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
RTC XTAL
RTC XTAL
CPU
CPU
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCI CLKS
PCIRST#
DEVSEL#
PCI INTERFACE
PCI INTERFACE
REQ3#/GPIO70
REQ4#/GPIO71
GNT3#/GPIO72
GNT4#/GPIO73
CLKRUN#
INTE#/GPIO33
CLOCK GENERATOR
CLOCK GENERATOR
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0
LPCCLK1
LPC
LPC
RTC
RTC
LFRAME#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
INTRUDER_ALERT#
A_RST#
3
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
IRDY#
TRDY#
STOP#
PERR#
SERR#
REQ0#
REQ1#
REQ2#
GNT0#
GNT1#
GNT2#
LOCK#
LAD0
LAD1
LAD2
LAD3
LDRQ0#
SERIRQ
RTCCLK
VBAT
8.2KOhm
8.2KOhm
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
PAR
R2032
R2032
P4
P3
P1
CLK_DBGPCI1_R
P2
T4
T3
N1
U2
P7
V4
T1
V3
U1
V1
V2
T2
W1
T9
R6
R7
R5
U8
U5
Y7
W8
V9
Y8
AA8
Y4
Y3
Y2
AA2
AB4
AA1
AB3
AB2
AC1
AC2
AD1
W2
U7
AA7
Y1
AA6
W5
AA5
Y5
U6
W6
W4
V7
AC3
AD4
AB7
AE6
AB6
AD2
AE4
AD5
AC6
AE5
AD6
V5
AD3
AC4
AE2
AE3
G22
E22
H24
H23
J25
J24
H25
H22
AB8
AD7
V15
C3
C2
B2
1 2
GND
CLK_DBGPCI2_R
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
PCI_REQ#4
PCI_GNT#0
PCI_GNT#1
PCI_GNT#2
PCI_GNT#4
PM_CLKRUN#
PCI_INTA#
PCI_INTB#
PCI_INTC#
PCI_INTD#
LPC_CLK0_R
LPC_CLK1_R
1
1
GPIO65
1
INTRUDER_ALERT#
12
0.1UF/10V
0.1UF/10V
DEL 0 OHM
T2044 TPC28TT2044 TPC28T
1
T2047 TPC28TT2047 TPC28T
1
T2049 TPC28TT2049 TPC28T
1
T2050 TPC28TT2050 TPC28T
1
T2051 TPC28TT2051 TPC28T
1
T2052 TPC28TT2052 TPC28T
1
T2053 TPC28TT2053 TPC28T
1
T2042 TPC28TT2042 TPC28T
1
T2043 TPC28TT2043 TPC28T
1
1
1
1
1
1
1
1
1
1
R2023 22OhmR2023 22Ohm
1 2
R2025 22OhmR2025 22Ohm
1 2
T2036TPC28T T2036TPC28T
T2014TPC28T T2014TPC28T
T2015TPC28T T2015TPC28T
C2013
C2013
C2014
C2014
1UF/6.3V
1UF/6.3V
1 2
GND GND
R2031 33OhmR2031 33Ohm
R2033 33OhmR2033 33Ohm
T2045 TPC28TT2045 TPC28T
T2054 TPC28TT2054 TPC28T
T2038 TPC28TT2038 TPC28T
T2039 TPC28TT2039 TPC28T
T2041 TPC28TT2041 TPC28T
T2037 TPC28TT2037 TPC28T
T2055 TPC28TT2055 TPC28T
T2056 TPC28TT2056 TPC28T
T2046 TPC28TT2046 TPC28T
PE_GPIO0 (70)
RTC_CLK (24)
1 2
1 2
R2060 0Ohm
R2060 0Ohm
LPC_AD0 (30,44)
LPC_AD1 (30,44)
LPC_AD2 (30,44)
LPC_AD3 (30,44)
LPC_FRAME# (30,44)
INT_SERIRQ (30)
1
JRST1
JRST1
112
SGL_JUMP
SGL_JUMP
@
@
2008/0805 Add C2024 for NB_RST# Glitch
2008.03.05
CLK_SIOPCI (24)
PCI_CLK3 (24)
/X
/X
1 2
PE_GPIO1 (77)
PM_CLKRUN# (30)
LPC_CLKDEBUG (24,44)
LPC_CLKEC (24,30)
+VCC_RTC
T2016TPC28T T2016TPC28T
TF1 TPC28TTF1 TPC28T
2
NB_RST# (12,33,53)
BUF_PLT_RST# (5,30,70)
NB_RST#
12
C2024
C2024
0.1UF/10V
0.1UF/10V
@
@
GND Size Project Name
2
R2009 R2036 R2037 PN to 10G212000004010
C2019 15PF/50V
C2019 15PF/50V
1 2
/X
/X
C2021 15PF/50V
C2021 15PF/50V
1 2
/X
/X
C2022 15PF/50V
C2022 15PF/50V
1 2
/X
/X
GND
2008.03.11
C2018
INT_VGA_EN# (78)
0109
ㄛ
C2019ㄛC2020ㄛC2017ㄛC2021ㄛ C2022 change to 15pf,optional is N/A
internal Pull Up 8.2K
INTRUDER_ALERT#
D2001
D2001
2
3
1
/X
/X
510Ohm
510Ohm
12
GND
1
R2026
R2026
RB715F
RB715F
1 2
CLK_SIOPCI
LPC_CLKDEBUG
LPC_CLKEC
08.07.22
+VCC_RTC
+3VA
+RTCBAT
R2022
R2022
0110 add for safety
1KOhm
1KOhm
/X
/X
J2001
J2001
3
SIDE1
1
1
2
2
4
SIDE2
WTOB_CON_2P
WTOB_CON_2P
R2024
R2024
/X
/X
1MOhm
1MOhm
1 2
2008.03.03
D2001 R2022 optional change to /X, R2035 change to N/A
SB700_CPU/PCIE/LPC/CLK
SB700_CPU/PCIE/LPC/CLK
SB700_CPU/PCIE/LPC/CLK
Title :
Title :
Title :
Engineer:
Engineer:
K40AA
K40AA
K40AA
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
of
of
20 94Wednesday, April 08, 2009
20 94Wednesday, April 08, 2009
20 94Wednesday, April 08, 2009
Rev
Rev
Rev
1.00
1.00
1.00
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