Asus FA506Q Schematic

11

Vinafix.com

2

2

3

3

4

4

5

5

6

6

7

7

8

8

Asus 2021 " AMD+GN20 E3/E5 Block Diagram"

01

STACKUP

SBUSBU

TOP
SGND
IN1
IN5IN5
IN2
IN3
SVCCSVCC
IN4
SGND1
BOT

ITE8851
PD controllerPD controller

A AA

A

re-driv

27MHz

VRAM GDDR6 *6 or 8 pcsVRAM GDDR6 *6 or 8 pcs

256M x32256M x32

er IC

SODIMM1

Max. 16GBMax. 16GB

SODIMM2

Max. 16GB

M.2 2280 SSD1M.2 2280 SSD1

(PCIEX4)

STDSTD

STDSTD

DDR4 3200MHz

Channel AChannel A

DDR4 3200MHz

Channel BChannel B

PCIEx4 32GB/sPCIEx4 32GB/s

AMD APU

Cezanne(FP6)Cezanne(FP6)

Power : 45 (Watt)

ackage : FP6 BGA (Type1)

P
Size : 25X35 (mm)
Die Size : 11.25X14.15(mm)Die Size : 11.25X14.15(mm)

PG.2~8PG.2~8

PEG
X8 LanesX8 Lanes

TMDS

NVIDIA GN20 E3/E5NVIDIA GN20 E3/E5

Package size : 40*40mmPackage size : 40*40mm

TGP:90WTGP:90W

DP1.4

B

B BB

M.2 2280 SSD2M.2 2280 SSD2

(PCIEX4)(PCIEX4)

PCIEx4 32GB/sPCIEx4 32GB/s

USB 3.1USB 3.1

USB 3.0USB 3.0

USB BoardUSB Board

USB 3.0 Port1USB 3.0 Port1

USB 3.0 Port2

USB 3.0 Port3USB 3.0 Port3

eDP Panel FHD

HDMI2.0PS8209

PS8802QFN52GTR-A2
DP MUXDP MUX

Type C PortsType C Ports

I2CI2C

CC

USB 2.0

Storage LED

C

C CC

ROMROM

ITE
IT5570VG-128/D

FANx2
PWM

PWM

D

D DD

1

1

Backlight

RR

XIT5570VG-128/DX

Keyboard

Power LED

CAPS LED

2

2

SPISPI

LPC

Power LEDPower LED

RF LED
Battery LED

Storage LEDStorage LED

LED BoardLED Board

HDAHDA

AUDIO CODEC

ALC3251-CG

DMICx2

3

3

Combo
Jackx1

PCI-E x 1 Gen1

LAN
RTL8111H
10/100/1G

I2CI2C

4

4

SPK x2

RJ45
Conn

WLAN
BT COMBO
M.2 2230

CAMCAM

TouchpadTouchpad

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

Date: Sheet

Date: SheetSheet of

5

5

6

6

Date: SheetSheet of

7

7

PROJECT :PROJECT :

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

NJF

NJF

NJF

Sheet of

1 63

1 63

1 63

8

8

1A

1A

1A

55

Vinafix.com

Model

FA506/706
(QM/QR)

REV

01 ER 33 EE ER01 : Support PLDR add BT_Disable# and WLAN_Disable#

4

4

3

3

2

2

1

1

CHANGE LIST

Owner Change explanationPageStageItem

02

02 ER 30 EE ER02 : Change USB2.0 ESD SD19 .SD20. SD21 Diode for ASUS request.

03 ER 31 EE ER02 : Change USB2.0 ESD SD19 .SD20. SD21 Diode for ASUS request.

D DD

D

SR to ER

04 ER 06 EE ER03 : Add R886 for EC initial (SPICK_EN) .

05 ER 06 EE ER04 : Change GPIO pin AGPIO91 to AGPIO21 for Modern Standby request.

06 ER 08 EE ER05 : Reserved for APU power sequence (+0.75V_S5 --> +1.8V_S5 --> +3V_S5)

07 ER 36 EE ER06 : Reserved SPDIF-OUT pull-down 10kohm

08 ER 39 EE ER07 : Change FAN connector from 5-pin to 4-pin for CN13 and CN14 .

09 ER 29 EE ER08 : Reserved SD22 for ESD request .

01 PR 05 EE PR01 : R4,R6,R22 Change 1K from 100K for LCD panel PSR issue.

02 PR 06 EE PR02 : Add R890 and short pad R94 for SPI_CLK waceform.

03 PR 17 EE PR03 : Add S13 GASKET for EMI request.

04 PR 22 EE PR04 : Reserved VC5729 ,VC5730 for Power malfunction, GPU lost.

C

C CC

ER to PR

05 PR 22 EE PR05 : ROM_SCLK follow NVDIA CRB board pull-up.

06 PR 23 EE PR06 : Remove VR5087 , follow NVDIA CRB baord.

07 PR 29 EE PR07 : Change F1 from 1.5A to 2.5A for Factory issue.

08 PR 30 EE PR08 : Change CC1 & CC2 ESD to single pin for SD19 leakage issue on Type C port.

09 PR 30 EE PR09 : Change SU13 VIN (pin3) from +1.8V_S5 to +3V_S5 for power plane is not enough.

10 PR 33 EE PR10 : Un-mount R853 for power management by customer's table list.

11 PR 33 EE PR11 : Un-mount R887 , R888 (WLAN & BT do not support PLDR)

12 PR 35 EE PR12 : Change TU1 power rail from 51225_LDO3 to +3V for power consumption under 0.4mA on bettery mode .

13 PR 35 EE PR13 : Change TU2 power rail from 51225_LDO3 to +3V for power consumption under 0.4mA on bettery mode .

14 PR 37 EE PR14 : Change KU1 LPC LAD0~LAD3 topology for ESD issue.

B

B BB

15 PR 37 EE PR15 : Reserved KR128 for S0i3 , EC GPC3 used for dGPU ID for E5 & E3

16 PR 37 EE PR16 : Reserved KR118 for LID_SW CMOS type ; Reserved KR121 for bettery mode power consumption.

17 PR 38 EE PR17 : Un-mount KPSW1 , debug only for SR & ER stage .

18 PR 38 EE PR18 : Change KHE1 power rail from +3VPCU to +3V_S5 for power consumption under 0.4mA on bettery mode .

19 PR 41 EE PR19 : Reserved R855 for power management by customer's table list.

20 PR 37 EE PR20 : Mount KESD3 , KESD4 for ESD issue.

01 MP 06 EE MP01 : Mount R83 for PCIe_WAKE#

02 MP 35 EE MP02 : Change TU1 and TU2 power rail from +3V to 51225_LDO3

A

A AA

5

5

PR to MP

03 MP 38 EE MP03 : Add KHE1 power rail from +3V_S5 to +3V_PCU.

DOC NO.

PROJECT MODEL :

PART NUMBER: DRAWING BY: REVISON:

4

4

3

3

DATE:

2019/06/15NJF APPROVED BY:

1A

2

2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

NJF

PROJECT :PROJECT :

NJF

PROJECT :PROJECT :

Change list

Change list

Change list

1

1

NJF

Sheet of

Sheet of

Sheet of

2 63Thursday, November 19, 2020

2 63Thursday, November 19, 2020

2 63Thursday, November 19, 2020

2A

2A

2A

55

Vinafix.com

APU PCIE

PEG_RXP0(20)

(20)

PEG_RXN0(20)(20)

(20)

D

D DD

dGPU

(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

PEG_RXP1(20)
PEG_RXN1(20)

PEG_RXP2(20)
PEG_RXN2(20)

PEG_RXP3(20)
PEG_RXN3(20)

PEG_RXP4(20)
PEG_RXN4(20)

PEG_RXP5(20)
PEG_RXN5(20)

PEG_RXP6(20)
PEG_RXN6(20)

PEG_RXP7(20)
PEG_RXN7(20)

4

4

FP6

FP6

216NOPNFP6216NOPNFP6

U1BU1B

PCIEPCIE

G13

P_GFX_RXP0P_GFX_RXP0

F13

P_GFX_RXN0P_GFX_RXN0

J14

P_GFX_RXP1P_GFX_RXP1

H14

P_GFX_RXN1P_GFX_RXN1

G15

P_GFX_RXP2P_GFX_RXP2

F15

P_GFX_RXN2P_GFX_RXN2

J15

P_GFX_RXP3P_GFX_RXP3

K15

P_GFX_RXN3P_GFX_RXN3

H16

P_GFX_RXP4P_GFX_RXP4

J16

P_GFX_RXN4P_GFX_RXN4

F18

P_GFX_RXP5P_GFX_RXP5

G18

P_GFX_RXN5P_GFX_RXN5

J18

P_GFX_RXP6P_GFX_RXP6

K18

P_GFX_RXN6P_GFX_RXN6

H19

P_GFX_RXP7P_GFX_RXP7

G19

P_GFX_RXN7P_GFX_RXN7

3

3

2

2

1

1

0303

F4

P_GFX_TXP0

P_GFX_TXN0P_GFX_TXN0

P_GFX_TXP1P_GFX_TXP1

P_GFX_TXN1P_GFX_TXN1

P_GFX_TXP2P_GFX_TXP2

P_GFX_TXN2P_GFX_TXN2

P_GFX_TXP3P_GFX_TXP3

P_GFX_TXN3P_GFX_TXN3

P_GFX_TXP4P_GFX_TXP4

P_GFX_TXN4P_GFX_TXN4

P_GFX_TXP5P_GFX_TXP5

P_GFX_TXN5P_GFX_TXN5

P_GFX_TXP6P_GFX_TXP6

P_GFX_TXN6P_GFX_TXN6

P_GFX_TXP7P_GFX_TXP7

P_GFX_TXN7P_GFX_TXN7

F2

F3
E4

E1
C1

D5
E6

C6
D6

B6
C7

D8
B8

C8
A8

PEG_TXP0 (20)
PEG_TXN0 (20)

PEG_TXP1 (20)
PEG_TXN1 (20)

PEG_TXP2 (20)
PEG_TXN2 (20)

PEG_TXP3 (20)
PEG_TXN3 (20)

PEG_TXP4 (20)
PEG_TXN4 (20)

PEG_TXP5 (20)
PEG_TXN5 (20)

PEG_TXP6 (20)
PEG_TXN6 (20)

PEG_TXP7 (20)
PEG_TXN7 (20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

(20)
(20)

dGPU

G11

PCIE_RXP0_GLAN(41)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(41)
(41)

(33)
(33)

PCIE_RXN0_GLAN(41)

PCIE_RXP1_WLAN(33)
PCIE_RXN1_WLAN(33)

GPP_PCIE_RXP4_SSD(33)
GPP_PCIE_RXN4_SSD(33)

GPP_PCIE_RXP5_SSD(33)
GPP_PCIE_RXN5_SSD(33)

GPP_PCIE_RXP6_SSD(33)
GPP_PCIE_RXN6_SSD(33)

GPP_PCIE_RXP7_SSD(33)
GPP_PCIE_RXN7_SSD(33)

GPP_PCIE_RXP8_SSD(33)
GPP_PCIE_RXN8_SSD(33)

GPP_PCIE_RXP9_SSD(33)
GPP_PCIE_RXN9_SSD(33)

GPP_PCIE_RXP10_SSD(33)
GPP_PCIE_RXN10_SSD(33)

GPP_PCIE_RXP11_SSD(33)
GPP_PCIE_RXN11_SSD(33)

4

4

C CC

C

GLAN GLAN

WLAN WLAN

M.2 SSD1

B BB

B

M.2 SSD2M.2 SSD2

A AA

A

5

5

P_GPP_RXP0P_GPP_RXP0

F11

P_GPP_RXN0P_GPP_RXN0

J10

P_GPP_RXP1P_GPP_RXP1

H10

P_GPP_RXN1P_GPP_RXN1

G8

P_GPP_RXP2/SATA0_RXPP_GPP_RXP2/SATA0_RXP

F8

P_GPP_RXN2/SATA0_RXNP_GPP_RXN2/SATA0_RXN

G6

P_GPP_RXP3/SATA1_RXPP_GPP_RXP3/SATA1_RXP

F7

P_GPP_RXN3/SATA1_RXNP_GPP_RXN3/SATA1_RXN

M9

P_GPP_RXP4P_GPP_RXP4

M8

P_GPP_RXN4P_GPP_RXN4

L7

P_GPP_RXP5P_GPP_RXP5

L6

P_GPP_RXN5P_GPP_RXN5

K7

P_GPP_RXP6P_GPP_RXP6

K8

P_GPP_RXN6P_GPP_RXN6

H6

P_GPP_RXP7P_GPP_RXP7

H7

P_GPP_RXN7P_GPP_RXN7

L9

P_GPP_RXP8/SATA2_RXPP_GPP_RXP8/SATA2_RXP

L10

P_GPP_RXN8/SATA2_RXNP_GPP_RXN8/SATA2_RXN

K11

P_GPP_RXP9/SATA3_RXPP_GPP_RXP9/SATA3_RXP

J11

P_GPP_RXN9/SATA3_RXNP_GPP_RXN9/SATA3_RXN

J12

P_GPP_RXP10P_GPP_RXP10

H12

P_GPP_RXN10P_GPP_RXN10

J13

P_GPP_RXP11P_GPP_RXP11

K13

P_GPP_RXN11P_GPP_RXN11

FP6 REV 0.92
PART 2 OF 13

P_GPP_TXP2/SATA0_TXPP_GPP_TXP2/SATA0_TXP

P_GPP_TXN2/SATA0_TXNP_GPP_TXN2/SATA0_TXN

P_GPP_TXP3/SATA1_TXPP_GPP_TXP3/SATA1_TXP

P_GPP_TXN3/SATA1_TXNP_GPP_TXN3/SATA1_TXN

P_GPP_TXP8/SATA2_TXPP_GPP_TXP8/SATA2_TXP

P_GPP_TXN8/SATA2_TXNP_GPP_TXN8/SATA2_TXN

P_GPP_TXP9/SATA3_TXPP_GPP_TXP9/SATA3_TXP

P_GPP_TXN9/SATA3_TXNP_GPP_TXN9/SATA3_TXN

3

3

P_GPP_TXP0P_GPP_TXP0

P_GPP_TXN0P_GPP_TXN0

P_GPP_TXP1P_GPP_TXP1

P_GPP_TXN1P_GPP_TXN1

P_GPP_TXP4P_GPP_TXP4

P_GPP_TXN4P_GPP_TXN4

P_GPP_TXP5P_GPP_TXP5

P_GPP_TXN5P_GPP_TXN5

P_GPP_TXP6P_GPP_TXP6

P_GPP_TXN6P_GPP_TXN6

P_GPP_TXP7P_GPP_TXP7

P_GPP_TXN7P_GPP_TXN7

P_GPP_TXP10P_GPP_TXP10

P_GPP_TXN10P_GPP_TXN10

P_GPP_TXP11P_GPP_TXP11

P_GPP_TXN11P_GPP_TXN11

L3
L1

L4
L2

M4
M2

N3
N1

T2
T4

R1
R3

P2
P4

N2
N4

K2
K4

J4
J2

H3
H1

H4
H2

PCIE_TXP0_GLAN (41)
PCIE_TXN0_GLAN (41)

PCIE_TXP1_WLAN (33)
PCIE_TXN1_WLAN (33)

DEL HDD for GN20E35....Tommy0504

DEL HDD for GN20E35....Tommy0504

GPP_PCIE_TXP4_SSD (33)
GPP_PCIE_TXN4_SSD (33)

GPP_PCIE_TXP5_SSD (33)
GPP_PCIE_TXN5_SSD (33)

GPP_PCIE_TXP6_SSD (33)
GPP_PCIE_TXN6_SSD (33)

GPP_PCIE_TXP7_SSD (33)
GPP_PCIE_TXN7_SSD (33)

GPP_PCIE_TXP8_SSD (33)
GPP_PCIE_TXN8_SSD (33)

GPP_PCIE_TXP9_SSD (33)
GPP_PCIE_TXN9_SSD (33)

GPP_PCIE_TXP10_SSD (33)
GPP_PCIE_TXN10_SSD (33)

GPP_PCIE_TXP11_SSD (33)
GPP_PCIE_TXN11_SSD (33)(33)

2

2

(41)
(41)

(33)

(33)

HDD

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)
(33)

(33)

Size Document Number R

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: SheetSheet of

Date: SheetSheet of

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

M.2 SSD1

M.2 SSD2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

PROJECT :PROJECT :

PROJECT :PROJECT :

RR 1/7(PCIE/SATA)

RR 1/7(PCIE/SATA)

RR 1/7(PCIE/SATA)

NJF

NJF

NJF

Sheet of

3 63

3 63

3 6363

1

1

ev

1A

1A

1A

55

Vinafix.com

APU MEMORY

M_A_A[13:0](18)(18)

D DD

D

C

C CC

B

B BB

M_A_WE#(18)

(18)
(18)

M_A_CAS#(18)
M_A_RAS#(18)(18)

M_A_BS#0(18)

(18)
(18)

M_A_BS#1(18)

(18)

M_A_BG#0(18)

(18)

M_A_BG#1(18)

M_A_ACT#(18)

(18)

M_A_DM[7:0](18)

(18)

(18)

M_A_DQSP0(18)

(18)

M_A_DQSN0(18)
M_A_DQSP1(18)

(18)
(18)

M_A_DQSN1(18)

(18)

M_A_DQSP2(18)

(18)

M_A_DQSN2(18)

(18)

M_A_DQSP3(18)

(18)

M_A_DQSN3(18)
M_A_DQSP4(18)

(18)

M_A_DQSN4(18)

(18)

M_A_DQSP5(18)

(18)

M_A_DQSN5(18)

(18)

M_A_DQSP6(18)

(18)
(18)

M_A_DQSN6(18)

(18)

M_A_DQSP7(18)

(18)

M_A_DQSN7(18)

M_A_CLKP0(18)

(18)

M_A_CLKN0(18)

(18)

M_A_CLKP1(18)

(18)

M_A_CLKN1(18)

(18)

(18)

M_A_CS#0(18)
M_A_CS#1(18)

(18)

(18)

M_A_CKE0(18)

(18)

M_A_CKE1(18)

M_A_ODT0(18)

(18)

M_A_ODT1(18)

(18)

M_A_ALERT#(18)

(18)

(18)

M_A_EVENT#(18)

(18)

M_A_RST#(18)

M_A_A0

M_A_A0
M_A_A1

M_A_A1
M_A_A2

M_A_A2
M_A_A3

M_A_A3
M_A_A4

M_A_A4
M_A_A5

M_A_A5
M_A_A6M_A_A6
M_A_A7

M_A_A7
M_A_A8

M_A_A8
M_A_A9

M_A_A9
M_A_A10

M_A_A10
M_A_A11

M_A_A11
M_A_A12

M_A_A12
M_A_A13

M_A_A13

M_A_DM0

M_A_DM0
M_A_DM1

M_A_DM1
M_A_DM2

M_A_DM2
M_A_DM3

M_A_DM3
M_A_DM4

M_A_DM4
M_A_DM5

M_A_DM5
M_A_DM6

M_A_DM6
M_A_DM7

M_A_DM7

M_A_ALERT#

M_A_ALERT#

M_A_EVENT#

M_A_EVENT#

AK26
AG24
AG23
AG26
AG27

AF21
AF22
AF25
AF24

AE21

AL21

AF27
AE23
AM23
AM21

AL27

AL24

AL22
AK27

AE27
AE26

AD22

AP27

AW23

AT21
AV18

W24

AA21

AP23
AP24

AW22

AV22
AT20
AR20
AR18
AT18

AJ25

AJ24

AJ22

AJ21

AL25
AM26

AD24
AD25

AM24
AM27

AE24

AK23
AD27

L27
N23
R27
Y24

M25
M24
P22
P21
T24
R24

Y21

Y26
Y27

MA_ADD0/RSVDMA_ADD0/RSVD

MA_ADD1/RSVDMA_ADD1/RSVD

MA_ADD2/MAB_CA0MA_ADD2/MAB_CA0

MA_ADD3/MAA_CA4MA_ADD3/MAA_CA4

MA_ADD4/MAA_CA5MA_ADD4/MAA_CA5

MA_ADD5/MAA_CA3MA_ADD5/MAA_CA3

MA_ADD6/MAA_CA2MA_ADD6/MAA_CA2

MA_ADD7/RSVDMA_ADD7/RSVD

MA_ADD8/RSVDMA_ADD8/RSVD

MA_ADD9/RSVDMA_ADD9/RSVD

MA_ADD10/MAB_CS_L1MA_ADD10/MAB_CS_L1

MA_ADD11/MAA_CKE1MA_ADD11/MAA_CKE1

MA_ADD12/MAA_CKE0MA_ADD12/MAA_CKE0

MA_ADD13_BANK2/RSVDMA_ADD13_BANK2/RSVD

MA_WE_L_ADD14/MAB_CKE1MA_WE_L_ADD14/MAB_CKE1

MA_CAS_L_ADD15/RSVDMA_CAS_L_ADD15/RSVD

MA_RAS_L_ADD16/MAB_CKE0MA_RAS_L_ADD16/MAB_CKE0

MA_BANK0/MAB_CS_L0MA_BANK0/MAB_CS_L0

MA_BANK1/MAB_CA1MA_BANK1/MAB_CA1

MA_BG0/MAA_CS_L1MA_BG0/MAA_CS_L1

MA_BG1/MAA_CS_L0MA_BG1/MAA_CS_L0

MA_ACT_L/RSVDMA_ACT_L/RSVD

MA_DM0/MAA_DM1MA_DM0/MAA_DM1

MA_DM1/MAA_DM0MA_DM1/MAA_DM0

MA_DM2/MAA_DM2MA_DM2/MAA_DM2

MA_DM3/MAA_DM3MA_DM3/MAA_DM3

MA_DM4/MAB_DM2MA_DM4/MAB_DM2

MA_DM5/MAB_DM3MA_DM5/MAB_DM3

MA_DM6/MAB_DM1MA_DM6/MAB_DM1

MA_DM7/MAB_DM0MA_DM7/MAB_DM0

RSVD_52RSVD_52

MA_DQS_H0/MAA_DQS_H1MA_DQS_H0/MAA_DQS_H1

MA_DQS_L0/MAA_DQS_L1MA_DQS_L0/MAA_DQS_L1

MA_DQS_H1/MAA_DQS_H0MA_DQS_H1/MAA_DQS_H0

MA_DQS_L1/MAA_DQS_L0MA_DQS_L1/MAA_DQS_L0

MA_DQS_H2/MAA_DQS_H2MA_DQS_H2/MAA_DQS_H2

MA_DQS_L2/MAA_DQS_L2MA_DQS_L2/MAA_DQS_L2

MA_DQS_H3/MAA_DQS_H3MA_DQS_H3/MAA_DQS_H3

MA_DQS_L3/MAA_DQS_L3MA_DQS_L3/MAA_DQS_L3

MA_DQS_H4/MAB_DQS_H2MA_DQS_H4/MAB_DQS_H2

MA_DQS_L4/MAB_DQS_L2MA_DQS_L4/MAB_DQS_L2

MA_DQS_H5/MAB_DQS_H3MA_DQS_H5/MAB_DQS_H3

MA_DQS_L5/MAB_DQS_L3MA_DQS_L5/MAB_DQS_L3

MA_DQS_H6/MAB_DQS_H1MA_DQS_H6/MAB_DQS_H1

MA_DQS_L6/MAB_DQS_L1MA_DQS_L6/MAB_DQS_L1

MA_DQS_H7/MAB_DQS_H0MA_DQS_H7/MAB_DQS_H0

MA_DQS_L7/MAB_DQS_L0MA_DQS_L7/MAB_DQS_L0

RSVD_58RSVD_58

RSVD_59RSVD_59

MA_CLK_H0/MAA_CKTMA_CLK_H0/MAA_CKT

MA_CLK_L0/MAA_CKCMA_CLK_L0/MAA_CKC

MA_CLK_H1/MAB_CKTMA_CLK_H1/MAB_CKT

MA_CLK_L1/MAB_CKCMA_CLK_L1/MAB_CKC

MA_CS_L0/MAB_CA2MA_CS_L0/MAB_CA2

MA_CS_L1/MAB_CA5MA_CS_L1/MAB_CA5

MA_CKE0/MAA_CA1MA_CKE0/MAA_CA1

MA_CKE1/MAA_CA0MA_CKE1/MAA_CA0

MA_ODT0/MAB_CA3MA_ODT0/MAB_CA3

MA_ODT1/MAB_CA4MA_ODT1/MAB_CA4

MA_ALERT_L/TEST31AMA_ALERT_L/TEST31A

MA_EVENT_LMA_EVENT_L

MA_RESET_LMA_RESET_L

U1A

MEMORY AMEMORY A

FP6 REV 0.92
PART 1 OF 13

FP6FP6

216NOPNFP6

216NOPNFP6

MA_DATA0/MAA_DATA8MA_DATA0/MAA_DATA8

MA_DATA1/MAA_DATA9MA_DATA1/MAA_DATA9

MA_DATA2/MAA_DATA13MA_DATA2/MAA_DATA13

MA_DATA3/MAA_DATA12MA_DATA3/MAA_DATA12

MA_DATA4/MAA_DATA11MA_DATA4/MAA_DATA11

MA_DATA5/MAA_DATA10MA_DATA5/MAA_DATA10

MA_DATA6/MAA_DATA15MA_DATA6/MAA_DATA15

MA_DATA7/MAA_DATA14MA_DATA7/MAA_DATA14

MA_DATA8/MAA_DATA0MA_DATA8/MAA_DATA0

MA_DATA9/MAA_DATA1MA_DATA9/MAA_DATA1

MA_DATA10/MAA_DATA5MA_DATA10/MAA_DATA5

MA_DATA11/MAA_DATA4MA_DATA11/MAA_DATA4

MA_DATA12/MAA_DATA7MA_DATA12/MAA_DATA7

MA_DATA13/MAA_DATA6MA_DATA13/MAA_DATA6

MA_DATA14/MAA_DATA2MA_DATA14/MAA_DATA2

MA_DATA15/MAA_DATA3MA_DATA15/MAA_DATA3

MA_DATA16/MAA_DATA17MA_DATA16/MAA_DATA17

MA_DATA17/MAA_DATA16MA_DATA17/MAA_DATA16

MA_DATA18/MAA_DATA21MA_DATA18/MAA_DATA21

MA_DATA19/MAA_DATA20MA_DATA19/MAA_DATA20

MA_DATA20/MAA_DATA19MA_DATA20/MAA_DATA19

MA_DATA21/MAA_DATA18MA_DATA21/MAA_DATA18

MA_DATA22/MAA_DATA23MA_DATA22/MAA_DATA23

MA_DATA23/MAA_DATA22MA_DATA23/MAA_DATA22

MA_DATA24/MAA_DATA30MA_DATA24/MAA_DATA30

MA_DATA25/MAA_DATA31MA_DATA25/MAA_DATA31

MA_DATA26/MAA_DATA26MA_DATA26/MAA_DATA26

MA_DATA27/MAA_DATA27MA_DATA27/MAA_DATA27

MA_DATA28/MAA_DATA28MA_DATA28/MAA_DATA28

MA_DATA29/MAA_DATA29MA_DATA29/MAA_DATA29

MA_DATA30/MAA_DATA24MA_DATA30/MAA_DATA24

MA_DATA31/MAA_DATA25MA_DATA31/MAA_DATA25

MA_DATA32/MAB_DATA17MA_DATA32/MAB_DATA17

MA_DATA33/MAB_DATA16MA_DATA33/MAB_DATA16

MA_DATA34/MAB_DATA21MA_DATA34/MAB_DATA21

MA_DATA35/MAB_DATA20MA_DATA35/MAB_DATA20

MA_DATA36/MAB_DATA19MA_DATA36/MAB_DATA19

MA_DATA37/MAB_DATA18MA_DATA37/MAB_DATA18

MA_DATA38/MAB_DATA23MA_DATA38/MAB_DATA23

MA_DATA39/MAB_DATA22MA_DATA39/MAB_DATA22

MA_DATA40/MAB_DATA30MA_DATA40/MAB_DATA30

MA_DATA41/MAB_DATA31MA_DATA41/MAB_DATA31

MA_DATA42/MAB_DATA26MA_DATA42/MAB_DATA26

MA_DATA43/MAB_DATA27MA_DATA43/MAB_DATA27

MA_DATA44/MAB_DATA28MA_DATA44/MAB_DATA28

MA_DATA45/MAB_DATA29MA_DATA45/MAB_DATA29

MA_DATA46/MAB_DATA24MA_DATA46/MAB_DATA24

MA_DATA47/MAB_DATA25MA_DATA47/MAB_DATA25

MA_DATA48/MAB_DATA11MA_DATA48/MAB_DATA11

MA_DATA49/MAB_DATA10MA_DATA49/MAB_DATA10

MA_DATA50/MAB_DATA14MA_DATA50/MAB_DATA14

MA_DATA51/MAB_DATA15MA_DATA51/MAB_DATA15

MA_DATA52/MAB_DATA12MA_DATA52/MAB_DATA12

MA_DATA53/MAB_DATA13MA_DATA53/MAB_DATA13

MA_DATA54/MAB_DATA9MA_DATA54/MAB_DATA9

MA_DATA55/MAB_DATA8MA_DATA55/MAB_DATA8

MA_DATA56/MAB_DATA6MA_DATA56/MAB_DATA6

MA_DATA57/MAB_DATA7MA_DATA57/MAB_DATA7

MA_DATA58/MAB_DATA2MA_DATA58/MAB_DATA2

MA_DATA59/MAB_DATA3MA_DATA59/MAB_DATA3

MA_DATA60/MAB_DATA4MA_DATA60/MAB_DATA4

MA_DATA61/MAB_DATA5MA_DATA61/MAB_DATA5

MA_DATA62/MAB_DATA1MA_DATA62/MAB_DATA1

MA_DATA63/MAB_DATA0MA_DATA63/MAB_DATA0

RSVD_54RSVD_54

RSVD_53RSVD_53

RSVD_68RSVD_68

RSVD_69RSVD_69

RSVD_49RSVD_49

RSVD_48RSVD_48

RSVD_63RSVD_63

RSVD_62RSVD_62

MA_PAROUT/RSVDMA_PAROUT/RSVD

M_DDR4M_DDR4

M_LPDDR4M_LPDDR4

4

4

K27
L26
N26
N27
G27
H27
M27
N24

L23
N21
T21
T22
M22
L24
R21
R23

P24
R26
T27
V27
P25
P27
V23
T25

W22
Y23
AC24
AC23
V21
W21
AA24
AA22

AP26
AN24
AR25
AU26
AN25
AN27
AR27
AU27

AV25
AW25
AV20
AW20
AV27
AW26
AU21
AW21

AT22
AP21
AN19
AN18
AU23
AR22
AN20
AP19

AT19
AW18
AU16
AW16
AW19
AU19
AP16
AT16

W27
W25
AC26
AC27
V26
V24
AA27
AA25

AK24

AN21
AN22

M_A_DQ0

M_A_DQ0
M_A_DQ1

M_A_DQ1
M_A_DQ2

M_A_DQ2
M_A_DQ3

M_A_DQ3
M_A_DQ4

M_A_DQ4
M_A_DQ5

M_A_DQ5
M_A_DQ6

M_A_DQ6
M_A_DQ7

M_A_DQ7

M_A_DQ8

M_A_DQ8
M_A_DQ9

M_A_DQ9
M_A_DQ10

M_A_DQ10
M_A_DQ11

M_A_DQ11
M_A_DQ12

M_A_DQ12
M_A_DQ13

M_A_DQ13
M_A_DQ14

M_A_DQ14
M_A_DQ15

M_A_DQ15

M_A_DQ16

M_A_DQ16
M_A_DQ17

M_A_DQ17
M_A_DQ18

M_A_DQ18
M_A_DQ19

M_A_DQ19
M_A_DQ20

M_A_DQ20
M_A_DQ21

M_A_DQ21
M_A_DQ22

M_A_DQ22
M_A_DQ23

M_A_DQ23

M_A_DQ24

M_A_DQ24
M_A_DQ25

M_A_DQ25
M_A_DQ26

M_A_DQ26
M_A_DQ27

M_A_DQ27
M_A_DQ28

M_A_DQ28
M_A_DQ29

M_A_DQ29
M_A_DQ30

M_A_DQ30
M_A_DQ31

M_A_DQ31

M_A_DQ32

M_A_DQ32
M_A_DQ33

M_A_DQ33
M_A_DQ34

M_A_DQ34
M_A_DQ35

M_A_DQ35
M_A_DQ36

M_A_DQ36
M_A_DQ37

M_A_DQ37
M_A_DQ38

M_A_DQ38
M_A_DQ39

M_A_DQ39

M_A_DQ40

M_A_DQ40
M_A_DQ41

M_A_DQ41
M_A_DQ42

M_A_DQ42
M_A_DQ43

M_A_DQ43
M_A_DQ44

M_A_DQ44
M_A_DQ45

M_A_DQ45
M_A_DQ46

M_A_DQ46
M_A_DQ47

M_A_DQ47

M_A_DQ48

M_A_DQ48
M_A_DQ49

M_A_DQ49
M_A_DQ50

M_A_DQ50
M_A_DQ51

M_A_DQ51
M_A_DQ52

M_A_DQ52
M_A_DQ53

M_A_DQ53
M_A_DQ54

M_A_DQ54
M_A_DQ55

M_A_DQ55

M_A_DQ56

M_A_DQ56
M_A_DQ57

M_A_DQ57
M_A_DQ58

M_A_DQ58
M_A_DQ59

M_A_DQ59
M_A_DQ60

M_A_DQ60
M_A_DQ61

M_A_DQ61
M_A_DQ62

M_A_DQ62
M_A_DQ63

M_A_DQ63

M_A_PARITY

M_A_PARITY

+1.2V_SUS

+1.2V_SUS

M_A_PARITY (18)

M_A_DQ[63:0] (18)

(18)

(19)

M_B_DM[7:0](19)

(19)

(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)
(19)

(19)

(19)

3

3

(18)

M_B_A[13:0](19)

(19)

M_B_WE#(19)

(19)

M_B_CAS#(19)

(19)

M_B_RAS#(19)

M_B_BS#0(19)

(19)

M_B_BS#1(19)

(19)

M_B_BG#0(19)

(19)

M_B_BG#1(19)

(19)

M_B_ACT#(19)

(19)

M_B_DQSP0(19)
M_B_DQSN0(19)
M_B_DQSP1(19)
M_B_DQSN1(19)
M_B_DQSP2(19)
M_B_DQSN2(19)
M_B_DQSP3(19)
M_B_DQSN3(19)
M_B_DQSP4(19)
M_B_DQSN4(19)
M_B_DQSP5(19)
M_B_DQSN5(19)
M_B_DQSP6(19)
M_B_DQSN6(19)
M_B_DQSP7(19)
M_B_DQSN7(19)

M_B_CLKP0(19)

(19)
(19)

M_B_CLKN0(19)
M_B_CLKP1(19)

(19)
(19)

M_B_CLKN1(19)

M_B_CS#0(19)

(19)

M_B_CS#1(19)

(19)

M_B_CKE0(19)

(19)

M_B_CKE1(19)

(19)

(19)

M_B_ODT0(19)
M_B_ODT1(19)

(19)

M_B_ALERT#(19)

M_B_EVENT#(19)

(19)

M_B_RST#(19)

M_B_A0

M_B_A0
M_B_A1

M_B_A1
M_B_A2

M_B_A2
M_B_A3

M_B_A3
M_B_A4

M_B_A4
M_B_A5

M_B_A5
M_B_A6

M_B_A6
M_B_A7

M_B_A7
M_B_A8

M_B_A8
M_B_A9

M_B_A9
M_B_A10

M_B_A10
M_B_A11

M_B_A11
M_B_A12

M_B_A12
M_B_A13

M_B_A13

M_B_DM0

M_B_DM0
M_B_DM1

M_B_DM1
M_B_DM2

M_B_DM2
M_B_DM3

M_B_DM3
M_B_DM4

M_B_DM4
M_B_DM5

M_B_DM5
M_B_DM6

M_B_DM6
M_B_DM7

M_B_DM7

M_B_ALERT#

M_B_ALERT#

M_B_EVENT#

M_B_EVENT#

AM29
AH31

AJ30
AH29
AG32
AG30
AG31
AF30
AG29
AF29
AM30
AF31
AE32
AP30
AP31
AP29
AN29

AN31
AM32

AD29
AD31

AD30

AU30
BD28
BB23
BD20

W31

AU29
AU31
BA27
BB27
BC23
BA23
BC20
BA20

AJ31
AK30
AK32
AL31

AN30
AR31

AC31
AC29

AP32
AR29

AE30

AL30
AC32

C30
H32
M29
T29

E29
D28

J31

J29
N30
M31
T30
T31

Y32
Y30

MB_ADD0/RSVDMB_ADD0/RSVD

MB_ADD1/RSVDMB_ADD1/RSVD

MB_ADD2/MBB_CA0MB_ADD2/MBB_CA0

MB_ADD3/MBA_CA4MB_ADD3/MBA_CA4

MB_ADD4/MBA_CA5MB_ADD4/MBA_CA5

MB_ADD5/MBA_CA3MB_ADD5/MBA_CA3

MB_ADD6/MBA_CA2MB_ADD6/MBA_CA2

MB_ADD7/RSVDMB_ADD7/RSVD

MB_ADD8/RSVDMB_ADD8/RSVD

MB_ADD9/RSVDMB_ADD9/RSVD

MB_ADD10/MBB_CS_L1MB_ADD10/MBB_CS_L1

MB_ADD11/MBA_CKE1MB_ADD11/MBA_CKE1

MB_ADD12/MBA_CKE0MB_ADD12/MBA_CKE0

MB_ADD13_BANK2/RSVDMB_ADD13_BANK2/RSVD

MB_WE_L_ADD14/MBB_CKE1MB_WE_L_ADD14/MBB_CKE1

MB_CAS_L_ADD15/RSVDMB_CAS_L_ADD15/RSVD

MB_RAS_L_ADD16/MBB_CKE0MB_RAS_L_ADD16/MBB_CKE0

MB_BANK0/MBB_CS_L0MB_BANK0/MBB_CS_L0

MB_BANK1/MBB_CA1MB_BANK1/MBB_CA1

MB_BG0/MBA_CS_L1MB_BG0/MBA_CS_L1

MB_BG1/MBA_CS_L0MB_BG1/MBA_CS_L0

MB_ACT_L/RSVDMB_ACT_L/RSVD

MB_DM0/MBA_DM1MB_DM0/MBA_DM1

MB_DM1/MBA_DM0MB_DM1/MBA_DM0

MB_DM2/MBA_DM2MB_DM2/MBA_DM2

MB_DM3/MBA_DM3MB_DM3/MBA_DM3

MB_DM4/MBB_DM2MB_DM4/MBB_DM2

MB_DM5/MBB_DM3MB_DM5/MBB_DM3

MB_DM6/MBB_DM1MB_DM6/MBB_DM1

MB_DM7/MBB_DM0MB_DM7/MBB_DM0

RSVD_57RSVD_57

MB_DQS_H0/MBA_DQS_H1MB_DQS_H0/MBA_DQS_H1

MB_DQS_L0/MBA_DQS_L1MB_DQS_L0/MBA_DQS_L1

MB_DQS_H1/MBA_DQS_H0MB_DQS_H1/MBA_DQS_H0

MB_DQS_L1/MBA_DQS_L0MB_DQS_L1/MBA_DQS_L0

MB_DQS_H2/MBA_DQS_H2MB_DQS_H2/MBA_DQS_H2

MB_DQS_L2/MBA_DQS_L2MB_DQS_L2/MBA_DQS_L2

MB_DQS_H3/MBA_DQS_H3MB_DQS_H3/MBA_DQS_H3

MB_DQS_L3/MBA_DQS_L3MB_DQS_L3/MBA_DQS_L3

MB_DQS_H4/MBB_DQS_H2MB_DQS_H4/MBB_DQS_H2

MB_DQS_L4/MBB_DQS_L2MB_DQS_L4/MBB_DQS_L2

MB_DQS_H5/MBB_DQS_H3MB_DQS_H5/MBB_DQS_H3

MB_DQS_L5/MBB_DQS_L3MB_DQS_L5/MBB_DQS_L3

MB_DQS_H6/MBB_DQS_H1MB_DQS_H6/MBB_DQS_H1

MB_DQS_L6/MBB_DQS_L1MB_DQS_L6/MBB_DQS_L1

MB_DQS_H7/MBB_DQS_H0MB_DQS_H7/MBB_DQS_H0

MB_DQS_L7/MBB_DQS_L0MB_DQS_L7/MBB_DQS_L0

RSVD_61RSVD_61

RSVD_60RSVD_60

MB_CLK_H0/MBA_CKTMB_CLK_H0/MBA_CKT

MB_CLK_L0/MBA_CKCMB_CLK_L0/MBA_CKC

MB_CLK_H1/MBB_CKTMB_CLK_H1/MBB_CKT

MB_CLK_L1/MBB_CKCMB_CLK_L1/MBB_CKC

MB_CS_L0/MBB_CA2MB_CS_L0/MBB_CA2

MB_CS_L1/MBB_CA5MB_CS_L1/MBB_CA5

MB_CKE0/MBA_CA1MB_CKE0/MBA_CA1

MB_CKE1/MBA_CA0MB_CKE1/MBA_CA0

MB_ODT0/MBB_CA3MB_ODT0/MBB_CA3

MB_ODT1/MBB_CA4MB_ODT1/MBB_CA4

MB_ALERT_L/TEST31BMB_ALERT_L/TEST31B

MB_EVENT_LMB_EVENT_L

MB_RESET_LMB_RESET_L

MEMORY BMEMORY B

FP6 REV 0.92
PART 9 OF 13

FP6FP6

216NOPNFP6

216NOPNFP6

U1I

MB_DATA0/MBA_DATA8MB_DATA0/MBA_DATA8

MB_DATA1/MBA_DATA9MB_DATA1/MBA_DATA9

MB_DATA2/MBA_DATA13MB_DATA2/MBA_DATA13

MB_DATA3/MBA_DATA12MB_DATA3/MBA_DATA12

MB_DATA4/MBA_DATA11MB_DATA4/MBA_DATA11

MB_DATA5/MBA_DATA10MB_DATA5/MBA_DATA10

MB_DATA6/MBA_DATA15MB_DATA6/MBA_DATA15

MB_DATA7/MBA_DATA14MB_DATA7/MBA_DATA14

MB_DATA8/MBA_DATA0MB_DATA8/MBA_DATA0

MB_DATA9/MBA_DATA1MB_DATA9/MBA_DATA1

MB_DATA10/MBA_DATA5MB_DATA10/MBA_DATA5

MB_DATA11/MBA_DATA4MB_DATA11/MBA_DATA4

MB_DATA12/MBA_DATA7MB_DATA12/MBA_DATA7

MB_DATA13/MBA_DATA6MB_DATA13/MBA_DATA6

MB_DATA14/MBA_DATA2MB_DATA14/MBA_DATA2

MB_DATA15/MBA_DATA3MB_DATA15/MBA_DATA3

MB_DATA16/MBA_DATA21MB_DATA16/MBA_DATA21

MB_DATA17/MBA_DATA22MB_DATA17/MBA_DATA22

MB_DATA18/MBA_DATA20MB_DATA18/MBA_DATA20

MB_DATA19/MBA_DATA19MB_DATA19/MBA_DATA19

MB_DATA20/MBA_DATA17MB_DATA20/MBA_DATA17

MB_DATA21/MBA_DATA16MB_DATA21/MBA_DATA16

MB_DATA22/MBA_DATA18MB_DATA22/MBA_DATA18

MB_DATA23/MBA_DATA23MB_DATA23/MBA_DATA23

MB_DATA24/MBA_DATA30MB_DATA24/MBA_DATA30

MB_DATA25/MBA_DATA31MB_DATA25/MBA_DATA31

MB_DATA26/MBA_DATA26MB_DATA26/MBA_DATA26

MB_DATA27/MBA_DATA27MB_DATA27/MBA_DATA27

MB_DATA28/MBA_DATA28MB_DATA28/MBA_DATA28

MB_DATA29/MBA_DATA29MB_DATA29/MBA_DATA29

MB_DATA30/MBA_DATA25MB_DATA30/MBA_DATA25

MB_DATA31/MBA_DATA24MB_DATA31/MBA_DATA24

MB_DATA32/MBB_DATA16MB_DATA32/MBB_DATA16

MB_DATA33/MBB_DATA17MB_DATA33/MBB_DATA17

MB_DATA34/MBB_DATA21MB_DATA34/MBB_DATA21

MB_DATA35/MBB_DATA20MB_DATA35/MBB_DATA20

MB_DATA36/MBB_DATA19MB_DATA36/MBB_DATA19

MB_DATA37/MBB_DATA18MB_DATA37/MBB_DATA18

MB_DATA38/MBB_DATA23MB_DATA38/MBB_DATA23

MB_DATA39/MBB_DATA22MB_DATA39/MBB_DATA22

MB_DATA40/MBB_DATA29MB_DATA40/MBB_DATA29

MB_DATA41/MBB_DATA28MB_DATA41/MBB_DATA28

MB_DATA42/MBB_DATA24MB_DATA42/MBB_DATA24

MB_DATA43/MBB_DATA25MB_DATA43/MBB_DATA25

MB_DATA44/MBB_DATA27MB_DATA44/MBB_DATA27

MB_DATA45/MBB_DATA26MB_DATA45/MBB_DATA26

MB_DATA46/MBB_DATA30MB_DATA46/MBB_DATA30

MB_DATA47/MBB_DATA31MB_DATA47/MBB_DATA31

MB_DATA48/MBB_DATA11MB_DATA48/MBB_DATA11

MB_DATA49/MBB_DATA10MB_DATA49/MBB_DATA10

MB_DATA50/MBB_DATA14MB_DATA50/MBB_DATA14

MB_DATA51/MBB_DATA15MB_DATA51/MBB_DATA15

MB_DATA52/MBB_DATA12MB_DATA52/MBB_DATA12

MB_DATA53/MBB_DATA13MB_DATA53/MBB_DATA13

MB_DATA54/MBB_DATA9MB_DATA54/MBB_DATA9

MB_DATA55/MBB_DATA8MB_DATA55/MBB_DATA8

MB_DATA56/MBB_DATA4MB_DATA56/MBB_DATA4

MB_DATA57/MBB_DATA5MB_DATA57/MBB_DATA5

MB_DATA58/MBB_DATA2MB_DATA58/MBB_DATA2

MB_DATA59/MBB_DATA3MB_DATA59/MBB_DATA3

MB_DATA60/MBB_DATA6MB_DATA60/MBB_DATA6

MB_DATA61/MBB_DATA7MB_DATA61/MBB_DATA7

MB_DATA62/MBB_DATA1MB_DATA62/MBB_DATA1

MB_DATA63/MBB_DATA0MB_DATA63/MBB_DATA0

RSVD_56RSVD_56

RSVD_55RSVD_55

RSVD_65RSVD_65

RSVD_67RSVD_67

RSVD_50RSVD_50

RSVD_51RSVD_51

RSVD_64RSVD_64

RSVD_66RSVD_66

MB_PAROUT/RSVDMB_PAROUT/RSVD

C27
A28
F29
F31
B27
D27
E32
F30

H31
H30
K31
L30
G30
H29
K30
K29

N32
N29
P30
L32
L31
M30
L29
N31

R30
R32
V30
V32
P29
P31
U31
U29

AT29
AU32
AW31
AW30
AR30
AT31
AV30
AW29

AY29
AY32
BC27
BB26
BC25
BA25
BB30
BA28

BA24
BC24
BC22
BA22
BB25
BD25
BB22
BD22

BA21
BC21
BC18
BB18
BB20
BB21
BB19
BA18

W30
W29
AA30
AB29
V29
V31
AA29
AA31

AM31

2

2

M_B_DQ0

M_B_DQ0
M_B_DQ1

M_B_DQ1
M_B_DQ2

M_B_DQ2
M_B_DQ3

M_B_DQ3
M_B_DQ4

M_B_DQ4
M_B_DQ5

M_B_DQ5
M_B_DQ6

M_B_DQ6
M_B_DQ7

M_B_DQ7

M_B_DQ8

M_B_DQ8
M_B_DQ9

M_B_DQ9
M_B_DQ10

M_B_DQ10
M_B_DQ11

M_B_DQ11
M_B_DQ12

M_B_DQ12
M_B_DQ13

M_B_DQ13
M_B_DQ14

M_B_DQ14
M_B_DQ15

M_B_DQ15

M_B_DQ16

M_B_DQ16
M_B_DQ17

M_B_DQ17
M_B_DQ18

M_B_DQ18
M_B_DQ19
M_B_DQ20

M_B_DQ20
M_B_DQ21

M_B_DQ21
M_B_DQ22

M_B_DQ22
M_B_DQ23

M_B_DQ23

M_B_DQ24

M_B_DQ24
M_B_DQ25

M_B_DQ25
M_B_DQ26

M_B_DQ26
M_B_DQ27

M_B_DQ27
M_B_DQ28

M_B_DQ28
M_B_DQ29

M_B_DQ29
M_B_DQ30

M_B_DQ30
M_B_DQ31

M_B_DQ31

M_B_DQ32

M_B_DQ32
M_B_DQ33

M_B_DQ33
M_B_DQ34

M_B_DQ34
M_B_DQ35

M_B_DQ35
M_B_DQ36

M_B_DQ36
M_B_DQ37

M_B_DQ37
M_B_DQ38

M_B_DQ38
M_B_DQ39

M_B_DQ39

M_B_DQ40

M_B_DQ40
M_B_DQ41

M_B_DQ41
M_B_DQ42

M_B_DQ42
M_B_DQ43

M_B_DQ43
M_B_DQ44

M_B_DQ44
M_B_DQ45

M_B_DQ45
M_B_DQ46

M_B_DQ46
M_B_DQ47

M_B_DQ47

M_B_DQ48

M_B_DQ48
M_B_DQ49

M_B_DQ49
M_B_DQ50

M_B_DQ50
M_B_DQ51

M_B_DQ51
M_B_DQ52

M_B_DQ52
M_B_DQ53

M_B_DQ53
M_B_DQ54

M_B_DQ54
M_B_DQ55

M_B_DQ55

M_B_DQ56

M_B_DQ56
M_B_DQ57

M_B_DQ57
M_B_DQ58

M_B_DQ58
M_B_DQ59

M_B_DQ59
M_B_DQ60

M_B_DQ60
M_B_DQ61

M_B_DQ61
M_B_DQ62

M_B_DQ62
M_B_DQ63

M_B_DQ63

M_B_PARITY

M_B_PARITY

M_B_DQ[63:0] (19)

M_B_PARITY (19)

1

1

0404

(19)

(19)

A

A AA

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

5

5

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number R

Size Document Number Rev

Size Document Number Rev

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

Date: Sheet

Date: SheetSheet of

4

4

3

3

2

2

Date: SheetSheet of

PROJECT :PROJECT :

RR 2/7(MEM)

RR 2/7(MEM)

RR 2/7(MEM)

1

1

NJF

NJF

NJF

Sheet of

4 63

4 63

4 6363

ev

2A

2A

2A

APU DISPLAY and MISC

Vinafix.com

+1.8V_S5

+1.8V_S5

R1 4.7K_5%_24.7K_5%_2

4.7K_5%_2

R2 4.7K_5%_2

APU_RST#

APU_RST#

APU_PWRGD

APU_PWRGD

C1

C2

33P/50V_4

33P/50V_4

*27p/50V_4

*27p/50V_4

D DD

D

+3V

+3V

R9 1K_5%_2

1K_5%_2

R10 1K_5%_21K_5%_2

R11 1K_5%_2

1K_5%_2

R13 1K_5%_2

1K_5%_2

1K_5%_2

R15 1K_5%_2

C

C CC

HDT+ Connector for Debug only

Close to HDT & No remove.Close to HDT & No remove.

APU_TDI

APU_TDI

R31 1K_1%_2

APU_TCK

APU_TCK

R33 1K_1%_2

APU_TMS

APU_TMS

R34 1K_1%_2

APU_TRST#

APU_TRST#

R35 1K_1%_2

APU_DBREQ#

APU_DBREQ#

R38 1K_1%_2

APU_TRST# APU_TRST_L#APU_TRST_L#

APU_TRST#

APU_DBREQ# APU_DBREQ_L#APU_DBREQ_L#

APU_DBREQ#

B

B BB

R41 33_5%_2

C4

0.01U/16V_4

0.01U/16V_4

R45 33_5%_2

C7

0.01U/16V_4

0.01U/16V_4

55

APU_RST#

APU_RST#

APU_PWRGD

APU_PWRGD

APU_ALERT#

APU_ALERT#

APU_THERMTRIP#

APU_THERMTRIP#

APU_SIC

APU_SIC

APU_SID

APU_SID

APU_PROCHOT#

APU_PROCHOT#

Can remove on MP

+1.8V_S5

+1.8V_S5

1K_1%_2
1K_1%_2
1K_1%_2
1K_1%_2
1K_1%_2

33_5%_2

33_5%_2

+1.8V_S5

+1.8V_S5

TP88

TP88
TP46

TP46
TP47

TP47
TP48

TP48
TP44

TP44
TP49

TP49

eDP Panel

HDMI

APU_THERMTRIP#(37)

(37)
(37)

H_PROCHOT#_R(37)

(42,50)

H_PROCHOT#(42,50)

APU_RST#

APU_RST#

APU_PWRGD

APU_PWRGD

CON_Debug1

APU_DBREQ_L#

APU_DBREQ_L#
APU_RST_L_BUF

APU_RST_L_BUF
CPU_LDT_RST_HTPA#

CPU_LDT_RST_HTPA#
APU_TCK

APU_TCK
APU_TMS

APU_TMS
APU_TDI

APU_TDI
APU_TRST_L#

APU_TRST_L#
APU_TDO

APU_TDO
APU_PWROK_BUF

Debug_FFC_ACS(51614-01201-V01)

Debug_FFC_ACS(51614-01201-V01)

(29)
(29)

(29)
(29)

(29)
(29)

(29)
(29)

(40)
(40)

(40)
(40)

(40)
(40)

(40)
(40)

(42)

R27 *0_2_Short

R28 *0_2_Short

1414

1212

1212

11

11

1111

10

10

1010

9

9

99

8

8

88

7

7

77

6

6

66

5

5

55

4

4

44

3

3

33

22

22

1

1

11

1313

APU_PWRGD(42)

GND2GND2

GND1GND1

CPU_EDP_TXP0(29)
CPU_EDP_TXN0(29)

CPU_EDP_TXP1(29)
CPU_EDP_TXN1(29)

CPU_EDP_TXP2(29)
CPU_EDP_TXN2(29)

CPU_EDP_TXP3(29)
CPU_EDP_TXN3(29)

INT_DDI1_TXDP2(40)
INT_DDI1_TXDN2(40)

INT_DDI1_TXDP1(40)
INT_DDI1_TXDN1(40)

INT_DDI1_TXDP0(40)
INT_DDI1_TXDN0(40)

INT_DDI1_TXDP3(40)
INT_DDI1_TXDN3(40)

11

22

33

APU_THERMTRIP#

APU_THERMTRIP#

*0_2_Short

*0_2_Short

C3

0.1U/10V/X5R_2

0.1U/10V/X5R_2

U2

A1A1

Y1Y1

GNDGND

VCCVCC

A2A244Y2Y2

74LVC2G07GW

74LVC2G07GW

66

55

APU_TDI

APU_TDI
APU_TDO

APU_TDO
APU_TCK

APU_TCK
APU_TMS

APU_TMS
APU_TRST#

APU_TRST#
APU_DBREQ#

APU_DBREQ#

APU_RST#

APU_RST#

APU_PWRGD

APU_PWRGD

APU_SIC

APU_SIC
APU_SID

APU_SID

APU_ALERT#

APU_ALERT#

APU_PROCHOT#

APU_PROCHOT#

SVC_APU

SVC_APU
SVD_APU

SVD_APU
SVT_APU

SVT_APU

+1.8V

+1.8V

R29

1K_1%_2

1K_1%_2

Change HDT CN to FFC CN for debug....Tommy0504Change HDT CN to FFC CN for debug....Tommy0504

A

A AA

D11
B11

C11
A11

D10
B10

D9
B9

G23
H23

F22
G22

G21
H21

F20
G20

AP3
AU1
AR2
AU3
AR4
AT2

AW3
AW4

B22
D22
C22
AN9
B25

D25
C25
A25

R30

1K_1%_2

1K_1%_2

APU_RST_L_BUF

APU_RST_L_BUF

APU_PWROK_BUF

APU_PWROK_BUF

U1M FP6FP6 216NOPNFP6216NOPNFP6

D21

CAM0_CSI2_CLOCKPCAM0_CSI2_CLOCKP

A20

CAM0_CSI2_CLOCKNCAM0_CSI2_CLOCKN

D18

CAM0_CSI2_DATAP0CAM0_CSI2_DATAP0

B18

CAM0_CSI2_DATAN0CAM0_CSI2_DATAN0

C19

CAM0_CSI2_DATAP1CAM0_CSI2_DATAP1

D20

CAM0_CSI2_DATAN1CAM0_CSI2_DATAN1

C21

CAM0_CSI2_DATAP2CAM0_CSI2_DATAP2

B21

CAM0_CSI2_DATAN2CAM0_CSI2_DATAN2

C20

CAM0_CSI2_DATAP3CAM0_CSI2_DATAP3

B20

CAM0_CSI2_DATAN3CAM0_CSI2_DATAN3

C15

CAM1_CSI2_CLOCKPCAM1_CSI2_CLOCKP

A15

CAM1_CSI2_CLOCKNCAM1_CSI2_CLOCKN

D16

CAM1_CSI2_DATAP0CAM1_CSI2_DATAP0

B16

CAM1_CSI2_DATAN0CAM1_CSI2_DATAN0

D15

CAM1_CSI2_DATAP1CAM1_CSI2_DATAP1

B15

CAM1_CSI2_DATAN1CAM1_CSI2_DATAN1

4

4

DP0_TXP0DP0_TXP0

DP0_TXN0DP0_TXN0

DP0_TXP1DP0_TXP1

DP0_TXN1DP0_TXN1

DP0_TXP2DP0_TXP2

DP0_TXN2DP0_TXN2

DP0_TXP3DP0_TXP3

DP0_TXN3DP0_TXN3

DP1_TXP0DP1_TXP0

DP1_TXN0DP1_TXN0

DP1_TXP1DP1_TXP1

DP1_TXN1DP1_TXN1

DP1_TXP2DP1_TXP2

DP1_TXN2DP1_TXN2

DP1_TXP3DP1_TXP3

DP1_TXN3DP1_TXN3

TDITDI

TDOTDO

TCKTCK

TMSTMS

TRST_LTRST_L

DBREQ_LDBREQ_L

RESET_LRESET_L

PWROKPWROK

SICSIC

SIDSID

ALERT_LALERT_L

THERMTRIP_LTHERMTRIP_L

PROCHOT_LPROCHOT_L

SVC0SVC0

SVD0SVD0

SVT0SVT0

FP6

FP6

216NOPNFP6216NOPNFP6

U1C

DISPLAY/SVI2/JTAG/TESTDISPLAY/SVI2/JTAG/TEST

FP6 REV 0.92
PART 3 OF 13

CAMERAS

FP6 REV 0.92FP6 REV 0.92

PART 13 OF 13

APU_DISP_ON

APU_DISP_ON

A22

DP_BLONDP_BLON

APU_LVDS_PWRON

APU_LVDS_PWRON

D23

DP_DIGONDP_DIGON

APU_DPST_PWM

APU_DPST_PWM

C23

DP_VARY_BLDP_VARY_BL

D12

DP0_AUXPDP0_AUXP

B12

DP0_AUXNDP0_AUXN

C12

DP0_HPDDP0_HPD

INT_HDMI_SCL

INT_HDMI_SCL

J20

DP1_AUXPDP1_AUXP

INT_HDMI_SDA

INT_HDMI_SDA

K20

DP1_AUXNDP1_AUXN

HDMI_HPD

HDMI_HPD

L21

DP1_HPDDP1_HPD

L19

DP2_AUXPDP2_AUXP

M19

DP2_AUXNDP2_AUXN

M20

DP2_HPDDP2_HPD

M14

DP3_AUXPDP3_AUXP

L14

DP3_AUXNDP3_AUXN

L16

DP3_HPDDP3_HPD

DP_STEREOSYNC

DP_STEREOSYNC

B23

DP_STEREOSYNCDP_STEREOSYNC

APU_TEST4

APU_TEST4

BB6

TEST4TEST4

APU_TEST5

APU_TEST5

BD5

TEST5TEST5

AG12

TEST6TEST6

APU_TEST14

APU_TEST14

G25

TEST14TEST14

APU_TEST15

APU_TEST15

K25

TEST15TEST15

APU_TEST16

APU_TEST16

F25

TEST16TEST16

APU_TEST17

APU_TEST17

F26

TEST17TEST17

APU_TEST31

APU_TEST31

H26

TEST31TEST31

APU_TEST41

APU_TEST41

AK9

TEST41TEST41

AK21

ANALOGIO_0ANALOGIO_0

AG21

ANALOGIO_1ANALOGIO_1

SMU_ZVDDP

SMU_ZVDDP

P3

SMU_ZVDDSMU_ZVDD

AK7

VDDP_S5_SENSEVDDP_S5_SENSE

AK12

VDDP_SENSEVDDP_SENSE

APU_VDDNB_FB_HAPU_VDDNB_FB_H

J23

VDDCR_SOC_SENSEVDDCR_SOC_SENSE

APU_VDD_FB_H

APU_VDD_FB_H

K22

VDDCR_SENSEVDDCR_SENSE

J21

TP35

VDDIO_MEM_S3_SENSEVDDIO_MEM_S3_SENSE

VSS_SENSE_AVSS_SENSE_A

VSS_SENSE_BVSS_SENSE_B

TP35

APU_VDD_VDDNB_FB_L

APU_VDD_VDDNB_FB_L

J22
AJ12

TP38TP38

APU Serial VIDAPU Serial VID

SVT_APU

SVT_APU

SVC_APU

SVC_APU

SVD_APU

SVD_APU

Turning meet AMD SVID2 specification

A18

CAM0_CLKCAM0_CLK

C18

CAM0_I2C_SCLCAM0_I2C_SCL

B17

CAM0_I2C_SDACAM0_I2C_SDA

D17

CAM0_SHUTDOWNCAM0_SHUTDOWN

A13

CAM1_CLKCAM1_CLK

B13

CAM1_I2C_SCLCAM1_I2C_SCL

D13

CAM1_I2C_SDACAM1_I2C_SDA

C14

CAM1_SHUTDOWNCAM1_SHUTDOWN

C16

CAM_PRIV_LEDCAM_PRIV_LED

C13

CAM_IR_ILLUCAM_IR_ILLU

CPU_EDP_AUXP (29)
CPU_EDP_AUXN (29)

PCH_EDP_HPD (29)

INT_HDMI_SCL (40)
INT_HDMI_SDA (40)(40)

HDMI_HPD (40)

1K_1%_2

R7 1K_1%_2
R8 *1K_1%_2*1K_1%_2

TP89

TP89
TP90

TP90
TP91

TP91
TP92

TP92

Close APU

R24 196_1%_2

196_1%_2

R39 *0_Short*0_Short

R40 22_5%_4

22_5%_4

22_5%_4

R42 22_5%_4

3

3

(29)

eDPeDP

(29)

(29)

(40)

HDMI

(40)

+1.8V

+1.8V

TP1TP1
TP2

TP2

TP32

TP32

TP33

TP33

+VDDP_S0

+VDDP_S0

APU_VDDP_S5_FB_H (46)
APU_VDDP_RUN_FB_H (46)
APU_VDDNB_FB_H (42)(42)
APU_VDD_FB_H (42)

APU_VDD_VDDNB_FB_L (42)

R36
*1K_1%_4

*1K_1%_4

C5

C6

*27p/50V_4

*27p/50V_4

*27p/50V_4

*27p/50V_4

+1.8V_S5

+1.8V_S5

(42)

R37
*1K_1%_4

*1K_1%_4

R43
*220_5%_4

*220_5%_4

APU THMAPU THM

APU_SIC

APU_SIC

APU_SID

APU_SID

(46)

(46)

(42)

R32
*1K_1%_4

*1K_1%_4

R44
*220_5%_4

*220_5%_4

INT_HDMI_SCL

INT_HDMI_SCL

INT_HDMI_SDA

INT_HDMI_SDA

HDMI_HPD

HDMI_HPD

1

1

4 33

4

2N7002KDW(SOT363)

2N7002KDW(SOT363)

R226 3.3K_5%_2

R227 3.3K_5%_2

APU_DPST_PWM

APU_DPST_PWM

Q5

66

2

2

5

5

APU_SVT (42)

APU_SVC (42)

APU_SVD (42)

3.3K_5%_2

3.3K_5%_2

100K_5%_2

R180 100K_5%_2

DMN5L06DWK-7
Gate Threshold Voltage :
Vgs(th) min 0.49V ~ Max 1.0V

MBCLK1 (37,58)

+3V

+3V

MBDATA1 (37,58)

+3V

+3V

(42)

(42)

(42)

2

2

+3V

+3V

+3V

+3V

R3

1K_5%_2

1K_5%_2

R4

1K_5%_2

1K_5%_2

3344

Q1A

*0.1U/10V/X5R_2

C1071 *0.1U/10V/X5R_2

DMN5L06DWK-7

DMN5L06DWK-7

R16
100K_5%_2

100K_5%_2

55

6611

DMN5L06DWK-7

DMN5L06DWK-7

22

Q1B

PR01 : R4 , R6 , R22 for LCD panel PSR issue.PR01 : R4 , R6 , R22 for LCD panel PSR issue.

(37,58)

(37,58)

APU_LVDS_PWRON

APU_LVDS_PWRON

Boot-VID code

SVC SVD VOLTAGE

000

1

0

111

1.1

1.0

0.9

0.8

PCH_BRIGHT (29)

C1072 *0.1U/10V/X5R_2

DMN5L06DWK-7

DMN5L06DWK-7

APU_DISP_ON

APU_DISP_ON

C1073 *0.1U/10V/X5R_2

(29)

*0.1U/10V/X5R_2

22

R17
100K_5%_2

100K_5%_2

*0.1U/10V/X5R_2

22

R26
100K_5%_2

100K_5%_2

R6

1K_5%_2

1K_5%_2

55

6611

Q2B

R22

1K_5%_2

1K_5%_2

55

6611

Q6B

DMN5L06DWK-7

DMN5L06DWK-7

+3V

+3V

3344

DMN5L06DWK-7

DMN5L06DWK-7

+3V

+3V

R23
1K_5%_2

1K_5%_2

3344

DMN5L06DWK-7

DMN5L06DWK-7

R5
1K_5%_2

1K_5%_2

Q2A

Q6A

1

1

PCH_BLON (37)

DMN5L06DWK-7
Gate Threshold Voltage :
Vgs(th) min 0.49V ~ Max 1.0V

EDP_VDD_EN (29)

DMN5L06DWK-7
Gate Threshold Voltage :
Vgs(th) min 0.49V ~ Max 1.0VVgs(th) min 0.49V ~ Max 1.0V

0505

(37)

(29)

5

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

NJF

PROJECT :PROJECT :

NJF

PROJECT :PROJECT :

Size Document Number R

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

2

2

Date: Sheet

RR 3/7(DIS/MISC)

RR 3/7(DIS/MISC)

RR 3/7(DIS/MISC)

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

1

1

NJF

Sheet of

5 63

5 63

5 6363

ev

1A

1A

1A

SUSB#_CSUSB#_C

Vinafix.com

S0A3_GPIO

S0A3_GPIO

CLK_PCIE_GLANP(41)(41)
CLK_PCIE_GLANN(41)(41)

CLK_PCIE_WLANP(33)(33)
CLK_PCIE_WLANN(33)(33)

CLK_PCIE_SSDP(33)(33)

CLK_PCIE_SSDN(33)(33)

CLK_VGA_P(20)(20)

CLK_VGA_N(20)(20)

CLK_PCIE_SSD2P(33)(33)
CLK_PCIE_SSD2N(33)(33)

2.2p/50V_4

22

11

Y1

33

44

15p/50V_4

C17 15p/50V_4

Y2

32.768KHZ/20ppm

32.768KHZ/20ppm

18p/50V_4

C18 18p/50V_4

(37)

(37)

4

4

C9 150p/50V_4150p/50V_4

R55 33_5%_2

33_5%_2

R57 10K_5%_2

10K_5%_2

RSMRST_L#RSMRST_L#

DNBSWON#DNBSWON#
SYSPWROK

SYSPWROK

PCIE_WAKE#

PCIE_WAKE#

SUSB#_CSUSB#_C

S0A3_GPIO

S0A3_GPIO

DGPU_PWR_EN

DGPU_PWR_EN

ACZ_BCLK_RACZ_BCLK_R
ACZ_SDIN0

ACZ_SDIN0

ACZ_RST#_RACZ_RST#_R
ACZ_SYNC_RACZ_SYNC_R
ACZ_SDOUT_RACZ_SDOUT_R

PCIE_CLKREQ_GLAN#PCIE_CLKREQ_GLAN#
PCIE_CLKREQ_WLAN#PCIE_CLKREQ_WLAN#
PCIE_CLKREQ_SSD#PCIE_CLKREQ_SSD#
PCIE_CLKREQ_VGA#PCIE_CLKREQ_VGA#
PCIE_CLKREQ_SSD2#PCIE_CLKREQ_SSD2#

For 2nd SSDFor 2nd SSD

33_5%_2

R225 33_5%_2

R100
1M_5%_4

1M_5%_4

R863 *0_2_Short

1122

R109
20M_5%_4

20M_5%_4

PCIE_RST#_R

PCIE_RST#_R
PCIE_RST1#PCIE_RST1#

48M_X1

48M_X1

48M_X2

48M_X2

*0_2_Short

32K_X1

32K_X1

32K_X232K_X2

+3V_S5

PCIE_RST0_L/EGPIO26PCIE_RST0_L/EGPIO26

+3V_S5

PCIE_RST1_L/EGPIO27PCIE_RST1_L/EGPIO27

+1.8V_S5

RSMRST_LRSMRST_L

+3V_S5

PWR_BTN_L/AGPIO0PWR_BTN_L/AGPIO0

PWR_GOODPWR_GOOD

+3V_S5

SYS_RESET_L/AGPIO1SYS_RESET_L/AGPIO1

+3V_S5

WAKE_L/AGPIO2WAKE_L/AGPIO2

SLP_S3_LSLP_S3_L

SLP_S5_LSLP_S5_L

+3V_S5

S0A3_GPIO/AGPIO10S0A3_GPIO/AGPIO10

+3V_S5

AC_PRES/AGPIO23AC_PRES/AGPIO23

+3V_S5

LLB_L/AGPIO12LLB_L/AGPIO12

+3V_S5

EGPIO42EGPIO42

ACP_WOV_CLK/ACP_IPIO28ACP_WOV_CLK/ACP_IPIO28

ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29ACP_WOV_MIC0_MIC1_DATA/ACP_IPIO29

ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30ACP_WOV_MIC2_MIC3_DATA/ACP_IPIO30

AZ_BITCLK/TDM_BCLK_MICAZ_BITCLK/TDM_BCLK_MIC

AZ_SDIN0/CODEC_GPIAZ_SDIN0/CODEC_GPI

AZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACKAZ_SDIN1/SW_DATA1B/TDM_BCLK_PLAYBACK

AZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATAAZ_SDIN2/SW_DATA2/TDM_DATA_PLAYBACK/ACP_WOV_MIC4_MIC5_DATA

AZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MICAZ_RST_L/SW_DATA1A/SW_DATA3/TDM_DATA_MIC

AZ_SYNC/TDM_FRM_MICAZ_SYNC/TDM_FRM_MIC

AZ_SDOUT/TDM_FRM_PLAYBACKAZ_SDOUT/TDM_FRM_PLAYBACK

SW_MCLK/TDM_BCLK_BTSW_MCLK/TDM_BCLK_BT

SW_DATA0/TDM_DOUT_BTSW_DATA0/TDM_DOUT_BT

AGPIO7/FCH_ACP_I2S_SDIN_BTAGPIO7/FCH_ACP_I2S_SDIN_BT

AGPIO8/FCH_ACP_I2S_LRCLK_BTAGPIO8/FCH_ACP_I2S_LRCLK_BT

CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92CLK_REQ0_L/SATA_IS0_L/SATA_ZP0_L/AGPIO92

CLK_REQ1_L/AGPIO115CLK_REQ1_L/AGPIO115

CLK_REQ2_L/AGPIO116CLK_REQ2_L/AGPIO116

CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131CLK_REQ3_L/SATA_IS1_L/SATA_ZP1_L/EGPIO131

CLK_REQ4_L/OSCIN/EGPIO132CLK_REQ4_L/OSCIN/EGPIO132

CLK_REQ5_L/EGPIO120CLK_REQ5_L/EGPIO120

CLK_REQ6_L/EGPIO121CLK_REQ6_L/EGPIO121

GPP_CLK0PGPP_CLK0P

GPP_CLK0NGPP_CLK0N

GPP_CLK1PGPP_CLK1P

GPP_CLK1NGPP_CLK1N

GPP_CLK2PGPP_CLK2P

GPP_CLK2NGPP_CLK2N

GPP_CLK3PGPP_CLK3P

GPP_CLK3NGPP_CLK3N

GPP_CLK4PGPP_CLK4P

GPP_CLK4NGPP_CLK4N

GPP_CLK5PGPP_CLK5P

GPP_CLK5NGPP_CLK5N

GPP_CLK6P/WIFIBT_CLKPGPP_CLK6P/WIFIBT_CLKP

GPP_CLK6N/WIFIBT_CLKNGPP_CLK6N/WIFIBT_CLKN

X48M_OSCX48M_OSC

X48M_X1X48M_X1

X48M_X2X48M_X2

RSVD_71RSVD_71

RSVD_70RSVD_70

RTCCLKRTCCLK

X32K_X1X32K_X1

X32K_X2X32K_X2

AG10

AW10

AP6

AT13

AR8

AT12
AW2

AL2

AW12

AT11
AV11

AW13

BA8
AV6

AW8

AG6
AG7
AJ6

AN6
AL6
AM7
AJ9
AM6
AN8
AK6

AM4
AL3
AM2
AL4

AR13
AP10
AR15
AT14
AN11
AN13
AN15

AF11
AF12

AG4
AG2

AG3
AG1

AF2
AF4

AH2
AH4

AJ2
AJ4

AF8
AF9

AK1

BB3

BA5

AG9

AY1

AY4

ACPI/AUDIO/I2C/GPIO/MISCACPI/AUDIO/I2C/GPIO/MISC

+3V_S5/+1.8V_S5
+3V_S5/+1.8V_S5

FP6 REV 0.92
PART 4 OF 13

CLK/LPC/EMMC/SD/SPI/eSPI/UARTCLK/LPC/EMMC/SD/SPI/eSPI/UART

+3V
+3V
+3V
+3V
+3V
+3V
+3V

FP6 REV 0.92
PART 5 OF 13

FP6FP6

216NOPNFP6

216NOPNFP6

U1D

+3V_S5/+1.8V_S5
+3V_S5/+1.8V_S5

FP6FP6

216NOPNFP6

216NOPNFP6

U1E

+3V_S5/+1.8V_S5

+3V_S5/+1.8V_S5

55

R864 *0_2*0_2

RSMRST#(37)

(37)

D DD

D

SYSPWROK(37)

(37)

APU GPIO/AZ/UART

+3V

+3V

R70 *47K_5%_2
R71 2.2K_5%_2
R73 2.2K_5%_22.2K_5%_2

R74 10K_5%_210K_5%_2
R75 10K_5%_2

R76 10K_5%_210K_5%_2

R78 10K_5%_2
R79 10K_5%_2

N18ER1 10K_5%_2

+3V_S5_APU

+3V_S5_APU

C

C CC

For 2nd SSD

R81 10K_5%_2

R82 10K_5%_210K_5%_2
R83 10K_5%_210K_5%_2

R843 2.2K_5%_2

HDA INTERFACE

ACZ_SDOUT_AUDIO(36)(36)

ACZ_SYNC_AUDIO(36)(36)

BIT_CLK_AUDIO(36)(36)

ACZ_RST#_AUDIO(36)(36)

ACZ_SDIN0(36)(36)

11

D1 RB500V-40

*47K_5%_2

SERIRQ#

SERIRQ#
SMB_RUN_CLK_RSMB_RUN_CLK_R

2.2K_5%_2

SMB_RUN_DAT_RSMB_RUN_DAT_R

PCIE_CLKREQ_GLAN#

PCIE_CLKREQ_GLAN#
PCIE_CLKREQ_WLAN#PCIE_CLKREQ_WLAN#

10K_5%_2

PCIE_CLKREQ_SSD#PCIE_CLKREQ_SSD#

PCIE_CLKREQ_VGA#PCIE_CLKREQ_VGA#

10K_5%_2

EC_RCIN#EC_RCIN#

10K_5%_2

PCIE_CLKREQ_SSD2#

PCIE_CLKREQ_SSD2#

10K_5%_2

SIO_EXT_SCI#

SIO_EXT_SCI#

10K_5%_2 R91 10K_5%_210K_5%_2

DNBSWON#

DNBSWON#
PCIE_WAKE#

PCIE_WAKE#

MP01 : Mount R83 for PCIe_WAKE#MP01 : Mount R83 for PCIe_WAKE#

S0A3_GPIO

S0A3_GPIO

2.2K_5%_2

R84 33_5%_2

R86 33_5%_2

R88 22_1%_222_1%_2

C13 *15p/50V_4

R90 33_5%_2

RB500V-40

R62

*8.2K_5%_2*8.2K_5%_2

33_5%_2

33_5%_2

*15p/50V_4

33_5%_2

22

+3V+3V+3V_S5_APU+3V_S5_APU

+1.8V_S5

+1.8V_S5

R63

8.2K_5%_2

8.2K_5%_2

R69
100K_5%_2100K_5%_2

ACZ_SDOUT_RACZ_SDOUT_R

ACZ_SYNC_RACZ_SYNC_R

ACZ_BCLK_RACZ_BCLK_R

ACZ_RST#_RACZ_RST#_R

C1074 10u/6.3V_4

R50
47K_5%_2

47K_5%_2

C8

0.1U/6V/X5R_2

0.1U/6V/X5R_2

SYSPWROK

SYSPWROK

Eric

ACZ_SDIN0ACZ_SDIN0

10u/6.3V_4

RSMRST_L#

RSMRST_L#

SUSB#(37)(37)

PLTRST#(20,33,41)(20,33,41)

DNBSWON#(37)(37)

SYS_RST#(7)(7)

PCIE_WAKE#(33,41)

(33,41)

SUSC#(37)

(37)

S0A3_GPIO(37)

(37)

AC_PRESENT_EC(37)(37)

(23)

DGPU_PWR_EN(23)

Shortpad R844 from 0 ohm for PR stage.Shortpad R844 from 0 ohm for PR stage.

R844 *0_2_Short*0_2_Short

+3V_S5_APU

+3V_S5_APU

11

44

*NL17SZ08DFT2G*NL17SZ08DFT2G

22

33 55

U12

PCIE_CLKREQ_GLAN#(41)(41)
PCIE_CLKREQ_WLAN#(33)(33)
PCIE_CLKREQ_SSD#(33)(33)
PCIE_CLKREQ_VGA#(20)(20)
PCIE_CLKREQ_SSD2#(33)(33)

C257 15p/50V_415p/50V_4

C15 2.2p/50V_4

B

B BB

+1.8V_S5

+1.8V_S5

R113

10K_5%_2

10K_5%_2

FCH_SPI_IO3FCH_SPI_IO3

C19

0.1u/10V_2

0.1u/10V_2

FCH_SPI_CS0#

FCH_SPI_CS0#

TP18

FCH_SPI_CLK

FCH_SPI_CLK

TP20

FCH_SPI_SIFCH_SPI_SI

*

*

TP22

FCH_SPI_SO

FCH_SPI_SO

*

*

TP23

FCH_SPI_IO2FCH_SPI_IO2

*

*

TP24

FCH_SPI_IO3

FCH_SPI_IO3

**

TP25

*

*
*

*

PCH SPI ROM(CLG)PCH SPI ROM(CLG)

BIOS ROM(16MB)

*10K_5%_2

R110 *10K_5%_2

10K_5%_2

R111 10K_5%_2

10K_5%_2

R112 10K_5%_2

U3

1

88

1

VCCVCC

CSCS

66

CLKCLK

55

DIDI

22

7

7

DODO

HOLD

HOLD

3

44

3

WP

GNDGND

WP

W25Q128FWSIF

W25Q128FWSIF

FCH_SPI_CS0#FCH_SPI_CS0#

33_5%_2

R890 33_5%_2

FCH_SPI_SO

FCH_SPI_SO
FCH_SPI_SIFCH_SPI_SI

FCH_SPI_IO2FCH_SPI_IO2

FCH_SPI_CLK

C20
*22p/50V_2

*22p/50V_2

R114 10K_5%_2

48MHZ/15ppm48MHZ/15ppm

C16 2.2p/50V_42.2p/50V_4

Shortpad R863 from 0 ohm for PR stage.

FCH_SPI_CS0# (37)(37)
FCH_SPI_CLK (37)
FCH_SPI_SO (37)(37)

FCH_SPI_SI (37)

10K_5%_2

+1.8V_S5

+1.8V_S5

PR02 : Add R890 and short R94 for SPI_CLK waveform.PR02 : Add R890 and short R94 for SPI_CLK waveform.

A

A AA

3

3

AM3

SFH_IPIO271SFH_IPIO271

AT4

SFH_IPIO272SFH_IPIO272

AM1

SFH_IPIO273SFH_IPIO273

AJ8

SFH_IPIO274SFH_IPIO274

AW7

SFH_IPIO39SFH_IPIO39

AU2

+3V/+1.8V
+3V/+1.8V

+3V/+1.8V
+3V/+1.8V

+3V/+1.8V
+3V/+1.8V

I2C0_SCL/EGPIO145I2C0_SCL/EGPIO145

I2C0_SDA/EGPIO146I2C0_SDA/EGPIO146

I2C1_SCL/EGPIO147I2C1_SCL/EGPIO147

I2C1_SDA/EGPIO148I2C1_SDA/EGPIO148

I2C2_SCL/EGPIO113/SMBUS0_I2C_SCLI2C2_SCL/EGPIO113/SMBUS0_I2C_SCL

I2C2_SDA/EGPIO114/SMBUS0_I2C_SDAI2C2_SDA/EGPIO114/SMBUS0_I2C_SDA

I2C3_SCL/AGPIO19/SMBUS1_I2C_SCLI2C3_SCL/AGPIO19/SMBUS1_I2C_SCL

I2C3_SDA/AGPIO20/SMBUS1_I2C_SDAI2C3_SDA/AGPIO20/SMBUS1_I2C_SDA

+3V_S5
+3V_S5

AGPIO4/SATAE_IFDETAGPIO4/SATAE_IFDET

+3V_S5

AGPIO5/DEVSLP0AGPIO5/DEVSLP0

+3V_S5

AGPIO6/DEVSLP1AGPIO6/DEVSLP1

+3V

SATA_ACT_L/AGPIO130SATA_ACT_L/AGPIO130

+3V_S5
+3V_S5
+3V

+3V/+1.8V

AGPIO86/SPI_CLK2AGPIO86/SPI_CLK2

INTRUDER_ALERTINTRUDER_ALERT

+3V

SPKR/AGPIO91SPKR/AGPIO91

+3V_S5

BLINK/AGPIO11BLINK/AGPIO11

+3V

GENINT1_L/AGPIO89GENINT1_L/AGPIO89

+3V

GENINT2_L/AGPIO90GENINT2_L/AGPIO90

+3V

FANIN0/AGPIO84FANIN0/AGPIO84

+3V

FANOUT0/AGPIO85FANOUT0/AGPIO85

SFH_IPIO41SFH_IPIO41

SFH1_SCLSFH1_SCL

SFH1_SDASFH1_SDA

AP14
AN14

AP2
AN3

AN12
AP12

AM9
AM10

D24
B24

BB7

AGPIO3AGPIO3

EC_EXT_SWI#EC_EXT_SWI#

BA6

AK10
BC6
AW15

TP_INTH#

TP_INTH#

AU4

AGPIO9AGPIO9

AP7

AGPIO40AGPIO40

AV13

AGPIO69AGPIO69

BB12

AU7
AR11
AW11

AGPIO11

AGPIO11

AV15
AU14

DGPU_PWROK_QDGPU_PWROK_Q

AT10
AU10

NVPF_DP_HPDNVPF_DP_HPD

If unused, enable internal pull up or pull down by softwareIf unused, enable internal pull up or pull down by software

+3V/+1.8V

+3V/+1.8V
+3V/+1.8V
+3V/+1.8V
+3V/+1.8V
+3V/+1.8V
+3V/+1.8V
+3V/+1.8V
+3V/+1.8V
+3V/+1.8V

+3V
+3V_S5

+1.8V_S5
+1.8V_S5

+3V/+1.8V

+1.8V_S5
+1.8V_S5
+1.8V_S5

+3V
+3V
+3V
+3V
+3V

+3V

ESPI_RESET_L/KBRST_L/AGPIO129ESPI_RESET_L/KBRST_L/AGPIO129

ESPI_ALERT_L/LDRQ0_L/EGPIO108ESPI_ALERT_L/LDRQ0_L/EGPIO108

EGPIO142/UART0_RTS_L/UART1_RXDEGPIO142/UART0_RTS_L/UART1_RXD

EGPIO140/UART0_CTS_L/UART1_TXDEGPIO140/UART0_CTS_L/UART1_TXD

AGPIO144/SHUTDOWN_L/UART0_INTRAGPIO144/SHUTDOWN_L/UART0_INTR

EGPIO70EGPIO70

LPC_PD_L/AGPIO21LPC_PD_L/AGPIO21

LAD0/ESPI1_DATA0/EGPIO104LAD0/ESPI1_DATA0/EGPIO104

LAD1/ESPI1_DATA1/EGPIO105LAD1/ESPI1_DATA1/EGPIO105

LAD2/ESPI1_DATA2/EGPIO106LAD2/ESPI1_DATA2/EGPIO106

LAD3/ESPI1_DATA3/EGPIO107LAD3/ESPI1_DATA3/EGPIO107

LPCCLK0/EGPIO74LPCCLK0/EGPIO74

LPC_CLKRUN_L/AGPIO88LPC_CLKRUN_L/AGPIO88

LPCCLK1/EGPIO75LPCCLK1/EGPIO75

SERIRQ/AGPIO87SERIRQ/AGPIO87

LFRAME_L/EGPIO109LFRAME_L/EGPIO109

LPC_RST_L/AGPIO32LPC_RST_L/AGPIO32

AGPIO68AGPIO68

LPC_PME_L/AGPIO22LPC_PME_L/AGPIO22

SPI_ROM_REQ/EGPIO67SPI_ROM_REQ/EGPIO67

SPI_ROM_GNT/EGPIO76SPI_ROM_GNT/EGPIO76

SPI_CLK/ESPI_CLKSPI_CLK/ESPI_CLK

SPI_DI/ESPI_DATASPI_DI/ESPI_DATA

SPI_WP_L/ESPI_DAT2SPI_WP_L/ESPI_DAT2

SPI_HOLD_L/ESPI_DAT3SPI_HOLD_L/ESPI_DAT3

SPI_CS1_LSPI_CS1_L

SPI_CS2_L/ESPI_CS_L/AGPIO30SPI_CS2_L/ESPI_CS_L/AGPIO30

SPI_CS3_L/AGPIO31SPI_CS3_L/AGPIO31

SPI_TPM_CS_L/AGPIO29SPI_TPM_CS_L/AGPIO29

EGPIO141/UART0_RXDEGPIO141/UART0_RXD

EGPIO143/UART0_TXDEGPIO143/UART0_TXD

AW14

NVPF_DP_HPD

NVPF_DP_HPD

BB13
BA16
BA15
BC13
BB14

LPC_CLK0

LPC_CLK0

BB15
BD13

LPC_CLK1LPC_CLK1

BA12
BC15

SERIRQ#

SERIRQ#

BA13

LPC_RST#_R

LPC_RST#_R

BC12
AU12

SIO_EXT_SCI#SIO_EXT_SCI#

AP4

BA11
BB11

EC_RCIN#

EC_RCIN#

AT15
BC11

LDRQ0#

LDRQ0#

APU_SPI_CLK

APU_SPI_CLK

BC10

APU_SPI_DIAPU_SPI_DI

BA10

APU_SPI_SI_DOAPU_SPI_SI_DO

BB8

SPI_DOSPI_DO

APU_SPI_WP#

APU_SPI_WP#

BA9

APU_SPI_HOLD#

APU_SPI_HOLD#

BC8
BD11
BC9
BB10
BD8

URAT0_RX

URAT0_RX

BA17

UART0_TXUART0_TX

BC16
BD15
BC17
BB16

SMB_RUN_CLK_RSMB_RUN_CLK_R
SMB_RUN_DAT_RSMB_RUN_DAT_R

I2C3_SCLI2C3_SCL
I2C3_SDA

I2C3_SDA

SMB_RUN_CLK_R (18,19)(18,19)
SMB_RUN_DAT_R (18,19)(18,19)

TP

EC_EXT_SWI# (37)(37)

TP_INTH# (35)

DGPU_HOLD_RST#

DGPU_HOLD_RST#
SIO_EXT_SMI#SIO_EXT_SMI#

PCIE_SSD_AUX_RST# (33)
DGPU_HOLD_RST# (20)
SIO_EXT_SMI# (37)(37)

DGPU_PWROK_Q (22)(22)

R182 100K_5%_2

100K_5%_2

(22,30)

NVPF_DP_HPD (22,30)
LAD0 (33,37)(33,37)
LAD1 (33,37)(33,37)
LAD2 (33,37)(33,37)
LAD3 (33,37)(33,37)

SERIRQ# (37)(37)

LFRAME# (33,37)(33,37)

R89 33_5%_233_5%_2

C11 5.6P/50V_4

5.6P/50V_4

R85 33_5%_233_5%_2

10P/50V_4

C12 10P/50V_4

22_5%_2

R87 22_5%_2

C14 150p/50V_4150p/50V_4

SIO_EXT_SCI# (37)(37)

Close to CPUClose to CPU

(37)

EC_RCIN# (37)

*0_2_Short

R94 *0_2_Short

33_5%_2

R95 33_5%_2

33_5%_2

R96 33_5%_2

*0_2_Short

R97 *0_2_Short
R98 *0_2_Short

*0_2_Short

Shortpad R94 , R97 , R98 from 0 ohm for PR stage.Shortpad R94 , R97 , R98 from 0 ohm for PR stage.

TP26

TP26
TP27TP27

BIOS debugBIOS debug

2

2

+3V_S5_APU

3.3K_5%_2

3.3K_5%_2

10K_5%_2

10K_5%_2

10K_5%_2

10K_5%_2
10K_5%_2

+3V_S5_APU

+3V+3V

I2C3_SCL_TP (35)(35)

I2C3_SDA_TP (35)

SODIMM SMBUS

(35)

(33)

(20)

I2C3_SCL

I2C3_SCL

I2C3_SDAI2C3_SDA

+3V

+3V

+3V+3V

I2C3_SCL

I2C3_SCL
I2C3_SDAI2C3_SDA

DGPU_PWR_EN

DGPU_PWR_EN

TP_INTH#

TP_INTH#

EC_EXT_SWI#EC_EXT_SWI#

AGPIO11

AGPIO11

SIO_EXT_SMI#SIO_EXT_SMI#
DGPU_PWROK_QDGPU_PWROK_Q

R882 *0_5%_2

*0_5%_2

Q8

66

22

55

2N7002KDW(SOT363)

2N7002KDW(SOT363)

R883 *0_5%_2*0_5%_2

R58 3.3K_5%_2
R59 3.3K_5%_2

R60 10K_5%_2

R61 10K_5%_2

R64 10K_5%_210K_5%_2

R224 10K_5%_2

R65 10K_5%_2
R66 10K_5%_2

11

4433

+3V+3V

URAT0_RX

URAT0_RX
UART0_TXUART0_TX
DGPU_HOLD_RST#

DGPU_HOLD_RST#
LDRQ0#

LDRQ0#

R92 10K_5%_210K_5%_2

*10K_5%_2

R93 *10K_5%_2
R228 10K_5%_210K_5%_2

ER04 : Change GPIO pin AGPIO91 to AGPIO21 for Modern Standby request.ER04 : Change GPIO pin AGPIO91 to AGPIO21 for Modern Standby request.

LPC_CLK0_EC (37)(37)

CLK_24M_DEBUG (33)(33)

LPC_RST# (37)(37)

SPICK_EN

SPICK_EN

SPICK_EN (37)

R886 100K_5%_2100K_5%_2

FCH_SPI_CLK_L

FCH_SPI_CLK_L

FCH_SPI_SIFCH_SPI_SI
FCH_SPI_SO

FCH_SPI_SO
FCH_SPI_IO2

FCH_SPI_IO2
FCH_SPI_IO3

FCH_SPI_IO3
FCH_SPI_CS0#

FCH_SPI_CS0#

APU_SPI_CLK (7)(7)

FDV301N

FDV301N

SPICK_EN

SPICK_EN

332211

Q14

ER03 : Add R886 for EC initial .

GPU SKU Strap TableGPU SKU Strap Table

Vendor Part NumberGPU Type

N18E-G0

N18E-G1

N18P-G61

N18P-G62

N18P-G0

Quanta P/N ID3

1

1

(35)

(37)

FCH_SPI_CLK

FCH_SPI_CLK

ID1 ID2

0 0

0

0 01

0 1

1 0 00

0606

0

10

1

5

5

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

NJF

PROJECT :PROJECT :

NJF

PROJECT :PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number R

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

2

2

Date: Sheet

RR 4/7(GPIO/HDA/SPI/I2C)

RR 4/7(GPIO/HDA/SPI/I2C)

RR 4/7(GPIO/HDA/SPI/I2C)

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

1

1

NJF

Sheet of

6 63

6 63

6 6363

ev

1A

1A

1A

55

Vinafix.com

4

4

3

3

2

2

1

1

FunctionUSB2 Port

USB0

USB1

D

D DD

USB2

USB3

USB4

USB5

USB6

USB7

TYPE-C

U3B PORT1U3B PORT1

Camera

U3B PORT3

U3B PORT2U3B PORT2

BluetoothBluetooth

Type C

U3B P1

Camera

U3B P3

U3B P2

Bluetooth

(30)
(30)

(31)
(31)

(29)
(29)

(31)
(31)

(33)
(33)

(31)

USB2_TYPEC+(30)

USB2_TYPEC-(30)

STRAPS PINSSTRAPS PINS

(33)

MS_PCIE_WAKE#(33)

(41)

C CC

C

APU_SPI_CLK(6)

(6)

SYS_RST#(6)(6)

R115
10K_5%_2

10K_5%_2

+3V_S5_APU+1.8V_S5+1.8V_S5

+3V_S5_APU

R116
10K_5%_2

10K_5%_2

MS_LAN_WAKE#(41)

USB3 and USB2 Port MappingUSB3 and USB2 Port Mapping

USB2A1+(31)
USB2A1-(31)

USBP3+(29)
USBP3-(29)

USB2A3+(31)

USB2A3-(31)(31)

USB2A2+(31)
USB2A2-(31)

USBP4+(33)
USBP4-(33)

APU_USBC_SCL_Q

APU_USBC_SCL_Q

APU_USBC_SDA_QAPU_USBC_SDA_Q

MS_PCIE_WAKE#
MS_LAN_WAKE#

MS_LAN_WAKE#

AC6
AC7

AA8
AA9

Y10

AC9

AC10

AA11
AA12

W11
W12

AL9

AL8

AE9

AE10

AE6
AE7

Y9

Y7
Y6

W8
W9

USBC0_DP/USB0_DPUSBC0_DP/USB0_DP

USBC0_DN/USB0_DNUSBC0_DN/USB0_DN

USB1_DPUSB1_DP

USB1_DNUSB1_DN

USB2_DPUSB2_DP

USB2_DNUSB2_DN

USB3_DPUSB3_DP

USB3_DNUSB3_DN

USBC4_DP/USB4_DPUSBC4_DP/USB4_DP

USBC4_DN/USB4_DNUSBC4_DN/USB4_DN

USB5_DPUSB5_DP

USB5_DNUSB5_DN

USB6_DPUSB6_DP

USB6_DNUSB6_DN

USB7_DPUSB7_DP

USB7_DNUSB7_DN

USBC_I2C_SCLUSBC_I2C_SCL

VDD_18_S5

USBC_I2C_SDAUSBC_I2C_SDA

USB_OC0_L/AGPIO16USB_OC0_L/AGPIO16

USB_OC1_L/AGPIO17USB_OC1_L/AGPIO17

USB_OC2_L/AGPIO18USB_OC2_L/AGPIO18

USB_OC3_L/AGPIO24USB_OC3_L/AGPIO24

+3V_S5
+3V_S5
+3V_S5
+3V_S5

USB

FP6 REV 0.92FP6 REV 0.92

PART 10 OF 13

USBC0_TX1P/USB0_TXP/DP2_TXP2USBC0_TX1P/USB0_TXP/DP2_TXP2

USBC0_TX1N/USB0_TXN/DP2_TXN2USBC0_TX1N/USB0_TXN/DP2_TXN2

USBC0_RX1P/USB0_RXP/DP2_TXP3USBC0_RX1P/USB0_RXP/DP2_TXP3

USBC0_RX1N/USB0_RXN/DP2_TXN3USBC0_RX1N/USB0_RXN/DP2_TXN3

USBC0_TX2P/DP2_TXP1USBC0_TX2P/DP2_TXP1

USBC0_TX2N/DP2_TXN1USBC0_TX2N/DP2_TXN1

USBC0_RX2P/DP2_TXP0USBC0_RX2P/DP2_TXP0

USBC0_RX2N/DP2_TXN0USBC0_RX2N/DP2_TXN0

USB1_TXPUSB1_TXP

USB1_TXNUSB1_TXN

USB1_RXPUSB1_RXP

USB1_RXNUSB1_RXN

USBC4_TX1P/USB4_TXP/DP3_TXP2USBC4_TX1P/USB4_TXP/DP3_TXP2

USBC4_TX1N/USB4_TXN/DP3_TXN2USBC4_TX1N/USB4_TXN/DP3_TXN2

USBC4_RX1P/USB4_RXP/DP3_TXP3USBC4_RX1P/USB4_RXP/DP3_TXP3

USBC4_RX1N/USB4_RXN/DP3_TXN3USBC4_RX1N/USB4_RXN/DP3_TXN3

USBC4_TX2P/DP3_TXP1USBC4_TX2P/DP3_TXP1

USBC4_TX2N/DP3_TXN1USBC4_TX2N/DP3_TXN1

USBC4_RX2P/DP3_TXP0USBC4_RX2P/DP3_TXP0

USBC4_RX2N/DP3_TXN0USBC4_RX2N/DP3_TXN0

USB5_TXPUSB5_TXP

USB5_TXNUSB5_TXN

USB5_RXPUSB5_RXP

USB5_RXNUSB5_RXN

AA1
AA3

AA2
AA4

AC2
AC4

AC1
AC3

AE1
AE3

AD8
AD9

V3
V1

U4
U2

W2
W4

W1
W3

AD2
AD4

AD12
AD11

USB3C1_TX+ (30)
USB3C1_TX- (30)

USB3C1_RX+ (30)
USB3C1_RX- (30)

USB3A1_TX+ (31)
USB3A1_TX- (31)

USB3A1_RX+ (31)
USB3A1_RX- (31)

USB3A3_TX+ (31)(31)
USB3A3_TX- (31)

USB3A3_RX+ (31)
USB3A3_RX- (31)

USB3A2_TX+ (31)
USB3A2_TX- (31)

USB3A2_RX+ (31)
USB3A2_RX- (31)

(30)

(30)

(30)

(30)

(31)

(31)

(31)

(31)

(31)

(31)

(31)

(31)

(31)

(31)

(31)

USB TYPE C

U3B Port1U3B Port1

U3B Port3

U3B Port3

U3B Port2U3B Port2

0707

FP6

FP6

216NOPNFP6216NOPNFP6

REQUIRED STRAPS

APU_SPI_CLKAPU_SPI_CLK

PULL

B BB

B

HIGHHIGH

PULL
LOW

Use 48Mhz crystal clock
and generate both internal
and external clocksand external clocks

DEFAULTDEFAULT

reference clock and generate
internal clocks onlyinternal clocks only

180110 ADD for re-driver180110 ADD for re-driver

A AA

A

5

5

SYS_RST#SYS_RST#

Int Pull-Up

normal reset mode

DEFAULTDEFAULT

short reset modeUse 100Mhz PCIE clock as

+1.8V_S5

+1.8V_S5

+1.8V_S5

+1.8V_S5

R119

4.7K_5%_2

4.7K_5%_2

APU_USBC_SCL_Q

APU_USBC_SCL_Q

R120

4.7K_5%_2

4.7K_5%_2

APU_USBC_SDA_QAPU_USBC_SDA_Q

N7

AGPIO256/WIFIBT_BT_DATAAGPIO256/WIFIBT_BT_DATA

R7

AGPIO257/WIFIBT_BT_VALIDAGPIO257/WIFIBT_BT_VALID

N6

AGPIO258/WIFIBT_BT_SYNCAGPIO258/WIFIBT_BT_SYNC

T6

AGPIO259/WIFIBT_BT_CLKAGPIO259/WIFIBT_BT_CLK

R10

AGPIO260/WIFIBT_QSPI_DATA0AGPIO260/WIFIBT_QSPI_DATA0

T12

AGPIO261/WIFIBT_QSPI_DATA1AGPIO261/WIFIBT_QSPI_DATA1

P12

AGPIO262/WIFIBT_QSPI_DATA2AGPIO262/WIFIBT_QSPI_DATA2

P11

AGPIO263/WIFIBT_QSPI_DATA3AGPIO263/WIFIBT_QSPI_DATA3

T11

AGPIO264/WIFIBT_QSPI_CLKAGPIO264/WIFIBT_QSPI_CLK

P6

AGPIO265/WIFIBT_QSPI_SSAGPIO265/WIFIBT_QSPI_SS

4

4

3

3

U1LU1L

WiFi

FP6 REV 0.92FP6 REV 0.92

PART 12 OF 13

EGPIO267/RFIC_SPI_CLKEGPIO267/RFIC_SPI_CLK

EGPIO268/RFIC_SPI_SSEGPIO268/RFIC_SPI_SS

AGPIO269/RFIC_SPI_DATAAGPIO269/RFIC_SPI_DATA

AGPIO270/WIFIBT_RFIC_WAKEUPAGPIO270/WIFIBT_RFIC_WAKEUP

EGPIO271/WIFIBT_BUCKENEGPIO271/WIFIBT_BUCKEN

EGPIO266/WIFIBT_FLOWEGPIO266/WIFIBT_FLOW

WIFIBT_DATA_RXPWIFIBT_DATA_RXP

WIFIBT_DATA_RXNWIFIBT_DATA_RXN

WIFIBT_DATA_TXPWIFIBT_DATA_TXP

WIFIBT_DATA_TXNWIFIBT_DATA_TXN

P8
R9
R6

P9
T9
T8

V7
V6

V9
V10

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number R

Date: SheetSheet of

Date: SheetSheet of

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

2

2

Date: Sheet

PROJECT :PROJECT :

RR 5/7(USB/STRAP)

RR 5/7(USB/STRAP)

RR 5/7(USB/STRAP)

NJF

NJF

NJF

Sheet of

7 63

7 63

7 6363

1

1

ev

1A

1A

1A

APU POWER

Vinafix.com

Add 22 x13 for CZ requestl...Tommy

C1078
22U/6.3VS_6

22U/6.3VS_6

C1082
22U/6.3VS_6

22U/6.3VS_6

D

D DD

C1083
22U/6.3VS_6

22U/6.3VS_6

C1086
22U/6.3VS_6

22U/6.3VS_6

Net name:+0.75V_S5 Trace 80mil from PL70 to R1244,R122l...Tommy

RR DG: 1*22UF+3*1UF

+0.75V_S5

+0.75V_S5

R121 *0_short

*0_short

R122 *0_short

*0_short

C CC

C

55

C1076

C1077
22U/6.3VS_6

22U/6.3VS_6

C1081
22U/6.3VS_6

22U/6.3VS_6

C1084
22U/6.3VS_6

22U/6.3VS_6

C1087
22U/6.3VS_6

22U/6.3VS_6

+VDDP_S5+VDDP_S5

Net name:+VDDP_S5 Trace 80mil...Tommy

C69
22u/6.3V_6

22u/6.3V_6

C1075

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C1079

C1080

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C1085
22U/6.3VS_6

22U/6.3VS_6

BOTTOM SIDE DECOUPLING UNDER APU

C40
22u/6.3V_6

22u/6.3V_6

C70
1u/6.3V_4

1u/6.3V_4

C71
1u/6.3V_4

1u/6.3V_4

RF

C52
22u/6.3V_6

22u/6.3V_6

C72
1u/6.3V_4

1u/6.3V_4

BOTTOM SIDE DECOUPLING UNDER APU

C21

180p/50V_4 C31

6.8p/50V_4

180p/50V_4

6.8p/50V_4

C23

C22

1u/6.3V_4

1u/6.3V_4

PR20.:Change +VDDCR_SOC capacitor value from 22uf to 47uf for AMD dustPR20.:Change +VDDCR_SOC capacitor value from 22uf to 47uf for AMD dust

RR DG: 9*22UF+2*1UF+4*0.22uf+3*180PF

C42

C41

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

C63

0.22u/6.3V_2

0.22u/6.3V_2

BOTTOM SIDE DECOUPLING UNDER APU

RR DG: 1*22UF+2*1UF

+3V+3V +APU_VDD_33+APU_VDD_33

R128 *0_short

Net name:+3V and +APU_VDD_33 Trace 20mil

*0_short

C84
1u/6.3V_4

1u/6.3V_4

4

4

RR DG: 7*22UF+1*1UF+1*180PF

C27
22U/6.3VS_6

22U/6.3VS_6

C28
22U/6.3VS_6

22U/6.3VS_6

C29
22U/6.3VS_6

22U/6.3VS_6

C51
22U/6.3VS_6

22U/6.3VS_6

C30
22U/6.3VS_6

22U/6.3VS_6

VDDIO_MEM-DDR4:6A

C44

C53

C43

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

22u/6.3V_6

C64

0.22u/6.3V_2

0.22u/6.3V_2

If the VSS plane is cut to create a VDDIO_MEM_S3 plane, ceramic
capacitors with NP0 or C0G dielectric are connected across
the VDDIO_MEM_S3 and VSS plane split.

VDDIO_VPH is a dedicated power supply for DisplayPort 0. When

DP0 is used for eDP

to improve battery lifeto improve battery life

C86

C85

22u/6.3V_6

22u/6.3V_6

1u/6.3V_4

1u/6.3V_4

22u/6.3V_6

22u/6.3V_6

C65

0.22u/6.3V_20.22u/6.3V_2

C45
22u/6.3V_6

22u/6.3V_6

C66

0.22u/6.3V_2

0.22u/6.3V_2

C46
22u/6.3V_6

22u/6.3V_6

C67
180p/50V_4

180p/50V_4

C47
1u/6.3V_4

1u/6.3V_4

C68
180p/50V_4

180p/50V_4

Change to +1.2V_SUSpower rail...Tommy

, connect VDDIO_VPH to VDDIO_MEM_S3 source (1.1V LPDDR4x or 1.2V DDR4) ‧DP0 is used for eDP, connect VDDIO_VPH to VDDIO_MEM_S3 source (1.1V LPDDR4x or 1.2V DDR4) ‧

C33
22U/6.3VS_6

22U/6.3VS_6

C48
1u/6.3V_4

1u/6.3V_4

BOTTOM SIDE DECOUPLING UNDER APU

RR DG: 1*22UF+2*1UF

+3V_S5_APU

+3V_S5_APU

Net name:+3V_S5 and +APU_VDD_33_S5 Trace 20mil

B BB

B

+APU_VDD_33_S5

+APU_VDD_33_S5

R129 *0_short*0_short

C91

C90

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

BOTTOM SIDE DECOUPLING UNDER APU

C92
22u/6.3V_6

22u/6.3V_6

Net name:+1.8V and +VDD_18 Trace 60mil

+1.8V

+1.8V +VDD_18+VDD_18

R130 *0_short

*0_short

*0_short

R131 *0_short

+1.8V_S5

+1.8V_S5

*0_short

R132 *0_short

Net name:+1.8V_S5V and +VDD_18_S5 Trace 40mil

RR DG: 1*22UF+2*1UF

C93
1u/6.3V_41u/6.3V_4

1u/6.3V_4

1u/6.3V_4

22u/6.3V_6

22u/6.3V_6

C95

C94

BOTTOM SIDE DECOUPLING UNDER APU

+VDD_18_S5

+VDD_18_S5

RR DG: 1*22UF+2*1UF

C97

C96
1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

C98
22u/6.3V_6

22u/6.3V_6

BOTTOM SIDE DECOUPLING UNDER APU

+VDDCR_SOC

+VDDCR_SOC

C35
22U/6.3VS_6

22U/6.3VS_6

C49

180p/50V_4

180p/50V_4

+APU_VDD_33_S5

+APU_VDD_33_S5

3

3

+1.2V_SUS

+1.2V_SUS

C50

6.8p/50V_4

6.8p/50V_4

+APU_VDDIO_AZ

+APU_VDDIO_AZ

+APU_VDD_33+APU_VDD_33

+VDD_18

+VDD_18

+VDD_18_S5

+VDD_18_S5

+VDDP_S5

+VDDP_S5

+VDDP_S0

+VDDP_S0

+3V_RTC

+3V_RTC

+VDDCR_SOC

+VDDCR_SOC

RFRF

W18
W20

AC20
AC28
AD23
AD26
AD28
AD32
AE20
AE22
AE25
AE28
AF23
AF26
AF28
AF32
AG20
AG22
AG25
AG28
AJ20
AJ23
AJ26
AJ28
AJ32
AK22
AK25
AK28
AL23
AL26
AL28
AL32
AM22
AM25
AM28
AN28
AN32
AP28
AR32

AC21
AD21

AL18
AM17

AL20
AM19

AL19
AM18

AL17
AM16

AL11
AL12
AM12

AJ11

N16
N18
N20
P17
P19
R18
R20
T19
U18
U20
V19

Y19

AP9

M15
M16
M18

VDDCR_SOC_1VDDCR_SOC_1

20A 120A120A

VDDCR_SOC_2VDDCR_SOC_2

VDDCR_SOC_3VDDCR_SOC_3

VDDCR_SOC_4VDDCR_SOC_4

VDDCR_SOC_5VDDCR_SOC_5

VDDCR_SOC_6VDDCR_SOC_6

VDDCR_SOC_7VDDCR_SOC_7

VDDCR_SOC_8VDDCR_SOC_8

VDDCR_SOC_9VDDCR_SOC_9

VDDCR_SOC_10VDDCR_SOC_10

VDDCR_SOC_11VDDCR_SOC_11

VDDCR_SOC_12VDDCR_SOC_12

VDDCR_SOC_13VDDCR_SOC_13

VDDCR_SOC_14VDDCR_SOC_14

VDDIO_MEM_S3_1VDDIO_MEM_S3_1

VDDIO_MEM_S3_2VDDIO_MEM_S3_2

VDDIO_MEM_S3_3VDDIO_MEM_S3_3

VDDIO_MEM_S3_4VDDIO_MEM_S3_4

VDDIO_MEM_S3_5VDDIO_MEM_S3_5

VDDIO_MEM_S3_6VDDIO_MEM_S3_6

VDDIO_MEM_S3_7VDDIO_MEM_S3_7

VDDIO_MEM_S3_8VDDIO_MEM_S3_8

VDDIO_MEM_S3_9VDDIO_MEM_S3_9

VDDIO_MEM_S3_10VDDIO_MEM_S3_10

VDDIO_MEM_S3_11VDDIO_MEM_S3_11

VDDIO_MEM_S3_12VDDIO_MEM_S3_12

VDDIO_MEM_S3_13VDDIO_MEM_S3_13

VDDIO_MEM_S3_14VDDIO_MEM_S3_14

VDDIO_MEM_S3_15VDDIO_MEM_S3_15

VDDIO_MEM_S3_16VDDIO_MEM_S3_16

VDDIO_MEM_S3_17VDDIO_MEM_S3_17

VDDIO_MEM_S3_18VDDIO_MEM_S3_18

VDDIO_MEM_S3_19VDDIO_MEM_S3_19

VDDIO_MEM_S3_20VDDIO_MEM_S3_20

VDDIO_MEM_S3_21VDDIO_MEM_S3_21

VDDIO_MEM_S3_22VDDIO_MEM_S3_22

VDDIO_MEM_S3_23VDDIO_MEM_S3_23

VDDIO_MEM_S3_24VDDIO_MEM_S3_24

VDDIO_MEM_S3_25VDDIO_MEM_S3_25

VDDIO_MEM_S3_26VDDIO_MEM_S3_26

VDDIO_MEM_S3_27VDDIO_MEM_S3_27

VDDIO_MEM_S3_28VDDIO_MEM_S3_28

VDDIO_MEM_S3_29VDDIO_MEM_S3_29

VDDIO_MEM_S3_30VDDIO_MEM_S3_30

VDDIO_MEM_S3_31VDDIO_MEM_S3_31

VDDIO_MEM_S3_32VDDIO_MEM_S3_32

VDDIO_MEM_S3_33VDDIO_MEM_S3_33

VDDIO_MEM_S3_34VDDIO_MEM_S3_34

VDDIO_MEM_S3_35VDDIO_MEM_S3_35

VDDIO_MEM_S3_36VDDIO_MEM_S3_36

VDDIO_MEM_S3_37VDDIO_MEM_S3_37

VDDIO_VPH_1VDDIO_VPH_1

1A

VDDIO_VPH_2VDDIO_VPH_2

VDDIO_AUDIOVDDIO_AUDIO

0.2A

1.5V

VDD_33_1VDD_33_1

0.25A

3.3V

VDD_33_2VDD_33_2

VDD_18_1VDD_18_1

2.5A

1.8V1.8V

VDD_18_2VDD_18_2

VDD_18_S5_1VDD_18_S5_1

1A

1.8V

VDD_18_S5_2VDD_18_S5_2

VDD_33_S5_1VDD_33_S5_1

0.25A

3.3V

VDD_33_S5_2VDD_33_S5_2

VDDP_S5_1VDDP_S5_1

2A

0.75V+/-0.0375V

VDDP_S5_2VDDP_S5_2

VDDP_S5_3VDDP_S5_3

VDDP_1VDDP_1

2A

VDDP_2VDDP_2

0.75V+/-0.0375V

VDDP_3VDDP_3

VDDBT_RTC_GVDDBT_RTC_G

4.5uA

1.425V~3.465V

POWERPOWER

Edward:25W CPU

6A

FP6 REV 0.92
PART 6 OF 13

FP6FP6

216NOPNFP6

216NOPNFP6

U1F

VDDCR_1VDDCR_1

VDDCR_2VDDCR_2

VDDCR_3VDDCR_3

VDDCR_4VDDCR_4

VDDCR_5VDDCR_5

VDDCR_6VDDCR_6

VDDCR_7VDDCR_7

VDDCR_8VDDCR_8

VDDCR_9VDDCR_9

VDDCR_10VDDCR_10

VDDCR_11VDDCR_11

VDDCR_12VDDCR_12

VDDCR_13VDDCR_13

VDDCR_14VDDCR_14

VDDCR_15VDDCR_15

VDDCR_16VDDCR_16

VDDCR_17VDDCR_17

VDDCR_18VDDCR_18

VDDCR_19VDDCR_19

VDDCR_20VDDCR_20

VDDCR_21VDDCR_21

VDDCR_22VDDCR_22

VDDCR_23VDDCR_23

VDDCR_24VDDCR_24

VDDCR_25VDDCR_25

VDDCR_26VDDCR_26

VDDCR_27VDDCR_27

VDDCR_28VDDCR_28

VDDCR_29VDDCR_29

VDDCR_30VDDCR_30

VDDCR_31VDDCR_31

VDDCR_32VDDCR_32

VDDCR_33VDDCR_33

VDDCR_34VDDCR_34

VDDCR_35VDDCR_35

VDDCR_36VDDCR_36

VDDCR_37VDDCR_37

VDDCR_38VDDCR_38

VDDCR_39VDDCR_39

VDDCR_40VDDCR_40

VDDCR_41VDDCR_41

VDDCR_42VDDCR_42

VDDCR_43VDDCR_43

VDDCR_44VDDCR_44

VDDCR_45VDDCR_45

VDDCR_46VDDCR_46

VDDCR_47VDDCR_47

VDDCR_48VDDCR_48

VDDCR_49VDDCR_49

VDDCR_50VDDCR_50

VDDCR_51VDDCR_51

VDDCR_52VDDCR_52

VDDCR_53VDDCR_53

VDDCR_54VDDCR_54

VDDCR_55VDDCR_55

VDDCR_56VDDCR_56

VDDCR_57VDDCR_57

VDDCR_58VDDCR_58

VDDCR_59VDDCR_59

VDDCR_60VDDCR_60

VDDCR_61VDDCR_61

VDDCR_62VDDCR_62

VDDCR_63VDDCR_63

VDDCR_64VDDCR_64

VDDCR_65VDDCR_65

VDDCR_66VDDCR_66

VDDCR_67VDDCR_67

VDDCR_68VDDCR_68

VDDCR_69VDDCR_69

VDDCR_70VDDCR_70

VDDCR_71VDDCR_71

VDDCR_72VDDCR_72

VDDCR_73VDDCR_73

VDDCR_74VDDCR_74

VDDCR_75VDDCR_75

VDDCR_76VDDCR_76

VDDCR_77VDDCR_77

VDDCR_78VDDCR_78

VDDCR_79VDDCR_79

VDDCR_80VDDCR_80

VDDCR_81VDDCR_81

VDDCR_82VDDCR_82

VDDCR_83VDDCR_83

G7
G10
G12
G14
H8
H11
H15
K6
K12
K14
L8
M7
M10
N14
P7
P10
P13
P15
R8
R14
R16
T7
T10
T13
T15
T17
U14
U16
V13
V15
V17
W7
W10
W14
W16
Y8
Y13
Y15
Y17
AA7
AA10
AA14
AA16
AA18
AB13
AB15
AB17
AB19
AC14
AC16
AC18
AD7
AD10
AD13
AD15
AD17
AD19
AE8
AE14
AE16
AE18
AF7
AF10
AF13
AF15
AF17
AF19
AG14
AG16
AG18
AH13
AH15
AH17
AH19
AJ7
AJ10
AJ14
AJ16
AJ18
AK13
AK15
AK17
AK19

2

2

+VCC_CORE

+VCC_CORE

C24
22U/6.3VS_6

22U/6.3VS_6

C25
22U/6.3VS_6

22U/6.3VS_6

C26
22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C32
22U/6.3VS_6

22U/6.3VS_6

RR DG: 16*22UF+1*180PF

C36

C37

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C54

C55

6.8p/50V_4

22U/6.3VS_6

22U/6.3VS_6

6.8p/50V_4

BOTTOM SIDE DECOUPLING UNDER APU

RFRF

C56
22U/6.3VS_6

22U/6.3VS_6

C57
22U/6.3VS_6

22U/6.3VS_6

C58
22U/6.3VS_6

22U/6.3VS_6

C38
22U/6.3VS_622U/6.3VS_6

C39
22U/6.3VS_6

22U/6.3VS_6

C59
22U/6.3VS_6

22U/6.3VS_6

C60
22U/6.3VS_6

22U/6.3VS_6

Add 22 x13 for CZ requestl...TommyAdd 22 x13 for CZ requestl...Tommy

C1089

C1088
22U/6.3VS_6

22U/6.3VS_6

C1096
22U/6.3VS_6

22U/6.3VS_6

C1104
22U/6.3VS_6

22U/6.3VS_6

C1112
22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C1097
22U/6.3VS_6

22U/6.3VS_6

C1105
22U/6.3VS_6

22U/6.3VS_6

C1113
22U/6.3VS_6

22U/6.3VS_6

C1090
22U/6.3VS_6

22U/6.3VS_6

C1098
22U/6.3VS_6

22U/6.3VS_6

C1106
22U/6.3VS_6

22U/6.3VS_6

Net name:+0.75V and +VDDP_S0 Trace 80mil ...TommyNet name:+0.75V and +VDDP_S0 Trace 80mil ...Tommy

+0.75V

+0.75V

Edwad:change to 0.75V

R123 *0_short

R124 *0_short

*0_short

*0_short

+VDDP_S0

+VDDP_S0

C79
22u/6.3V_6

22u/6.3V_6

C1092

C1091
22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C1099

C1100

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

C1107

C1108

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

22U/6.3VS_6

RR DG: 2*22UF+8*1UF+1*180PF

BOTTOM SIDE DECOUPLING UNDER APU

C73

C74
180p/50V_4

1u/6.3V_41u/6.3V_4

180p/50V_4

C81

C80

1u/6.3V_4

22u/6.3V_6

22u/6.3V_6

1u/6.3V_4

C34

6.8p/50V_4

6.8p/50V_4

C1093
22U/6.3VS_6

22U/6.3VS_6

C1101
22U/6.3VS_6

22U/6.3VS_6

C1109
22U/6.3VS_6

22U/6.3VS_6

C75
1u/6.3V_4

1u/6.3V_4

1

1

RF

C61
22U/6.3VS_622U/6.3VS_6

C1094
22U/6.3VS_6

22U/6.3VS_6

C1102
22U/6.3VS_6

22U/6.3VS_6

C1110
22U/6.3VS_6

22U/6.3VS_6

C76
1u/6.3V_4

1u/6.3V_4

C62
180p/50V_4

180p/50V_4

C77
1u/6.3V_4

1u/6.3V_4

08

C1095
22U/6.3VS_6

22U/6.3VS_6

C1103
22U/6.3VS_6

22U/6.3VS_6

C1111
22U/6.3VS_6

22U/6.3VS_6

C87

C88

C89

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

1u/6.3V_4

EC_RTC_RST (37)(37)

R135
100K_5%_2

100K_5%_2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number R

Size Document Number Rev

Size Document Number Rev

Thursday, November 19, 2020

Date: SheetSheet of

Thursday, November 19, 2020

Date: SheetSheet of

Thursday, November 19, 2020

Date: Sheet

PROJECT :PROJECT :

RR 6/7(POWER)

RR 6/7(POWER)

RR 6/7(POWER)

1

1

NJF

NJF

NJF

Sheet of

8 63

8 63

8 6363

ev

Q10

2N7002K

2N7002K

33

11

1u/6.3V_4

22

Shortpad R884 from 0 ohm for PR stage.Shortpad R884 from 0 ohm for PR stage.

R884 *0_Short_6

+3V_S5

+3V_S5

R885 *10K_5%_2

A AA

A

+1.8V_S5+1.8V_S5

*10K_5%_2

ER05 : Reserved for APU power sequence
(+0.75V_S5 --> +1.8V_S5 --> +3V_S5)(+0.75V_S5 --> +1.8V_S5 --> +3V_S5)

5

5

U13

5

5

IN#2IN#2

4

4

IN#1IN#1

3

3

ENEN

C1238
*1u/6.3V_4

*1u/6.3V_4

1

1

OUTOUT

2

2

GNDGND

*G5245AT11U

*G5245AT11U

Delete PG jumperDelete PG jumper

*0_Short_6

+3V_S5_APU

+3V_S5_APU

Max: 0.2AMax: 0.2A

+1.8V_S5

+1.8V_S5

4

4

RR DG: 1*22UF+1*1UFRR DG: 1*22UF+1*1UF

Edwad:choice voltage by codec

+APU_VDDIO_AZ

*0_short

+APU_VDDIO_AZ

C82
1u/6.3V_4

1u/6.3V_4

C83
22u/6.3V_6

22u/6.3V_6

R127 *0_short

BOTTOM SIDE DECOUPLING UNDER APU

Change +3VPCU to LDO3....Tommy0504

51225_LDO3

51225_LDO3

3

3

R133 1K_5%_4

RTCVCC_TP1

RTCVCC_TP1

1K_5%_4

R134
*0_5%_4

*0_5%_4

+3V_RTC

+3V_RTC

4.5uA

C99

0.22u/6.3V_2

0.22u/6.3V_2

20MIL

C100
1u/6.3V_4

1u/6.3V_4

2

2

1122

*SOLDERJUMPER-2

*SOLDERJUMPER-2
J1

1A

1A

1A

55

Vinafix.com

4

4

3

3

2

2

1

1

APU GND

FP6

FP6

216NOPNFP6216NOPNFP6

U1GU1G

D

D DD

C CC

C

B BB

B

AM20

A10
A12
A14
A16
A19
A21
A23
A26
A30

C10
C32

E10
E11
E12
E13
E14
E15
E16
E18
E19
E20
E21
E22
E23
E25
E26
E27

F19
F21
F23
F28

G16
G26
G28
G32

H13
H18
H20
H22
H25
H28

J19

K16
K21
K26

A3
A5
A7

C3

E7
E8

F5

G1
G3
G5

H5

K1
K3
K5

GNDGND

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

FP6 REV 0.92
PART 7 OF 13

K28

VSSVSS

K32

VSSVSS

L5

VSSVSS

L13

VSSVSS

L15

VSSVSS

L18

VSSVSS

L20

VSSVSS

L25

VSSVSS

L28

VSSVSS

M1

VSSVSS

M3

VSSVSS

M5

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

ORIENT_APU#ORIENT_APU#

M21
M23
M26

Edward:check it with AMDEdward:check it with AMD

M28
M32
N5
N8
N11
N13
N15
N17
N22
N25
N28
P1
P5
P14
P16
P18
P20
P23
P26
P28
P32
R5
R11
R13
R15
R17
R19
R22
R25
R28
T1
T3
T5
T14
T16
T18
T20
T23
T26
T28
T32
U13
U15
U17
U19
V2
V4

AR14
AR16
AR19
AR21
AR26
AR28

AT23

AU5

AU8
AU11
AU13
AU15
AU18
AU20
AU22
AU25
AU28

AV1

AV5

AV7

AV10
AV12
AV14
AV16
AV19
AV21
AV23
AV26
AV28
AV32

AW5

AW28

AY6

AY7

AY8

AY10
AY11
AY12
AY13
AY14
AY15
AY16
AY18
AY19
AY20
AY21
AY22
AY23
AY25
AY26
AY27

BB1

BB32

BD3

BD7
BD10
BD12
BD14
BD16

VSS_246VSS_246

VSS_247VSS_247

VSS_248VSS_248

VSS_249VSS_249

VSS_250VSS_250

VSS_251VSS_251

VSS_252VSS_252

VSS_253VSS_253

VSS_254VSS_254

VSS_255VSS_255

VSS_256VSS_256

VSS_257VSS_257

VSS_258VSS_258

VSS_259VSS_259

VSS_260VSS_260

VSS_261VSS_261

VSS_262VSS_262

VSS_263VSS_263

VSS_264VSS_264

VSS_265VSS_265

VSS_266VSS_266

VSS_267VSS_267

VSS_268VSS_268

VSS_269VSS_269

VSS_270VSS_270

VSS_271VSS_271

VSS_272VSS_272

VSS_273VSS_273

VSS_274VSS_274

VSS_275VSS_275

VSS_276VSS_276

VSS_277VSS_277

VSS_278VSS_278

VSS_279VSS_279

VSS_280VSS_280

VSS_281VSS_281

VSS_282VSS_282

VSS_283VSS_283

VSS_284VSS_284

VSS_285VSS_285

VSS_286VSS_286

VSS_287VSS_287

VSS_288VSS_288

VSS_289VSS_289

VSS_290VSS_290

VSS_291VSS_291

VSS_292VSS_292

VSS_293VSS_293

VSS_294VSS_294

VSS_295VSS_295

VSS_296VSS_296

VSS_297VSS_297

VSS_298VSS_298

VSS_299VSS_299

VSS_300VSS_300

VSS_301VSS_301

VSS_302VSS_302

VSS_303VSS_303

VSS_304VSS_304

FP6

FP6

216NOPNFP6216NOPNFP6

U1KU1K

GND/RSVD

FP6 REV 0.92FP6 REV 0.92

PART 11 OF 13

VSS_305VSS_305

VSS_306VSS_306

VSS_307VSS_307

VSS_308VSS_308

VSS_309VSS_309

RSVD_46RSVD_46

RSVD_47RSVD_47

RSVD_45RSVD_45

RSVD_44RSVD_44

RSVD_43RSVD_43

RSVD_42RSVD_42

RSVD_41RSVD_41

RSVD_40RSVD_40

RSVD_39RSVD_39

RSVD_38RSVD_38

RSVD_37RSVD_37

RSVD_36RSVD_36

RSVD_35RSVD_35

RSVD_34RSVD_34

RSVD_33RSVD_33

RSVD_32RSVD_32

RSVD_31RSVD_31

RSVD_30RSVD_30

RSVD_29RSVD_29

RSVD_28RSVD_28

RSVD_27RSVD_27

RSVD_26RSVD_26

RSVD_25RSVD_25

RSVD_24RSVD_24

RSVD_23RSVD_23

RSVD_22RSVD_22

RSVD_21RSVD_21

RSVD_20RSVD_20

RSVD_19RSVD_19

RSVD_18RSVD_18

RSVD_17RSVD_17

RSVD_16RSVD_16

RSVD_15RSVD_15

RSVD_14RSVD_14

RSVD_13RSVD_13

RSVD_12RSVD_12

RSVD_11RSVD_11

RSVD_10RSVD_10

RSVD_9RSVD_9

RSVD_8RSVD_8

RSVD_7RSVD_7

RSVD_6RSVD_6

RSVD_5RSVD_5

RSVD_4RSVD_4

RSVD_3RSVD_3

RSVD_2RSVD_2

RSVD_1RSVD_1

BD19
BD21
BD23
BD26
BD30

AV8
BD18
AV3
AU6
AR6
AR3
AP1
AN16
AN4
AN2
AM14
AM13
AL29
AL15
AL14
AL13
AK3
AJ29
AJ27
AF6
AE12
AD6
AD3
AC30
AC12
AB31
AA20
AA6
Y12
W6
V12
R12
N19
N12
N10
N9
M13
M12
M11
M6
L12
K19
F16
F14
F12
F10
C26

V11
V14
V16
V18
V20
V22
V25
V28

W13
W15
W17
W19
W23
W26
W28
W32

Y11
Y14
Y16
Y18
Y20
Y22
Y25
Y28

AA5
AA13
AA15
AA17
AA19
AA23
AA26
AA28
AA32

AB2

AB4
AB14
AB16
AB18
AB20

AC5

AC8

AC11
AC13
AC15
AC17
AC19
AC22
AC25

AD1

AD5

AD14
AD16
AD18
AD20

AE5
AE11

V5

VSSVSS

V8

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

W5

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

Y1

VSSVSS

Y3

VSSVSS

Y5

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

VSSVSS

FP6

FP6

216NOPNFP6216NOPNFP6

U1HU1H

GND

GND

FP6 REV 0.92
PART 8 OF 13

09

AE13

VSSVSS

AE15

VSSVSS

AE17

VSSVSS

AE19

VSSVSS

AF1

VSSVSS

AF3

VSSVSS

AF5

VSSVSS

AF14

VSSVSS

AF16

VSSVSS

AF18

VSSVSS

AF20

VSSVSS

AG5

VSSVSS

AG8

VSSVSS

AG11

VSSVSS

AG13

VSSVSS

AG15

VSSVSS

AG17

VSSVSS

AG19

VSSVSS

AH14

VSSVSS

AH16

VSSVSS

AH18

VSSVSS

AH20

VSSVSS

AJ1

VSSVSS

AJ3

VSSVSS

AJ5

VSSVSS

AJ13

VSSVSS

AJ15

VSSVSS

AJ17

VSSVSS

AJ19

VSSVSS

AK5

VSSVSS

AK8

VSSVSS

AK11

VSSVSS

AK14

VSSVSS

AK16

VSSVSS

AK18

VSSVSS

AK20

VSSVSS

AL1

VSSVSS

AL5

VSSVSS

AL7

VSSVSS

AL10

VSSVSS

AL16

VSSVSS

AM5

VSSVSS

AM8

VSSVSS

AM11

VSSVSS

AM15

VSSVSS

AN1

VSSVSS

AN5

VSSVSS

AN7

VSSVSS

AN10

VSSVSS

AN23

VSSVSS

AN26

VSSVSS

AP5

VSSVSS

AP8

VSSVSS

AP13

VSSVSS

AP15

VSSVSS

AP18

VSSVSS

AP20

VSSVSS

AP25

VSSVSS

AR1

VSSVSS

AR5

VSSVSS

AR7

VSSVSS

AR12

VSSVSS

ORIENT_APU#

R136 *0_5%_2_SHORT*0_5%_2_SHORT

A AA

A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

5

5

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: SheetSheet of

Date: SheetSheet of

Thursday, November 19, 2020

Thursday, November 19, 2020

4

4

3

3

2

2

Thursday, November 19, 2020

PROJECT :PROJECT :

RR 7/7(GND/RSVD)

RR 7/7(GND/RSVD)

RR 7/7(GND/RSVD)

NJF

NJF

NJF

Sheet of

9 63

9 63

9 6363

1

1

1A

1A

1A

55

Vinafix.com

4

4

3

3

2

2

1

1

10

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

10 63Thursday, November 19, 2020

10 63Thursday, November 19, 2020

10 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

11

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

11 63Thursday, November 19, 2020

11 63Thursday, November 19, 2020

11 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

12

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

12 63Thursday, November 19, 2020

12 63Thursday, November 19, 2020

12 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

13

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

13 63Thursday, November 19, 2020

13 63Thursday, November 19, 2020

13 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

14

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

14 63Thursday, November 19, 2020

14 63Thursday, November 19, 2020

14 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

15

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

15 63Thursday, November 19, 2020

15 63Thursday, November 19, 2020

15 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

16

D DD

D

C

C CC

B

B BB

A

A AA

Title

Title

5

5

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: SheetSheet of

Date: SheetSheet of

4

4

3

3

Date: Sheet

<Title>

<Title>

<Title>

<Doc> <RevCode>

A

<Doc> <RevCode>

A

<Doc> <RevCode>

A

2

2

Sheet of

16 63Thursday, November 19, 2020

16 63Thursday, November 19, 2020

16 63Thursday, November 19, 2020

1

1

55

Vinafix.com

4

4

3

3

2

2

1

1

EMC4 0.1u/50V_4

EMC5 0.1u/50V_40.1u/50V_4

VIN +1.2V_SUS+1.2V_SUS +FBVDDQ_MEM+FBVDDQ_MEM

VIN

D DD

D

+3V_S5

+3V_S5

C CC

C

B BB

B

+5V_S5+5V_S5

EMC6 0.1u/50V_40.1u/50V_4

EMC7 0.1u/50V_40.1u/50V_4 EMC27 100p/50V_4100p/50V_4

EMC8 0.1u/50V_4

EMC9 0.1U/10V/X5R_20.1U/10V/X5R_2

EMC10 0.1U/10V/X5R_20.1U/10V/X5R_2

EMC11 0.1U/10V/X5R_2

EMC12 0.1U/10V/X5R_20.1U/10V/X5R_2

EMC13 0.1U/10V/X5R_2

EMC14 0.1U/10V/X5R_2

EMC15 0.1U/10V/X5R_2

EMC16 0.1U/10V/X5R_20.1U/10V/X5R_2

EMC17 0.1U/10V/X5R_2

EMC18 0.1U/10V/X5R_20.1U/10V/X5R_2

EMC29 0.1U/10V/X5R_2

0.1u/50V_4

0.1u/50V_4

0.1U/10V/X5R_2

0.1U/10V/X5R_2

0.1U/10V/X5R_2

0.1U/10V/X5R_2

0.1U/10V/X5R_2

EMC19 100p/50V_4

100p/50V_4

100p/50V_4

EMC20 100p/50V_4

EMC21 100p/50V_4100p/50V_4

EMC22 100p/50V_4100p/50V_4

EMC23 100p/50V_4100p/50V_4

EMC30 100p/50V_4100p/50V_4

USB-A

H1

*H-O118X169D118X169N

*H-O118X169D118X169N

11

USB-C

H3

*H-BKX-1

*H-BKX-1

11

LAN

H5

*H-TC256BC236D177P2

*H-TC256BC236D177P2

11

Main SSD

H11

*HG-C315D158P2

*HG-C315D158P2

11
2

2
3

3

445566

9

9
8

8
77

H2

*H-C236D118P2

*H-C236D118P2

11

H6

*H-C71D71N

*H-C71D71N

11

H24

*SPAD-NJF-MB-NJF-1

*SPAD-NJF-MB-NJF-1

11

EMC24 100p/50V_4100p/50V_4

EMC25 100p/50V_4100p/50V_4

EMC26 100p/50V_4100p/50V_4

EMC28 100p/50V_4100p/50V_4

FAN 定位孔

H25

*H-O71X83D71X83N

*H-O71X83D71X83N

11

FAN

H7

*H-TC256I177BC217D177P2

*H-TC256I177BC217D177P2

11

Audio共鎖螺絲

H4

*HG-C315D158P2

*HG-C315D158P2

11
2

2
3

3

445566

2nd SSD NUT

H13

H-TC217BC136D136PT

H-TC217BC136D136PT

11

H10

*HG-C256D177P2

*HG-C256D177P2

11
2

2
3

3

445566

9

9
8

8
77

SMT GASKET-BOTSMT GASKET-BOT

S1
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

S7
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

S13
SPAD-RE134X130SPAD-RE134X130

GBBKC001010

GBBKC001010

11

CPU上方共鎖螺絲

H8

*HG-C315D158P2

*HG-C315D158P2

11

9

9
8

8
77

2

2
3

3

S2

*SPAD-RE236X158

*SPAD-RE236X158

11

S8
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

PR03 : Add S13 GASKET for EMI request.PR03 : Add S13 GASKET for EMI request.

9

9
8

8
77

445566

S3
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

S9
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

H9

*HG-C315D158P2

*HG-C315D158P2

11

9

9

2

2

8

8

3

3

77

445566

CPU bracket

H14

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

9

9
8

8
77

445566

H15

9

9
8

8
77

445566

dGPU bracket

H18

9

9
8

8
77

445566

H16

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

H17

H20

445566

445566

445566

9

9
8

8
77

9

9
8

8
77

9

9
8

8
77

S4
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

S10
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

*2D-BARCODE-8X8-S

*2D-BARCODE-8X8-S

S5
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

S11
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

2D BARCODE2D BARCODE

H28

11

1717

S6
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

S12
SPAD-RE95X130SPAD-RE95X130

GB0MB002010

GB0MB002010

11

H29

*2D-BARCODE-8X8-

*2D-BARCODE-8X8-S

11

S

WLAN TOP & BOT SPAD

H12

*H-C154D154PN

*H-C154D154PN

11

H22

*H-O276X414D276X414N

*H-O276X414D276X414N

11

H23

*SPAD-BKXB-2

*SPAD-BKXB-2

11

H19

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

445566

9

9
8

8
77

H21

*HG-TC217BC185D146P2

*HG-TC217BC185D146P2

11
2

2
3

3

445566

9

9
8

8
77

A AA

A

5

5

HDMI TOP CPU TOP

H26

*SPAD-RE315X91NP

*SPAD-RE315X91NP

11

4

4

H27

*SPAD-C177NP

*SPAD-C177NP

11

3

3

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number R

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Thursday, November 19, 2020

Thursday, November 19, 2020

Thursday, November 19, 2020

Date: SheetSheet of

2

2

Date: SheetSheet of

PROJECT :PROJECT :

hole

hole

hole

NJF

NJF

NJF

Sheet of

17 63

17 63

17 6363

1

1

ev

2A

2A

2A

55

Vinafix.com

4

4

3

3

2

2

1

1

M_A_A[13:0](4)(4)

D DD

D

M_A_WE#(4)

(4)

M_A_CAS#(4)

(4)

M_A_RAS#(4)

(4)

R137 1K_5%_2

+1.2V_SUS

+1.2V_SUS

C

C CC

B

B BB

A

A AA

1K_5%_2

(4)

M_A_ACT#(4)
M_A_PARITY(4)

(4)

M_A_ALERT#(4)

(4)
(4)

M_A_EVENT#(4)
M_A_RST#(4)

(4)

(4)

M_A_BS#0(4)
M_A_BS#1(4)

(4)
(4)

M_A_BG#0(4)

(4)

M_A_BG#1(4)

M_A_CS#0(4)(4)
M_A_CS#1(4)

(4)
(4)

M_A_CKE0(4)
M_A_CKE1(4)

(4)

(4)

M_A_CLKP0(4)
M_A_CLKN0(4)

(4)
(4)

M_A_CLKP1(4)
M_A_CLKN1(4)

(4)

(4)

M_A_ODT0(4)
M_A_ODT1(4)

(4)

SMB_RUN_CLK_R(6,19)(6,19)

(6,19)

SMB_RUN_DAT_R(6,19)

M_A_DM[7:0](4)

(4) M_A_DQSN[7:0] (4)(4)

5

5

M_A_A0

M_A_A0
M_A_A1

M_A_A1
M_A_A2

M_A_A2
M_A_A3

M_A_A3
M_A_A4M_A_A4
M_A_A5

M_A_A5
M_A_A6

M_A_A6
M_A_A7

M_A_A7
M_A_A8

M_A_A8
M_A_A9

M_A_A9
M_A_A10

M_A_A10
M_A_A11

M_A_A11
M_A_A12

M_A_A12
M_A_A13M_A_A13

M_A_EVENT#M_A_EVENT#

M_A_EVENT#

M_A_EVENT#

C124 *0.1U/10V/X5R_2

M_A_DM0

M_A_DM0
M_A_DM2

M_A_DM2
M_A_DM3

M_A_DM3
M_A_DM4

M_A_DM4
M_A_DM6

M_A_DM6
M_A_DM5

M_A_DM5
M_A_DM7

M_A_DM7

*0.1U/10V/X5R_2

CN2A

144

144

A0A0

133

133

A1A1

132

132

A2A2

131

131

A3A3

128

128

A4A4

126

126

A5A5

127

127

A6A6

122

122

A7A7

125

125

A8A8

121

121

A9A9

146

146

A10/APA10/AP

120

120

A11A11

119

119

A12A12

158

158

A13A13

151

151

A14/WE#A14/WE#

156

156

A15/CAS#A15/CAS#

152

152

A16/RAS#A16/RAS#

162

162

S2#/C0S2#/C0

165

165

S3#/C1S3#/C1

114

114

ACT#ACT#

143

143

PARITYPARITY

116

116

ALERT#ALERT#

134

134

EVENT#EVENT#

108

108

RESET#RESET#

150

150

BA0BA0

145

145

BA1BA1

115

115

BG0BG0

113

113

BG1BG1

149

149

S0#S0#

157

157

S1#S1#

109

109

CKE0CKE0

110

110

CKE1CKE1

137

137

CK0CK0

139

139

CK0#CK0#

138

138

CK1CK1

140

140

CK1#CK1#

155

155

ODT0ODT0

161

161

ODT1ODT1

253

253

SCLSCL

254

254

SDASDA

256

256

SA0SA0

260

260

SA1SA1

166

166

SA2SA2

92

92

CB0CB0

91

91

CB1CB1

101

101

CB2CB2

105

105

CB3CB3

88

88

CB4CB4

87

87

CB5CB5

100

100

CB6CB6

104

104

CB7CB7

12

12

DM0DM0

33

33

DM1DM1

54

54

DM2DM2

75

75

DM3DM3

178

178

DM4DM4

199

199

DM5DM5

220

220

DM6DM6

241

241

DM7DM7

96

96

DM8DM8

CONN SMD HS DDR4 260P 2R FR(P0.5,H5.2)

CONN SMD HS DDR4 260P 2R FR(P0.5,H5.2)

DQ0DQ0
DQ1DQ1
DQ2DQ2
DQ3DQ3
DQ4DQ4
DQ5DQ5
DQ6DQ6
DQ7DQ7
DQ8DQ8

DQ9DQ9
DQ10DQ10
DQ11DQ11
DQ12DQ12
DQ13DQ13
DQ14DQ14
DQ15DQ15
DQ16DQ16
DQ17DQ17
DQ18DQ18
DQ19DQ19
DQ20DQ20
DQ21DQ21
DQ22DQ22
DQ23DQ23
DQ24DQ24
DQ25DQ25
DQ26DQ26
DQ27DQ27
DQ28DQ28
DQ29DQ29
DQ30DQ30
DQ31DQ31
DQ32DQ32
DQ33DQ33
DQ34DQ34
DQ35DQ35
DQ36DQ36
DQ37DQ37
DQ38DQ38
DQ39DQ39
DQ40DQ40
DQ41DQ41
DQ42DQ42
DQ43DQ43
DQ44DQ44
DQ45DQ45
DQ46DQ46
DQ47DQ47
DQ48DQ48
DQ49DQ49

(260P)(260P)

DDR4 SODIMM 260 PIN

DQ50DQ50
DQ51DQ51
DQ52DQ52
DQ53DQ53
DQ54DQ54
DQ55DQ55
DQ56DQ56
DQ57DQ57
DQ58DQ58
DQ59DQ59
DQ60DQ60
DQ61DQ61
DQ62DQ62
DQ63DQ63

DQS0DQS0
DQS1DQS1
DQS2DQS2
DQS3DQS3
DQS4DQS4
DQS5DQS5
DQS6DQS6
DQS7DQS7
DQS8DQS8

DQS#0DQS#0
DQS#1DQS#1
DQS#2DQS#2
DQS#3DQS#3
DQS#4DQS#4
DQS#5DQS#5
DQS#6DQS#6
DQS#7DQS#7
DQS#8DQS#8

8

8
7

7
20

20
21

21
4

4
3

3
16

16
17

17
28

28
29

29
41

41
42

42
24

24
25

25
38

38
37

37
50

50
49

49
62

62
63

63
46

46
45

45
58

58
59

59
70

70
71

71
83

83
84

84
66

66
67

67
79

79
80

80
174

174
173

173
187

187
186

186
170

170
169

169
183

183
182

182
195

195
194

194
207

207
208

208
191

191
190

190
203

203
204

204
216

216
215

215
228

228
229

229
211

211
212

212
224

224
225

225
237

237
236

236
249

249
250

250
232

232
233

233
245

245
246

246

13

13
34

34
55

55
76

76
179

179
200

200
221

221
242

242
97

97

11

11
32

32
53

53
74

74
177

177
198

198
219

219
240

240
95

95

M_A_DQ24

M_A_DQ24
M_A_DQ28M_A_DQ28

M_A_DQ37M_A_DQ37
M_A_DQ32

M_A_DQ32
M_A_DQ35

M_A_DQ35
M_A_DQ34M_A_DQ34
M_A_DQ36

M_A_DQ36
M_A_DQ33

M_A_DQ33
M_A_DQ38

M_A_DQ38
M_A_DQ39

M_A_DQ39
M_A_DQ49

M_A_DQ49

M_A_DQ61

M_A_DQ61
M_A_DQ56

M_A_DQ56
M_A_DQ59

M_A_DQ59

M_A_DQ62

M_A_DQ62

M_A_DQ60M_A_DQ60

M_A_DQ57M_A_DQ57

M_A_DQ58

M_A_DQ58
M_A_DQ63

M_A_DQ63

4

4

M_A_DQ9

M_A_DQ9
M_A_DQ8M_A_DQ8
M_A_DQ14

M_A_DQ14
M_A_DQ11M_A_DQ11
M_A_DQ13M_A_DQ13
M_A_DQ12

M_A_DQ12
M_A_DQ10

M_A_DQ10
M_A_DQ15

M_A_DQ15

M_A_DQ4M_A_DQ4
M_A_DQ1

M_A_DQ1

M_A_DQ3

M_A_DQ3
M_A_DQ6

M_A_DQ6
M_A_DQ0M_A_DQ0
M_A_DQ5

M_A_DQ5
M_A_DQ7

M_A_DQ7
M_A_DQ2M_A_DQ2

M_A_DQ17

M_A_DQ17

M_A_DQ21

M_A_DQ21
M_A_DQ22

M_A_DQ22
M_A_DQ19

M_A_DQ19
M_A_DQ20

M_A_DQ20
M_A_DQ16

M_A_DQ16
M_A_DQ18

M_A_DQ18
M_A_DQ23

M_A_DQ23
M_A_DQ29
M_A_DQ25

M_A_DQ25
M_A_DQ31M_A_DQ31
M_A_DQ26

M_A_DQ26

M_A_DQ30M_A_DQ30
M_A_DQ27

M_A_DQ27

M_A_DQ54M_A_DQ54
M_A_DQ51M_A_DQ51
M_A_DQ52

M_A_DQ52
M_A_DQ55

M_A_DQ55
M_A_DQ50

M_A_DQ50
M_A_DQ48

M_A_DQ48
M_A_DQ53

M_A_DQ53

M_A_DQ44

M_A_DQ44

M_A_DQ41

M_A_DQ41

M_A_DQ43M_A_DQ43
M_A_DQ46

M_A_DQ46

M_A_DQ45

M_A_DQ45

M_A_DQ40

M_A_DQ40

M_A_DQ42

M_A_DQ42

M_A_DQ47

M_A_DQ47

M_A_DQSP1M_A_DQSP1
M_A_DQSP0

M_A_DQSP0
M_A_DQSP2

M_A_DQSP2
M_A_DQSP3

M_A_DQSP3
M_A_DQSP4

M_A_DQSP4
M_A_DQSP6

M_A_DQSP6
M_A_DQSP5M_A_DQSP5
M_A_DQSP7

M_A_DQSP7

M_A_DQSN1M_A_DQSN1M_A_DM1M_A_DM1
M_A_DQSN0

M_A_DQSN0
M_A_DQSN2

M_A_DQSN2
M_A_DQSN3

M_A_DQSN3
M_A_DQSN4

M_A_DQSN4
M_A_DQSN6

M_A_DQSN6
M_A_DQSN5

M_A_DQSN5
M_A_DQSN7

M_A_DQSN7

M_A_DQ[63:0] (4)

M_A_DQSP[7:0] (4)(4)

(4)

1

0

0

22

33

44

66

55

77

2.48A2.48A

+1.2V_SUS

+1.2V_SUS

3

3

CN2B

111

111

VDD1VDD1

112

112

VDD2VDD2

117

117

VDD3VDD3

118

118

VDD4VDD4

123

123

VDD5VDD5

124

124

VDD6VDD6

129

129

VDD7VDD7

130

130

VDD8VDD8

135

135

VDD9VDD9

136

136

VDD10VDD10

141

141

VDD11VDD11

142

142

VDD12VDD12

147

147

VDD13VDD13

148

148

VDD14VDD14

153

153

VDD15VDD15

154

154

VDD16VDD16

159

159

VDD17VDD17

160

160

VDD18VDD18

163

163

VDD19VDD19

1

1

VSS1VSS1

5

5

VSS2VSS2

9

9

VSS3VSS3

15

15

VSS4VSS4

19

19

VSS5VSS5

23

23

VSS6VSS6

27

27

VSS7VSS7

31

31

VSS8VSS8

35

35

VSS9VSS9

39

39

VSS10VSS10

43

43

VSS11VSS11

47

47

VSS12VSS12

51

51

VSS13VSS13

57

57

VSS14VSS14

61

61

VSS15VSS15

65

65

VSS16VSS16

69

69

VSS17VSS17

73

73

VSS18VSS18

77

77

VSS19VSS19

81

81

VSS20VSS20

85

85

VSS21VSS21

89

89

VSS22VSS22

93

93

VSS23VSS23

99

99

VSS24VSS24

103

103

VSS25VSS25

107

107

VSS26VSS26

167

167

VSS27VSS27

171

171

VSS28VSS28

175

175

VSS29VSS29

181

181

VSS30VSS30

185

185

VSS31VSS31

189

189

VSS32VSS32

193

193

VSS33VSS33

197

197

VSS34VSS34

201

201

VSS35VSS35

205

205

VSS36VSS36

209

209

VSS37VSS37

213

213

VSS38VSS38

217

217

VSS39VSS39

223

223

VSS40VSS40

227

227

VSS41VSS41

231

231

VSS42VSS42

235

235

VSS43VSS43

239

239

VSS44VSS44

243

243

VSS45VSS45

247

247

VSS46VSS46

251

251

VSS47VSS47

CONN SMD HS DDR4 260P 2R FR(P0.5,H5.2)

CONN SMD HS DDR4 260P 2R FR(P0.5,H5.2)

VDDSPDVDDSPD

VPP1VPP1
VPP2VPP2

VTTVTT

VREF_CAVREF_CA

VSS48VSS48
VSS49VSS49
VSS50VSS50
VSS51VSS51
VSS52VSS52
VSS53VSS53
VSS54VSS54
VSS55VSS55
VSS56VSS56
VSS57VSS57
VSS58VSS58
VSS59VSS59
VSS60VSS60
VSS61VSS61
VSS62VSS62
VSS63VSS63
VSS64VSS64
VSS65VSS65
VSS66VSS66
VSS67VSS67
VSS68VSS68

(260P)(260P)

VSS69VSS69

DDR4 SODIMM 260 PIN

VSS70VSS70
VSS71VSS71
VSS72VSS72
VSS73VSS73
VSS74VSS74
VSS75VSS75
VSS76VSS76
VSS77VSS77
VSS78VSS78
VSS79VSS79
VSS80VSS80
VSS81VSS81
VSS82VSS82
VSS83VSS83
VSS84VSS84
VSS85VSS85
VSS86VSS86
VSS87VSS87
VSS88VSS88
VSS89VSS89
VSS90VSS90
VSS91VSS91
VSS92VSS92
VSS93VSS93
VSS94VSS94

263263
264264

GND1GND1
GND2GND2

+3V+3V

0.1U/10V/X5R_2

C101 0.1U/10V/X5R_2

C102 2.2U/6.3V_4

255

255

257

257
259

259

258

258

164

164

2

2
6

6
10

10
14

14
18

18
22

22
26

26
30

30
36

36
40

40
44

44
48

48
52

52
56

56
60

60
64

64
68

68
72

72
78

78
82

82
86

86
90

90
94

94
98

98
102

102
106

106
168

168
172

172
176

176
180

180
184

184
188

188
192

192
196

196
202

202
206

206
210

210
214

214
218

218
222

222
226

226
230

230
234

234
238

238
244

244
248

248
252

252
263

263
264

264

261

261
262

262

+3V

+3V

+2.5V_SUS+2.5V_SUS

+0.6V_DDR_VTT

+0.6V_DDR_VTT

+SMDDR_VREF_DIMM0

+SMDDR_VREF_DIMM0

C113 0.1U/10V/X5R_2

0.1U/10V/X5R_2

C116 0.1U/10V/X5R_20.1U/10V/X5R_2

2

2

+SMDDR_VREF_DIMM0

+SMDDR_VREF_DIMM0

+2.5V_SUS

+2.5V_SUS

+0.6V_DDR_VTT

+0.6V_DDR_VTT

+SMDDR_VREF+SMDDR_VREF +SMDDR_VREF_DIMM0+SMDDR_VREF_DIMM0

2.2U/6.3V_4

C104 6.8p/50V/NPO_4

6.8p/50V/NPO_4

C109 1U/6.3V/X5R_4

1U/6.3V/X5R_4

C111 1U/6.3V/X5R_4

1U/6.3V/X5R_4

C114 10u/6.3V_410u/6.3V_4

10u/6.3V_4

C117 10u/6.3V_4

C119 6.8p/50V/NPO_4

6.8p/50V/NPO_4

1U/6.3V/X5R_4

C126 1U/6.3V/X5R_4

C128 1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

C130 1U/6.3V/X5R_4

C132 1U/6.3V/X5R_41U/6.3V/X5R_4

10u/6.3V_4

C134 10u/6.3V_4

C135 10u/6.3V_4

10u/6.3V_4

C136 6.8p/50V/NPO_4

6.8p/50V/NPO_4

+1.2V_SUS

+1.2V_SUS

R139 *0_5%_4

*0_5%_4

Size Document Number Rev

Size Document Number Rev

Size Document Number R

Date: Sheet

Thursday, November 19, 2020

Date: SheetSheet of

Thursday, November 19, 2020

Date: SheetSheet of

Thursday, November 19, 2020

+1.2V_SUS

+1.2V_SUS

C103 1U/6.3V/X5R_4

C105 1U/6.3V/X5R_4

C106 1U/6.3V/X5R_4

C107 1U/6.3V/X5R_4

C108 1U/6.3V/X5R_4

C110 1U/6.3V/X5R_4

C112 1U/6.3V/X5R_41U/6.3V/X5R_4

C115 1U/6.3V/X5R_4

C118 10u/6.3V_4
C120 10u/6.3V_4

C121 10u/6.3V_4
C122 10u/6.3V_4

C123 10u/6.3V_4
C125 10u/6.3V_410u/6.3V_4

C127 10u/6.3V_4
C129 10u/6.3V_410u/6.3V_4

C131 68p/50V/COG_468p/50V/COG_4

C133 6.8p/50V_4

R138
1K_1%_2

1K_1%_2

+SMDDR_VREF_DIMM0

+SMDDR_VREF_DIMM0

R140
1K_1%_2

1K_1%_2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :PROJECT :

PROJECT :PROJECT :

PROJECT :PROJECT :

DDR4-CHA

DDR4-CHA

DDR4-CHA

1

1

Sheet of

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

10u/6.3V_4
10u/6.3V_4

10u/6.3V_4
10u/6.3V_4

10u/6.3V_4

10u/6.3V_4

6.8p/50V_4

NJF

NJF

NJF

18 63

18 63

18 6363

1818

ev

2A

2A

2A

55

Vinafix.com

M_B_A[13:0](4)

(4)

D DD

D

+1.2V_SUS

+1.2V_SUS

C

C CC

B

B BB

R141 1K_5%_2

1K_5%_2

(4)

(6,18)

M_B_WE#(4)

(4)

M_B_CAS#(4)

(4)

M_B_RAS#(4)

(4)

M_B_EVENT#M_B_EVENT#

(4)

M_B_ACT#(4)
M_B_PARITY(4)

(4)
(4)

M_B_ALERT#(4)
M_B_EVENT#(4)

(4)

M_B_RST#(4)

(4)

(4)

M_B_BS#0(4)

(4)

M_B_BS#1(4)
M_B_BG#0(4)

(4)

M_B_BG#1(4)(4)

M_B_CS#0(4)(4)

(4)

M_B_CS#1(4)

(4)

M_B_CKE0(4)
M_B_CKE1(4)

(4)

M_B_CLKP0(4)

(4)
(4)

M_B_CLKN0(4)
M_B_CLKP1(4)

(4)

M_B_CLKN1(4)

(4)

M_B_ODT0(4)

(4)
(4)

M_B_ODT1(4)

SMB_RUN_CLK_R(6,18)(6,18)
SMB_RUN_DAT_R(6,18)

M_B_DM[7:0](4)

M_B_A0

M_B_A0
M_B_A1

M_B_A1
M_B_A2M_B_A2
M_B_A3

M_B_A3
M_B_A4

M_B_A4
M_B_A5

M_B_A5
M_B_A6

M_B_A6
M_B_A7

M_B_A7
M_B_A8

M_B_A8
M_B_A9

M_B_A9
M_B_A10

M_B_A10
M_B_A11

M_B_A11
M_B_A12

M_B_A12
M_B_A13M_B_A13

M_B_EVENT#

M_B_EVENT#

*0.1U/10V/X5R_2

C146 *0.1U/10V/X5R_2

+3V

+3V

M_B_DM0

M_B_DM0
M_B_DM1

M_B_DM1
M_B_DM2

M_B_DM2
M_B_DM3

M_B_DM3
M_B_DM4

M_B_DM4
M_B_DM5

M_B_DM5
M_B_DM6

M_B_DM6
M_B_DM7

M_B_DM7

CN3A

144

144

A0A0

133

133

A1A1

132

132

A2A2

131

131

A3A3

128

128

A4A4

126

126

A5A5

127

127

A6A6

122

122

A7A7

125

125

A8A8

121

121

A9A9

146

146

A10/APA10/AP

120

120

A11A11

119

119

A12A12

158

158

A13A13

151

151

A14/WE#A14/WE#

156

156

A15/CAS#A15/CAS#

152

152

A16/RAS#A16/RAS#

162

162

S2#/C0S2#/C0

165

165

S3#/C1S3#/C1

114

114

ACT#ACT#

143

143

PARITYPARITY

116

116

ALERT#ALERT#

134

134

EVENT#EVENT#

108

108

RESET#RESET#

150

150

BA0BA0

145

145

BA1BA1

115

115

BG0BG0

113

113

BG1BG1

149

149

S0#S0#

157

157

S1#S1#

109

109

CKE0CKE0

110

110

CKE1CKE1

137

137

CK0CK0

139

139

CK0#CK0#

138

138

CK1CK1

140

140

CK1#CK1#

155

155

ODT0ODT0

161

161

ODT1ODT1

253

253

SCLSCL

254

254

SDASDA

256

256

SA0SA0

260

260

SA1SA1

166

166

SA2SA2

92

92

CB0CB0

91

91

CB1CB1

101

101

CB2CB2

105

105

CB3CB3

88

88

CB4CB4

87

87

CB5CB5

100

100

CB6CB6

104

104

CB7CB7

12

12

DM0DM0

33

33

DM1DM1

54

54

DM2DM2

75

75

DM3DM3

178

178

DM4DM4

199

199

DM5DM5

220

220

DM6DM6

241

241

DM7DM7

96

96

DM8DM8

CONN SMD HS DDR4 260P 2R FR(P0.5,H4)

CONN SMD HS DDR4 260P 2R FR(P0.5,H4)

4

4

M_B_DQ0

M_B_DQ0

8

8

DQ0DQ0
DQ1DQ1
DQ2DQ2
DQ3DQ3
DQ4DQ4
DQ5DQ5
DQ6DQ6
DQ7DQ7
DQ8DQ8

DQ9DQ9
DQ10DQ10
DQ11DQ11
DQ12DQ12
DQ13DQ13
DQ14DQ14
DQ15DQ15
DQ16DQ16
DQ17DQ17
DQ18DQ18
DQ19DQ19
DQ20DQ20
DQ21DQ21
DQ22DQ22
DQ23DQ23
DQ24DQ24
DQ25DQ25
DQ26DQ26
DQ27DQ27
DQ28DQ28
DQ29DQ29
DQ30DQ30
DQ31DQ31
DQ32DQ32
DQ33DQ33
DQ34DQ34
DQ35DQ35
DQ36DQ36
DQ37DQ37
DQ38DQ38
DQ39DQ39
DQ40DQ40
DQ41DQ41
DQ42DQ42
DQ43DQ43
DQ44DQ44
DQ45DQ45
DQ46DQ46
DQ47DQ47
DQ48DQ48
DQ49DQ49

(260P)(260P)

DDR4 SODIMM 260 PIN

DQ50DQ50
DQ51DQ51
DQ52DQ52
DQ53DQ53
DQ54DQ54
DQ55DQ55
DQ56DQ56
DQ57DQ57
DQ58DQ58
DQ59DQ59
DQ60DQ60
DQ61DQ61
DQ62DQ62
DQ63DQ63

DQS0DQS0
DQS1DQS1
DQS2DQS2
DQS3DQS3
DQS4DQS4
DQS5DQS5
DQS6DQS6
DQS7DQS7
DQS8DQS8

DQS#0DQS#0
DQS#1DQS#1
DQS#2DQS#2
DQS#3DQS#3
DQS#4DQS#4
DQS#5DQS#5
DQS#6DQS#6
DQS#7DQS#7
DQS#8DQS#8

7

7
20

20
21

21
4

4
3

3
16

16
17

17
28

28
29

29
41

41
42

42
24

24
25

25
38

38
37

37
50

50
49

49
62

62
63

63
46

46
45

45
58

58
59

59
70

70
71

71
83

83
84

84
66

66
67

67
79

79
80

80
174

174
173

173
187

187
186

186
170

170
169

169
183

183
182

182
195

195
194

194
207

207
208

208
191

191
190

190
203

203
204

204
216

216
215

215
228

228
229

229
211

211
212

212
224

224
225

225
237

237
236

236
249

249
250

250
232

232
233

233
245

245
246

246

13

13
34

34
55

55
76

76
179

179
200

200
221

221
242

242
97

97

11

11
32

32
53

53
74

74
177

177
198

198
219

219
240

240
95

95

M_B_DQ7

M_B_DQ7
M_B_DQ3

M_B_DQ3
M_B_DQ4M_B_DQ4
M_B_DQ5

M_B_DQ5

M_B_DQ2

M_B_DQ2
M_B_DQ6

M_B_DQ6

M_B_DQ14

M_B_DQ14

M_B_DQ11

M_B_DQ11

M_B_DQ19

M_B_DQ19

M_B_DQ17

M_B_DQ17
M_B_DQ16

M_B_DQ16

M_B_DQ20

M_B_DQ20
M_B_DQ23

M_B_DQ23
M_B_DQ18

M_B_DQ18
M_B_DQ24

M_B_DQ24

M_B_DQ26

M_B_DQ25M_B_DQ25
M_B_DQ30

M_B_DQ30
M_B_DQ31

M_B_DQ31
M_B_DQ37

M_B_DQ37
M_B_DQ33

M_B_DQ33
M_B_DQ34

M_B_DQ34
M_B_DQ38M_B_DQ38
M_B_DQ36

M_B_DQ36
M_B_DQ32

M_B_DQ32
M_B_DQ35

M_B_DQ35
M_B_DQ39M_B_DQ39
M_B_DQ46

M_B_DQ46

M_B_DQ44M_B_DQ44
M_B_DQ43

M_B_DQ43
M_B_DQ41

M_B_DQ41
M_B_DQ40

M_B_DQ40
M_B_DQ45

M_B_DQ45
M_B_DQ42

M_B_DQ42

M_B_DQ53

M_B_DQ53
M_B_DQ51M_B_DQ51
M_B_DQ55

M_B_DQ55

M_B_DQ49

M_B_DQ49

M_B_DQ50

M_B_DQ50

M_B_DQ58M_B_DQ58
M_B_DQ59

M_B_DQ59
M_B_DQ62

M_B_DQ62

M_B_DQ60

M_B_DQ60
M_B_DQ63

M_B_DQ63

M_B_DQ1

M_B_DQ1

M_B_DQ12

M_B_DQ12
M_B_DQ9

M_B_DQ9

M_B_DQ10

M_B_DQ10
M_B_DQ13

M_B_DQ13
M_B_DQ8

M_B_DQ8

M_B_DQ15M_B_DQ15

M_B_DQ22

M_B_DQ22

M_B_DQ21

M_B_DQ21

M_B_DQ29

M_B_DQ29

M_B_DQ27

M_B_DQ27
M_B_DQ28

M_B_DQ28

M_B_DQ47

M_B_DQ47

M_B_DQ52

M_B_DQ52

M_B_DQ48M_B_DQ48

M_B_DQ54

M_B_DQ54

M_B_DQ61

M_B_DQ61
M_B_DQ57

M_B_DQ57

M_B_DQ56

M_B_DQ56

M_B_DQSP0

M_B_DQSP0
M_B_DQSP1

M_B_DQSP1
M_B_DQSP2

M_B_DQSP2
M_B_DQSP3

M_B_DQSP3
M_B_DQSP4

M_B_DQSP4
M_B_DQSP5

M_B_DQSP5
M_B_DQSP6

M_B_DQSP6
M_B_DQSP7M_B_DQSP7

M_B_DQSN0

M_B_DQSN0
M_B_DQSN1

M_B_DQSN1
M_B_DQSN2M_B_DQSN2
M_B_DQSN3

M_B_DQSN3
M_B_DQSN4

M_B_DQSN4
M_B_DQSN5

M_B_DQSN5
M_B_DQSN6

M_B_DQSN6
M_B_DQSN7

M_B_DQSN7

M_B_DQ[63:0] (4)

0

1

1

2

3

4

5

6

7

M_B_DQSP[7:0] (4)(4)

M_B_DQSN[7:0] (4)

3

3

(4)

(4)

2.48A2.48A

+1.2V_SUS

+1.2V_SUS

CN3B

111

111

VDD1VDD1

112

112

VDD2VDD2

117

117

VDD3VDD3

118

118

VDD4VDD4

123

123

VDD5VDD5

124

124

VDD6VDD6

129

129

VDD7VDD7

130

130

VDD8VDD8

135

135

VDD9VDD9

136

136

VDD10VDD10

141

141

VDD11VDD11

142

142

VDD12VDD12

147

147

VDD13VDD13

148

148

VDD14VDD14

153

153

VDD15VDD15

154

154

VDD16VDD16

159

159

VDD17VDD17

160

160

VDD18VDD18

163

163

VDD19VDD19

1

1

VSS1VSS1

5

5

VSS2VSS2

9

9

VSS3VSS3

15

15

VSS4VSS4

19

19

VSS5VSS5

23

23

VSS6VSS6

27

27

VSS7VSS7

31

31

VSS8VSS8

35

35

VSS9VSS9

39

39

VSS10VSS10

43

43

VSS11VSS11

47

47

VSS12VSS12

51

51

VSS13VSS13

57

57

VSS14VSS14

61

61

VSS15VSS15

65

65

VSS16VSS16

69

69

VSS17VSS17

73

73

VSS18VSS18

77

77

VSS19VSS19

81

81

VSS20VSS20

85

85

VSS21VSS21

89

89

VSS22VSS22

93

93

VSS23VSS23

99

99

VSS24VSS24

103

103

VSS25VSS25

107

107

VSS26VSS26

167

167

VSS27VSS27

171

171

VSS28VSS28

175

175

VSS29VSS29

181

181

VSS30VSS30

185

185

VSS31VSS31

189

189

VSS32VSS32

193

193

VSS33VSS33

197

197

VSS34VSS34

201

201

VSS35VSS35

205

205

VSS36VSS36

209

209

VSS37VSS37

213

213

VSS38VSS38

217

217

VSS39VSS39

223

223

VSS40VSS40

227

227

VSS41VSS41

231

231

VSS42VSS42

235

235

VSS43VSS43

239

239

VSS44VSS44

243

243

VSS45VSS45

247

247

VSS46VSS46

251

251

VSS47VSS47

CONN SMD HS DDR4 260P 2R FR(P0.5,H4)

CONN SMD HS DDR4 260P 2R FR(P0.5,H4)

VDDSPDVDDSPD

VPP1VPP1
VPP2VPP2

VTTVTT

VREF_CAVREF_CA

VSS48VSS48
VSS49VSS49
VSS50VSS50
VSS51VSS51
VSS52VSS52
VSS53VSS53
VSS54VSS54
VSS55VSS55
VSS56VSS56
VSS57VSS57
VSS58VSS58
VSS59VSS59
VSS60VSS60
VSS61VSS61
VSS62VSS62
VSS63VSS63
VSS64VSS64
VSS65VSS65
VSS66VSS66
VSS67VSS67
VSS68VSS68

(260P)(260P)

DDR4 SODIMM 260 PIN

VSS69VSS69
VSS70VSS70
VSS71VSS71
VSS72VSS72
VSS73VSS73
VSS74VSS74
VSS75VSS75
VSS76VSS76
VSS77VSS77
VSS78VSS78
VSS79VSS79
VSS80VSS80
VSS81VSS81
VSS82VSS82
VSS83VSS83
VSS84VSS84
VSS85VSS85
VSS86VSS86
VSS87VSS87
VSS88VSS88
VSS89VSS89
VSS90VSS90
VSS91VSS91
VSS92VSS92
VSS93VSS93
VSS94VSS94

GND1GND1
GND2GND2

255

255

257

257
259

259

258

258

+SMDDR_VREF_DIMM1

+SMDDR_VREF_DIMM1

164

164

2

2
6

6
10

10
14

14
18

18
22

22
26

26
30

30
36

36
40

40
44

44
48

48
52

52
56

56
60

60
64

64
68

68
72

72
78

78
82

82
86

86
90

90
94

94
98

98
102

102
106

106
168

168
172

172
176

176
180

180
184

184
188

188
192

192
196

196
202

202
206

206
210

210
214

214
218

218
222

222
226

226
230

230
234

234
238

238
244

244
248

248
252

252
263

263

263263

264

264

264264

261

261
262

262

2

2

+3V+3V

+2.5V_SUS

+2.5V_SUS

+0.6V_DDR_VTT

+0.6V_DDR_VTT

0.1U/10V/X5R_2

C139 0.1U/10V/X5R_2

0.1U/10V/X5R_2

C141 0.1U/10V/X5R_2

+2.5V_SUS+2.5V_SUS

C154 1U/6.3V/X5R_4

C157 1U/6.3V/X5R_4

C159 10u/6.3V_4

C161 10u/6.3V_410u/6.3V_4

C162 6.8p/50V/NPO_4

+3V

+3V

C163 0.1U/10V/X5R_2

C164 2.2U/6.3V_42.2U/6.3V_4

C165 6.8p/50V/NPO_4

Place these Caps near So-Dimm1.Place these Caps near So-Dimm1.

+SMDDR_VREF_DIMM1

+SMDDR_VREF_DIMM1

1U/6.3V/X5R_4

1U/6.3V/X5R_4

10u/6.3V_4

6.8p/50V/NPO_4

0.1U/10V/X5R_2

6.8p/50V/NPO_4

+1.2V_SUS

+1.2V_SUS

C137 1U/6.3V/X5R_4

C138 1U/6.3V/X5R_41U/6.3V/X5R_4

C140 1U/6.3V/X5R_4

C142 1U/6.3V/X5R_4

C143 1U/6.3V/X5R_4

C144 1U/6.3V/X5R_4

C145 1U/6.3V/X5R_41U/6.3V/X5R_4

C147 1U/6.3V/X5R_41U/6.3V/X5R_4

C148 10u/6.3V_410u/6.3V_4
C149 10u/6.3V_4

C150 10u/6.3V_4
C151 10u/6.3V_4

C152 10u/6.3V_410u/6.3V_4
C153 10u/6.3V_4

C155 10u/6.3V_4
C156 10u/6.3V_4

C158 68p/50V/COG_4

C160 6.8p/50V_4

+0.6V_DDR_VTT

+0.6V_DDR_VTT

C166 1U/6.3V/X5R_4

C167 1U/6.3V/X5R_4

C168 1U/6.3V/X5R_4

C169 1U/6.3V/X5R_4

C170 10u/6.3V_4

C171 10u/6.3V_4

C172 6.8p/50V/NPO_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

10u/6.3V_4

10u/6.3V_4
10u/6.3V_4

10u/6.3V_4

10u/6.3V_4
10u/6.3V_4

68p/50V/COG_4

6.8p/50V_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

1U/6.3V/X5R_4

10u/6.3V_4

10u/6.3V_4

6.8p/50V/NPO_4

1

1

1919

VREF DQ1 M1 SolutionVREF DQ1 M1 Solution

+1.2V_SUS

+1.2V_SUS

+SMDDR_VREF +SMDDR_VREF_DIMM1+SMDDR_VREF_DIMM1

+SMDDR_VREF

R143 *0_5%_4

*0_5%_4

R142
1K_1%_2

1K_1%_2

+SMDDR_VREF_DIMM1

+SMDDR_VREF_DIMM1

R144
1K_1%_2

1K_1%_2

A

A AA

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

5

5

PROJECT :PROJECT :

PROJECT :PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: SheetSheet of

Date: SheetSheet of

Thursday, November 19, 2020

Thursday, November 19, 2020

4

4

3

3

2

2

Thursday, November 19, 2020

PROJECT :PROJECT :

DDR4 -CHB

DDR4 -CHB

DDR4 -CHB

1

1

NJF

NJF

NJF

Sheet of

19 63

19 63

19 6363

2A

2A

2A