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Date: 2009.11.28
07:21:19 +07'00'
B
C
D
E
F9J SCHEMATIC Revision 2.0
1 1
PAGE
SYSTEM PAGE REF.
YONAH CPU (1)
4
YONAH CPU (2)
5
6
FAN CTRL&Thernal protection
7
CLK GEN-ICS954310
8
Calistoga--CPU
9
Calistoga--PCIE
10
2 2
3 3
4 4
5 5
Calistoga--DDR2
11
Calistoga--POWER
12
Calistoga--GND
13
Calistoga--Strap
14
DDR2 SO-DIMM_0
15
DDR2 SO-DIMM_1
16
DDR2 ADDRESS TERMINATION
LVDS & INVERTER CONN
17
CRT & TV OUT
18
ICH7M--CPU,IDE,AUDIO
19
ICH7M--GPIO
20
ICH7M--PCI,PCI-E,USB
21
22
ICH7M--VCC,GND
23
HDD & CD-ROM CONN
USB PORT
24
B/T,F/P& TPM
25
26
B TO B CONN(M)
27
EMPTY
EMPTY
28
29
PCI-E--LAN_RTL8101E
EMPTY
30
31
EMPTY
EMPTY
32
33
NEWCARD
EC-IT8510E
34
ISA ROM & Touch Pad & KB& FP
35
CARD READER_RST5117
36
37
DISCHARGE
Instant Key & Touch Pad
38
LEDs
39
G72M--PCIE (1)
40
41
G72M--FB (2)
42
G72M--VRAM (3)
43
G72M--RGB/LCD/ROM/GPIO (4)
44
G72M--MIOB/CRYSTAL/TMDS (5)
45
G72M--VRAM_TERMINATOR (6)
SREW HOLE
46
Content
PAGE
47
DC & BAT IN
48
History(1)
49
History(2)
POWER PAGE REF.
50_POWER_VCORE
51_POWER_SYSTEM
52_POWER_I/O_1.8V & 1.05VS
53_POWER_I/O_DDR & VTT
54_POWER_I/O_VTT & +2.5VS
55_POWER_VGA_CORE
56_POWER_+1.2VSP
57_POWER_CHARGER
58_POWER_PIC(Empty)
59_POWER_DETECT
60_POWER_PROTECT
61_POWER_LOAD SWITCH
62_POWER_FLOWCHART
63_POWER_SIGNAL
A
B
Content
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
PAGE REF.
PAGE REF.
E
PAGE REF.
163Thursday, November 23, 2006
163Thursday, November 23, 2006
163Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C
D
F9J
F9J
F9J
Engineer:
A
B
C
D
E
F9J BLOCK DIAGRAM
1 1
BATTERY
TYPE
3S1P
3S2P
3S3P
SPEAKER
+INT. MIC
Internal IO CON with Cable
TP CON
F/P CON
MDC CON
BT CON
INVERTER
CON
LVDS
CON
Yonah
2 2
LVDS & INV
CON
CRT & TV
GDDR2 16Mx16 x4
DDR2 16M*16-2.5 1.8V
INFINEON
G72M-V
G3-64(A3)
PCI-E
X8
479
AGTL
1.468V,167MHZ
HOST BUS
945PM
....
DDR2 SDRAM 533/667MHz
CON
3 3
USB
USB2.0
PATA BUS
SATA BUS
B/T
ODD
Slave
Camera
SATA HDD
DMI
X2
ICH7-M
652
BGA
PCI EXPRESS X1
USB2.0
ACZ
CPU
CAP
POWER
SEQENCE
DDR2 533/667
SODIMM X2
+1.8V
+0.9VS
LAN 10/100
RTL8101E
....
DDR
CAP/RES
SM_BUSRESET
DCIN
RTC
FAN
CON.
THERMAL
SENSOR
(MAX6657)
NEWCARD
AC & BAT CON
FAN CTRL
4 4
F/P
RTS5117
4 IN 1 CON
5 5
A
TPM
Connector
ISA
ROM
LPC, 33MHz
EC(IT8510E)
INTERNAL
KEYBOARD
MDC
CON
USB x2
Daughter Board
RJ11,RJ45
CON
CLOCK
GEN.
ICS954310
D
MINI CARD
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
F9J
F9J
F9J
Engineer:
E
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
263Thursday, November 23, 2006
263Thursday, November 23, 2006
263Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
Azalia
ALC660
AUDIO AMP
G1420
HP
MIC AMP
MAX4490AXK
B
MIC_IN
C
A
B
C
D
E
EC GPIO SETTING
Pin
32
1 1
2 2
3 3
4 4
5 5
33
36
37
38
39
40
43
153
154
164
5
6
165
47
169
170
171
172 ACIN_OC#
175
176
1
26
29
30
31
41
42
62
63
87
88
89
90
2
44
24
25
110
111
114
115
116
118
119
113
112
104
103
3
4
27
28
Pin Name
PWM0/GPA0
PWM1/GPA1
PWM2/GPA2
PWM3/GPA3
PWM4/GPA4
PWM5/GPA5
PWM6/GPA6
PWM7/GPA7
RXD/GPB0
TXD/GPB1
GPB2
SMCLK0/GPB3
SMDAT0GPB4
GA20/GPB5
KBRST#/GPB6
GPB7
CLKOUT/GPC0
SMCLK1/GPC1
SMDAT1/GPC2
GPC3
TMRI0/WUI2/GPC4
GPC5
TMRI1/WUI3/GPC6
CK32KOUT/GPC7
RI1#/WUI0/GPD0
RI2#/WUI1/GPD1
LPCRST#/WUI4//GPD2
ECSCI#/GPD3
GPD4
GINT/GPD5
TACH0/GPD6
TACH1/GPD7
ADC4/GPE0
ADC5/GPE1
ADC6/GPE2
ADC7/GPE3
PWRSW/GPE4
WUI5/GPE5
LPCPD#/WUI6/GPE6
CLKRUN#/WUI7/GPE7
PS2CLK0/GPF0
PS2DAT0/GPF1
PS2CLK1/GPF2
PS2DAT1/GPF3
PS2CLK2/GPF4 I/0
PS2DAT2/GPF5117
PS2CLK3/GPF6
PS2DAT3/GPF7
FA16/GPG0
FA17/GPG1
FA18/GPG2
FA19/GPG3
FA20/GPG4
FA21/GPG5
LPC80HL/GPG6
LPC80LL/GPG7
A
Signal Name
N/A
FAN_PWM
N/A
N/A
CHG_LED_UP#
PWR_LED_UP#
BATSEL_3S#
LCD_BACKOFF#
NUM_LED
CAP_LED
N/A162
SMB0_CLK
SMB0_DAT
A20GATE
RCIN#
N/A
N/A
SMB1_CLK
SMB1_DAT
N/A
OP_SD#
BAT_IN_OC#
EC_IDE_RST#
SUSB#
SUSC#
PCI_RST#
EXT_SCI#
N/A
N/A
FAN0_TACH
N/A
WLAN_SW#
BT_SW#
N/A
N/A
PWR_SW#
N/A
LID_EC#
N/A
/
/
/
/
TP_CLK
TP_DAT
/
/
FA16
FA17
FA18
/
THRM_CPU#
N/A
PMTHERM#
AC_APR_UC#
Type
O
O
O
O
O
O
O
I/0163
I/0
O
O
I
O
I/0
I/0
I
O
I
O
I
I
I
O
I
I
I
I
I
I/0
I
I
O
I
GPH0
GPH1
GPH2
GPH3
GPH4
GPH5
GPH6
GPH7
GPI0
GPI1
GPI2
GPI3
GPI4
GPI6
ADC1
ADC2
ADC3
ADC8
ADC9
DAC0
DAC1
DAC3
Pin Name
Signal Name
VSUS_ON O
VSUS_GD#
PM_PWRBTN#
SUSC_ON
SUSB_ON
CPU_VRON
PM_RSMRST#
ICH7_PWROK
WATCH_DOG#149
N/A
CHG_EN#
PRECHG
BAT_LL#
BAT_LEARN
BAT_AD81 ADC0
AC_AD83
N/A
KID0
KID1
N/A
N/A
INVTER_DADAC2
BATSEL_2P#
Pin
48
54
55 CPUPWR_GD#
69
70
76
105
148
152
155
156
16875GPI5
174
82 ADP_ERR#
84
93
94
99
100
101
102
ICH7M_PCI EXPRESS
PCI-E Device PAIR
1RTL8101E
2GOLAN
NEWCARD 3
SM_BUS ADDRESS :
SM-Bus Device
Clock Generator
SO-DIMM 0
SO-DIMM 1
Thermal Sensor( MAX6657)--CPU
Thermal Sensor( G781-1)--VGA 1001101x ( 9A)
B
SM-Bus Address
1101001x ( D2 )
1010000x ( A0 )
1010001x ( A4 )
1001100x ( 98 )
Type
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
O
O
C
ICH7M_GPIO
Pin
GPIO 00
GPIO 01
GPIO [5:2]
GPIO 06
GPIO 07
GPIO 08
GPIO 09
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17
GPIO 18
GPIO 19 1
GPIO 20
GPIO 21
GPIO 22
GPIO 23 N/A
GPIO 24
GPIO 26
GPIO 27
GPIO 28
GPIO 29
GPIO 30
GPIO 31ii
GPIO 32
GPIO 33
GPIO 34
GPIO 35
GPIO 36
GPIO 37
GPIO 38
GPIO 39
GPIO [40:47] NA
O
O
O
O
O
OGPIO 25
O
O
O
O
O
O
O
i
i
i
i
i
i
i
i
i
i
i
i
0
1
1
i
1
i
1
1
i
1
0
1
0
0
0
i
0
i
0
0
1
1
0
0
i
0
i
0
i
0
Use As
GPI
GPI
GPI
GPO
GPI
GPI
GPI
GPI
Native
GPI
GPI
GPI
GPO
GPO
GPO
GPO
GPI
GPO
GPO
Native
Native
GPO
GPO
GPO
GPO
GPO
Native
Native
Native
GPO
GPO
GPO
GPO
GPO
GPI
GPI
GPI
NA
GPIO 48
GPIO 49 Native
D
Signal Name
PM_BMBUSY#
PCI_REQ#5
PCI_INT[E:H]#
BT_LED_EN
RF_ON_SW#
EXTSMI#
N/A
N/A
SMB_ALERT#
KBC_SCI#
N/A
N/A
802_LED_EN
PM_DPRSLPVR
PCI_GNT#5
STP_PCI#
N/A
STP_CPU#
N/A
PCI_REQ#4
MSK_PCIRST
N/A
BT_ON#
WLAN_ON#
N/A
USB_OC#5
USB_OC#6
USB_OC#7
PM_CLKRUN#
N/A
N/A
N/A
N/A
PCB_ID0
PCB_ID1
PCB_ID2i0
PCI_GNT#4
H_PWRGD
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
REQ/GNT#IDSEL# InterruptsPCI Device
Power
+3VS
+3VS
+3VS
+3VSi
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VSUS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
NA
+3VSNative
+VCORE
F9J
F9J
F9J
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
E
Schematic data
Schematic data
Schematic data
363Thursday, November 23, 2006
363Thursday, November 23, 2006
363Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
D D
U401A
H_A#[16:3]8
H_ADSTB#08
H_REQ#[4:0]8
C C
B B
H_A#[31:17]8
H_ADSTB#18
H_A20M#19
H_FERR#19
H_IGNNE#19
H_STPCLK#19
H_INTR19
H_NMI19
H_SMI#19
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
U401A
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[1]
RSVD[2]
RSVD[3]
RSVD[4]
RSVD[5]
RSVD[6]
RSVD[7]
RSVD[8]
RSVD[9]
RSVD[10]
RSVD[11]
SOCKET479P
SOCKET479P
4
ADS#
BNR#
BPRI#
ADDR GROUP 0
ADDR GROUP 0
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
ADDR GROUP 1
ADDR GROUP 1
BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#
PRDY#
PREQ#
TCK
TDI
TDO
TMS
TRST#
DBR#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
PROCHOT#
THERMDA
THERMDC
THERMTRIP#
THERMHCLKRESERVED
THERMHCLKRESERVED
BCLK[0]
BCLK[1]
RSVD[12]
RSVD[A2]
RSVD[13]
RSVD[14]
RSVD[15]
RSVD[16]
RSVD[17]
RSVD[18]
RSVD[19]
RSVD[20]
3
T401T401
T411T411
H1
E2
G5
H5
F21
E1
F1
H_IERR#H_A#13
D20
B3
H4
B1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
D21
A24
A25
C7
A22
A21
T22
A2
D2
F6
D3
C1
AF1
D22
C23
C24
R401 56R401 56
H_RS#0
H_RS#1
H_RS#2
R402 56@R402 56@
R403 56R403 56
R404 56R404 56
R405 56@R405 56@
R406 56R406 56 R415
R407 56R407 56
PWRLMT#
R408 56R408 56
T408T408
T410T410
H_ADS# 8
H_BNR# 8
H_BPRI# 8
H_DEFER# 8
H_DRDY# 8
H_DBSY# 8
H_BR0# 8
+VCCP_AGTL+
H_INIT# 19
H_LOCK# 8
H_CPURST# 8
H_RS#0 8
H_RS#1 8
H_RS#2 8
H_TRDY# 8
H_HIT# 8
H_HITM# 8
T402T402
T403T403
T404T404
T405T405
T406T406
T407T407
PWRLMT# 34,35,57
H_THERMDA 6
H_THERMDC 6
+VCCP_AGTL+
H_THRMTRIP# 6
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
+VCCP_AGTL+
GND
+VCCP_AGTL+
R409
R409
1KOhm
1KOhm
1 2
R415
2K
2K
1%
1%
GND
133
166
H_DSTBN#08
H_DSTBP#08
H_DINV#08
GTLREF0
<500 mil (55 Ohm)
T/B trace 4.5 ,
Space 25
H_DSTBN#18
H_DSTBP#18
H_DINV#18
CPU_BSEL07
CPU_BSEL27
BSEL2BCLK
FSB
533
667
L
R416
R416
GND
BSEL1
LL
H
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
GTLREF0
1KOhm
1KOhm
@
@
R414 51R414 51
BSEL0
H
H
2
U401B
U401B
E22
D[0]#
F24
D[1]#
E26
D[2]#
H22
D[3]#
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
AD26
12
C26
D25
B22
B23
C21
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
SOCKET479P
SOCKET479P
DATA GRP 0
DATA GRP 0
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
DSTBN[2]#
DSTBP[2]#
DATA GRP 1
DATA GRP 1
DSTBN[3]#
DSTBP[3]#
COMP[0]
MISC
MISC
COMP[1]
COMP[2]
COMP[3]
DPRSTP#
PWRGOOD
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DINV[3]#
DPSLP#
DPWR#
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
H_D#[63:0]
H_COMP0
H_COMP1
H_COMP2
H_COMP3
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
POWER
H_D#[63:0] 8
R410 27.4 1%R410 27.4 1%
R411 54.9 1%R411 54.9 1%
R412 27.4 1%R412 27.4 1%
R413 54.9 1%R413 54.9 1%
1
H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8
H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8
H_DPRSTP# 19,50
H_DPSLP# 19
H_DPWR# 8
H_PWRGD 19
H_CPUSLP# 8,19CPU_BSEL17
PM_PSI# 50
GND
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
YONAH CPU (1)
YONAH CPU (1)
F9J
F9J
F9J
1
YONAH CPU (1)
of
of
of
463
463
463
Rev
Rev
Rev
2.0
2.0
2.0
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Thursday, November 23, 2006
Thursday, November 23, 2006
Thursday, November 23, 2006
5
4
3
2
Engineer:
5
D D
C C
B B
A A
+VCORE
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AB9
U401C
U401C
VCC[1]
VCC[2]
VCC[3]
VCC[4]
VCC[5]
VCC[6]
VCC[7]
VCC[8]
VCC[9]
VCC[10]
VCC[11]
VCC[12]
VCC[13]
VCC[14]
VCC[15]
VCC[16]
VCC[17]
VCC[18]
VCC[19]
VCC[20]
VCC[21]
VCC[22]
VCC[23]
VCC[24]
VCC[25]
VCC[26]
VCC[27]
VCC[28]
VCC[29]
VCC[30]
VCC[31]
VCC[32]
VCC[33]
VCC[34]
VCC[35]
VCC[36]
VCC[37]
VCC[38]
VCC[39]
VCC[40]
VCC[41]
VCC[42]
VCC[43]
VCC[44]
VCC[45]
VCC[46]
VCC[47]
VCC[48]
VCC[49]
VCC[50]
VCC[51]
VCC[52]
VCC[53]
VCC[54]
VCC[55]
VCC[56]
VCC[57]
VCC[58]
VCC[59]
VCC[60]
VCC[61]
VCC[62]
VCC[63]
VCC[64]
VCC[65]
VCC[66]
VCC[67]
SOCKET479P
SOCKET479P
5
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]
VCC[100]
VCCP[1]
VCCP[2]
VCCP[3]
VCCP[4]
VCCP[5]
VCCP[6]
VCCP[7]
VCCP[8]
VCCP[9]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
+VCORE
VR_VID0
VR_VID1
VR_VID2
VR_VID3
VR_VID4
VR_VID5
VR_VID6
+VCCP_AGTL+
+1.5VS
12
R502
R502
100Ohm
100Ohm
1% r0402
1% r0402
GND
+1.5VS
12
C501
C501
0.01UF/16V
0.01UF/16V
GND
VR_VID[0..6] 50
R501
R501
12
100Ohm
100Ohm
1% r0402
1% r0402
4
CPU +VCCA
Decoupling
Capacitors
C528
C528
10UF/6.3V
10UF/6.3V
Please close to CPU.
POWER
+VCORE
VCCSENSE 50
VSSSENSE 50
POWER
POWER
4
CPU +VCORE
Mid-Frequency
Capacitors
Intel:22UF*32
F9F:10UF*20
CPU +VCORE
Bulk-Decoupling
Capacitors
CPU +VCCP
Decoupling
Capacitors
Intel:270UF*1,
0.1UF*6
F9F:150UF*1,
0.1UF*10
+VCORE
C502
C502
10UF/6.3V
10UF/6.3V
+VCORE
C512
C512
10UF/6.3V
10UF/6.3V
+VCORE
12
C538
C538
10UF/6.3V
10UF/6.3V
+VCCP_AGTL+
3
C503
C503
C504
C504
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
C513
C513
C514
C514
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
R1.1--Item16
12
12
C533
C533
C534
C534
10UF/6.3V
10UF/6.3V
10UF/6.3V
10UF/6.3V
+VCORE
GND
12
+
+
12
+
+
3
CE501
CE501
330UF/2.5V
330UF/2.5V
@
@
CE503
CE503
150U/4V
150U/4V
12
+
+
C522
C522
0.1UF/10V
0.1UF/10V
C529
C529
0.1UF/10V
0.1UF/10V
C505
C505
10UF/6.3V
10UF/6.3V
C515
C515
10UF/6.3V
10UF/6.3V
CE502
CE502
330UF/2.5V
330UF/2.5V
C523
C523
0.1UF/10V
0.1UF/10V
C530
C530
0.1UF/10V
0.1UF/10V
JP501
JP501
1 2
SHORT_PIN
SHORT_PIN
@
@
4A
C506
C506
10UF/6.3V
10UF/6.3V
C516
C516
10UF/6.3V
10UF/6.3V
12
+
+
CE504
CE504
330UF/2.5V
330UF/2.5V
@
@
12
C535
C535
10UF/6.3V
10UF/6.3V
C524
C524
0.1UF/10V
0.1UF/10V
C531
C531
0.1UF/10V
0.1UF/10V
+VCCP+VCCP_AGTL+
C507
C507
10UF/6.3V
10UF/6.3V
C517
C517
10UF/6.3V
10UF/6.3V
12
C536
C536
10UF/6.3V
10UF/6.3V
GND
C525
C525
0.1UF/10V
0.1UF/10V
C532
C532
0.1UF/10V
0.1UF/10V
GND
C508
C508
10UF/6.3V
10UF/6.3V
C518
C518
10UF/6.3V
10UF/6.3V
C509
C509
10UF/6.3V
10UF/6.3V
C519
C519
10UF/6.3V
10UF/6.3V
C526
C526
0.1UF/10V
0.1UF/10V
2
2
C510
C510
10UF/6.3V
10UF/6.3V
C520
C520
10UF/6.3V
10UF/6.3V
C527
C527
0.1UF/10V
0.1UF/10V
GND
10UF/6.3V
10UF/6.3V
GND
10UF/6.3V
10UF/6.3V
GND
C511
C511
C521
C521
1
U401D
U401D
A4
VSS[1]
A8
VSS[2]
A11
VSS[3]
A14
VSS[4]
A16
VSS[5]
A19
VSS[6]
A23
VSS[7]
A26
VSS[8]
B6
VSS[9]
B8
VSS[10]
B11
VSS[11]
B13
VSS[12]
B16
VSS[13]
B19
VSS[14]
B21
VSS[15]
B24
VSS[16]
C5
VSS[17]
C8
VSS[18]
C11
VSS[19]
C14
VSS[20]
C16
VSS[21]
C19
VSS[22]
C2
VSS[23]
C22
VSS[24]
C25
VSS[25]
D1
VSS[26]
D4
VSS[27]
D8
VSS[28]
D11
VSS[29]
D13
VSS[30]
D16
VSS[31]
D19
VSS[32]
D23
VSS[33]
D26
VSS[34]
E3
VSS[35]
E6
VSS[36]
E8
VSS[37]
E11
VSS[38]
E14
VSS[39]
E16
VSS[40]
E19
VSS[41]
E21
VSS[42]
E24
VSS[43]
F5
VSS[44]
F8
VSS[45]
F11
VSS[46]
F13
VSS[47]
F16
VSS[48]
F19
VSS[49]
F2
VSS[50]
F22
VSS[51]
F25
VSS[52]
G4
VSS[53]
G1
VSS[54]
G23
VSS[55]
G26
VSS[56]
H3
VSS[57]
H6
VSS[58]
H21
VSS[59]
H24
VSS[60]
J2
VSS[61]
J5
VSS[62]
J22
VSS[63]
J25
VSS[64]
K1
VSS[65]
K4
VSS[66]
K23
VSS[67]
K26
VSS[68]
L3
VSS[69]
L6
VSS[70]
L21
VSS[71]
L24
VSS[72]
M2
VSS[73]
M5
VSS[74]
M22
VSS[75]
M25
VSS[76]
N1
VSS[77]
N4
VSS[78]
N23
VSS[79]
N26
VSS[80]
P3
VSS[81]
SOCKET479P
GND GND
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
SOCKET479P
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]
VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
F9J
F9J
F9J
1
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
YONAH CPU (2)
YONAH CPU (2)
YONAH CPU (2)
563Thursday, November 23, 2006
563Thursday, November 23, 2006
563Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
2
1
PWM FAN
Control
D D
+3VS
R612
R612
100KOhm
100KOhm
1 2
34
Q604B
Q604B
OS#_OC
5
UM6K1N
UM6K1N
GND
D603
D603
1N4148W
1N4148W
@
@
D604
D604
1N4148W
1N4148W
@
@
FAN_PWM34
WATCH_DOG#34
C C
+3VS
61
2
GND
12
12
CPU FAN will be forced on:
1) Thermal Sensor Over-temperture
2) WATCHDOG asserted by EC
1 2
R615
R615
27KOhm
27KOhm
1%
1%
+5VS
(94~98'C protect)
R602
R602
22.1K
22.1K
1%
1%
@
@
RT601
RT601
100K
100K
FORCE_OFF# 34,51,60
+3VS
B B
A A
SYS_TEMP34
C603 0.1UC603 0.1U
U602
U602
1
2
PST9013NR
PST9013NR
@
@
GND
5
NC
VCC
SUB
GND3VOUT
5
4
+5VS_FAN
R601
R611
R611
100KOhm@
100KOhm@
Q604A
Q604A
FAN0_TACH34
UM6K1N
UM6K1N
GND
R601
10KOhm
10KOhm
@
@
10KOhm
10KOhm
Enable: Turn OFF system
OPEN Collect
H_THRMTRIP#4
GMCH_THRMTRIP#9
4
R603
R603
PLT_RST#9,21,23,40
+3VS
GND
12
12
C601
C601
100PF/50V
100PF/50V
@
@
12
C604
C604
100PF/50V
100PF/50V
@
@
GND
D602
D602
1 2
1N4148W
1N4148W
R607 0OhmR607 0Ohm
+VCCP_AGTL+
R605
R605
56Ohm
56Ohm
+5VS
1
3
2
E12
E12
Q603
Q603
PMBS3904
PMBS3904
D601
D601
BAT54C
BAT54C
@
@
B
B
+5VS_FAN
R604
R604
330
330
C602 0.1UC602 0.1U
C
C
3
3
P/N:12G17100004B
4
3
2
GND
R613 0Ohm
R613 0Ohm
@
@
+3VS+VCCP_AGTL+
GND
3
CON601
CON601
4
SIDE2
3
2
11SIDE1
WtoB_CON_4P_1
WtoB_CON_4P_1
C609
C609
1UF/10V
1UF/10V
c0603
c0603
@
@
H_THERMDC4
H_THERMDC
H_THERMDA
R606
R606
10KOhm
10KOhm
Q602
Q602
H2N7002
H2N7002
S
S
2
2
G
G
1
1
6
5
GND
+3VS_THM
12
C606
C606
0.1U
0.1U
GND
C605
C605
1000P
1000P
ICH_THRMTRIP# 19
Enable: Turn OFF system
D
D
THRMTRIP#
3
3
+5VS
12
C607
C607
0.1UF/10V
0.1UF/10V
R610 200R610 200
Max: 1mA
U601
U601
1
VCC
2
DXP
3
DXN
4
OVERT#
R1.1--Item10
OD
THRMTRIP# 34
R614 0OhmR614 0Ohm
1 2
C608
C608
22UF/10V
22UF/10V
GNDGND
Thermal Sensor
MAX6657MSA
MAX6657MSA
SCLK
ALERT#
+3VS
SDA
GND
R617
R617
10KOhm
10KOhm
2
+3VS
Enable: Turn OFF system
Slave address: 98h
SMB1_CLK
8
SMB1_DAT
7
6
OD
5
GND
3
3
Q605
Q605
C
C
B
1
B
1
E
E
PMBS3904
PMBS3904
2
2
Close to Pin A24
& A25 of CPU
+5VS_FAN
D605
D605
1N4148W
1N4148W
@
@
1 2
GND
SMB1_CLK 34,45
SMB1_DAT 34,45H_THERMDA4
THRM_ALERT# 34
OS#_OC 34,43,45
SMB1_CLK
SMB1_DAT
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
F9J
F9J
F9J
R608 4.7KOhmR608 4.7KOhm
1 2
R609 4.7KOhmR609 4.7KOhm
1 2
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
+3VS
FAN_CTRL&Thernal
FAN_CTRL&Thernal
FAN_CTRL&Thernal
Rev
Rev
Rev
2.0
2.0
663Thursday, November 23, 2006
663Thursday, November 23, 2006
663Thursday, November 23, 2006
2.0
of
of
of
5
4
3
2
1
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
D D
BCLK
POWERSAVE#
Q701A
Q701A
61
UM6K1N
UM6K1N
2
Q701B
Q701B
34
UM6K1N
UM6K1N
5
C C
GND
CLK_NV27SS44
B B
A A
FSB
533 L
CPU_Select 20
ACIN_OC# 34,35,59
CLK_NV2744
CLK_USB4820
CLK_DBGPCI35
CLK_ECPCI34
CLK_TPMPCI25
CLK_DEBUG233
CLK_ICHPCI21
SDA_3S14,15,20,33
R701 1KR701 1K
R702 1KR702 1K
R705 1KR705 1K
FSLC FSLB FSLA
BSEL1
BSEL2
L133
L
T705T705
SCL_3S14,15,20,33
5
MCH_BSEL0 9
MCH_BSEL1 9
MCH_BSEL2 9
BSEL0
H
H
H166 667
C712
C712
27PF/50V
27PF/50V
C723 10P@C723 10P
C722 10P@C722 10P
C714 10P@C714 10P
@
@
@
GND
Latched Input Select
R714 2.2OhmR714 2.2Ohm
C709
C709
C701
C701
0.1U
0.1U
10UF/6.3V
10UF/6.3V
12
C713
C713
27PF/50V
27PF/50V
GND
C718 10P@C718 10P
@
@
C719 10P@C719 10P
GND
GND
GND
C720 10P@C720 10P
@
GND
R733 2.2KR733 2.2K
+3VS
+3VS
R756 0OhmR756 0Ohm
R758 0OhmR758 0Ohm
4
X701
X701
12
12
12
14.318Mhz
14.318Mhz
GND
R725 0OhmR725 0Ohm
1 2
CPU_BSEL04
CPU_BSEL14
C717 10P@C717 10P
C715 10P@C715 10P@C716 10P@C716 10P
@
@
/ PIN9 PIN5 PIN17 PIN18
* 0 X 27FIX 27SS
1 0 96MSS_T 96MSS_C
1 1 PCIEX0_T PCIEX0_C
R716
R716
10KOhm
10KOhm
POWERSAVE#
+3VS_VDDA
XOUT_CLK
CLK_27FIX
R70733Ohm R70733Ohm
12
12
CLK_27SS
R71933Ohm R71933Ohm
R732 33R732 33
R738 33@R738 33@
R740 10KOhmR740 10KOhm
R742 33R742 33
R743 33R743 33
R745 33R745 33
R747 10KOhmR747 10KOhm
R749 33R749 33
R760 10KOhmR760 10KOhm
R752 33R752 33
R754 10KOhmR754 10KOhm
1 2
1 2
R762
R762
475
475
1%
1%
GND
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
+3VS_CLK
12
FSA
GND
+3VS
L701
L701
21
120Ohm/100Mhz
C706
C706
10UF/6.3V
10UF/6.3V
GND GND
U701
U701
21
VDDPCIEX1
28
VDDPCIEX2
42
VDDPCIEX3
34
PWRSAVE#
50
VDDCPU
45
VDDA
46
GNDA
58
X1
57
X2
17
27FIX/LCD_SSCGT/PCIEX0T
18
27SS/LCD_SSCGC/PCIEX0C
12
FSLA/USB_48MHz
16
FSLB/TEST_MODE
5
SELPCIEX0_LCD#PCICLK5
4
PCICLK4
3
PCICLK3
64
PCICLK2/REQ_SEL
9
SELLCD_27#/PCICLK_F1
8
ITP_EN/PCICLK_F0
54
SCLK
55
SDATA
47
IREF
2
GND1
6
GND2
13
GND3
29
GND4
37
GND5
53
GND6
59
GND7
ICS954310CGLFT
ICS954310CGLFT
Int. PU: PIN5, PIN9, PIN32, PIN33, PIN34
Int. PD: PIN64
1
VDDPCI1
120Ohm/100Mhz
21
L702
L702
120Ohm/100Mhz
120Ohm/100Mhz
+3VS_VDDPCI
7
VDDPCI2
CPUCLKT2_ITP/PCIEXT8
CPUCLKC2_ITP/PCIEXC8
VDDREF
PCI/PCIEX_STOP#
CPU_STOP#
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
PEREQ1#/PCIEXT7
PEREQ2#/PCIEXC7
PCIEXT6
PCIEXC6
PCIEXT5
PCIEXC5
PCIEXT4
PCIEXC4
PCIEXT3
PCIEXC3
PCIEXT2
PCIEXC2
PCIEXT1
PCIEXC1
SATACLKT
SATACLKC
DOTT_96MHz
DOTC_96MHz
PEREQ3#
PEREQ4#
Vtt_PwrGd#/PD
REF1/FSLC/TEST_SEL
3
VDD48
REF0
C707
C707
0.1U
0.1U
GND
11
56
63
62
49
48
52
51
44
43
41
40
39
38
36
35
30
31
24
25
22
23
19
20
26
27
14
15
32
33
10
61
60
+3VS_CLK
C702
C702
0.1U
0.1U
C708
C708
0.1U
0.1U
+3VS_VDDREF
CLK_CPU
CLK_CPU#
CLK_MCHXIN_CLK
CLK_MCH#
PCIE8
PCIE#8
PEREQ#1
PEREQ#2
PCIE6
PCIE#6
PCIE5
PCIE#5
PCIE4
PCIE#4
PCIE3
PCIE#3
PCIE2
PCIE#2
PCIE1
PCIE#1
SATACLKT
SATACLKC
PEREQ#3
PEREQ#4
REF1
REF0
C704
C704
C703
C703
0.1U
0.1U
0.1U
0.1U
R711
R711
+3VS_VDD48
2.2Ohm
2.2Ohm
STP_PCI# 20
STP_CPU# 20
R721 33R721 33
R722 33R722 33
R723 33R723 33
R724 33R724 33
T701T701
T702T702
R731 10KOhm
R731 10KOhm
@
@
R734 33R734 33
R735 33R735 33
R736 33R736 33
R739 33R739 33
R774 33R774 33
R775 33R775 33
R771 33R771 33
R768 33R768 33
R751 33R751 33
R764 33R764 33
R753 0OhmR753 0Ohm
R755 0OhmR755 0Ohm
R757 33R757 33
R759 33R759 33
T703T703
T704T704
T706T706
R772 10KOhm@R772 10KOhm@
R765
R765
10KOhm
10KOhm
R766 2.2KR766 2.2K
R767 33R767 33
+3VS_CLK
+3VS
12
GND
GND
C721
C721
C705
C705
0.1U
0.1U
R7121R712
C710
C710
1
0.1U
0.1U
C711 0.1UC711 0.1U
CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4
CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8
R776 10KOhmR776 10KOhm
CLK_PCIE_NEWCARD 33
CLK_PCIE_NEWCARD# 33
CLK_MCH_3GPLL 9
CLK_MCH_3GPLL# 9
CLK_PCIE_PEG 40
CLK_PCIE_PEG# 40
CLK_PCIE_ICH 21
CLK_PCIE_ICH# 21
CLK_PCIE_LAN 29
CLK_PCIE_LAN# 29
CLK_PCIE_MINICARD 26
CLK_PCIE_MINICARD# 26
CLK_SATA_ICH 19
CLK_SATA_ICH# 19
GND
CLK_EN# 50
From Power
CPU_BSEL2 4
CLK_ICH14 20
5PF/50V
5PF/50V
@
@
2
GND
+3VS
CLK_REQ_NEWCARD# 33
GND
PLACE termination close to source IC
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
CLK_PCIE_NEWCARD
CLK_PCIE_NEWCARD#
CLK_PCIE_LAN
CLK_PCIE_LAN#
CLK_PCIE_MINICARD
CLK_PCIE_MINICARD#
CLK_PCIE_ICH
CLK_PCIE_ICH#
CLK_SATA_ICH
CLK_SATA_ICH#
CLK_PCIE_PEG
CLK_PCIE_PEG#
Layout SWAP(Different with F9F)
PEREQ#2
ITP_EN/PCICLK_F0
(PIN8)
SELPCIE0_LCD#/PCI_CLK5
(PIN5)
PCI_CLK2/REQ_SEL
(PIN64)
SELLCD_27#/PCICLK_F1
<Variant Name>
<Variant Name>
<Variant Name>
(PIN9)
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
CLK_REQ_MINICARD# 26
PEREQ#1: PCIEX0, PCIEX6
PEREQ#2: PCIEX1, PCIEX8
PEREQ#3: PCIEX2, PCIEX4
PEREQ#4: PCIEX3, PCIEX5, PCIEX7
F9J
F9J
F9J
R703 49.9 1%R703 49.9 1%
R704 49.9 1%R704 49.9 1%
R706 49.9 1%R706 49.9 1%
R708 49.9 1%R708 49.9 1%
R709 49.9 1%R709 49.9 1%
R710 49.9 1%R710 49.9 1%
R713 49.9 1%R713 49.9 1%
R715 49.9 1%R715 49.9 1%
R717 49.9 1%R717 49.9 1%
R718 49.9 1%R718 49.9 1%
R763 49.9 1%R763 49.9 1%
R750 49.9 1%R750 49.9 1%
R769 49.9 1%R769 49.9 1%
R770 49.9 1%R770 49.9 1%
R726 49.9OhmR726 49.9Ohm
R728 49.9OhmR728 49.9Ohm
R748 49.9 1%R748 49.9 1%
R773 49.9 1%R773 49.9 1%
GND
0 = SRC Pair
1 = CPU_ITP Pair
0 = LCD Clock (96MHz)
1 = PCI Express (100MHz) (D)
0 = PCICLK(D)
1 = PEREQ#
0 = 27MHzSS/27MHzSS# Pair
1 = LCD_CLK Pair (D)
Title :
Title :
Title :
ICS954310
ICS954310
1
ICS954310
763Thursday, November 23, 2006
763Thursday, November 23, 2006
763Thursday, November 23, 2006
of
of
of
Engineer:
Engineer:
Engineer:
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
2
1
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
H_A#[3..31]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_RS#0
H_RS#1
H_RS#2
R810 0OhmR810 0Ohm
H_A#[3..31] 4
H_ADS# 4
H_ADSTB#0 4
H_ADSTB#1 4
H_BNR# 4
H_BPRI# 4
H_BR0# 4
H_CPURST# 4
H_DBSY# 4
H_DEFER# 4
H_DPWR# 4
H_DRDY# 4
H_DINV#0 4
H_DINV#1 4
H_DINV#2 4
H_DINV#3 4
H_DSTBN#0 4
H_DSTBN#1 4
H_DSTBN#2 4
H_DSTBN#3 4
H_DSTBP#0 4
H_DSTBP#1 4
H_DSTBP#2 4
H_DSTBP#3 4
H_HIT# 4
H_HITM# 4
H_LOCK# 4
2
H_VREF
H_CPURST#
H_REQ#[4..0] 4
H_RS#[0..2] 4
H_CPUSLP# 4,19
H_TRDY# 4
+VCCP_AGTL+
AGTL+ I/O Voltage
Reference
+VCCP_AGTL+
R803
R803
100
100
<500 mil (55 Ohm)
1%
1%
T/B trace 5.5 ,
Space 25
R806
R806
C802
C802
200
200
1%
1%
0.1U
0.1U
GNDGND
T801T801
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
F9J
F9J
F9J
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Calistoga--CPU
Calistoga--CPU
Calistoga--CPU
863Thursday, November 23, 2006
863Thursday, November 23, 2006
863Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
H_D#[0..63]4 +VCCP_AGTL+ 4,5,6,11
D D
RCOMP
For Calibrating FSB I/O Buffer
H_XRCOMP
R801
R801
24.9
24.9
1%
1%
GND GND
10/20mils
H_YRCOMP
R802
R802
24.9
24.9
1%
1%
19/20mils
SCOMP
For Slew Rate Compensation on the FSB
+VCCP_AGTL+
R804
C C
R804
54.9
54.9
1%
1%
H_XSCOMP
+VCCP_AGTL+
R805
R805
54.9
54.9
1%
1%
H_YSCOMP
4.5/20 mils4.5/20 mils
Voltage Swing
For Providing a Reference Voltage to The FSB RCOMP Circuit
+VCCP_AGTL+
R807
R807
221Ohm
221Ohm
1%
1%
1 2
B B
A A
R808
R808
100
100
1%
1%
+VCCP_AGTL+
R809
R809
221Ohm
221Ohm
1%
1%
1 2
R811
R811
100
100
1%
1%
5
GNDGND
GNDGND
H_XSWING
C801
C801
0.1U
0.1U
H_YSWING
C803
C803
0.1U
0.1U
4.5/20mils
4.5/20mils
CLK_MCH_BCLK7
CLK_MCH_BCLK#7
4
H_D#[0..63]
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP H_REQ#4
H_YSWING
U801A CALISTOGA_Q137
U801A CALISTOGA_Q137
F1
H_D#_0
J1
H_D#_1
H1
H_D#_2
J6
H_D#_3
H3
H_D#_4
K2
H_D#_5
G1
H_D#_6
G2
H_D#_7
K9
H_D#_8
K1
H_D#_9
K7
H_D#_10
J8
H_D#_11
H4
H_D#_12
J3
H_D#_13
K11
H_D#_14
G4
H_D#_15
T10
H_D#_16
W11
H_D#_17
T3
H_D#_18
U7
H_D#_19
U9
H_D#_20
U11
H_D#_21
T11
H_D#_22
W9
H_D#_23
T1
H_D#_24
T8
H_D#_25
T4
H_D#_26
W7
H_D#_27
U5
H_D#_28
T9
H_D#_29
W6
H_D#_30
T5
H_D#_31
AB7
H_D#_32
AA9
H_D#_33
W4
H_D#_34
W3
H_D#_35
Y3
H_D#_36
Y7
AA10
AB11
AC11
AD10
AC9
AB3
AC2
AD1
AD9
AC1
AD7
AC6
AB5
AD4
AC8
AG2
AG1
Y10
AB8
AA4
AA7
AA2
AA6
AA1
AB4
W5
W2
Y8
E1
E2
E4
Y1
U1
W1
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
HOST
HOST
3
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_AVREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_DVREF
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
5
4
3
2
1
U801C CALISTOGA_Q137
U801B CALISTOGA_Q137
U801B CALISTOGA_Q137
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
PM_EXTTS#0
PM_EXTTS#1
VTT_REF
100Ohm
100Ohm
AG11
AF11
AH33
AH34
BA41
BA40
BA39
AY41
AW41
AW1
H7
J19
K30
J29
A41
A35
A34
D28
D27
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
G28
F25
H26
G6
H28
H27
K28
H32
D1
C41
C1
BA3
BA2
BA1
B41
B2
AY1
A40
A4
A39
A3
RSVD_5
RSVD_6
RSVD_7
RSVD_8
TV_DCONSEL_0
TV_DCONSEL_1
RSVD_11
RSVD_12
RSVD_13
RSVD_14
RSVD_15
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
CLK_REQ#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
RSVD
RSVD
DDR MUXINGCLK
DDR MUXINGCLK
CFG
CFG
PM
PM
MISC NC
MISC NC
DMI
DMI
VTT_REF 14,15
+VCCP_GMCH 11,12
+1.5VS_PCIE 11
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
D_REFSSCLKIN
D D
011=667MHz
001=533MHz
MCH_BSEL07
MCH_BSEL17
MCH_BSEL27
MCH_CFG_513
MCH_CFG_713
MCH_CFG_913
MCH_CFG_1013
MCH_CFG_1113
MCH_CFG_1213
MCH_CFG_1313
GMCH_THRMTRIP#6
ICH7_PWROK20,34
MCH_ICH_SYNC#21
+3VS
MCH_CFG_1513
MCH_CFG_1613
MCH_CFG_1813
MCH_CFG_1913
PM_BMBUSY#20
PLT_RST#6,21,23,40
R911 10KOhmR911 10KOhm
R912 10KOhmR912 10KOhm
T911T911
R901
R901
T909T909
T910T910
T908T908
PM_EXTTS#0
PM_EXTTS#1
+VCCP_GMCH
+1.5VS_PCIE
5
C C
B B
A A
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
G_CLKIN#
G_CLKIN
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
4
AY35
AR1
AW7
AW40
AW35
AT1
AY7
AY40
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
AL20
AF10
BA13
BA12
AY20
AU21
AV9
AT9
AK1
AK41
AF33
AG33
A27
A26
C40
D41
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
M_CKE0
M_CKE1
M_CKE2
M_CKE3
M_CS#0
M_CS#1
M_CS#2
M_CS#3
M_OCDCOMP0
M_OCDCOMP1
M_ODT0
M_ODT1
M_ODT2
M_ODT3
M_RCOMP#
M_RCOMP
D_REFCLKIN
D_REFSSCLKIN
DMI_TXN0
DMI_TXN1
DMI_TXP0
DMI_TXP1
DMI_RXN0
DMI_RXN1
DMI_RXP0
DMI_RXP1
VTT_REF
M_CLK_DDR0 14
M_CLK_DDR1 14
M_CLK_DDR2 15
M_CLK_DDR3 15
M_CLK_DDR#0 14
M_CLK_DDR#1 14
M_CLK_DDR#2 15
M_CLK_DDR#3 15
R906 40.2 1%@R906 40.2 1%@
R907 40.2 1%@R907 40.2 1%@
R908 80.6 1%R908 80.61%
R909 80.6 1%R909 80.61%
DMI 2X
C901
C901
1U/6.3V
1U/6.3V
M_CKE[0..3] 14,15,16
M_CS#[0..3] 14,15,16
M_ODT[0..3] 14,15,16
VTT_REF
CLK_MCH_3GPLL# 7
CLK_MCH_3GPLL 7
GND
DMI_TXN[0..1] 21
DMI_TXP[0..1] 21
DMI_RXN[0..1] 21
DMI_RXP[0..1] 21
C902
C902
0.1U
0.1U
GNDGND
+1.8V
Layout Note: Route as
short as possible.
GND
GND
+1.5VS
+VCCP_GMCH
+1.5VS
1 2
1 2
3
U801C CALISTOGA_Q137
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLK_CTLA
H29
L_DATA_CTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
A33
LA_CLK#
A32
LA_CLK
E27
LB_CLK#
E26
LB_CLK
C37
GND
R39
R39
10KOhm
10KOhm
r0402
r0402
@
@
R41
R41
10KOhm
10KOhm
r0402
r0402
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
D_REFCLKIND_REFSSCLKIN
LVDS
LVDS
TV
TV
VGA
VGA
+1.5VS
1 2
1 2
GNDGND
R40
R40
10KOhm
10KOhm
r0402
r0402
@
@
R42
R42
10KOhm
10KOhm
r0402
r0402
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
2
D40
D38
F34
G38
H34
J38
L34
M38
N34
P38
R34
T38
V34
W38
Y34
AA38
AB34
AC38
D34
F38
G34
H38
J34
L38
M34
N38
P34
R38
T34
V38
W34
Y38
AA34
AB38
F36
G40
H36
J40
L36
M40
N36
P40
R36
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
PEG_COMP
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_G_RXN[7:0]
PEG_G_RXP[7:0]
+1.5VS_PCIE
R904 24.9
R904 24.9
1%
1%
PEG_RXN[7:0] 40
PEG_RXP[7:0] 40
PCIE 8X
PEG_G_RXN[7:0] 40
PEG_G_RXP[7:0] 40
F9J
F9J
F9J
PEG_G_RXN0
PEG_G_RXN1
PEG_G_RXN2
PEG_G_RXN3
PEG_G_RXN4
PEG_G_RXN5
PEG_G_RXN6
PEG_G_RXN7
PEG_G_RXP0
PEG_G_RXP1
PEG_G_RXP2
PEG_G_RXP3
PEG_G_RXP4
PEG_G_RXP5
PEG_G_RXP6
PEG_G_RXP7
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
1 2
C955 0.1UFC955 0.1UF
C957 0.1UFC957 0.1UF
C959 0.1UFC959 0.1UF
C961 0.1UFC961 0.1UF
C971 0.1UFC971 0.1UF
C973 0.1UFC973 0.1UF
C975 0.1UFC975 0.1UF
C977 0.1UFC977 0.1UF
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C956 0.1UFC956 0.1UF
1 2
C958 0.1UFC958 0.1UF
1 2
C960 0.1UFC960 0.1UF
1 2
C962 0.1UFC962 0.1UF
1 2
C972 0.1UFC972 0.1UF
1 2
C974 0.1UFC974 0.1UF
1 2
C976 0.1UFC976 0.1UF
1 2
C978 0.1UFC978 0.1UF
Calistoga--PCIE
Calistoga--PCIE
Calistoga--PCIE
963Thursday, November 23, 2006
963Thursday, November 23, 2006
963Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
D D
M_A_DQ[0..63]14
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
C C
B B
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
U801D CALISTOGA_Q137
U801D CALISTOGA_Q137
AJ35
SA_DQ0
AJ34
SA_DQ1
AM31
SA_DQ2
AM33
SA_DQ3
AJ36
SA_DQ4
AK35
SA_DQ5
AJ32
SA_DQ6
AH31
SA_DQ7
AN35
SA_DQ8
AP33
SA_DQ9
AR31
SA_DQ10
AP31
SA_DQ11
AN38
SA_DQ12
AM36
SA_DQ13
AM34
SA_DQ14
AN33
SA_DQ15
AK26
SA_DQ16
AL27
SA_DQ17
AM26
SA_DQ18
AN24
SA_DQ19
AK28
SA_DQ20
AL28
SA_DQ21
AM24
SA_DQ22
AP26
SA_DQ23
AP23
SA_DQ24
AL22
SA_DQ25
AP21
SA_DQ26
AN20
SA_DQ27
AL23
SA_DQ28
AP24
SA_DQ29
AP20
SA_DQ30
AT21
SA_DQ31
AR12
SA_DQ32
AR14
SA_DQ33
AP13
SA_DQ34
AP12
SA_DQ35
AT13
SA_DQ36
AT12
SA_DQ37
AL14
SA_DQ38
AL12
SA_DQ39
AK9
SA_DQ40
AN7
SA_DQ41
AK8
SA_DQ42
AK7
SA_DQ43
AP9
AW2
AN9
AT5
AY2
AP1
AN2
AV2
AT3
AN1
AG7
AF9
AG4
AF6
AG9
AH6
AF4
AF8
SA_DQ44
SA_DQ45
SA_DQ46
AL5
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
AL2
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
4
AU12
AV14
BA20
AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BS#0 14,16
M_A_BS#1 14,16
M_A_BS#2 14,16
M_A_CAS# 14,16
M_A_RAS# 14,16
M_A_WE# 14,16
M_A_DM[0..7] 14
M_A_DQS[0..7] 14
M_A_DQS#[0..7] 14
M_A_A[0..13] 14,16
3
M_B_DQ[0..63]15
U801E CALISTOGA_Q137
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
U801E CALISTOGA_Q137
AK39
SB_DQ0
AJ37
SB_DQ1
AP39
SB_DQ2
AR41
SB_DQ3
AJ38
SB_DQ4
AK38
SB_DQ5
AN41
SB_DQ6
AP41
SB_DQ7
AT40
SB_DQ8
AV41
SB_DQ9
AU38
SB_DQ10
AV38
SB_DQ11
AP38
SB_DQ12
AR40
SB_DQ13
AW38
SB_DQ14
AY38
SB_DQ15
BA38
SB_DQ16
AV36
SB_DQ17
AR36
SB_DQ18
AP36
SB_DQ19
BA36
SB_DQ20
AU36
SB_DQ21
AP35
SB_DQ22
AP34
SB_DQ23
AY33
SB_DQ24
BA33
SB_DQ25
AT31
SB_DQ26
AU29
SB_DQ27
AU31
SB_DQ28
AW31
SB_DQ29
AV29
SB_DQ30
AW29
SB_DQ31
AM19
SB_DQ32
AL19
SB_DQ33
AP14
SB_DQ34
AN14
SB_DQ35
AN17
SB_DQ36
AM16
SB_DQ37
AP15
SB_DQ38
AL15
SB_DQ39
AJ11
SB_DQ40
AH10
SB_DQ41
AJ9
SB_DQ42
AN10
SB_DQ43
AK13
SB_DQ44
AH11
SB_DQ45
AK10
SB_DQ46
AJ8
SB_DQ47
BA10
SB_DQ48
AW10
SB_DQ49
BA4
SB_DQ50
AW4
SB_DQ51
AY10
SB_DQ52
AY9
SB_DQ53
AW5
SB_DQ54
AY5
SB_DQ55
AV4
SB_DQ56
AR5
SB_DQ57
AK4
SB_DQ58
AK3
SB_DQ59
AT4
SB_DQ60
AK5
SB_DQ61
AJ5
SB_DQ62
AJ3
SB_DQ63
2
AT24
SB_BS_0
AV23
SB_BS_1
AY28
SB_BS_2
AR24
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AK16
AK18
AR27
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_BS#0 15,16
M_B_BS#1 15,16
M_B_BS#2 15,16
M_B_CAS# 15,16
M_B_DM[0..7] 15
M_B_DQS[0..7] 15
M_B_DQS#[0..7] 15
M_B_A[0..13] 15,16
M_B_RAS# 15,16
M_B_WE# 15,16
1
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Calistoga--DDR2
Calistoga--DDR2
1
Calistoga--DDR2
10 63Thursday, November 23, 2006
10 63Thursday, November 23, 2006
10 63Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
F9J
F9J
F9J
Engineer:
5
4
3
2
1
2
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
+VCCP_AGTL+
VTTLF_CAP3
VTTLF_CAP2
VTTLF_CAP1
0.9475V~1.1025V
Max: 1.4A
PLACE IN CAVITY
C1106
C1106
0.47UF/16V
0.47UF/16V
GND GND
C1128
C1128
0.47U
0.47U
GND
C1134
C1134
C1135
C1135
0.47U
0.47U
0.1UF/25V
0.1UF/25V
GND GND
<Variant Name>
<Variant Name>
<Variant Name>
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C1107
C1107
10UF/6.3V
10UF/6.3V
PLACE ON THE EDGE
F9J
F9J
F9J
+VCCP_AGTL+
C1108
C1108
0.1UF/25V
0.1UF/25V
Engineer:
Engineer:
Engineer:
12
+
+
CE1102
CE1102
220U/2V
220U/2V
Check 100U OK?
Title :
Title :
Title :
1
Calistoga--POWER
Calistoga--POWER
Calistoga--POWER
Rev
Rev
Rev
2.0
2.0
11 63Thursday, November 23, 2006
11 63Thursday, November 23, 2006
11 63Thursday, November 23, 2006
2.0
of
of
of
U801H CALISTOGA_Q137
U801H CALISTOGA_Q137
H22
3
AJ41
AB41
AC33
AK31
AF31
AE31
AC31
AL30
AK30
AJ30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AJ21
AH21
AJ20
AH20
AH19
AH15
AH14
AG14
AF14
AE14
AF13
AE13
AF12
AE12
AD12
C30
B30
A30
Y41
V41
R41
N41
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
AH1
AH2
A28
B28
C28
D21
A23
B23
B25
H19
P19
P16
P15
Y14
L41
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCCD_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
POWER
POWER
+2.5VS
D D
+1.5VS
C C
+1.5VS
L1106
L1106
120Ohm/100Mhz
120Ohm/100Mhz
L1108
B B
L1108
120Ohm/100Mhz
120Ohm/100Mhz
L1109
L1109
120Ohm/100Mhz
120Ohm/100Mhz
Check 10U OK?
L1110
L1110
120Ohm/100Mhz
120Ohm/100Mhz
A A
Check 10U OK?
C1112
C1112
C1111
C1111
10UF/6.3V
10UF/6.3V
L1103
L1103
120Ohm/100Mhz
120Ohm/100Mhz
NOTE:0.1uF caps in
1.5SxPLL need to be
located as edge caps
within 200 mils.
21
21
21
21
0.1U
0.1U
21
C1141
C1141
22U/6.3V
22U/6.3V
C1140
C1140
22U/6.3V
22U/6.3V
C1136
C1136
22UF/6.3V
22UF/6.3V
C1138
C1138
22UF/6.3V
22UF/6.3V
5
C1113
C1113
0.022UF/16V
0.022UF/16V
+1.5VS_3GPLL
C1109
C1109
10UF/6.3V
10UF/6.3V
GND
C1125
C1125
0.1U
0.1U
GND
C1129
C1129
0.1U
0.1U
GND
C1137
C1137
0.1U
0.1U
GND
C1139
C1139
0.1U
0.1U
GND
C1114
C1114
0.1U
0.1U
GND GND
C1110
C1110
0.1U
0.1U
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
+1.5VS
+2.5VS
+VCCP_AGTL+
+1.5VS +1.5VS_PCIE
L1101 80/2AL1101 80/2A
@
@
Check 100U OK?
1.425V~1.575V
Max: 40mA
1.425V~1.575V
Max: 40mA
1.425V~1.575V
Max: 45mA
1.425V~1.575V
Max: 45mA
+1.5VS 5,9,12,22,26,33,37,52,56
+2.5VS 37,43,44,54
+3VS
+3VS 6,7,9,13,14,15,17,18,20,22,23,25,26,29,33,34,37,38,39,40,43,44,45,50,60,61
+VCCP_AGTL+ 4,5,6,8
12
+
+
+3VS
CE1101
CE1101
220U/2V
220U/2V
C1130
C1130
10UF/6.3V
10UF/6.3V
C1101
C1101
10UF/6.3V
10UF/6.3V
C1131
C1131
0.1U
0.1U
C1103
C1103
0.1U
0.1U
+1.5VS
+1.5VS
+1.5VS
12
+
+
C1123
C1123
0.022UF
0.022UF
C1126
C1126
0.022UF
0.022UF
CE1105
CE1105
220U/2V
220U/2V
GND
GND
C1132
C1132
10UF/6.3V
10UF/6.3V
Check 100U OK?
NOTE:0.1UF CAPS USED IN
+1.5VS, +3.3VS
+2.5VS should be placed within
200 mils of edge.
4
C1124
C1124
0.1U
0.1U
C1127
C1127
0.1U
0.1U
+VCCP_GMCH
C1133
C1133
0.1U
0.1U
GNDGND
+1.5VS_PCIE
1.425V~1.575V
Max: 1.5A
+1.5VS_3GPLL
+2.5VS
+1.5VS_DPLLA
+1.5VS_DPLLB
+1.5VS_HPLL
+1.5VS_MPLL
+1.5VS
+1.5VS
+1.5VS
+3VS
+1.5VS
GND
GND
GND
GND
GND
GND
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
+VCCP_GMCH
AA33
W33
P33
N33
L33
J33
AA32
Y32
W32
V32
P32
N32
AA31
W31
AA30
W30
AA29
W29
AB28
AA28
AB23
AA23
AC22
AB22
W22
AC21
AA21
W21
AC20
AB20
W20
AB19
AA19
M32
L32
V31
T31
R31
P31
N31
M31
Y30
V30
U30
T30
R30
P30
N30
M30
L30
Y29
V29
U29
R29
P29
M29
L29
Y28
V28
U28
T28
R28
P28
N28
M28
L28
P27
N27
M27
L27
P26
N26
L26
N25
M25
L25
P24
N24
M24
Y23
P23
N23
M23
L23
Y22
P22
N22
M22
L22
N21
M21
L21
Y20
P20
N20
M20
L20
Y19
N19
M19
L19
N18
M18
L18
P17
N17
M17
N16
M16
L16
J32
D D
C C
B B
A A
5
U801F CALISTOGA_Q137
U801F CALISTOGA_Q137
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
VCC
VCC
5
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
+1.8V
4
VCCSM_LF4
VCCSM_LF5
C1201
C1201
0.47U
0.47U
GND GND
C1203
C1203
0.47UF/16V
0.47UF/16V
GND
C1206
C1206
0.47UF/16V
0.47UF/16V
GND
VCCSM_LF2
VCCSM_LF1
C1211
C1211
0.47U
0.47U
GND GND
4
+VCCP_GMCH
C1202
C1202
0.47U
0.47U
C1212
C1212
0.47U
0.47U
U801G CALISTOGA_Q137
U801G CALISTOGA_Q137
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
AD24
AC24
AB24
AA24
W24
AD23
AD22
AD21
AD20
AD19
AD18
AC18
AB18
AA18
W18
Y24
V24
U24
T24
R24
V23
U23
T23
R23
V22
U22
T22
R22
V21
U21
T21
R21
V20
U20
T20
R20
V19
U19
T19
Y18
V18
U18
T18
+1.8V
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
C1204
C1204
10UF/6.3V
10UF/6.3V
1 2
C1205
C1205
10UF/6.3V
10UF/6.3V
NCTF
NCTF
JP1200
JP1200
SHORT_PIN
SHORT_PIN
C1216
C1216
0.1U
0.1U
C1215
C1215
0.1U
0.1U
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
+VCCP+VCCP_GMCH
C1213
C1213
0.1U
0.1U
3
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
C1214
C1214
0.1U
0.1U
GND
3
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
GND
+1.5VS
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
+VCCP_GMCH
12
+
+
CE1201
CE1201
100UF/2.5V
100UF/2.5V
U801J CALISTOGA_Q137
U801J CALISTOGA_Q137
J11
VSS_273
D11
VSS_274
B11
VSS_275
AV10
VSS_276
AP10
VSS_277
AL10
VSS_278
AJ10
VSS_279
AG10
VSS_280
AC10
VSS_281
W10
VSS_282
U10
VSS_283
BA9
VSS_284
AW9
VSS_285
AR9
VSS_286
AH9
VSS_287
AB9
VSS_288
Y9
VSS_289
R9
VSS_290
G9
VSS_291
E9
VSS_292
A9
VSS_293
AG8
VSS_294
AD8
VSS_295
AA8
VSS_296
U8
VSS_297
K8
VSS_298
C8
VSS_299
BA7
VSS_300
AV7
VSS_301
AP7
VSS_302
AL7
VSS_303
AJ7
VSS_304
AH7
VSS_305
AF7
VSS_306
AC7
VSS_307
R7
VSS_308
G7
VSS_309
GND
AG6
AD6
AD5
AR4
AW3
AH3
AG3
AD3
AC3
AR2
AD2
D7
VSS_310
VSS_311
VSS_312
AB6
VSS_313
Y6
VSS_314
U6
VSS_315
N6
VSS_316
K6
VSS_317
H6
VSS_318
B6
VSS_319
AV5
VSS_320
AF5
VSS_321
VSS_322
AY4
VSS_323
VSS_324
AP4
VSS_325
AL4
VSS_326
AJ4
VSS_327
Y4
VSS_328
U4
VSS_329
R4
VSS_330
J4
VSS_331
F4
VSS_332
C4
VSS_333
AY3
VSS_334
VSS_335
AV3
VSS_336
AL3
VSS_337
VSS_338
VSS_339
AF3
VSS_340
VSS_341
VSS_342
AA3
VSS_343
G3
VSS_344
AT2
VSS_345
VSS_346
AP2
VSS_347
AK2
VSS_348
AJ2
VSS_349
VSS_350
AB2
VSS_351
Y2
VSS_352
U2
VSS_353
T2
VSS_354
N2
VSS_355
J2
VSS_356
H2
VSS_357
F2
VSS_358
C2
VSS_359
AL1
VSS_360
12
+
+
CE1202
CE1202
100UF/2.5V
100UF/2.5V
C1207
C1207
10UF/6.3V
10UF/6.3V
VSS
VSS
C1208
C1208
0.1U
0.1U
2
2
C1209
C1209
10UF/6.3V
10UF/6.3V
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
VSS_203
VSS_204
VSS_205
VSS_206
VSS_207
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
VSS_213
VSS_214
VSS_215
VSS_216
VSS_217
VSS_218
VSS_219
VSS_220
VSS_221
VSS_222
VSS_223
VSS_224
VSS_225
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
VSS_235
VSS_236
VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252
VSS_253
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
GND
C1210
C1210
0.1U
0.1U
+1.5VS
+1.8V
AT23
AN23
AM23
AH23
AC23
W23
K23
J23
F23
C23
AA22
K22
G22
F22
E22
D22
A22
BA21
AV21
AR21
AN21
AL21
AB21
Y21
P21
K21
J21
H21
C21
AW20
AR20
AM20
AA20
K20
B20
A20
AN19
AC19
W19
K19
G19
C19
AH18
P18
H18
D18
A18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
J16
F16
C16
AN15
AM15
AK15
N15
M15
L15
B15
A15
BA14
AT14
AK14
AD14
AA14
U14
K14
H14
E14
AV13
AR13
AN13
AM13
AL13
AG13
P13
F13
D13
B13
AY12
AC12
K12
H12
E12
AD11
AA11
Y11
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
E28
AP27
AM27
AK27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
GND
<Variant Name>
<Variant Name>
<Variant Name>
GND GND
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+1.5VS 5,9,11,22,26,33,37,52,56
+1.8V 9,14,15,37,53
U801I CALISTOGA_Q137
U801I CALISTOGA_Q137
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
J28
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
J27
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
F9J
F9J
F9J
1
VSS
VSS
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Calistoga--POWER
Calistoga--POWER
Calistoga--POWER
VSS_0
VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
12 63Thursday, November 23, 2006
12 63Thursday, November 23, 2006
12 63Thursday, November 23, 2006
AC41
AA41
W41
T41
P41
M41
J41
F41
AV40
AP40
AN40
AK40
AJ40
AH40
AG40
AF40
AE40
B40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
AT38
AM38
AH38
AG38
AF38
AE38
C38
AK37
AH37
AB37
AA37
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
C36
B36
BA35
AV35
AR35
AH35
AB35
AA35
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
AN34
Rev
Rev
Rev
2.0
2.0
2.0
of
of
of
5
4
3
2
1
+3VS
MCH_CFG_59
R1301
GND
R1301
2.2K
2.2K
D D
CFG5 : DMI STRAP
LOW = DMI X 2
HIGH = DMI X 4 (Default)
MCH_CFG_129
+3VS 6,7,9,11,14,15,17,18,20,22,23,25,26,29,33,34,37,38,39,40,43,44,45,50,60,61
R1302
R1302
2.2K
2.2K
@
@
GND
CFG[13:12] : GMCH TEST MODE SELECT
00 = Partial CLK gating disable
01 = XOR Mode Enable
10 = ALL Z Mode Enable
MCH_CFG_79 MCH_CFG_139
R1303
R1303
2.2K
2.2K
@
@
GND
C C
MCH_CFG_99
R1305
R1305
@
@
2.2K
2.2K
GND
MCH_CFG_109
R1308
R1308
2.2K
2.2K
@
@
GND
CFG7 : CPU STRAP
LOW = RESERVED
HIGH = Mobile Yonah CPU (Default)
CFG9 : PCIE GRAPHIC LANE
LOW = REVERSE LANE
HIGH = NORMAL OPERATION (Default)
CFG10 : HOST PLL VCO SELECT
LOW = RESERVED
HIGH = MOBILITY (Default)
R1304
R1304
2.2K
2.2K
@
@
GND
MCH_CFG_159
R1306
R1306
2.2K
2.2K
@
@
GND
MCH_CFG_169
R1307
R1307
2.2K
2.2K
@
@
GND
11 = NORMAL OPERATION (Default)
CFG15 : ICH RESET Disable
LOW = ICH RESET Disabled
HIGH = Normal Operation (Default)
CFG16 : FSB Dynamic ODT
LOW = Dynamic ODT Disabled
HIGH = Dynamic ODT Enabled (Default)
B B
MCH_CFG_119
R1310
R1310
2.2K
2.2K
@
@
GND
CFG11 : PSB 4x CLK ENABLE
LOW = 4X ENABLED
HIGH = 8X ENABLED (Default)
MCH_CFG_189
CFG[17..3] have internal pullup resistors.
CFG[19..18] have internal pulldown resistors.
SDVOCRTL_DATA has internal pulldown resistors.
MCH_CFG_199
A A
5
4
3
+3VS
+3VS
R1309
R1309
1K
1K
@
@
R1311
R1311
1K
1K
@
@
CFG18 : GMCH Core Voltage Level
LOW = 1.05V (Default)
HIGH = 1.5V
CFG19 : DMI LANE REVERSAL
LOW = NORMAL (Default)
HIGH = LANES REVERSED
<Variant Name>
<Variant Name>
<Variant Name>
Date: Sheet
Date: Sheet
Date: Sheet
2
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
F9J
F9J
F9J
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Calistoga--Strap
Calistoga--Strap
Calistoga--Strap
13 63Thursday, November 23, 2006
13 63Thursday, November 23, 2006
13 63Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
2
1
SMBus Slave Address:A0H
DCLK0
C1401
RN1401A
RN1401A
RN1401B
RN1401B
C1401
10PF/50V
10PF/50V
1 2
@
@
DCLK0#
DCLK1
C1402
C1402
10PF/50V
10PF/50V
1 2
@
@
DCLK1#
1 2
10KOhm
10KOhm
3 4
10KOhm
10KOhm
PLACE NEAR SO-DIMM_0
PLACE NEAR SO-DIMM_0
D D
C C
GND
B B
M_A_A[0..13]10,16
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_BS#210,16
M_A_BS#010,16
M_A_BS#110,16
M_CS#09,16
M_CS#19,16
M_CLK_DDR09
M_CLK_DDR#09
M_CLK_DDR19
M_CLK_DDR#19
M_CKE09,16
M_CKE19,16
M_A_CAS#10,16
M_A_RAS#10,16
M_A_WE#10,16
SCL_3S7,15,20,33
SDA_3S7,15,20,33
M_ODT09,16
M_ODT19,16
M_A_DM[0..7]10
M_A_DQS[0..7]10
M_A_DQS#[0..7]10
DCLK0
DCLK0#
DCLK1
DCLK1#
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
CON141A
CON141A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR2_DIMM_200P_1
DDR2_DIMM_200P_1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
M_A_DQ4
M_A_DQ0
M_A_DQ2
M_A_DQ3
M_A_DQ5
M_A_DQ1
M_A_DQ7
M_A_DQ6
M_A_DQ8
M_A_DQ14
M_A_DQ15
M_A_DQ9
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ20
M_A_DQ16
M_A_DQ22
M_A_DQ23
M_A_DQ17
M_A_DQ21
M_A_DQ18
M_A_DQ19
M_A_DQ28
M_A_DQ24
M_A_DQ26
M_A_DQ27
M_A_DQ25
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ33
M_A_DQ37
M_A_DQ32
M_A_DQ36
M_A_DQ34
M_A_DQ35
M_A_DQ39
M_A_DQ38
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ51
M_A_DQ55
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ50
M_A_DQ61
M_A_DQ56
M_A_DQ62
M_A_DQ58
M_A_DQ60
M_A_DQ57
M_A_DQ63
M_A_DQ59
Hight: 4.0 mm
M_A_DQ[0..63] 10
+3VS
12
C1403
C1403
2.2UF/6.3V
2.2UF/6.3V
c0603
c0603
@
@
GND
Layout Note: Place these Caps near SO DIMM 0
+1.8V
12
C1407
C1407
0.1UF/16V
0.1UF/16V
12
C1408
C1408
0.1UF/16V
0.1UF/16V
12
C1409
C1409
0.1UF/16V
0.1UF/16V
12
C1404
C1404
0.1UF/16V
0.1UF/16V
12
C1405
C1405
2.2UF/6.3V
2.2UF/6.3V
c0603
c0603
12
C1410
C1410
0.1UF/16V
0.1UF/16V
VTT_REF
12
GND
C1406
C1406
0.1UF/16V
0.1UF/16V
+1.8V
CON141B
CON141B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
203
NP_NC1
204
NP_NC2
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DDR2_DIMM_200P_1
DDR2_DIMM_200P_1
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
GNDGND
GND
+1.8V
12
12
C1412
C1412
1UF/10V
1UF/10V
c0603
c0603
12
C1413
C1413
1UF/10V
1UF/10V
c0603
c0603
C1411
C1411
1UF/10V
1UF/10V
c0603
c0603
A A
5
4
3
12
C1414
C1414
1UF/10V
1UF/10V
c0603
c0603
GND
2
12
C1415
C1415
1UF/10V
1UF/10V
c0603
c0603
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
F9J
F9J
F9J
Engineer:
1
DDR2 SO-DIMM_0
DDR2 SO-DIMM_0
DDR2 SO-DIMM_0
14 63Thursday, November 23, 2006
14 63Thursday, November 23, 2006
14 63Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
2
1
DCLK2
PLACE NEAR SO-DIMM_1
C1501
C1501
10PF/50V
+3VS
GND
1 2
1 2
RN1401C
RN1401C
RN1401D
RN1401D
10PF/50V
@
@
C1502
C1502
10PF/50V
10PF/50V
@
@
DCLK2#
PLACE NEAR SO-DIMM_1
DCLK3#
5 6
10KOhm
10KOhm
7 8
10KOhm
10KOhm
D D
C C
B B
M_B_A[0..13]10,16
M_B_BS#210,16
M_B_BS#010,16
M_B_BS#110,16
M_CS#29,16
M_CS#39,16
M_CLK_DDR39
M_CLK_DDR#39
M_CLK_DDR29
M_CLK_DDR#29
M_CKE29,16
M_CKE39,16
M_B_CAS#10,16
M_B_RAS#10,16
M_B_WE#10,16
SCL_3S7,14,20,33
SDA_3S7,14,20,33
M_ODT29,16
M_ODT39,16
M_B_DM[0..7]10
M_B_DQS[0..7]10
M_B_DQS#[0..7]10
SMBus Slave Address:A4H
CON151A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7DCLK3
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
DCLK3
DCLK3#
DCLK2
DCLK2#
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM6
M_B_DM7
M_B_DM5
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS6
M_B_DQS7
M_B_DQS5
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#6
M_B_DQS#7
M_B_DQS#5
CON151A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR2_DIMM_200P_2
DDR2_DIMM_200P_2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ[0..63] 10
M_B_DQ4
5
M_B_DQ0
7
M_B_DQ3
17
M_B_DQ2
19
M_B_DQ1
4
M_B_DQ5
6
M_B_DQ6
14
M_B_DQ7
16
M_B_DQ8
23
M_B_DQ9
25
M_B_DQ10
35
M_B_DQ11
37
M_B_DQ12
20
M_B_DQ13
22
M_B_DQ14
36
M_B_DQ15
38
M_B_DQ21
43
M_B_DQ17
45
M_B_DQ18
55
M_B_DQ23
57
M_B_DQ20
44
M_B_DQ16
46
M_B_DQ19
56
M_B_DQ22
58
M_B_DQ26
61
M_B_DQ29
63
M_B_DQ28
73
M_B_DQ31
75
M_B_DQ24
62
M_B_DQ25
64
M_B_DQ27
74
M_B_DQ30
76
M_B_DQ32
123
M_B_DQ33
125
M_B_DQ34
135
M_B_DQ35
137
M_B_DQ36
124
M_B_DQ37
126
M_B_DQ38
134
M_B_DQ39
136
M_B_DQ48
141
M_B_DQ52
143
M_B_DQ54
151
M_B_DQ55
153
M_B_DQ49
140
M_B_DQ53
142
M_B_DQ50
152
M_B_DQ51
154
M_B_DQ60
157
M_B_DQ61
159
M_B_DQ59
173
M_B_DQ58
175
M_B_DQ57
158
M_B_DQ56
160
M_B_DQ63
174
M_B_DQ62
176
M_B_DQ42
179
M_B_DQ47
181
M_B_DQ40
189
M_B_DQ41
191
M_B_DQ43
180
M_B_DQ46
182
M_B_DQ44
192
M_B_DQ45
194
+3VS
GND
12
C1503
C1503
0.1UF/16V
0.1UF/16V
12
C1504
C1504
2.2UF/6.3V
2.2UF/6.3V
c0603
c0603
VTT_REF
GND
12
C1505
C1505
0.1UF/16V
0.1UF/16V
+1.8V
CON151B
CON151B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
203
NP_NC1
204
NP_NC2
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DDR2_DIMM_200P_2
DDR2_DIMM_200P_2
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
GNDGND
Layout Note: Place these Caps near SO DIMM 1
+1.8V
+1.8V
C1518
C1518
0.1UF/10V
0.1UF/10V
c0402
c0402
@
@
C1520
C1520
0.1UF/10V
0.1UF/10V
c0402
c0402
@
@
GND
12
R1502
R1502
1KOHM
1KOHM
r0603
r0603
@
@
12
R1501
R1501
1KOHM
1KOHM
r0603
r0603
@
@
12
A A
5
12
+0.9V
L1502
L1502
2 1
120Ohm/100Mhz
120Ohm/100Mhz
L1503
L1503
2 1
120Ohm/100Mhz
120Ohm/100Mhz
@
@
VTT_REF
C1512
C1512
10UF/6.3V
10UF/6.3V
GND
4
3
12
+1.8V
C1506
C1506
0.1UF/16V
0.1UF/16V
12
C1513
C1513
1UF/10V
1UF/10V
c0603
c0603
12
12
C1514
C1514
1UF/10V
1UF/10V
c0603
c0603
C1507
C1507
0.1UF/16V
0.1UF/16V
12
C1515
C1515
1UF/10V
1UF/10V
c0603
c0603
12
C1508
C1508
0.1UF/16V
0.1UF/16V
12
C1516
C1516
1UF/10V
1UF/10V
c0603
c0603
2
GND
GND
12
C1509
C1509
0.1UF/16V
0.1UF/16V
12
C1517
C1517
1UF/10V
1UF/10V
c0603
c0603
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
F9J
F9J
F9J
Engineer:
1
DDR2 SO-DIMM_1
DDR2 SO-DIMM_1
DDR2 SO-DIMM_1
15 63Thursday, November 23, 2006
15 63Thursday, November 23, 2006
15 63Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
D D
C C
B B
GND
GND
GND
GND
GND
GND
GND
4
1 2
0.1UF
0.1UF
3 4
0.1UF
0.1UF
5 6
0.1UF
0.1UF
7 8
0.1UF
0.1UF
1 2
0.1UF
0.1UF
3 4
0.1UF
0.1UF
5 6
0.1UF
0.1UF
7 8
0.1UF
0.1UF
1 2
0.1UF
0.1UF
3 4
0.1UF
0.1UF
5 6
0.1UF
0.1UF
7 8
0.1UF
0.1UF
1 2
0.1UF
0.1UF
3 4
0.1UF
0.1UF
5 6
0.1UF
0.1UF
7 8
0.1UF
0.1UF
1 2
1 2
1 2
0.1UF
0.1UF
3 4
0.1UF
0.1UF
5 6
0.1UF
0.1UF
7 8
0.1UF
0.1UF
1 2
0.1UF
0.1UF
3 4
0.1UF
0.1UF
5 6
0.1UF
0.1UF
7 8
0.1UF
0.1UF
CN1601A
CN1601A
CN1601B
CN1601B
CN1601C
CN1601C
CN1601D
CN1601D
CN1602A
CN1602A
CN1602B
CN1602B
CN1602C
CN1602C
CN1602D
CN1602D
CN1603A
CN1603A
CN1603B
CN1603B
CN1603C
CN1603C
CN1603D
CN1603D
CN1604A
CN1604A
CN1604B
CN1604B
CN1604C
CN1604C
CN1604D
CN1604D
C16010.1UF/10V C16010.1UF/10V
C16020.1UF/10V C16020.1UF/10V
CN1605A
CN1605A
CN1605B
CN1605B
CN1605C
CN1605C
CN1605D
CN1605D
CN1606A
CN1606A
CN1606B
CN1606B
CN1606C
CN1606C
CN1606D
CN1606D
+0.9VS
R1601 56R1601 56
R1602 56R1602 56
1 16
56
2 15
56
3 14
56
4 13
56
5 12
56
6 11
56
7 10
56
8 9
56
1 16
56
2 15
56
3 14
56
4 13
56
5 12
56
6 11
56
7 10
56
8 9
56
1 16
56
2 15
56
3 14
56
4 13
56
5 12
56
6 11
56
7 10
56
8 9
56
1 2
56Ohm
56Ohm
3 4
56Ohm
56Ohm
5 6
56Ohm
56Ohm
7 8
56Ohm
56Ohm
1 16
56
2 15
56
3 14
56
4 13
56
5 12
56
6 11
56
7 10
56
8 9
56
1 16
56
2 15
56
3 14
56
4 13
56
5 12
56
6 11
56
7 10
56
8 9
56
1 16
56
2 15
56
3 14
56
4 13
56
5 12
56
6 11
56
7 10
56
8 9
56
3
RN1603A
RN1603A
RN1603B
RN1603B
RN1603C
RN1603C
RN1603D
RN1603D
RN1602A56RN1602A
RN1602B56RN1602B
RN1602C56RN1602C
RN1602D56RN1602D
RN1602E56RN1602E
RN1602F56RN1602F
RN1602G56RN1602G
RN1602H56RN1602H
RN1604A56RN1604A
RN1604B56RN1604B
RN1604C56RN1604C
RN1604D56RN1604D
RN1604E56RN1604E
RN1604F56RN1604F
RN1604G56RN1604G
RN1604H56RN1604H
RN1607A56RN1607A
RN1607B56RN1607B
RN1607C56RN1607C
RN1607D56RN1607D
RN1607E56RN1607E
RN1607F56RN1607F
RN1607G56RN1607G
RN1607H56RN1607H
RN1605A56RN1605A
RN1605B56RN1605B
RN1605C56RN1605C
RN1605D56RN1605D
RN1605E56RN1605E
RN1605F56RN1605F
RN1605G56RN1605G
RN1605H56RN1605H
RN1606A56RN1606A
RN1606B56RN1606B
RN1606C56RN1606C
RN1606D56RN1606D
RN1606E56RN1606E
RN1606F56RN1606F
RN1606G56RN1606G
RN1606H56RN1606H
RN1601A56RN1601A
RN1601B56RN1601B
RN1601C56RN1601C
RN1601D56RN1601D
RN1601E56RN1601E
RN1601F56RN1601F
RN1601G56RN1601G
RN1601H56RN1601H
M_CKE0 9,14
M_CKE1 9,14
M_A_A4 10,14
M_A_A8 10,14
M_A_A9 10,14
M_A_A11 10,14
M_A_A7 10,14
M_A_A6 10,14
M_A_BS#2 10,14
M_A_A12 10,14
M_CS#0 9,14
M_ODT0 9,14
M_CS#1 9,14
M_ODT1 9,14
M_A_A13 10,14
M_A_CAS# 10,14
M_A_RAS# 10,14
M_A_WE# 10,14
M_A_BS#1 10,14
M_A_BS#0 10,14
M_A_A10 10,14
M_A_A1 10,14
M_A_A0 10,14
M_A_A2 10,14
M_A_A3 10,14
M_A_A5 10,14
M_CS#3 9,15
M_ODT3 9,15
M_ODT2 9,15
M_CS#2 9,15
M_B_A0 10,15
M_B_A10 10,15
M_B_BS#0 10,15
M_B_WE# 10,15
M_B_BS#1 10,15
M_B_RAS# 10,15
M_B_CAS# 10,15
M_B_A13 10,15
M_B_A6 10,15
M_B_A4 10,15
M_B_A2 10,15
M_B_A9 10,15
M_B_A8 10,15
M_B_A5 10,15
M_B_A3 10,15
M_B_A1 10,15
M_CKE3 9,15
M_CKE2 9,15
M_B_A12 10,15
M_B_A11 10,15
M_B_BS#2 10,15
M_B_A7 10,15
2
1
A A
5
Layout note: Place array cap close to each pullup resistors terminated to +0.9VS
4
3
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
DDR2 TERMINATION
DDR2 TERMINATION
DDR2 TERMINATION
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2
F9J
F9J
F9J
Engineer:
1
Rev
Rev
Rev
2.0
2.0
16 63Thursday, November 23, 2006
16 63Thursday, November 23, 2006
16 63Thursday, November 23, 2006
2.0
of
of
of
5
4
3
2
1
LCD Backlight Control
12
C1702
C1702
0.1UF/16V
0.1UF/16V
c0402
c0402
80Ohm/100Mhz
80Ohm/100Mhz
D1704
D1704
3
BAT54C
BAT54C
L1701
L1701
21
+3VS
12
C1703
C1703
0.01UF/16V
0.01UF/16V
GND
12
C1705
C1705
10UF/10V
10UF/10V
GND
2
1
Cable Requirement:
Impedence: 100 ohm +/- 10%
Length Mismatch <= 10 mils
Twisted Pair(Not Ribbon)
Maximum Length <= 16"
+3VS_LCD
12
C1706
C1706
0.1UF/16V
0.1UF/16V
c0402
c0805
c0805
c0402
12
R1705
R1705
100Ohm
100Ohm
LVDS_LCLKP43
LVDS_LCLKN43
LVDS_L2P43
LVDS_L2N43
LVDS_L1P43
LVDS_L1N43
LVDS_L0P43
EDID_DAT43
EDID_CLK43
LVDS_L0N43
D D
+3VSUS
R1701
R1701
100KOhm
100KOhm
r0402
r0402
1 2
61
L_VDD_EN43
C C
2
Q1701A
Q1701A
UM6K1N
UM6K1N
GND
LCD Power
+12VS
R1703
R1703
100KOhm
100KOhm
1 2
34
5
Q1701B
Q1701B
UM6K1N
UM6K1N
GND
GND
12
C1701
C1701
0.1UF/25V
0.1UF/25V
Q1702
Q1702
1
2
3
G
G
SI3456BDV
SI3456BDV
6
D
D
5
S
S
4
GND
+3VSLCD
12
C1704
C1704
0.1UF/16V
0.1UF/16V
c0402
c0402
GND GND
+5V
12
C1708
C1708
100PF/50V
100PF/50V
@
@
GND GND
R2.0--Item12
F1701
F1701
500mA/24V
500mA/24V
1 2
12
C1709
C1709
100PF/50V
100PF/50V
@
@
GND
2 1
80Ohm/100Mhz
80Ohm/100Mhz
L1704
L1704
12
30
30
28
28
26
26
24
24
22
22
20
20
18
18
16
16
14
14
12
12
10
10
8
8
6
6
4
4
2
2
C1713
C1713
10UF/10V
10UF/10V
@
@
CON175
CON175
WTOB_CON_30P
WTOB_CON_30P
32
SIDE2
SIDE1
31
29
27
25
23
21
19
17
15
13
11
GND
9
7
5
3
1
12
C1710
C1710
0.1UF/16V
0.1UF/16V
c0402
c0402
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
L1702
L1702
80Ohm/100Mhz
80Ohm/100Mhz
USBP1+
USBP1-
R1710 0OhmR1710 0Ohm
GND
+3VA_CON
BL_EN_CON
BL_DA_CON
LID_EC#_CON
+VIN_INV
12
C1711
C1711
1UF/25V
1UF/25V
+3VS_LCD
12
C1707
C1707
0.1UF/16V
GND
2 1
1KOhm/100Mhz
1KOhm/100Mhz
L1703
L1703
21
80Ohm/100Mhz
80Ohm/100Mhz
0.1UF/16V
c0402
c0402
AC_BAT_SYS
+3VA
+3VS
21
L1708
L1708
2A
12
GND
Use F3JA's
+3VS
R1.1--Item2
12
R1707
R1707
100KOhm
CCD connecter
PLT_RST#_BUF21,25,26,33 LID_EC#34
B B
L_BKLTEN_V43
LCD_BACKOFF#34
From EC
LID#
1
2
1
2
D1702
D1702
RB717F
RB717F
D1703
D1703
RB717F
RB717F
100KOhm
r0402
r0402
3
BL_EN BL_EN_CON
3
To EC Lid Switch
INVTER_DA34
1 2
D1701 1N4148WD1701 1N4148W
From EC brightness control
BIOS
BACK_OFF#:When user push "Fn+F7"
button, BIOS active this pin to
turn off back light.
inverter
L17051KOhm/100Mhz L17051KOhm/100Mhz
L17061KOhm/100Mhz L17061KOhm/100Mhz
L17071KOhm/100Mhz L17071KOhm/100Mhz
21
21
21
LID_EC#_CONLID_EC# LID#
BL_DA_CON
12
100PF/50V
100PF/50V
GND
C1712
C1712
@
@
23
L1709
L1709
90Ohm/100Mhz
90Ohm/100Mhz
@
@
RN1701A
RN1701A
RN1701B
RN1701B
FOR EMI
USBP1+
USBP1-
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
LVDS & INVERTER
LVDS & INVERTER
LVDS & INVERTER
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
4
3
2
F9J
F9J
F9J
Engineer:
1
Rev
Rev
Rev
2.0
2.0
17 63Thursday, November 23, 2006
17 63Thursday, November 23, 2006
17 63Thursday, November 23, 2006
2.0
of
of
of
USB_PP121
USB_PN121
A A
5
Co-layout
14
1 2
0OHM
0OHM
3 4
0OHM
0OHM
A
B
C
D
E
R2.0--Item8
L1811
12
12
12
C1831
C1831
22PF/25V
22PF/25V
c0402
c0402
C1833
C1833
22PF/25V
22PF/25V
c0402
c0402
C1835
C1835
22PF/25V
22PF/25V
c0402
c0402
L1811
21
OE#
A
GND3Y
OE#
A
GND3Y
2PF/50V
2PF/50V
21
2PF/50V
2PF/50V
21
2PF/50V
2PF/50V
VCC
VCC
C1832
C1832
c0402
c0402
C1834
C1834
C1836
C1836
c0402
c0402
12
12
c0402
c0402
GND
12
5
4
5
4
BLUE_CON
+3VS
R1818
R1818
0Ohm
0Ohm
1 2
VSYNC_CRT
HSYNC_CRT HSYNC
R1817 33OhmR1817 33Ohm
R1816 33OhmR1816 33Ohm
CON181
CON181
GND
1 2
6
1
7
2
8
3
9
4
10
5
RED_CON
GREEN_CON DDC2BD
1 2
R2.0--Item4
1617
11
12
13
14
15
D_SUB_15P3R
D_SUB_15P3R
C1838
C1838
22PF/25V
22PF/25V
c0402
c0402
1 2
GND
C1837
C1837
22PF/25V
22PF/25V
c0402
c0402
1 2
GND
HSYNC
VSYNC
DDC2BC
VSYNC
0.082uH
0.082uH
L1812
L1812
0.082uH
0.082uH
L1813
L1813
0.082uH
0.082uH
U1803
U1803
1
2
74LVC1G125GV
74LVC1G125GV
GND
U1804
U1804
1
2
74LVC1G125GV
74LVC1G125GV
GND
JP1801
+3VS
D1801 BAV99D1801 BAV99
1
2
+3VS
1
2
1
2
1
2
1
2
GND
1 2
1 1
2 2
RN1801A
RN1801A
4.7KOHM
4.7KOHM
3 3
CRT_DDC_DATA43
CRT_DDC_CLK43
D1802 BAV99D1802 BAV99
D1803 BAV99D1803 BAV99
D1804 BAV99D1804 BAV99
D1805 BAV99D1805 BAV99
RN1801B
RN1801B
4.7KOHM
4.7KOHM
3 4
CRT_RED
3
CRT_GREEN
3
CRT_BLUE
3
HSYNC_CRT
3
VSYNC_CRT
3
+5VS
+3VS
2
D1806
D1806
1 2
1N4148W
1N4148W
RN1801C
RN1801C
4.7KOHM
4.7KOHM
61
Q1801A
Q1801A
UM6K1N
UM6K1N
5 6
5
+5VS_CRT
RN1801D
RN1801D
4.7KOHM
4.7KOHM
7 8
34
CRT_GREEN43
Q1801B
Q1801B
UM6K1N
UM6K1N
CRT_RED43
CRT_BLUE43
DDC2BD_CRT
DDC2BC_CRT
JP1801
1 2
SHORT_PIN
SHORT_PIN
@
@
JP1802
JP1802
1 2
SHORT_PIN
SHORT_PIN
@
@
JP1803
JP1803
1 2
SHORT_PIN
SHORT_PIN
@
@
CRT_VSYNC43
CRT_HSYNC43
R2.0--Item10
L1806
L1806
120Ohm/100Mhz
120Ohm/100Mhz
21
21
L1807
L1807
120Ohm/100Mhz
120Ohm/100Mhz
RED
R1813
R1813
150Ohm
150Ohm
1%
1%
1 2
GND GND GND
GREEN
R1814
R1814
150Ohm
150Ohm
1%
1%
1 2
BLUE
DDC2BD
DDC2BC
GND
GND
R1815
R1815
150Ohm
150Ohm
1%
1%
1 2
GND GND GND
R2.0--Item3
C4702
C4702
22PF/50V
22PF/50V
12
L1815
L1815
1 2
1 2
1 2
TV_C
R1821
R1821
150Ohm
150Ohm
1%
1%
TV_Y
R1819
R1819
150Ohm
150Ohm
1%
1%
TV_CVBS
R1820
R1820
150Ohm
150Ohm
1%
1%
C
12
12
12
TV_C43
4 4
TV_Y43
+3VS
D1809 BAV99D1809 BAV99
1
TV_C
3
2
D1808 BAV99D1808 BAV99
1
TV_Y
3
GND
2
D1807 BAV99D1807 BAV99
1
2
TV_CVBS
3
B
TV_CVBS43
5 5
A
1.8UH
1.8UH
C1840
C1840
270PF/50V
270PF/50V
C4703
C4703
L1814
L1814
1.8UH
1.8UH
C1842
C1842
270PF/50V
270PF/50V
C4704
C4704
L1816
L1816
1.8UH
1.8UH
C1843
C1843
270PF/50V
270PF/50V
12
12
21
GND
22PF/50V
22PF/50V
21
GND
22PF/50V
22PF/50V
21
GND
12
12
12
C1839
C1839
330PF/50V
330PF/50V
C1841
C1841
330PF/50V
330PF/50V
C1844
C1844
330PF/50V
330PF/50V
C_CON
Y_CON
CVBS_CON
R1.1--Item1
P/N:12G14101107K
CON182
CON182
MINI_DIN_7P
MINI_DIN_7P
3
GND1
1
GND0
5
NC
6
C
4
Y
7
CVBS2
2
CVBS1
D
8
HC1
HC2
9
GND
TV
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
F9J
F9J
F9J
Engineer:
E
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
CRT & TV OUT
CRT & TV OUT
CRT & TV OUT
18 63Thursday, November 23, 2006
18 63Thursday, November 23, 2006
18 63Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0
5
4
3
2
1
Request of CSC for CMOS
clear function
12
C1901 15PF/50VC1901 15PF/50V
D D
C1903 15PF/50VC1903 15PF/50V
GND
T1912T1912
+VCC_RTC
C C
B B
A A
ACZ_BCLK26
ACZ_SYNC26
ACZ_RST#26
ACZ_SDOUT26
5
R1926 0OhmR1926 0Ohm
R1928 0OhmR1928 0Ohm
R1925 0OhmR1925 0Ohm
R1927 0OhmR1927 0Ohm
R1904 20KR1904 20K
RTCRST# RC
delay should be
18ms~25ms
ACZ_BCLK_ICH
ACZ_SYNC_ICH
ACZ_RST#_ICH
ACZ_SDOUT_ICH
GND
C1904
C1904
1UF/X7R
1UF/X7R
12
3
2
12
JRST1
JRST1
RTC_RST#
RTC_RST#
1 4
+VCC_RTC
ACZ_SDIN0_AUD26
ACZ_SDIN1_MDC26
SATA_ICH_RXN023
SATA_ICH_RXP023
CLK_SATA_ICH#7
CLK_SATA_ICH7
IDE_PDDACK#23
IDE_PDDREQ23
4
X1901
X1901
32.768Khz
32.768Khz
SATA_LED#39
IDE_PDIOR#23
IDE_PDIOW#23
INT_IRQ1423
IDE_PIORDY23
12
R1901
R1901
10MOhm
10MOhm
R1903
R1903
0Ohm
0Ohm
1 2
R1905 1MR1905 1M
R1906 330KR1906 330K
T1901T1901
GND
Int.PD
Int.PD
Int.PD
R1923 0OhmR1923 0Ohm
GND
R1924 24.9Ohm
R1924 24.9Ohm
GND
RTC_X1
RTC_X2
R1907
R1907
@
@
1K
1K
ACZ_BCLK_ICH
ACZ_SYNC_ICH
ACZ_RST#_ICH
ACZ_SDOUT_ICH
Int.PU
SATA_ICH_RXN0
SATA_ICH_RXP0
SATA_ICH_TXP0
T1908T1908
T1909T1909
12
1%
1%
INT_IRQ14
Int.PD
SATA_ICH_TXP0
SATA_ICH_TXN0
U1901A ICH7M
U1901A ICH7M
AB1
RTCX1
AB2
RTCX2
AA3
Int.PD
Int.PU
Int.PU
Int.PD
Int.PU
Int.PU
Int.PU
Int.PD
Int.PD
Int.PD
AF18
AG2
AH2
AG6
AH6
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
AF3
AE3
AF7
AE7
AF1
AE1
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BCLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
Differential
Pair
C1905
C1905
C1906
C1906
3900P
3900P
3900P
3900P
RTC
RTC
LAN
LAN
AC-97/AZALIASATA
AC-97/AZALIASATA
IDE
IDE
SATA_HDD_RXP0
SATA_HDD_RXN0
CPU LPC
CPU LPC
GPIO49/CPUPWRGD
3
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDRQ1#/GPIO23
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
SMI#
STPCLK#
THERMTRIP#
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
SATA_HDD_RXP0 23
SATA_HDD_RXN0 23
NMI
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DA0
DA1
DA2
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
AG27
AF24
AH25
AG26
AG24
AG22
AG21
AF22
AF25
AG23
AH24
AF23
AH22
AF26
AB15
AE14
AG13
AF13
AD14
AC13
AD12
AC12
AE12
AF12
AB13
AC14
AF14
AH13
AH14
AC15
AH17
AE17
AF17
AE16
AD16
Int.PU
Int.PU
Int.PU
Int.PU
Int.PU
Int.PU
R1908 0Ohm@R1908 0Ohm@
R1910 0OhmR1910 0Ohm
FWH_INIT#
Int.PD
+RTCBAT
T1910T1910
BAT191BAT191
12
34
GND
LPC_AD0 25,33,34,35
LPC_AD1 25,33,34,35
LPC_AD2 25,33,34,35
LPC_AD3 25,33,34,35
T1902T1902
T1903T1903
LPC_FRAME# 25,33,34,35
A20GATE 34
H_A20M# 4
H_CPUSLP# 4,8
H_DPRSTP# 4,50
H_DPSLP# 4
T1904T1904
H_PWRGD 4
T1905T1905
H_IGNNE# 4
H_INIT# 4
H_INTR 4
RCIN# 34
H_NMI 4
H_SMI# 4
T1907T1907
IDE_PDD0
IDE_PDD1
IDE_PDD2SATA_ICH_TXN0
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15
H_STPCLK# 4
1%
1%
IDE_PDA0 23
IDE_PDA1 23
IDE_PDA2 23
IDE_PDCS1# 23
IDE_PDCS3# 23
R1919 24.9
R1919 24.9
+3VA
R1902 1KR1902 1K
Socket P/N:12G17100002C
Battary P/N:07G016412032
IDE_PDD[15:0] 23
2
T1911T1911
+VCCP_ICH
R190956R1909
56
T1906T1906
+VCCP_ICH
R191756R1917
56
1
2
D1901
D1901
BAT54C
BAT54C
3
H_FERR# 4
ICH_THRMTRIP# 6
+VCC_RTC
C1902
C1902
1UF/X7R
1UF/X7R
GND
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
F9J
F9J
F9J
Engineer:
1
ICH7M (1)
ICH7M (1)
ICH7M (1)
19 63Thursday, November 23, 2006
19 63Thursday, November 23, 2006
19 63Thursday, November 23, 2006
of
of
of
Rev
Rev
Rev
2.0
2.0
2.0