Asus F83T Schematics

5
4
3
2
1
AMD CPU
BLOCK DIAGRAM
D D
Conesus
18W
Page 3 ~ 6
DDR2 667
HT LINK
800MHZ
LVDS
CRT
HDMI
C C
MINICARD
Page 53
Page 45
Page 46
Page 48
M92
PCI-E X16(8)
AMD RS780MN
PCI-E
Page 10 ~ 18
PCIE X4
LPC
RTL8111C
Page 33 ~ 34
AMD SB710
NEWCARD
Page 43
SATA USB
SATA HDD
B B
Page 51
SATA ODD
Page 51
USB 2.0 X4
Page 52
USB CCD
Page 45
Page 20 ~ 28
AZALIA
Card Reader AU6371
Dual Channel DDR2
SO-DIMM X 2
Page 7 ~ 9
EC ITE8512 SPI ROM
KB/TOUCH PAD
Debug Conn.
TPM 1.2
Codec ALC663
MDC Header
Page 40
LED
Page 30 ~ 31
Amp
FAN + SENSOR
FAN + SENSOR
Discharge
Page 30
Page 30
Page 44
Page 62
Page 36
Page 30
Page 35
Page 29
Page 50
Page 50
Page 30
HP/MIC/LINE IN
Page 30
4
BT Module
Page 61
4 in 1 Card Reader
3
Page 40
Title :
Title :
Title :
Block Diagram
Block Diagram
Block Diagram
Ice_wang
Ice_wang
ASUSTeK Computer INC
ASUSTeK Computer INC
ASUSTeK Computer INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
F83T
F83T
F83T
Ice_wang
191Tuesday, May 26, 2009
191Tuesday, May 26, 2009
191Tuesday, May 26, 2009
1
Rev
Rev
Rev
1.0
1.0
1.0
of
of
of
A A
5
5
4
3
2
1
Reset IC
AC mode: VSUS_ON assert after EC_RST# BAT Mode: VSUS_ON assert after Press button
D D
1
AC_BAT_SYS
C C
SUS_PWRGD
+2.5_CPU_VDDA
B B
+1.1V_NB
+CPU_VDD0
+1.2VSUS
+0.9V +1.8V
+3V +5V +12V
+1.5VS +1.8VS
+3VS +5VS +12VS
+3VA +5VA
+3VSUS
+3VA_EC
3
VSUS_ON
4
SUS_PWRGD
8'
SUSC_EC#
ALL_SYSTEM_PWRGD
10
SUSB_EC#
9'
11
CPU_VRON
EC
KBRST#
RC_IN#
EC_RST#
8
PM_SUSC#
9
PM_SUSB#
15
PWR_SW#
2
EC
5
SLP_S5#
SLP_S3#
KBRST#
7
PM_RSMRST#
(South Bridge)
PM_PWRBTN#
SB710
+CPU_VDD1
+VCC_NB
+1.2V_CPU_NB_SB
+CPU_VDDNB
VRM_PWRGD
12
PM_PWROK_EC
13
PWR_GOOD
NB_PWRGD
6
18
A_RST#
LDT_PG
LDT_RST#
Power On
SWITCH
17
19
16
18
14
CPU_PWRGD
CPU_LDT_RST#
CPU_LDT_STOP#
A_RST#
NB_PWRGD
PWROK
RESET_L
AMD Conesus CPU
LDTSTOP_L
LDTSTOP#LDT_STP#
RS780MN
SYSRESET#A_RST#
(North Bridge)
POWERGOOD
A A
5
10
+3VS POWER-UP
CLK GEN
VDDxxx
Title :
Title :
Title :
Power sequence
Power sequence
Power sequence
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
F83T
F83T
F83T
Engineer:
1
<OrgAddr1>
291Tuesday, May 26, 2009
291Tuesday, May 26, 2009
291Tuesday, May 26, 2009
of
of
of
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
HT_CPU_RXD[0..15][10]
HT_CPU_RXD#[0..15][10]
CPU_VLDT
U0301A
D D
HT_CPU_RXD15 HT_CPU_RXD#15 HT_CPU_RXD14 HT_CPU_RXD#14 HT_CPU_RXD13 HT_CPU_RXD#13 HT_CPU_RXD12 HT_CPU_RXD#12 HT_CPU_RXD11 HT_CPU_RXD#11 HT_CPU_RXD10 HT_CPU_RXD#10 HT_CPU_RXD9 HT_CPU_RXD#9 HT_CPU_RXD8 HT_CPU_RXD#8 HT_CPU_RXD7 HT_CPU_RXD#7 HT_CPU_RXD6 HT_CPU_RXD#6 HT_CPU_RXD5 HT_CPU_RXD#5 HT_CPU_RXD4 HT_CPU_RXD#4 HT_CPU_RXD3
C C
HT_CPU_RX_CLK1[10] HT_CPU_RX_CLK#1[10]
HT_CPU_RX_CLK0[10] HT_CPU_RX_CLK#0[10]
HT_CPU_RX_CTL1[10] HT_CPU_RX_CTL#1[10]
HT_CPU_RX_CTL0[10] HT_CPU_RX_CTL#0[10]
HT_CPU_RXD#3 HT_CPU_RXD2 HT_CPU_RXD#2 HT_CPU_RXD1 HT_CPU_RXD#1 HT_CPU_RXD0 HT_CPU_RXD#0
HT_CPU_RX_CLK1 HT_CPU_RX_CLK#1
HT_CPU_RX_CLK0 HT_CPU_RX_CLK#0
HT_CPU_RX_CTL1 HT_CPU_RX_CTL#1
HT_CPU_RX_CTL0 HT_CPU_RX_CTL#0
U0301A
AL4
VLDT_B1
AL3
VLDT_B2
AL2
VLDT_B3
AL1
VLDT_B4
Y6
L0_CADIN_H[15]
Y5
L0_CADIN_L[15]
W7
L0_CADIN_H[14]
W6
L0_CADIN_L[14]
U6
L0_CADIN_H[13]
U5
L0_CADIN_L[13]
R7
L0_CADIN_H[12]
R6
L0_CADIN_L[12]
M8
L0_CADIN_H[11]
M7
L0_CADIN_L[11]
L6
L0_CADIN_H[10]
L5
L0_CADIN_L[10]
J6
L0_CADIN_H[9]
J5
L0_CADIN_L[9]
H4
L0_CADIN_H[8]
H3
L0_CADIN_L[8]
T3
L0_CADIN_H[7]
T4
L0_CADIN_L[7]
T2
L0_CADIN_H[6]
T1
L0_CADIN_L[6]
P3
L0_CADIN_H[5]
P4
L0_CADIN_L[5]
P2
L0_CADIN_H[4]
P1
L0_CADIN_L[4]
M2
L0_CADIN_H[3]
M1
L0_CADIN_L[3]
K3
L0_CADIN_H[2]
K4
L0_CADIN_L[2]
K2
L0_CADIN_H[1]
K1
L0_CADIN_L[1]
H2
L0_CADIN_H[0]
H1
L0_CADIN_L[0]
P6
L0_CLKIN_H[1]
P5
L0_CLKIN_L[1]
M3
L0_CLKIN_H[0]
M4
L0_CLKIN_L[0]
P8
L0_CTLIN_H[1]
P9
L0_CTLIN_L[1]
V2
L0_CTLIN_H[0]
V1
L0_CTLIN_L[0]
AMGMV40OAX4DX
AMGMV40OAX4DX
VLDT_A1 VLDT_A2 VLDT_A3 VLDT_A4
L0_CADOUT_H[15]
L0_CADOUT_L[15]
L0_CADOUT_H[14]
L0_CADOUT_L[14]
L0_CADOUT_H[13]
L0_CADOUT_L[13]
L0_CADOUT_H[12]
L0_CADOUT_L[12]
L0_CADOUT_H[11]
L0_CADOUT_L[11]
L0_CADOUT_H[10]
L0_CADOUT_L[10]
L0_CADOUT_H[9] L0_CADOUT_L[9] L0_CADOUT_H[8] L0_CADOUT_L[8] L0_CADOUT_H[7] L0_CADOUT_L[7] L0_CADOUT_H[6] L0_CADOUT_L[6] L0_CADOUT_H[5] L0_CADOUT_L[5] L0_CADOUT_H[4] L0_CADOUT_L[4] L0_CADOUT_H[3] L0_CADOUT_L[3] L0_CADOUT_H[2] L0_CADOUT_L[2] L0_CADOUT_H[1] L0_CADOUT_L[1] L0_CADOUT_H[0] L0_CADOUT_L[0]
L0_CLKOUT_H[1]
L0_CLKOUT_L[1]
L0_CLKOUT_H[0]
L0_CLKOUT_L[0] L0_CTLOUT_H[1]
L0_CTLOUT_L[1] L0_CTLOUT_H[0]
L0_CTLOUT_L[0]
F4 F3 F2 F1
1 2
HT_CPU_TXD15
Y9
HT_CPU_TXD#15
Y8
HT_CPU_TXD14
AB6
HT_CPU_TXD#14
AB5
HT_CPU_TXD13
AC7
HT_CPU_TXD#13
AC6
HT_CPU_TXD12
AE6
HT_CPU_TXD#12
AE5
HT_CPU_TXD11
AE9
HT_CPU_TXD#11
AE8
HT_CPU_TXD10
AH3
HT_CPU_TXD#10
AH4
HT_CPU_TXD9
AK3
HT_CPU_TXD#9
AK4
HT_CPU_TXD8
AK1
HT_CPU_TXD#8
AK2
HT_CPU_TXD7
Y1
HT_CPU_TXD#7
Y2
HT_CPU_TXD6
Y4
HT_CPU_TXD#6
Y3
HT_CPU_TXD5
AB1
HT_CPU_TXD#5
AB2
HT_CPU_TXD4
AB4
HT_CPU_TXD#4
AB3
HT_CPU_TXD3
AD4
HT_CPU_TXD#3
AD3
HT_CPU_TXD2
AF1
HT_CPU_TXD#2
AF2
HT_CPU_TXD1
AF4
HT_CPU_TXD#1
AF3
HT_CPU_TXD0
AH1
HT_CPU_TXD#0
AH2
HT_CPU_TX_CLK1
AF6
HT_CPU_TX_CLK#1
AF5
HT_CPU_TX_CLK0
AD1
HT_CPU_TX_CLK#0
AD2
HT_CPU_TX_CTL1
AB8
HT_CPU_TX_CTL#1
AB9
HT_CPU_TX_CTL0
V4
HT_CPU_TX_CTL#0
V3
C0302
C0302
HT_CPU_TXD[0..15] [10]
HT_CPU_TXD#[0..15] [10]
4.7uF/6.3V
4.7uF/6.3V
GND
HT_CPU_TX_CLK1 [10] HT_CPU_TX_CLK#1 [10]
HT_CPU_TX_CLK0 [10] HT_CPU_TX_CLK#0 [10]
HT_CPU_TX_CTL1 [10] HT_CPU_TX_CTL#1 [10]
HT_CPU_TX_CTL0 [10] HT_CPU_TX_CTL#0 [10]
DESIGN NOTE: VLDT must be routed as a pour or a trace at least 200 mils wide. VLDT may be routed from the source to either ALx balls or Fx balls. Choose whichever makes routing simpler.
B B
A A
5
These six capacitors must be placed very near the selected balls. The "other" set of balls must be decoupled with a 4.7uF cap.
4
+1.2V_CPU_NB_SB
C0303
C0303
4.7uF/6.3V
4.7uF/6.3V
21
L0301
L0301 30Ohm/100Mhz
30Ohm/100Mhz
Irat=1A
Irat=1A
12
Change L0301 to Irat=1A 090407
CPU_VLDT
12
C0304
C0304
4.7uF/6.3V
4.7uF/6.3V
C0305
C0305
0.22UF/6.3V
0.22UF/6.3V
12
@
@
MLCC 180PF/50V (0402) NPO 5%
MLCC 180PF/50V (0402) NPO 5%
12
C0306
C0306
0.22UF/6.3V
0.22UF/6.3V
12
@
@
C0307
C0307 180PF/50V
180PF/50V
3
12
C0308
C0308 180PF/50V
180PF/50V
MLCC 180PF/50V (0402) NPO 5%
MLCC 180PF/50V (0402) NPO 5%
GND
Title :
Title :
Title :
Conesus HT I/F
Conesus HT I/F
Conesus HT I/F
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
F83T
F83T
F83T
Engineer:
1
<OrgAddr1>
391Friday, May 29, 2009
391Friday, May 29, 2009
391Friday, May 29, 2009
of
of
of
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
MEM_MB_DATA[0..63][8]
U0301C
AN13 AL14 AL16 AN17 AN12 AM12 AM16 AN16 AL18 AN19 AM24 AN24 AM18 AN18 AL22 AN23 AM25 AL26 AN28 AL28 AL24 AN25 AN27 AM28 AM29 AL30 AL32 AL33 AK28 AN29 AM31 AM32
E33 D31 B31 A31 F33 F31 C32 B32 C30 A29 B26 A26 B30 A30 A27 C26 A24 B24 C18 A18 A25 C24 C20 A19 C16 A16 B14 A13 B18 A17 C14 A14
K33
K31 G32 F32
L33 K32 H31 G33
H33
AN15 AN20 AK26 AN31
C33 C28 A20 D14
J33 H32
AM14 AN14 AL20 AM20 AN26 AM26 AN30 AM30
D33 D32 B28 A28 A21 B20 B16 A15
AMGMV40OAX4DX
AMGMV40OAX4DX
U0301C
MB_DATA[63] MB_DATA[62] MB_DATA[61] MB_DATA[60] MB_DATA[59] MB_DATA[58] MB_DATA[57] MB_DATA[56] MB_DATA[55] MB_DATA[54] MB_DATA[53] MB_DATA[52] MB_DATA[51] MB_DATA[50] MB_DATA[49] MB_DATA[48] MB_DATA[47] MB_DATA[46] MB_DATA[45] MB_DATA[44] MB_DATA[43] MB_DATA[42] MB_DATA[41] MB_DATA[40] MB_DATA[39] MB_DATA[38] MB_DATA[37] MB_DATA[36] MB_DATA[35] MB_DATA[34] MB_DATA[33] MB_DATA[32] MB_DATA[31] MB_DATA[30] MB_DATA[29] MB_DATA[28] MB_DATA[27] MB_DATA[26] MB_DATA[25] MB_DATA[24] MB_DATA[23] MB_DATA[22] MB_DATA[21] MB_DATA[20] MB_DATA[19] MB_DATA[18] MB_DATA[17] MB_DATA[16] MB_DATA[15] MB_DATA[14] MB_DATA[13] MB_DATA[12] MB_DATA[11] MB_DATA[10] MB_DATA[9] MB_DATA[8] MB_DATA[7] MB_DATA[6] MB_DATA[5] MB_DATA[4] MB_DATA[3] MB_DATA[2] MB_DATA[1] MB_DATA[0]
MB_CHECK[7] MB_CHECK[6] MB_CHECK[5] MB_CHECK[4] MB_CHECK[3] MB_CHECK[2] MB_CHECK[1] MB_CHECK[0]
MB_DM[8] MB_DM[7] MB_DM[6] MB_DM[5] MB_DM[4] MB_DM[3] MB_DM[2] MB_DM[1] MB_DM[0]
MB_DQS_H[8] MB_DQS_L[8] MB_DQS_H[7] MB_DQS_L[7] MB_DQS_H[6] MB_DQS_L[6] MB_DQS_H[5] MB_DQS_L[5] MB_DQS_H[4] MB_DQS_L[4] MB_DQS_H[3] MB_DQS_L[3] MB_DQS_H[2] MB_DQS_L[2] MB_DQS_H[1] MB_DQS_L[1] MB_DQS_H[0] MB_DQS_L[0]
MA_DATA[63] MA_DATA[62] MA_DATA[61] MA_DATA[60] MA_DATA[59] MA_DATA[58] MA_DATA[57] MA_DATA[56] MA_DATA[55] MA_DATA[54] MA_DATA[53] MA_DATA[52] MA_DATA[51] MA_DATA[50] MA_DATA[49] MA_DATA[48] MA_DATA[47] MA_DATA[46] MA_DATA[45] MA_DATA[44] MA_DATA[43] MA_DATA[42] MA_DATA[41] MA_DATA[40] MA_DATA[39] MA_DATA[38] MA_DATA[37] MA_DATA[36] MA_DATA[35] MA_DATA[34] MA_DATA[33] MA_DATA[32] MA_DATA[31] MA_DATA[30] MA_DATA[29] MA_DATA[28] MA_DATA[27] MA_DATA[26] MA_DATA[25] MA_DATA[24] MA_DATA[23] MA_DATA[22] MA_DATA[21] MA_DATA[20] MA_DATA[19] MA_DATA[18] MA_DATA[17] MA_DATA[16] MA_DATA[15] MA_DATA[14] MA_DATA[13] MA_DATA[12] MA_DATA[11] MA_DATA[10]
MA_DATA[9] MA_DATA[8] MA_DATA[7] MA_DATA[6] MA_DATA[5] MA_DATA[4] MA_DATA[3] MA_DATA[2] MA_DATA[1] MA_DATA[0]
MA_CHECK[7] MA_CHECK[6] MA_CHECK[5] MA_CHECK[4] MA_CHECK[3] MA_CHECK[2] MA_CHECK[1] MA_CHECK[0]
MA_DQS_H[8]
MA_DQS_L[8]
MA_DQS_H[7]
MA_DQS_L[7]
MA_DQS_H[6]
MA_DQS_L[6]
MA_DQS_H[5]
MA_DQS_L[5]
MA_DQS_H[4]
MA_DQS_L[4]
MA_DQS_H[3]
MA_DQS_L[3]
MA_DQS_H[2]
MA_DQS_L[2]
MA_DQS_H[1]
MA_DQS_L[1]
MA_DQS_H[0]
MA_DQS_L[0]
+0.9V
D D
LAYOUT NOTE: Keep trace to resistors less than 1.5" from CPU pin.
C C
B B
+1.8V
MEM_MA_ADD[0..15][7,9]
R0403
R0403 1KOhm
1KOhm
R0404
R0404 1KOhm
1KOhm
T0409
T0409 TPC28T
TPC28T
R0440
R0440
39.2Ohm
39.2Ohm
1
1 2
1 2
GND
CPU_VTT_SUS_SENSE
R0441
R0441
39.2Ohm
39.2Ohm
MEM_MA0_CS#1[7,9] MEM_MA0_CS#0[7,9]
MEM_MB0_CS#1[8,9] MEM_MB0_CS#0[8,9]
MEM_MB_CKE1[8,9] MEM_MB_CKE0[8,9] MEM_MA_CKE1[7,9] MEM_MA_CKE0[7,9]
MEM_MA_BANK2[7,9] MEM_MA_BANK1[7,9] MEM_MA_BANK0[7,9]
MEM_MA_RAS#[7,9] MEM_MA_CAS#[7,9] MEM_MA_WE#[7,9]
+1.8V
Mount R0405 , Un -Mount U0401 , C0401 , R0406, R0408, R0409 for cost down
change from 15ohm to 1Kohm
1 2
12
C0402
C0402
1 2
1000PF/16V
1000PF/16V
@
@
CPU_M_VREF
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
R0403 & R0404 change to 15ohm 1%
M_ZN M_ZP
U0301B
U0301B
A12
VTT1
B12
VTT2
C12
VTT3
D12
VTT4
AK10
VTT5
AN10
VTT6
AL10
VTT7
AM10
VTT8
B11
VTT9
A11
M_VREF
B10
VTT_SENSE
AG9
M_ZN
AH9
M_ZP
AH29
RSVD1
AE29
RSVD2
AH30
MA0_CS_L[1]
AF29
MA0_CS_L[0]
AK33
RSVD3
AF33
RSVD4
AJ32
MB0_CS_L[1]
AF31
MB0_CS_L[0]
N33
MB_CKE[1]
P32
MB_CKE[0]
M30
MA_CKE[1]
M28
MA_CKE[0]
P30
MA_ADD[15]
M29
MA_ADD[14]
AG28
MA_ADD[13]
P28
MA_ADD[12]
T30
MA_ADD[11]
AC28
MA_ADD[10]
P27
MA_ADD[9]
R26
MA_ADD[8]
R27
MA_ADD[7]
U28
MA_ADD[6]
V30
MA_ADD[5]
U27
MA_ADD[4]
Y30
MA_ADD[3]
AB29
MA_ADD[2]
W29
MA_ADD[1]
AC26
MA_ADD[0]
R29
MA_BANK[2]
AC29
MA_BANK[1]
AE28
MA_BANK[0]
AC27
MA_RAS_L
AF30
MA_CAS_L
AE27
MA_WE_L
AMGMV40OAX4DX
AMGMV40OAX4DX
sensing point for op-amp feedback routed near CPU
MA0_CLK_H[2]
MA0_CLK_L[2]
MA0_CLK_H[1]
MA0_CLK_L[1]
MA0_CLK_H[0]
MA0_CLK_L[0]
MB0_CLK_H[2]
MB0_CLK_L[2]
MB0_CLK_H[1]
MB0_CLK_L[1]
MB0_CLK_H[0]
MB0_CLK_L[0]
12
C0403
C0403
0.1UF/16V
0.1UF/16V
GND
RSVD5 RSVD6 RSVD7 RSVD8 RSVD9
RSVD10
RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16
RSVD17
MB0_ODT[0]
RSVD18
MA0_ODT[0] MB_ADD[15]
MB_ADD[14] MB_ADD[13] MB_ADD[12] MB_ADD[11] MB_ADD[10]
MB_ADD[9] MB_ADD[8] MB_ADD[7] MB_ADD[6] MB_ADD[5] MB_ADD[4] MB_ADD[3] MB_ADD[2] MB_ADD[1] MB_ADD[0]
MB_BANK[2] MB_BANK[1] MB_BANK[0]
MB_RAS_L MB_CAS_L
MB_WE_L
12
@
@
AH17 AG17 E20 E19 AB27 AB26
MEM_MA0_CLK2_P
AK18
MEM_MA0_CLK2_N
AJ17
MEM_MA0_CLK1_P
D18
MEM_MA0_CLK1_N
F19 Y28 Y27
AN21 AM21 A22 A23 AB33 AB32
MEM_MB0_CLK2_P
AN22
MEM_MB0_CLK2_N
AM22
MEM_MB0_CLK1_P
C22
MEM_MB0_CLK1_N
B22 AA32 AA33
AH31 AH33 AF27 AG29
MEM_MB_ADD15
P33
MEM_MB_ADD14
P31
MEM_MB_ADD13
AJ33
MEM_MB_ADD12
T32
MEM_MB_ADD11
T31
MEM_MB_ADD10
AD32
MEM_MB_ADD9
T33
MEM_MB_ADD8
V32
MEM_MB_ADD7
U33
MEM_MB_ADD6
V33
MEM_MB_ADD5
V31
MEM_MB_ADD4
W33
MEM_MB_ADD3
Y31
MEM_MB_ADD2
Y33
MEM_MB_ADD1
Y32
MEM_MB_ADD0
AC33 R33
AD33 AE33
AF32 AH32 AG33
CPU_M_VREF
C0404
C0404
1000PF/16V
1000PF/16V
PLACE CLOSE TO CPU
MEM_MA0_CLK2_P [7] MEM_MA0_CLK2_N [7] MEM_MA0_CLK1_P [7] MEM_MA0_CLK1_N [7]
MEM_MB0_CLK2_P [8] MEM_MB0_CLK2_N [8] MEM_MB0_CLK1_P [8] MEM_MB0_CLK1_N [8]
MEM_MB0_ODT1 [8,9] MEM_MB0_ODT0 [8,9] MEM_MA0_ODT1 [7,9] MEM_MA0_ODT0 [7,9]
MEM_MB_BANK2 [8,9] MEM_MB_BANK1 [8,9] MEM_MB_BANK0 [8,9]
MEM_MB_RAS# [8,9] MEM_MB_CAS# [8,9] MEM_MB_WE# [8,9]
MEM_MB_ADD[0..15] [8,9]
congo
平臺省掉了一個
是否要預留另一組
place close to RROCESSOR within 1.5 inch
MEM_MA0_CLK1_P
12
C0410 1.5PF/50V MLCC/+/-0.1PFC0410 1.5PF/50V MLCC/+/-0.1PF
MEM_MA0_CLK1_N
MEM_MB0_CLK2_P
12
C0407 1.5PF/50V MLCC/+/-0.1PFC0407 1.5PF/50V MLCC/+/-0.1PF
MEM_MB0_CLK2_N
ODT
MEM_MA_DQS[0..7][7]
MEM_MA_DQS#[0..7][7]
MEM_MB_DQS[0..7][8]
MEM_MB_DQS#[0..7][8]
C0409 1.5PF/50V MLCC/+/-0.1PFC0409 1.5PF/50V MLCC/+/-0.1PF
C0408 1.5PF/50V MLCC/+/-0.1PFC0408 1.5PF/50V MLCC/+/-0.1PF
MEM_MA0_CLK2_P
12
MEM_MA0_CLK2_N
MEM_MB0_CLK1_P
12
MEM_MB0_CLK1_N
MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57
MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16
MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9
MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
MEM_MB_DQS7 MEM_MB_DQS#7 MEM_MB_DQS6 MEM_MB_DQS#6 MEM_MB_DQS5 MEM_MB_DQS#5 MEM_MB_DQS4 MEM_MB_DQS#4 MEM_MB_DQS3 MEM_MB_DQS#3 MEM_MB_DQS2 MEM_MB_DQS#2 MEM_MB_DQS1 MEM_MB_DQS#1 MEM_MB_DQS0 MEM_MB_DQS#0
MA_DM[8] MA_DM[7] MA_DM[6] MA_DM[5] MA_DM[4] MA_DM[3] MA_DM[2] MA_DM[1] MA_DM[0]
MEM_MA_DATA63
AG11
MEM_MA_DATA62
AH11
MEM_MA_DATA61
AJ12
MEM_MA_DATA60
AJ14
MEM_MA_DATA59
AF11
MEM_MA_DATA58
AF12
MEM_MA_DATA57
AG12
MEM_MA_DATA56
AH12 AK14 AF15 AH19 AK20 AF14 AG14 AF17 AG19
MEM_MA_DATA47
AG20
MEM_MA_DATA46
AJ20
MEM_MA_DATA45
AF22
MEM_MA_DATA44
AK24
MEM_MA_DATA43
AF19
MEM_MA_DATA42
AF20
MEM_MA_DATA41
AJ23
MEM_MA_DATA40
AG23 AF23 AF25 AH27 AK30 AJ25 AG25 AJ26 AJ28
MEM_MA_DATA31
D28
MEM_MA_DATA30
G28
MEM_MA_DATA29
D26
MEM_MA_DATA28
E26
MEM_MA_DATA27
F30
MEM_MA_DATA26
E29
MEM_MA_DATA25
F27
MEM_MA_DATA24
H26 H25 D24 H22 E22 F26 G26 D22 G23
MEM_MA_DATA15
G22
MEM_MA_DATA14
G20
MEM_MA_DATA13
G15
MEM_MA_DATA12
F15
MEM_MA_DATA11
D20
MEM_MA_DATA10
F22
MEM_MA_DATA9
D16
MEM_MA_DATA8
E17 H15 H14 G12 H12 E15 E14 E11 F11
K30 J29 G29 F29 L28 L29 H29 H27
H30
MEM_MA_DM7
AL12
MEM_MA_DM6
AK16
MEM_MA_DM5
AK22
MEM_MA_DM4
AJ27
MEM_MA_DM3
E27
MEM_MA_DM2
E23
MEM_MA_DM1
H19
MEM_MA_DM0
G14 J27
J26
MEM_MA_DQS7
AJ11
MEM_MA_DQS#7
AK12
MEM_MA_DQS6
AG15
MEM_MA_DQS#6
AH15
MEM_MA_DQS5
AH22
MEM_MA_DQS#5
AG22
MEM_MA_DQS4
AG26
MEM_MA_DQS#4
AH26
MEM_MA_DQS3
E28
MEM_MA_DQS#3
F28
MEM_MA_DQS2
E25
MEM_MA_DQS#2
F25
MEM_MA_DQS1
G17
MEM_MA_DQS#1
H17
MEM_MA_DQS0
E12
MEM_MA_DQS#0
F12
MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48
MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32
MEM_MA_DATA23 MEM_MA_DATA22 MEM_MA_DATA21 MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16
MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0
MEM_MA_DATA[0..63] [7]
MEM_MA_DM[0..7] [7]MEM_MB_DM[0..7][8]
A A
Title :
Title :
Title :
Conesus DDR2 MEM I/F
Conesus DDR2 MEM I/F
Conesus DDR2 MEM I/F
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F83T
F83T
F83T
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
491Tuesday, May 26, 2009
491Tuesday, May 26, 2009
491Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
+1.8VS
12
R0501
R0501 300Ohm
D D
CPU_PWRGD[20] CPU_LDT_STOP#[12,20] CPU_LDT_RST#[20]
CPU_LDT_RST#
for warm reset
2
JP0501
JP0501
2
@
@
SGL_JUMP
SGL_JUMP
1
1
GND
C C
PROCHOT
EC to CPU/PWR
CPU_SIC[50] CPU_SID[50]
CPU_PROCHOT#
PWRLIMIT#[30,89]
D0501 RB751V-40
D0501 RB751V-40
THRNTRIP
B B
CPU_THRMTRIP# FORCE_OFF#
+1.8V
@
@
E12
E12
Q0506
Q0506 PMBS3904
PMBS3904
@
@
A A
300Ohm
CPU_SIC CPU_SID
SRC_CPU_HT_CLKP
R0599
R0599
071204
261OHM
261OHM
1 2
SRC_CPU_HT_CLKN
@
@
SRC_CPU_HT_CLKP[29] SRC_CPU_HT_CLKN[29]
3
@
@
E12
E12
Q0505
Q0505 PMBS3904
PMBS3904
1 2
B
B
C
C
12
CPU_PWRGD
12
B
B
BUF_PLT_RST#[20,30,33,40,43,53,71]
R0515
R0515 10KOhm
10KOhm
3
3
D
D
S
S
GND
R0541
R0541 10KOhm
10KOhm
1 2
C0507 0.1UF/16VC0507 0.1UF/16V
C
C
3
3
T0514 TPC28TT0514 TPC28T
+3VS
1 2
@
@
3
2
2
CPU_RESETCPU_LDT_RST#
Debug 預留 090405
12
12
R0503
R0503
R0502
R0502
300Ohm
300Ohm
300Ohm
300Ohm
T0515 TPC28TT0515 TPC28T
C0501
C0501
12
3900PF/50V
3900PF/50V
MLCC/+/-10%
MLCC/+/-10%
3900PF/50V
3900PF/50V
MLCC/+/-10%
MLCC/+/-10%
Q0504
Q0504 2N7002
2N7002
1
1
G
G
R0512
R0512
169Ohm 1%
169Ohm 1%
C0502
C0502
12
SRC_CPU_HT_CLKP SRC_CPU_HT_CLKN
THRO_CPU [30]
From EC.
1 2
NOTICE r0541
2N7002
2N7002
Q0507
Q0507
S
S
2
2
G
G
1
1
1
HDT
R0563
R0563
4.7KOhm
4.7KOhm
If PWROK,RESET_L,LDTSTOP_L are driven by open-drain driver, a 300 ohm pull up to VDDIO.
CPU_PWRGD LDT_STOP#
CPU_LDT_RST#
1
CPU_VLDT
GND
T510 TPC28TT510 TPC28T T511 TPC28TT511 TPC28T
T512 TPC28TT512 TPC28T T513 TPC28TT513 TPC28T
D
D
3
3
CPU_LDT_RST# CPU_PWRGD
R0516 0Ohm
R0516 0Ohm
1 2
R0517 0Ohm
R0517 0Ohm
1 2
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
+1.8V
FORCE_OFF# [30,86,87]
GND
J0500
J0500
1
NC
3
DBREQ_L1
/x
/x
5
DBRDY1
/x
/x
7
DBREQ_L2
9
DBRDY2
11
DBREQ_L3
13
DBRDY3
15
DBREQ_L4
17
DBRDY4
19
DBREQ_L5
21
DBRDY5
23
DBREQ_L6
ASP_68200_07_K25
ASP_68200_07_K25
/X
/X
NOTICE
mount cap C0503 (AMD power LDO
CPU_LDT_RST# CPU_PWRGD LDT_STOP#
CPU_SIC CPU_SID
1%
1%
R0513 44.2Ohm
R0513 44.2Ohm
1 2
R0514 44.2Ohm
R0514 44.2Ohm
1 2
1%
CPU_THRM_DC[50] CPU_THRM_DA[50]
1%
T0509 TPC28TT0509 TPC28T T0510 TPC28TT0510 TPC28T T0511 TPC28TT0511 TPC28T T0512 TPC28TT0512 TPC28T T0513 TPC28TT0513 TPC28T
DBREQ_L7
1 1
1 1
GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8
DBRDY7 DBRDY6
GND9
GND10
CPU_VDD_FB_H CPU_VDD_FB_L
CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L
2 4 6 8 10 12 14 16 18 20 22 24 26
+2.5V_CPU_VDDA
100UF/6.3V
100UF/6.3V
部分輸出是否可以省掉一個
VDDA CPU_PROCHOT#
CPU_HTREF0 CPU_HTREF1
CPU_CLK_H_C CPU_CLK_L_C
CPU_DBRDY CPU_TMS
CPU_TCK CPU_TRST# CPU_TDI
CPU_TEST25_H CPU_TEST25_L CPU_TEST19 CPU_TEST18
GND
CPU_TEST17
1
CPU_TEST16
1
CPU_TEST15
1
CPU_TEST14
1
CPU_TEST12
1
CPU_RESET
GND
C0503
C0503
要求)
12
@
@
A8 B8
AK6 AM2 AM6
AN4 AN5
V10
V9
E2 E1
AM9 AK9
A6
A7 AH8 AN8
AK8 AL8 AM8
A9
B9
A5
B6 AJ9
H8
J8 C8 D9 H7
AN3
C6
AH7 AL6 AM5 AJ5 AJ7
M31
L32 M33 M32
W27 W26
AJ29
P26
M26
AJ30
AMGMV40OAX4DX
AMGMV40OAX4DX
30Ohm/100Mhz
30Ohm/100Mhz
C0504
C0504
4.7UF/6.3V
4.7UF/6.3V
10uf cap
U0301D
U0301D
VDDA1 VDDA2
RESET_L PWROK LDTSTOP_L
SIC SID
HTREF1 HTREF0
VDD_FB_H VDD_FB_L
VDDIO_FB_H VDDIO_FB_L
CLKIN_H CLKIN_L
DBRDY TMS
TCK TRST_L TDI
TEST25_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12
TEST7 TEST6 THERMDC THERMDA TEST3 TEST2
RSVD19 RSVD20 RSVD21 RSVD22
RSVD23 RSVD24 RSVD25 RSVD26 RSVD27 RSVD28
L0501
21
GND
Irat=1AL0501
Irat=1A
12
0.22UF/6.3V
0.22UF/6.3V
VDDA
12
C0505
C0505
THERMTRIP_L
PROCHOT_L
VID[5] VID[4] VID[3] VID[2] VID[1] VID[0]
CPU_PRESENT_L
PSI_L
DBREQ_L
TEST29_H TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H
TEST28_L
TEST27 TEST26 TEST10
TEST8
RSVD29 RSVD30
RSVD31 RSVD32 RSVD33
RSVD34 RSVD35
RSVD36 RSVD37 RSVD38 RSVD39 RSVD40 RSVD41
TDO
VSS
12
C0506
C0506 3300PF/50V
3300PF/50V
12
R0523
R0523
300Ohm
300Ohm
CPU_THRMTRIP#
AJ6 AN6
1 2
CPU_DBREQ#
CPU_TDO
GND
VID5 is optional
T0526T0526
1
R0561 80.6OHMR0561 80.6OHM
1 2
T0518T0518
1
T0519T0519
1
T0520T0520
1
T0523T0523
1
T0524T0524
1
T0525T0525
1
CPU_VID5
B2
CPU_VID4
C2
CPU_VID3
C1
CPU_VID2
D2
CPU_VID1
D1
CPU_VID0
D3
R0559 1KOhmR0559 1KOhm
AM3
PSI_L
E4
PSI_L is a Power Status Indicator signal.
AN9
AN7
CPU_TEST29_H_FBCLKOUT_P
E9
CPU_TEST29_L_FBCLKOUT_N
D10
CPU_TEST24
AH6
CPU_TEST23
AG8
CPU_TEST22
AN11
CPU_TEST21
F9
CPU_TEST20
AM7
CPU_TEST28_H
G11
CPU_TEST28_L
H11 AJ8
CPU_TEST26
AM4 D7 B5
L27 B25
G6 A10 B7
E8 G5
G7
AB31 AB30 AK31 AD31 AD30 AK32
+1.8V
+1.8V
12
R0524
R0524
300Ohm
300Ohm
12
R0525
R0525
300Ohm
300Ohm
1 1
1 1
T0531T0531
1
CPU_PROCHOT# [20]
T0527T0527 T0528T0528
CPU_VID3 [81] CPU_VID2 [81]
T0529T0529 T0530T0530
CPU_DBREQ#
3 4
CPU_SIC
5 6
CPU_TEST25_H
R0562 510OhmR0562 510Ohm
CPU_TEST26
7 8
Change 300 ohm to 4R8P 090405
CPU_TEST24
CPU_TEST22
CPU_TEST20
CPU_TEST21
CPU_TEST25_L
CPU_TEST19
CPU_TEST18
R0506 1KOhmR0506 1KOhm
1 2
1 2
300OHM
300OHM
1 2
300OHM
300OHM
3 4
300OHM
300OHM
5 6
300OHM
300OHM
7 8
300OHM
300OHM
R0560 510OhmR0560 510Ohm
1 2
300OHM
300OHM
300OHM
300OHM
1 2
300OHM
300OHM
R0528B
R0528B
R0528C
R0528C
R0528D
R0528D
R0528A
R0528A
R0530A
R0530A
R0530B
R0530B
R0530C
R0530C
R0530D
R0530D
+1.8V
GND
GND
GND
GND
GND
GND
Title :
Title :
Title :
Conesus CNT/DBG/THERM
Conesus CNT/DBG/THERM
Conesus CNT/DBG/THERM
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F83
F83
F83
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
591Tuesday, May 26, 2009
591Tuesday, May 26, 2009
591Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
+VCORE +VCORE +1.8V
U0301E
U0301E
A3
VDD1
A4
VDD2
B3
VDD3
B4
VDD4
C3
VDD5
D D
C C
C4
VDD6
D4
VDD7
D5
VDD8
D6
VDD9
E5
VDD10
E6
VDD11
E7
VDD12
F5
VDD13
F6
VDD14
F7
VDD15
F8
VDD16
G8
VDD17
G9
VDD18
H9
VDD19
J9
VDD20
J10
VDD21
J12
VDD22
J14
VDD23
J18
VDD24
J20
VDD25
J21
VDD26
J23
VDD27
K10
VDD28
K12
VDD29
K14
VDD30
K18
VDD31
K20
VDD32
K21
VDD33
K23
VDD34
K25
VDD35
L7
VDD36
L9
VDD37
L11
VDD38
L13
VDD39
M5
VDD40
M10
VDD41
M12
VDD42
M25
VDD43
N9
VDD44
N11
VDD45
N24
VDD46
N25
VDD47
P15
VDD48
P18
VDD49
P20
VDD50
P24
VDD51
P25
VDD52
AMGMV40OAX4DX
AMGMV40OAX4DX
VDD53 VDD54 VDD55 VDD56 VDD57 VDD58 VDD59 VDD60 VDD61 VDD62 VDD63 VDD64 VDD65 VDD66 VDD67 VDD68 VDD69 VDD70 VDD71 VDD72 VDD73 VDD74 VDD75 VDD76 VDD77 VDD78 VDD79 VDD80 VDD81 VDD82 VDD83 VDD84 VDD85 VDD86 VDD87 VDD88 VDD89 VDD90 VDD91 VDD92 VDD93 VDD94 VDD95
AA10 AA12 AA24 AA25 AB11 AB13 AC5 AC10 AC12 AC24 AC25 AD9 AD11 AD12 AD14 AD18 AD21 AD25 AE12 AE14 AE18 AE21 AE23 V25 V24 Y19 Y16 Y14 W20 W18 W15 W5 V19 V16 V14 T20 T18 T15 T10 R19 R16 R14 R5
4
AG32 AG30
AE30 AE26 AC32 AC30 AE32 AB28 AA30
W32 W30 W28
AF28
Y29 U29 R28 P29
U30 N30 U32 R32 R30 N32 U26 Y26 M27
U0301F
U0301F
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26
AMGMV40OAX4DX
AMGMV40OAX4DX
3
U0301G
U0301G
A32
VSS1
AA1
VSS2
AA2
VSS3
AA4
VSS4
AA9
VSS5
AA11
VSS6
AA22
VSS7
AA23
VSS8
AB10
VSS9
AB12
VSS10
AB21
VSS11
AB22
VSS12
AB23
VSS13
AB24
VSS14
AB25
VSS15
AC11
VSS16
AC1
VSS17
AC2
VSS18
AC4
VSS19
AC8
VSS20
AC9
VSS21
AC13
VSS22
AC21
VSS23
AC22
VSS24
AC23
VSS25
AD10
VSS26
AD13
VSS27
AD16
VSS28
AD20
VSS29
AD22
VSS30
AD23
VSS31
AD24
VSS32
AE1
VSS33
AE2
VSS34
AE4
VSS35
AE7
VSS36
AE10
VSS37
AE11
VSS38
AE13
VSS39
AE16
VSS40
AE20
VSS41
AE22
VSS42
AE24
VSS43
AE25
VSS44
AF7
VSS45
AF8
VSS46
AF9
VSS47
AF26
VSS48
AG1
VSS49
AG2
VSS50
AG4
VSS51
AG6
VSS52
AG7
VSS53
AG27
VSS54
AH5
VSS55
AH14
VSS56
AH20
VSS57
AH23
VSS58
AH25
VSS59
AH28
VSS60
AMGMV40OAX4DX
AMGMV40OAX4DX
GND GND
VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120
G4 G2 G1 F23 F20 F14 E32 E30 D30 D29 D27 D25 D23 D21 D19 D17 D15 D13 D11 D8 C31 B33 B29 B27 B21 B19 B17 B15 B13 C10 AN32 AN2 AM33 AM27 AM23 AM19 AM17 AM15 AM13 AM11 AM1 AL31 AK29 AK27 AK25 AK23 AK21 AK19 AK17 AK15 AK13 AK11 AK7 AK5 AJ22 AJ19 AJ15 AJ4 AJ2 AJ1
2
U0301H
U0301H
G19
VSS121
G25
VSS122
G27
VSS123
G30
VSS124
H5
VSS125
H6
VSS126
H20
VSS127
H23
VSS128
H28
VSS129
J1
VSS130
J2
VSS131
J4
VSS132
J7
VSS133
J11
VSS134
J13
VSS135
J16
VSS136
J22
VSS137
J24
VSS138
J25
VSS139
J28
VSS140
J30
VSS141
J32
VSS142
K11
VSS143
K13
VSS144
K16
VSS145
A2
VSS146
K22
VSS147
K24
VSS148
K9
VSS149
L1
VSS150
L2
VSS151
L4
VSS152
L8
VSS153
L10
VSS154
L12
VSS155
L21
VSS156
L22
VSS157
L23
VSS158
L24
VSS159
L25
VSS160
L26
VSS161
L30
VSS162
M6
VSS163
M9
VSS164
M11
VSS165
M13
VSS166
M21
VSS167
M22
VSS168
M23
VSS169
M24
VSS170
N1
VSS171
N2
VSS172
N4
VSS173
N10
VSS174
N12
VSS175
N22
VSS176
N23
VSS177
P7
VSS178
P10
VSS179
P14
VSS180
P16
VSS181
P19
VSS182
AMGMV40OAX4DX
AMGMV40OAX4DX
GND
VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222
R1 R2 R4 R8 R15 R18 R20 T9 T14 T16 T19 T24 T25 V15 V18 V20 U1 U2 U4 U7 U8 W1 W2 W4 W8 W14 W16 W19 Y7 Y10 Y15 Y18 Y20 Y24 Y25 F17 AB7 AG5 B23 B1
GND
1
Remove C0602, C0603, C0604 090406
C0601
C0601 22UF/6.3V
22UF/6.3V
C0610
C0610
0.22UF/6.3V
0.22UF/6.3V
C0614
C0614
22UF/6.3V
22UF/6.3V
+VCORE
+VCORE
+1.8V
@
@
12
Bottom side decoupling
12
12
C0611
0.22UF/6.3V
0.22UF/6.3V
12
22UF/6.3V
22UF/6.3V
C0611
C0615
C0615
C0612
C0612
0.01UF/16V
0.01UF/16V
12
5
12
180PF/50V
180PF/50V
C0617
C0617
4.7uF/6.3V
4.7uF/6.3V
C0613
C0613
C0605
C0605 22UF/6.3V
22UF/6.3V
1 2
12
C0607
C0607 22UF/6.3V
22UF/6.3V
180pF
12
GND
12
C0608
C0608
22UF/6.3V
22UF/6.3V
的電容最好用
C0620
C0620
0.22UF/6.3V
0.22UF/6.3V
12
0.01UF/16V
0.01UF/16V
12
C0606
C0606
22UF/6.3V
22UF/6.3V
12
GND
C0619
C0619
0.22UF/6.3V
0.22UF/6.3V
12
22UF/6.3V
22UF/6.3V
C0621
C0621
4
C0609
C0609
12
GND
NPO的(AMD
12
12
C0622
C0622
180PF/50V
180PF/50V
C0623
C0623
180PF/50V
180PF/50V
建議)
12
@
@
3
B B
A A
LAYOUT NOTE: Decoupling between CPU and DIMMs, Place close to CPU as possible
NOTICE 1,8v cap placement
C0625
C0625
4.7uF/6.3V
4.7uF/6.3V
C0629
C0629
4.7uF/6.3V
4.7uF/6.3V
C0637
C0637
4.7uF/6.3V
4.7uF/6.3V
+0.9V
+0.9V
+1.8V
12
12
4.7uF/6.3V
4.7uF/6.3V
12
4.7uF/6.3V
4.7uF/6.3V
C0630
C0630
C0638
C0638
C0626
C0626
4.7uF/6.3V
4.7uF/6.3V
12
@
@
12
@
@
12
C0631
C0631
0.22UF/6.3V
0.22UF/6.3V
C0639
C0639
0.22UF/6.3V
0.22UF/6.3V
C0627
C0627
0.22UF/6.3V
0.22UF/6.3V
12
12
12
C0628
C0628
0.22UF/6.3V
0.22UF/6.3V
2
090410
12
GND
C0633
C0633
1000PF/16V
1000PF/16V
C0641
C0641
1000PF/16V
1000PF/16V
12
12
12
C0636
C0636
180PF/50V
180PF/50V
GND
12
C0643
C0643
180PF/50V
180PF/50V
GND
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
F83
F83
F83
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
Conesus Power
Conesus Power
Conesus Power
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
of
of
691Tuesday, May 26, 2009
691Tuesday, May 26, 2009
691Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
D D
J0701A
MEM_MA_ADD[0..15][4,9]
MEM_MA0_CS#[0..1][4,9]
MEM_MA_BANK2[4,9]
MEM_MA_BANK0[4,9] MEM_MA_BANK1[4,9]
MEM_MA0_CLK1_P[4] MEM_MA0_CLK1_N[4] MEM_MA0_CLK2_P[4] MEM_MA0_CLK2_N[4]
C C
B B
MEM_MA_CKE0[4,9] MEM_MA_CKE1[4,9] MEM_MA_CAS#[4,9] MEM_MA_RAS#[4,9] MEM_MA_WE#[4,9]
SMBCLK_DRAM[8,21,29,44]
SMBDATA_DRAM[8,21,29,44]
MEM_MA0_ODT0[4,9] MEM_MA0_ODT1[4,9]
MEM_MA_DM[0..7][4]
MEM_MA_DQS[0..7][4]
MEM_MA_DQS#[0..7][4]
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA0_CS#0 MEM_MA0_CS#1
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
MEM_MA_DQS0 MEM_MA_DQS1 MEM_MA_DQS2 MEM_MA_DQS3 MEM_MA_DQS4 MEM_MA_DQS5 MEM_MA_DQS6 MEM_MA_DQS7 MEM_MA_DQS#0 MEM_MA_DQS#1 MEM_MA_DQS#2 MEM_MA_DQS#3 MEM_MA_DQS#4 MEM_MA_DQS#5 MEM_MA_DQS#6 MEM_MA_DQS#7
J0701A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR_DIMM_200P
DDR_DIMM_200P
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
MEM_MA_DATA1
5
MEM_MA_DATA0
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8
23
MEM_MA_DATA9
25
MEM_MA_DATA11
35
MEM_MA_DATA14
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA15
36
MEM_MA_DATA10
38
MEM_MA_DATA20
43
MEM_MA_DATA22
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA17
44
MEM_MA_DATA21
46
MEM_MA_DATA16
56
MEM_MA_DATA23
58 61 63 73 75 62 64 74 76
MEM_MA_DATA39
123
MEM_MA_DATA34
125
MEM_MA_DATA32
135
MEM_MA_DATA37
137
MEM_MA_DATA38
124
MEM_MA_DATA35
126
MEM_MA_DATA33
134
MEM_MA_DATA36
136 141 143 151 153 140 142 152 154
MEM_MA_DATA53
157
MEM_MA_DATA49
159
MEM_MA_DATA51
173
MEM_MA_DATA55
175
MEM_MA_DATA52
158
MEM_MA_DATA48
160
MEM_MA_DATA54
174
MEM_MA_DATA50
176 179 181 189 191 180 182 192 194
MEM_MA_DATA25 MEM_MA_DATA29 MEM_MA_DATA27 MEM_MA_DATA30 MEM_MA_DATA28 MEM_MA_DATA26 MEM_MA_DATA24 MEM_MA_DATA31
MEM_MA_DATA42 MEM_MA_DATA40 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA41 MEM_MA_DATA45 MEM_MA_DATA43 MEM_MA_DATA44
MEM_MA_DATA60 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA61 MEM_MA_DATA59 MEM_MA_DATA63 MEM_MA_DATA62
MEM_MA_DATA[0..63] [4]
12
+
+
CE0701
CE0701
470UF/2.5V
470UF/2.5V
@
@
+1.8V
C0701
C0701
2.2UF/10V
2.2UF/10V
12
@
@
12
@
@
C0702
C0702
2.2UF/10V
2.2UF/10V
C0706
C0706
0.1UF/16V
0.1UF/16V
+1.8V
R0701
R0701 1KOhm
1KOhm
1%
1%
1 2
R0702
R0702 1KOhm
1KOhm
1%
1%
1 2
GND
12
12
@
@
C0703
C0703
2.2UF/10V
2.2UF/10V
C0711
C0711
0.1UF/16V
0.1UF/16V
12
C0710
C0710
0.1UF/16V
0.1UF/16V
12
C0713
C0713
0.1UF/16V
0.1UF/16V
12
12
12
C0712
C0712
2.2UF/6.3V@
2.2UF/6.3V@
@
@
C0704
C0704
2.2UF/10V
2.2UF/10V
C0707
C0707
0.1UF/16V
0.1UF/16V
12
C0714
C0714
1000PF/16V
1000PF/16V
12
12
12
C0709
C0709
0.1UF/16V
0.1UF/16V
M_VREF_DIMM0
C0705
C0705
2.2UF/10V
2.2UF/10V
C0708
C0708
0.1UF/16V
0.1UF/16V
+3VS
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
203
NP_NC1
204
NP_NC2
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
J0701B
J0701B
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
DDR_DIMM_200P
DDR_DIMM_200P
12G025122006
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
12
@
@
P/N:12G025122006
A A
<Variant Name>
<Variant Name>
<Variant Name>
Title :
Title :
Title :
DDR2 SO-DIMM0
DDR2 SO-DIMM0
1
DDR2 SO-DIMM0
791Tuesday, May 26, 2009
791Tuesday, May 26, 2009
791Tuesday, May 26, 2009
of
of
of
Rev
Rev
Rev
2.05
2.05
2.05
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
F5Z
F5Z
F5Z
Engineer:
5
D D
MEM_MB_ADD[0..15][4,9]
MEM_MB0_CS#[0..1][4,9]
MEM_MB_BANK2[4,9]
MEM_MB_BANK0[4,9]
R0802
R0802
4.7KOhm
4.7KOhm
MEM_MB_DQS[0..7][4]
MEM_MB_DQS#[0..7][4]
MEM_MB_BANK1[4,9]
MEM_MB0_CLK1_P[4] MEM_MB0_CLK1_N[4] MEM_MB0_CLK2_P[4] MEM_MB0_CLK2_N[4] MEM_MB_CKE0[4,9] MEM_MB_CKE1[4,9] MEM_MB_CAS#[4,9] MEM_MB_RAS#[4,9] MEM_MB_WE#[4,9]
SMBCLK_DRAM[7,21,29,44]
SMBDATA_DRAM[7,21,29,44]
MEM_MB0_ODT0[4,9] MEM_MB0_ODT1[4,9]
+3VS
C C
12
GND
MEM_MB_DM[0..7][4]
B B
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB0_CS#0 MEM_MB0_CS#1
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
MEM_MB_DQS0 MEM_MB_DQS1 MEM_MB_DQS2 MEM_MB_DQS3 MEM_MB_DQS4 MEM_MB_DQS5 MEM_MB_DQS6 MEM_MB_DQS7 MEM_MB_DQS#0 MEM_MB_DQS#1 MEM_MB_DQS#2 MEM_MB_DQS#3 MEM_MB_DQS#4 MEM_MB_DQS#5 MEM_MB_DQS#6 MEM_MB_DQS#7
CON0801A
CON0801A
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DDR2_DIMM_200P
DDR2_DIMM_200P
4
MEM_MB_DATA0
5
DQ0
MEM_MB_DATA1
7
DQ1
MEM_MB_DATA2
17
DQ2
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA5
4
DQ4
MEM_MB_DATA6
6
DQ5
MEM_MB_DATA4
14
DQ6
MEM_MB_DATA7
16
DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
23 25 35 37 20 22 36 38
MEM_MB_DATA20
43
MEM_MB_DATA17
45
MEM_MB_DATA22
55
MEM_MB_DATA23
57
MEM_MB_DATA21
44
MEM_MB_DATA16
46
MEM_MB_DATA18
56
MEM_MB_DATA19
58 61 63 73 75 62 64 74 76
MEM_MB_DATA35
123
MEM_MB_DATA38
125
MEM_MB_DATA32
135
MEM_MB_DATA34
137
MEM_MB_DATA36
124
MEM_MB_DATA37
126
MEM_MB_DATA33
134
MEM_MB_DATA39
136 141 143 151 153 140 142 152 154
MEM_MB_DATA53
157
MEM_MB_DATA52
159
MEM_MB_DATA54
173
MEM_MB_DATA50
175
MEM_MB_DATA48
158
MEM_MB_DATA49
160
MEM_MB_DATA55
174
MEM_MB_DATA51
176 179 181 189 191 180 182 192 194
MEM_MB_DATA9 MEM_MB_DATA12 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA13 MEM_MB_DATA8 MEM_MB_DATA11 MEM_MB_DATA10
MEM_MB_DATA29 MEM_MB_DATA24 MEM_MB_DATA30 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA25 MEM_MB_DATA31 MEM_MB_DATA26
MEM_MB_DATA46 MEM_MB_DATA41 MEM_MB_DATA45 MEM_MB_DATA47 MEM_MB_DATA44 MEM_MB_DATA40 MEM_MB_DATA42 MEM_MB_DATA43
MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA62 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA63 MEM_MB_DATA59
3
MEM_MB_DATA[0..63] [4]
2
+1.8V
12
@
@
C0801
C0801
2.2UF/10V
2.2UF/10V
12
@
@
12
@
@
C0802
C0802
2.2UF/10V
2.2UF/10V
C0810
C0810
0.1UF/16V
0.1UF/16V
+1.8V
1 2
1 2
GND
R0801
R0801 1KOhm
1KOhm
1%
1%
R0803
R0803 1KOhm
1KOhm
1%
1%
12
12
@
@
C0803
C0803
2.2UF/10V
2.2UF/10V
C0811
C0811
0.1UF/16V
0.1UF/16V
12
C0807
@ C0807
@
2.2UF/10V
2.2UF/10V
12
C0809
C0809
0.1UF/16V
0.1UF/16V
12
C0813
C0813
0.1UF/16V
0.1UF/16V
12
12
@
@
C0804
C0804
2.2UF/10V
2.2UF/10V
C0806
C0806
0.1UF/16V
0.1UF/16V
12
@
@
12
C0814
C0814
1000PF/16V
1000PF/16V
C0808
C0808
0.1UF/16V
0.1UF/16V
12
C0805
C0805
2.2UF/10V
2.2UF/10V
12
C0812
C0812
0.1UF/16V
0.1UF/16V
M_VREF_DIMM1
+3VS
CON0801B
CON0801B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND0
202
GND1
203
NP_NC1
204
NP_NC2
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DDR2_DIMM_200P
DDR2_DIMM_200P
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
1
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
PN:12G025C22003 REV.
A A
Title :
Title :
Title :
DDR2 SO-DIMM1
DDR2 SO-DIMM1
1
DDR2 SO-DIMM1
891Tuesday, May 26, 2009
891Tuesday, May 26, 2009
891Tuesday, May 26, 2009
of
of
of
Rev
Rev
Rev
2.05
2.05
2.05
Engineer:
Engineer:
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
F83T
F83T
F83T
Engineer:
5
4
3
2
1
RN0912F47OHM RN0912F47OHM RN0912A47OHM RN0912A47OHM RN0912E47OHM RN0912E47OHM RN0912B47OHM RN0912B47OHM RN0910E47OHM RN0910E47OHM RN0910G47OHM RN0910G47OHM RN0910A47OHM RN0910A47OHM RN0910B47OHM RN0910B47OHM RN0910D47OHM RN0910D47OHM RN0910C47OHM RN0910C47OHM RN0914E47OHM RN0914E47OHM RN0910H47OHM RN0910H47OHM RN0912G47OHM RN0912G47OHM RN0912H47OHM RN0912H47OHM RN0912C47OHM RN0912C47OHM RN0912D47OHM RN0912D47OHM
RN0914H47OHM RN0914H47OHM RN0914G47OHM RN0914G47OHM
RN0914A47OHM RN0914A47OHM RN0914D47OHM RN0914D47OHM RN0914C47OHM RN0914C47OHM
RN0914F47OHM RN0914F47OHM RN0910F47OHM RN0910F47OHM
RN0914B47OHM RN0914B47OHM
RN0916D
RN0916D RN0916B
RN0916B RN0916C
RN0916C RN0916A
RN0916A
MB0_ODT1
+0.9V
C0901 0.1UF/16VC0901 0.1UF/16V
1 2
C0902 0.1UF/16VC0902 0.1UF/16V
1 2
C0903 0.1UF/16VC0903 0.1UF/16V
1 2
C0912 0.1UF/16VC0912 0.1UF/16V
1 2
C0913 0.1UF/16VC0913 0.1UF/16V
1 2
C0914 0.1UF/16VC0914 0.1UF/16V
1 2
C0915 0.1UF/16VC0915 0.1UF/16V
1 2
C0916 0.1UF/16VC0916 0.1UF/16V
1 2
+0.9V
C0917 0.1UF/16VC0917 0.1UF/16V
1 2
C0918 0.1UF/16VC0918 0.1UF/16V
1 2
C0919 0.1UF/16VC0919 0.1UF/16V
1 2
C0927 0.1UF/16VC0927 0.1UF/16V
1 2
C0929 0.1UF/16VC0929 0.1UF/16V
1 2
C0930 0.1UF/16VC0930 0.1UF/16V
1 2
C0931 0.1UF/16VC0931 0.1UF/16V
1 2
C0932 0.1UF/16VC0932 0.1UF/16V
1 2
+1.8V
+1.8V
+1.8V
12
+1.8V
@
@
+0.9V
12
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V
C0904
C0904
C0905
C0905
Remove1.8V C0926,C0928 0.1uF 090405
12
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V
12
C0920
C0920
0.1UF/16V
0.1UF/16V C0933
C0933
C0921
C0921
12
@
@
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
+1.8V
是否用排容?
090330
+0.9V
PLACE CLOSE TO SOCKET( PER EMI/EMC)
3
2
Remove1.8V C0910,C0911 0.1uF 090405
12
12
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V C0907
C0907
C0906
C0906
12
12
0.1UF/16V
0.1UF/16V
0.1UF/16V
0.1UF/16V
C0922
C0922
C0923
C0923
12
12
0.1UF/16V
0.1UF/16V C0934
C0934
0.1UF/16V
0.1UF/16V C0935
C0935
@
@
@
@
12
12
0.1UF/16V
0.1UF/16V C0908
C0908
12
0.1UF/16V
0.1UF/16V C0924
C0924
0.1UF/16V
0.1UF/16V C0936
C0936
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
ASUSTeK COMPUTER INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
0.1UF/16V
0.1UF/16V
12
@
@
C0909
C0909
0.1UF/16V
0.1UF/16V C0937
C0937
12
F5Z
F5Z
F5Z
12
0.1UF/16V
0.1UF/16V C0925
C0925
12
@
@
GND
0.1UF/16V
0.1UF/16V C0938
C0938
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
GND
GND
DDR2_TERMINATIONS
DDR2_TERMINATIONS
DDR2_TERMINATIONS
991Tuesday, May 26, 2009
991Tuesday, May 26, 2009
991Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
of
of
of
change to 8R16P 090405
MEM_MA_ADD[0..15][4,7]
D D
071219
Del Bank2 to Bus
071207
MEM_MA_BANK2[4,7] MEM_MA_BANK1[4,7]
C C
MEM_MA_BANK0[4,7] MEM_MA0_ODT0[4,7]
MEM_MA0_ODT1[4,7] MEM_MA_CKE0[4,7]
MEM_MA_CKE1[4,7] MEM_MA_RAS#[4,7]
MEM_MA_CAS#[4,7] MEM_MA_WE#[4,7]
MEM_MA0_CS#0[4,7] MEM_MA0_CS#1[4,7]
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
MEM_MA0_ODT0 MEM_MA0_ODT1
MEM_MA_CKE0 MEM_MA_CKE1
MEM_MA_RAS# MEM_MA_CAS# MEM_MA_WE#
MEM_MA0_CS#0 MEM_MA0_CS#1
MEM_MA_ADD1 MEM_MA_ADD3 MEM_MA_ADD5 MEM_MA_ADD8
MEM_MA0_CS#1 MEM_MA_CAS#
MEM_MA_WE# MEM_MA_ADD9 MEM_MA_ADD12
MEM_MA_BANK2
MEM_MA_CKE0 MEM_MA_ADD7 MEM_MA_ADD14 MEM_MA_ADD15 MEM_MA_CKE1
MEM_MA_RAS#
MEM_MA_BANK1 MEM_MA_ADD4
MEM_MA0_ODT0 MEM_MA_ADD13
MEM_MA0_CS#0 MEM_MA_ADD2
MEM_MA_ADD6 MEM_MA_ADD0
MEM_MA_ADD11 MEM_MA0_ODT1
MEM_MA_BANK0 MEM_MA_ADD10
3 14 2 15 1 16 8 9
7 10 8 9 5 12 3 14 4 13 5 12 2 15 4 13 7 10 6 11 1 16
6 11 4 13 8 9
3 14 1 16 2 15
6 11 7 10
5 12
5 6
47Ohm
47Ohm
7 8
47Ohm
47Ohm
1 2
47Ohm
47Ohm
3 4
47Ohm
47Ohm
add MA0_ODT1睿MB0_ODT1 090417
RN0901C47OHM RN0901C47OHM RN0901B47OHM RN0901B47OHM RN0901A47OHM RN0901A47OHM RN0903H47OHM RN0903H47OHM
RN0901G47OHM RN0901G47OHM RN0901H47OHM RN0901H47OHM RN0901E47OHM RN0901E47OHM RN0903C47OHM RN0903C47OHM RN0903D47OHM RN0903D47OHM RN0903E47OHM RN0903E47OHM RN0903B47OHM RN0903B47OHM RN0901D47OHM RN0901D47OHM RN0903G47OHM RN0903G47OHM RN0903F47OHM RN0903F47OHM RN0903A47OHM RN0903A47OHM
RN0901F47OHM RN0901F47OHM RN0905D47OHM RN0905D47OHM RN0905H47OHM RN0905H47OHM
RN0905C47OHM RN0905C47OHM RN0905A47OHM RN0905A47OHM RN0905B47OHM RN0905B47OHM
RN0905F47OHM RN0905F47OHM RN0905G47OHM RN0905G47OHM
RN0905E47OHM RN0905E47OHM
RN0909C
RN0909C RN0909D
RN0909D RN0909A
RN0909A RN0909B
RN0909B
change to 8R16P 090405
MEM_MB_ADD[0..15][4,8]
B B
MEM_MB_ADD14 MEM_MB_ADD7 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD10 MEM_MB_ADD0 MEM_MB0_ODT0 MEM_MB_ADD13 MEM_MB_RAS# MEM_MB0_CS#0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD15 MEM_MB_CKE1 MEM_MB_BANK2 MEM_MB_CKE0
MEM_MB0_CS#1 MEM_MB_CAS#
MEM_MB_ADD8 MEM_MB_ADD3 MEM_MB_ADD6
MEM_MB_WE# MEM_MB_BANK0
MEM_MB_ADD4 MEM_MB_ADD9
MEM_MB0_ODT1
MEM_MB_ADD5 MEM_MB_BANK1
6 11 1 16 5 12 2 15 5 12 7 10 1 16 2 15 4 13 3 14 5 12 8 9 7 10 8 9 3 14 4 13
8 9 7 10
1 16 4 13 3 14
6 11 6 11
2 15
7 8
47Ohm
47Ohm
3 4
47Ohm
47Ohm
5 6
47Ohm
47Ohm
1 2
47Ohm
47Ohm
071211
MEM_MB_BANK2[4,8] MEM_MB_BANK1[4,8] MEM_MB_BANK0[4,8]
MEM_MB0_ODT0[4,8] MEM_MB0_ODT1[4,8]
A A
MEM_MB_CKE0[4,8] MEM_MB_CKE1[4,8]
MEM_MB_RAS#[4,8] MEM_MB_CAS#[4,8] MEM_MB_WE#[4,8]
MEM_MB0_CS#0[4,8] MEM_MB0_CS#1[4,8]
5
MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
MEM_MB0_ODT0 MEM_MB0_ODT1
MEM_MB_CKE0 MEM_MB_CKE1
MEM_MB_RAS# MEM_MB_CAS# MEM_MB_WE#
MEM_MB0_CS#0 MEM_MB0_CS#1
add MA0_ODT1
090417
4
5
D D
4
3
2
1
R1.11 080319 Change the NB Part number to RS780 (A13)
U1001A
AC24 AC25 AB25 AB24 AA24 AA25
W21 W20
AB23 AA22
Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25
Y22 Y23
V21 V20 U20 U21 U19 U18
T22 T23
M22 M23 R21 R20
C23 A24
U1001A
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780MN
RS780MN
HT_CPU_RXD0
HT_TXCALP HT_TXCALN
D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22
F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18
H24 H25 L21 L20
M24 M25 P19 R18
B24 B25
HT_CPU_RXD#0 HT_CPU_RXD1 HT_CPU_RXD#1 HT_CPU_RXD2 HT_CPU_RXD#2 HT_CPU_RXD3 HT_CPU_RXD#3 HT_CPU_RXD4 HT_CPU_RXD#4 HT_CPU_RXD5 HT_CPU_RXD#5 HT_CPU_RXD6 HT_CPU_RXD#6 HT_CPU_RXD7 HT_CPU_RXD#7
HT_CPU_RXD8 HT_CPU_RXD#8 HT_CPU_RXD9 HT_CPU_RXD#9 HT_CPU_RXD10 HT_CPU_RXD#10 HT_CPU_RXD11 HT_CPU_RXD#11 HT_CPU_RXD12 HT_CPU_RXD#12 HT_CPU_RXD13 HT_CPU_RXD#13 HT_CPU_RXD14 HT_CPU_RXD#14 HT_CPU_RXD15 HT_CPU_RXD#15
HT_CPU_RX_CLK0 HT_CPU_RX_CLK#0 HT_CPU_RX_CLK1 HT_CPU_RX_CLK#1
HT_CPU_RX_CTL0 HT_CPU_RX_CTL#0 HT_CPU_RX_CTL1 HT_CPU_RX_CTL#1
HT_TXCALP HT_TXCALN
PART 1 OF 6
PART 1 OF 6
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_CPU_RX_CLK0 [3] HT_CPU_RX_CLK#0 [3] HT_CPU_RX_CLK1 [3] HT_CPU_RX_CLK#1 [3]
HT_CPU_RX_CTL0 [3] HT_CPU_RX_CTL#0 [3] HT_CPU_RX_CTL1 [3] HT_CPU_RX_CTL#1 [3]
1 2
R1003 301OhmR1003 301Ohm
HT_CPU_RXD[0..15] [3]
HT_CPU_RXD#[0..15] [3]
HT_CPU_TXD0 HT_CPU_TXD#0 HT_CPU_TXD1 HT_CPU_TXD#1 HT_CPU_TXD2 HT_CPU_TXD#2 HT_CPU_TXD3 HT_CPU_TXD#3 HT_CPU_TXD4 HT_CPU_TXD#4 HT_CPU_TXD5 HT_CPU_TXD#5 HT_CPU_TXD6 HT_CPU_TXD#6
HT_CPU_TXD[0..15][3]
C C
Signal RS740 RX780 RS780
HT_RXCALP
HT_RXCALN
HT_TXCALP HT_TXCALN
B B
49.9R (GND)
49.9R (VDDHT)
100R 301R1.21K
1.21K 301R
HT_CPU_TXD#[0..15][3]
HT_CPU_TX_CLK0[3] HT_CPU_TX_CLK#0[3] HT_CPU_TX_CLK1[3] HT_CPU_TX_CLK#1[3]
HT_CPU_TX_CTL0[3] HT_CPU_TX_CTL#0[3] HT_CPU_TX_CTL1[3] HT_CPU_TX_CTL#1[3]
1 2
R1001 301OhmR1001 301Ohm
071119 071119 change R1001 value change R1003 value
HT_CPU_TXD7 HT_CPU_TXD#7
HT_CPU_TXD8 HT_CPU_TXD#8 HT_CPU_TXD9 HT_CPU_TXD#9 HT_CPU_TXD10 HT_CPU_TXD#10 HT_CPU_TXD11 HT_CPU_TXD#11 HT_CPU_TXD12 HT_CPU_TXD#12 HT_CPU_TXD13 HT_CPU_TXD#13 HT_CPU_TXD14 HT_CPU_TXD#14 HT_CPU_TXD15 HT_CPU_TXD#15
HT_CPU_TX_CLK0
HT_CPU_TX_CLK#0
HT_CPU_TX_CLK1
HT_CPU_TX_CLK#1
HT_CPU_TX_CTL0 HT_CPU_TX_CTL#0 HT_CPU_TX_CTL1 HT_CPU_TX_CTL#1
HT_RXCALP HT_RXCALN
A A
Title :
Title :
Title :
RS780M-HT LINK I/F
RS780M-HT LINK I/F
RS780M-HT LINK I/F
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
F5Z
F5Z
F5Z
Engineer:
1
<OrgAddr1>
10 91Tuesday, May 26, 2009
10 91Tuesday, May 26, 2009
10 91Tuesday, May 26, 2009
of
of
of
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
4
3
2
1
R1.11 080319 Change the NB Part number to RS780 (A13)
U1001B
U1001B
PCIENB_RXP0[71] PCIENB_RXN0[71] PCIENB_RXP1[71] PCIENB_RXN1[71] PCIENB_RXP2[71] PCIENB_RXN2[71] PCIENB_RXP3[71] PCIENB_RXN3[71] PCIENB_RXP4[71] PCIENB_RXN4[71] PCIENB_RXP5[71] PCIENB_RXN5[71] PCIENB_RXP6[71] PCIENB_RXN6[71] PCIENB_RXP7[71] PCIENB_RXN7[71] PCIENB_RXP8[71] PCIENB_RXN8[71] PCIENB_RXP9[71]
C C
071219 Add Test Point
T1103
T1103
T1102
TPC28T
TPC28T
1
T1102 TPC28T
TPC28T
1
T1101
T1101 TPC28T
TPC28T
T1104
T1105
T1105 TPC28T
TPC28T
1
T1104 TPC28T
TPC28T
1
T1106
T1106 TPC28T
TPC28T
1
PCIE_RXP0_MINICARD[53] PCIE_RXP1_LAN[33]
PCIE_RXN1_LAN[33] PCIE_RXP2_NEWCARD[43] PCIE_RXN2_NEWCARD[43]
B B
PCIENB_RXN9[71] PCIENB_RXP10[71] PCIENB_RXN10[71] PCIENB_RXP11[71] PCIENB_RXN11[71] PCIENB_RXP12[71] PCIENB_RXN12[71] PCIENB_RXP13[71] PCIENB_RXN13[71] PCIENB_RXP14[71] PCIENB_RXN14[71]
1
PCIENB_RXP15[71] PCIENB_RXN15[71]
PCIE_SB_NB_RX0P[20] PCIE_SB_NB_RX0N[20] PCIE_SB_NB_RX1P[20] PCIE_SB_NB_RX1N[20] PCIE_SB_NB_RX2P[20] PCIE_SB_NB_RX2N[20] PCIE_SB_NB_RX3P[20] PCIE_SB_NB_RX3N[20]
D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6
J6 J5 J7
J8 L5 L6 M8 L8 P7 M7 P5 M5 R8 P8 R6 R5 P4 P3 T4 T3
AE3 AD4 AE2 AD3 AD1 AD2
V5
W6
U5 U6 U8 U7
AA8
Y8
AA7
Y7
AA5 AA6
W5
Y5
GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N
SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N
RS780MN
RS780MN
PART 2 OF 6
PART 2 OF 6
PCIE I/F GFX
PCIE I/F GFX
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
PCE_CALRP
PCE_CALRN
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
PCIENB_TXP0 PCIENB_TXN0 PCIENB_TXP1 PCIENB_TXN1 PCIENB_TXP2 PCIENB_TXN2 PCIENB_TXP3 PCIENB_TXN3 PCIENB_TXP4 PCIENB_TXN4 PCIENB_TXP5 PCIENB_TXN5 PCIENB_TXP6 PCIENB_TXN6 PCIENB_TXP7 PCIENB_TXN7 PCIENB_TXP8 PCIENB_TXN8 PCIENB_TXP9 PCIENB_TXN9 PCIENB_TXP10 PCIENB_TXN10 PCIENB_TXP11 PCIENB_TXN11 PCIENB_TXP12 PCIENB_TXN12 PCIENB_TXP13 PCIENB_TXN13 PCIENB_TXP14 PCIENB_TXN14 PCIENB_TXP15 PCIENB_TXN15
C1115 0.1UF/10V
C1115 0.1UF/10V C1116 0.1UF/10V
C1116 0.1UF/10V C1117 0.1UF/10V
C1117 0.1UF/10V C1118 0.1UF/10V
C1118 0.1UF/10V C1121 0.1UF/10V
C1121 0.1UF/10V C1122 0.1UF/10V
C1122 0.1UF/10V C1119 0.1UF/10V
C1119 0.1UF/10V C1120 0.1UF/10V
C1120 0.1UF/10V C1129 0.1UF/10V
C1129 0.1UF/10V C1130 0.1UF/10V
C1130 0.1UF/10V C1124 0.1UF/10V
C1124 0.1UF/10V C1123 0.1UF/10V
C1123 0.1UF/10V C1126 0.1UF/10V
C1126 0.1UF/10V C1128 0.1UF/10V
C1128 0.1UF/10V C1125 0.1UF/10V
C1125 0.1UF/10V C1127 0.1UF/10V
C1127 0.1UF/10V C1145 0.1UF/10V
C1145 0.1UF/10V C1146 0.1UF/10V
C1146 0.1UF/10V C1140 0.1UF/10V
C1140 0.1UF/10V C1139 0.1UF/10V
C1139 0.1UF/10V C1142 0.1UF/10V
C1142 0.1UF/10V C1144 0.1UF/10V
C1144 0.1UF/10V C1141 0.1UF/10V
C1141 0.1UF/10V C1143 0.1UF/10V
C1143 0.1UF/10V C1137 0.1UF/10V
C1137 0.1UF/10V C1138 0.1UF/10V
C1138 0.1UF/10V C1132 0.1UF/10V
C1132 0.1UF/10V C1131 0.1UF/10V
C1131 0.1UF/10V C1135 0.1UF/10V
C1135 0.1UF/10V C1136 0.1UF/10V
C1136 0.1UF/10V C1133 0.1UF/10V
C1133 0.1UF/10V C1134 0.1UF/10V
GPP_TX0P_C GPP_TX0N_C GPP_TX1P_C GPP_TX1N_C GPP_TX2P_C GPP_TX2N_C
A_TX0P_CA_TX0P_C A_TX0N_CA_TX0N_C A_TX1P_CA_TX1P_C A_TX1N_CA_TX1N_C A_TX2P_C A_TX2N_C A_TX3P_C A_TX3N_C
PCE_CALRP PCE_CALRN
C1134 0.1UF/10V C1101 0.1UF/10VC1101 0.1UF/10V C1102 0.1UF/10VC1102 0.1UF/10V C1104 0.1UF/10VC1104 0.1UF/10V
C1107 0.1UF/10VC1107 0.1UF/10V C1108 0.1UF/10VC1108 0.1UF/10V C1110 0.1UF/10VC1110 0.1UF/10V C1112 0.1UF/10VC1112 0.1UF/10V
071129 Add net name
12 12 12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU
12
/GPU
/GPU /GPU
/GPU
12
/GPU
/GPU
C1103 0.1UF/10VC1103 0.1UF/10V
12
C1105 0.1UF/10VC1105 0.1UF/10V
12
C1106 0.1UF/10VC1106 0.1UF/10V
12
C1109 0.1UF/10VC1109 0.1UF/10V
12
C1111 0.1UF/10VC1111 0.1UF/10V
12
C1113 0.1UF/10VC1113 0.1UF/10V
12
C1114 0.1UF/10VC1114 0.1UF/10V
1 2 1 2
071212
change P/N
12 12 12
12 12 12 12
R11011.27KOhm R11011.27KOhm R11022KOHM R11022KOHM
PCIEG_RXP0 [71] PCIEG_RXN0 [71] PCIEG_RXP1 [71] PCIEG_RXN1 [71] PCIEG_RXP2 [71] PCIEG_RXN2 [71] PCIEG_RXP3 [71] PCIEG_RXN3 [71] PCIEG_RXP4 [71] PCIEG_RXN4 [71] PCIEG_RXP5 [71] PCIEG_RXN5 [71] PCIEG_RXP6 [71] PCIEG_RXN6 [71] PCIEG_RXP7 [71] PCIEG_RXN7 [71] PCIEG_RXP8 [71] PCIEG_RXN8 [71] PCIEG_RXP9 [71] PCIEG_RXN9 [71] PCIEG_RXP10 [71] PCIEG_RXN10 [71] PCIEG_RXP11 [71] PCIEG_RXN11 [71] PCIEG_RXP12 [71] PCIEG_RXN12 [71] PCIEG_RXP13 [71] PCIEG_RXN13 [71] PCIEG_RXP14 [71] PCIEG_RXN14 [71] PCIEG_RXP15 [71] PCIEG_RXN15 [71]
PCIE_TXP0_MINICARD [53] PCIE_TXN0_MINICARD [53]PCIE_RXN0_MINICARD[53] PCIE_TXP1_LAN [33] PCIE_TXN1_LAN [33] PCIE_TXP2_NEWCARD [43] PCIE_TXN2_NEWCARD [43]
PCIE_NB_SB_TX0P [20] PCIE_NB_SB_TX0N [20] PCIE_NB_SB_TX1P [20] PCIE_NB_SB_TX1N [20] PCIE_NB_SB_TX2P [20] PCIE_NB_SB_TX2N [20] PCIE_NB_SB_TX3P [20] PCIE_NB_SB_TX3N [20]
+1.1V_NB
080201
R1.1
Change to +1.1V_NB form NB_VDD_MUX
GND
A A
Title :
Title :
Title :
RS780M-PCIE LINK I/F
RS780M-PCIE LINK I/F
RS780M-PCIE LINK I/F
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
F5Z
F5Z
F5Z
Engineer:
1
<OrgAddr1>
11 91Friday, May 29, 2009
11 91Friday, May 29, 2009
11 91Friday, May 29, 2009
of
of
of
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
notice L1201 L1204 change SL? 090411
+3VS
L1201 220Ohm/100MhzL1201 220Ohm/100Mhz
21
D D
+1.8VS
For Layout impdance setting
080201
R1.1
Change to +1.1V_NB form NB_VDD_MUX
C C
+1.8V_PLL
STRP_DATA 01
VCC_NB 1.0V 1.1V
B B
R2.0
CPU_LDT_STOP#[5,20]
ALLOW_LDTSTOP[20]
A A
+1.8V_PLL
12
C1204
C1204 22UF/6.3V
22UF/6.3V
080828
GND
071219
+1.1V_NB
L1205 220Ohm/100MhzL1205 220Ohm/100Mhz
+1.1V_NB GND
Notice RN1215 remove? 090411
T1214 TPC28TT1214 TPC28T T1216 TPC28TT1216 TPC28T
080325
Remove Q1201A and R1219
+1.8VS
+1.8V_PLL
CRT_NB_HSYNC[13] CRT_NB_VSYNC[13]
L1206 220Ohm/100MhzL1206 220Ohm/100Mhz
21
NB_PWRGD[21]
R2.0080401 Change NB_ALLOW_LDTSTOP to ALLOW_LDTSTOP
NB_OSC[29]
1 2
R1208 4.7KOhmR1208 4.7KOhm
+3VS
1 1
+1.8VS
1 2
21
L1204 220Ohm/100MhzL1204 220Ohm/100Mhz
R1.11
R1.11 080310
21
12
GND
NB_RST#[20]
1 2
R1209 4.7KOhmR1209 4.7KOhm
1 2
4.7KOHM
4.7KOHM
3 4
4.7KOHM
4.7KOHM
@
@ @
@
T1225 TPC28TT1225 TPC28T T1226 TPC28TT1226 TPC28T
NB_LDT_STOP#
R1228
R1228 300Ohm
300Ohm
R2.0080401 Change NB_ALLOW_LDTSTOP to ALLOW_LDTSTOP
C1206
C1206
2.2UF/10V
2.2UF/10V
RN1215A
RN1215A RN1215B
RN1215B
1 1
GND
PLLVDD18
GND
GND
12
12
C1205
C1205
0.1UF/10V
0.1UF/10V
12
GND
C1201
C1201
2.2UF/10V
2.2UF/10V
080828
090407
AVDDQ_L
C1207
C1207
2.2UF/10V
2.2UF/10V
080828
GND
12
NB_PWRGD
AVDD
AVDDDI
GND GND
GND GND GND
R1206 715OhmR1206 715Ohm
1 2
PLLVDD
GND
C1208
C1208
VDDA18HTPLL
2.2UF/10V
2.2UF/10V
VDDA18PCIEPLL
NB_LDT_STOP# ALLOW_LDTSTOP
SRC_NB_HT_CLKP SRC_NB_HT_CLKN
NB_REFCLKP NB_REFCLKN
SRC_NB_GFX_REFCLKP SRC_NB_GFX_REFCLKN
T1206 TPC28TT1206 TPC28T
T1207 TPC28TT1207 TPC28T
SRC_NB_PCIE_RCLKP SRC_NB_PCIE_RCLKN
T1210 TPC28TT1210 TPC28T
T1211 TPC28TT1211 TPC28T
T1217 TPC28TT1217 TPC28T
T1212 TPC28TT1212 TPC28T
T1213 TPC28TT1213 TPC28T
R1.11
Change the NB Part number to RS780 (A13)
1 1
1 1
1 1 1
SRC_NB_GFX_REFCLKP[29] SRC_NB_GFX_REFCLKN[29]
SRC_NB_PCIE_RCLKP[29] SRC_NB_PCIE_RCLKN[29]
F12 E12 F14
G15
H15 H14
E17 F17 F15
G18 G17
E18 F18 E19 F19
A11 B11
G14
A12 D14 B12
H17
A10 C10 C12
C25 C24
E11 F11
B10
G11
SRC_NB_HT_CLKP[29] SRC_NB_HT_CLKN[29]
U1001C
U1001C
E8 F8
D7 E7
D8
T2 T1
U1 U2
V4 V3
A9 B9 B8 A8 B7 A7
C8
080319
+1.8V_PLL
AVDD1 AVDD2 AVDDDI AVSSDI AVDDQ AVSSQ
C Y COMP
RED RED# GREEN GREEN# BLUE BLUE#
DAC_HSYNC DAC_VSYNC DAC_SDA DAC_SCL
DAC_RSET PLLVDD
PLLVDD18 PLLVSS
VDDA18HTPLL VDDA18PCIEPLL1
VDDA18PCIEPLL2 SYSRESET#
POWERGOOD LDTSTOP# ALLOW_LDTSTOP
HT_REFCLKP HT_REFCLKN
REFCLK_P REFCLK_N
GFX_REFCLKP GFX_REFCLKN
GPP_REFCLKP GPP_REFCLKN
GPPSB_REFCLKP GPPSB_REFCLKN
I2C_DATA I2C_CLK DDC_DATA0/AUX0N DDC_CLK0/AUX0P DDC_CLK1/AUX1P DDC_DATA1/AUX1N
STRP_DATA RESERVED AUX_CAL
RS780MN
RS780MN
L1202 220Ohm/100MhzL1202 220Ohm/100Mhz
21
L1203 220Ohm/100MhzL1203 220Ohm/100Mhz
21
PART 3 OF 6
PART 3 OF 6
071204
DEL serial R
12
C1202
C1202
2.2UF/10V
2.2UF/10V
080828 080828
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXOUT_U0P TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P
THERMALDIODE_P THERMALDIODE_N
T1219 TPC28TT1219 TPC28T
1
SRC_NB_HT_CLKP
SRC_NB_HT_CLKN
T1220 TPC28TT1220 TPC28T
1
T1221 TPC28TT1221 TPC28T
1
SRC_NB_GFX_REFCLKP SRC_NB_GFX_REFCLKN
T1222 TPC28TT1222 TPC28T
1
T1223 TPC28TT1223 TPC28T
1
SRC_NB_PCIE_RCLKP
SRC_NB_PCIE_RCLKN
T1224 TPC28TT1224 TPC28T
1
TXOUT_U3N
TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN
VDDLTP18 VSSLTP18
VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2
LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL
TMDS_HPD
SUS_STAT#
TESTMODE
CRT/TVOUT
CRT/TVOUT
LVTM
LVTM
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
071218 for measurement near U1001
VDDA18HTPLL
VDDA18PCIEPLL
12
C1203
C1203
2.2UF/10V
2.2UF/10V
GND
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
A13 B13
A15 B15 A14 B14
C14
VSSLT1
D15
VSSLT2
C16
VSSLT3
C18
VSSLT4
C20
VSSLT5
E20
VSSLT6
C22
VSSLT7
GND
E9 F7 G12
D9
1
D10
1
HPD
D12 AE8
AD8 D13
R1218
R1218
1.8KOHM5%
1.8KOHM5%
1 2
GND
?? for external graphic
have via for measurement
GND
T1202 TPC28TT1202 TPC28T
1
T1203 TPC28TT1203 TPC28T
1
071115
1
T1208 TPC28TT1208 TPC28T T1215 TPC28TT1215 TPC28T
VDDLTP18_PLL_L
12
C1211
C1211
0.1UF/10V
0.1UF/10V
x7R
GND
1
T1209 TPC28TT1209 TPC28T
1
T1218 TPC28TT1218 TPC28T
T1201 TPC28TT1201 TPC28T
change backlight control by M92
071207
remove D1201 circuit 090410
NB_THRMDA NB_THRMDC
12
1 1
VDDLTP18_L
C1212
C1212
4.7UF/6.3V
4.7UF/6.3V
090316
T1204 TPC28TT1204 TPC28T T1205 TPC28TT1205 TPC28T
L1207 220Ohm/100MhzL1207 220Ohm/100Mhz
12
C1209
C1209
2.2UF/10V
2.2UF/10V
080828 080828
GND
SUS_STAT# [21]
21
L1208 220Ohm/100MhzL1208 220Ohm/100Mhz
+1.8V_PLL
21
071116
+1.8VS
Title :
Title :
Title :
RS780M-SYS I/F
RS780M-SYS I/F
RS780M-SYS I/F
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
12 91Tuesday, May 26, 2009
12 91Tuesday, May 26, 2009
12 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
DFT_GPIO1: LOAD_EEPROM_STRAPS
D D
C C
B B
R1.11 080319 Change the NB Part number to RS780 (A13)
U1001D
U1001D
PAR 4 OF 6
MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13
MEM_BA0 MEM_BA1 MEM_BA2
MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT
MEM_CKP MEM_CKN
MEM_COMPP MEM_COMPN
RS780MN
RS780MN
PAR 4 OF 6
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8
MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12 MEM_DQ13 MEM_DQ14 MEM_DQ15
MEM_DQS0P MEM_DQS0N MEM_DQS1P MEM_DQS1N
MEM_DM0
MEM_DM1
IOPLLVDD18
IOPLLVDD
MEM_VREF
IOPLLVSS
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
SL1307
SL1307
AB12 AE16
AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14
AD16 AE17 AD17
AD18 AB13 AB18
AE12 AD12
V11
Y14
W12 Y12
V14 V15
W14
 L1301L1302 傖SL蹋璃ㄛC1307C1308蕼隱 090407
+1.8V_PLL_L NB_VDD_MUX_L
GND
0603
0603
2 1
080118
GND
Disable Side Port Memory R1.1
12
12
C1307
C1307
C1308
2.2UF/10V
2.2UF/10V
C1308
2.2UF/10V
2.2UF/10V
@
@
080828 080828
@
@
GND GND
L1301
L1301 L1302
L1302
0603
0603 0603
0603
21 21
+1.8V_PLL +1.1V_NB
080201
R1.1
Change to +1.1V_NB form NB_VDD_MUX
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS780:SUS_STAT
STRAP_DEBUG_BUS_PCIE_ENABLE
Enables the Test Debug Bus using PCIE bus: 1 : Disable ( Can still be enabled using nbcfg register access ) 0 : Enable
RS780: configurable thru register setting only
RS740/RS780: Enables Side port memory
RS780:HSYNC#
Selects if Memory SIDE PORT is available or not 1 = Memory Side port Not available 0 = Memory Side port available Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
CRT_NB_VSYNC[12]
CRT_NB_HSYNC[12]
1 2
R13023KOHM R13023KOHM
1 2
R13033KOHM @ R13033KOHM @
R13053KOHM R13053KOHM
1 2
R1306
R1306
1 2
3KOHM
3KOHM
@
@
080118 Disable Side Port Memory R1.1
+3VS
GND
+3VS
GND
A A
RS780M-SPMEM/STRAP
RS780M-SPMEM/STRAP
RS780M-SPMEM/STRAP
Title :
Title :
Title :
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
13 91Tuesday, May 26, 2009
13 91Tuesday, May 26, 2009
13 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
+1.1V_NB
D D
X7R
12
12
C1402
C1402
C1401
C1401
0.1UF/10V
0.1UF/10V
4.7UF/6.3V
4.7UF/6.3V
GND
X7R
12
12
+1.2V_CPU_NB_SB
600 mA
C C
+1.8VS
L1404
L1404
+1.8VS
220Ohm/100Mhz
220Ohm/100Mhz
220Ohm/100Mhz
220Ohm/100Mhz
21
L1403
L1403
090404 cost remove C1429 4.7uF
21
12
C1428
C1428
4.7UF/6.3V
4.7UF/6.3V
12
C1439
C1439 1UF/6.3V
1UF/6.3V
GND
12
C1414
C1414
4.7UF/6.3V
4.7UF/6.3V
12
C1430
C1430
0.1UF/10V
0.1UF/10V
VDD18_R
12
X7R
C1415
C1415
0.1UF/10V
0.1UF/10V
GND
GND
VDDA18PCIE
12
C1431
C1431
0.1UF/10V
0.1UF/10V
C1410
C1410
4.7UF/6.3V
4.7UF/6.3V
X7R
12
C1416
C1416
0.1UF/10V
0.1UF/10V
+1.8VS
VDDHTTX
GND
12
C1432
C1432
0.1UF/10V
0.1UF/10V
C1411
C1411
0.1UF/10V
0.1UF/10V
@
@
12
12
12
C1433
C1433
0.1UF/10V
0.1UF/10V
C1403
C1403
0.1UF/10V
0.1UF/10V
C1412
C1412
0.1UF/10V
0.1UF/10V
VDD18_MEM_R
1UF/6.3V
1UF/6.3V
NB_VDD_MUX_VDDHT
12
C1404
C1404
0.1UF/10V
0.1UF/10V
@
@
VDDHTRX
12
C1413
C1413
0.1UF/10V
0.1UF/10V
@
@
12
C1447
C1447
GND
R1.11 080319 Change the NB Part number to RS780 (A13)
U1001E
U1001E
AE25 AD24 AC23 AB22 AA21
AE11 AD11
J17 K16
L16 M16 P16 R16 T16
H18 G19
F20 E21 D22 B23 A23
Y20 W19 V18 U17 T17 R17 P17 M17
J10 P10 K10 M10
L10
W9 T10
R10 AA9
AB9 AD9 AE9 U10
H9
Y9
F9 G9
RS780MN
RS780MN
VDDHT1 VDDHT2 VDDHT3 VDDHT4 VDDHT5 VDDHT6 VDDHT7
VDDHTRX1 VDDHTRX2 VDDHTRX3 VDDHTRX4 VDDHTRX5 VDDHTRX6 VDDHTRX7
VDDHTTX1 VDDHTTX2 VDDHTTX3 VDDHTTX4 VDDHTTX5 VDDHTTX6 VDDHTTX7 VDDHTTX8 VDDHTTX9 VDDHTTX10 VDDHTTX11 VDDHTTX12 VDDHTTX13
VDDA18PCIE1 VDDA18PCIE2 VDDA18PCIE3 VDDA18PCIE4 VDDA18PCIE5 VDDA18PCIE6 VDDA18PCIE7 VDDA18PCIE8 VDDA18PCIE9 VDDA18PCIE10 VDDA18PCIE11 VDDA18PCIE12 VDDA18PCIE13 VDDA18PCIE14 VDDA18PCIE15
VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2
PART 5/6
PART 5/6
POWER
POWER
VDDPCIE1 VDDPCIE2 VDDPCIE3 VDDPCIE4 VDDPCIE5 VDDPCIE6 VDDPCIE7 VDDPCIE8
VDDPCIE9 VDDPCIE10 VDDPCIE11 VDDPCIE12 VDDPCIE13 VDDPCIE14 VDDPCIE15 VDDPCIE16 VDDPCIE17
VDDC1 VDDC2 VDDC3 VDDC4 VDDC5 VDDC6 VDDC7 VDDC8
VDDC9 VDDC10 VDDC11 VDDC12 VDDC13 VDDC14 VDDC15 VDDC16 VDDC17 VDDC18 VDDC19 VDDC20 VDDC21 VDDC22
VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6
VDD33_1 VDD33_2
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
VDD_PCIE
VDD_MEM_L
1.2V(RS740)/1.1V(RX780;RS780)
12
12
C1406
C1406
C1405
C1405
0.1UF/10V
0.1UF/10V
0.1UF/10V
0.1UF/10V
GND
090404 cost remove C1419,C1420 0.1uF
VDDC
GND
Disable Side Port Memory
SL1408
SL1408
0603
0603
2 1
GND
12
C1441
C1441
0.1UF/10V
0.1UF/10V
GND
090404 cost remove C1442 0.1uF
12
12
C1408
C1408
C1407
C1407
1UF/6.3V
1UF/6.3V
1UF/6.3V
1UF/6.3V
12
C1421
C1421
0.1UF/10V
0.1UF/10V
@
@
090316 change R to SL
VDD33_R
12
C1422
C1422
0.1UF/10V
0.1UF/10V
12
C1409
C1409
4.7UF/6.3V
4.7UF/6.3V
080828
12
C1423
C1423
0.1UF/10V
0.1UF/10V
R1.1080201
Change to +1.1V_NB form NB_VDD_MUX
+1.1V_NB
Change to 0805 from 1206
12
C1425
C1425
0.1UF/10V
0.1UF/10V
12
C1424
C1424
0.1UF/10V
0.1UF/10V
@
@
+3VS
12
C1426
C1426 10UF/6.3V
10UF/6.3V
12
C1427
C1427 10UF/6.3V
10UF/6.3V
+VCC_NB
071130 delete R
B B
H7
L7
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
PART 6/6
PART 6/6
VSSAHT1
VSSAHT2
A25
D23
A A
5
4
VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15
VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT20
J22
L17
L22
L24
E22
G22
L25
P20
H19
G24
G25
N22
M20
V19
R19
R22
R24
R25
U22
H20
W22
W24
3
AA4
AB5
AB1
AB7
AC3
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
GROUND
GROUND
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
L12
Y21
W25
AD25
T12
P12
P15
N13
R11
R14
M14
VSSAPCIE36
VSS8
D11
E14
E15
J12
K14
AE14
AC4
AE1
AE4
AB2
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSS9
VSS10
VSS11
V12
U14
U11
U15
J15
VSS33
VSS32G8VSS31
VSS30
VSS28
VSS27
VSS34
VSS29
VSSAPCIE40
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
Y18
W11
W15
AA14
AB11
AB15
AB17
AB19
AE20
AC12
GND
M11
L15
U1001F
U1001F RS780MN
RS780MN
VSS26
VSS25
R1.11 080319 Change the NB Part number to RS780 (A13)
VSS24
VSS23
K11
AB21
GND
2
Title :
Title :
Title :
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
RS780M-POWER
RS780M-POWER
RS780M-POWER
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
of
of
14 91Tuesday, May 26, 2009
14 91Tuesday, May 26, 2009
14 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
15 91
15 91
15 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
16 91
16 91
16 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
17 91
17 91
17 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
18 91
18 91
18 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
19 91
19 91
19 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
+1.2V_CPU_NB_SB
SRC_SB_PCIE_RCLKP[29] SRC_SB_PCIE_RCLKN[29]
C C
B B
R2.0 080327 Add test point for factory
ICT test
PCIE_SB_NB_RX0P[11] PCIE_SB_NB_RX0N[11] PCIE_SB_NB_RX1P[11] PCIE_SB_NB_RX1N[11] PCIE_SB_NB_RX2P[11] PCIE_SB_NB_RX2N[11] PCIE_SB_NB_RX3P[11] PCIE_SB_NB_RX3N[11]
PCIE_NB_SB_TX0P[11] PCIE_NB_SB_TX0N[11] PCIE_NB_SB_TX1P[11] PCIE_NB_SB_TX1N[11] PCIE_NB_SB_TX2P[11] PCIE_NB_SB_TX2N[11] PCIE_NB_SB_TX3P[11] PCIE_NB_SB_TX3N[11]
PCIE_VDDR
L2001
L2001
21
220Ohm/100Mhz
220Ohm/100Mhz
071212 change P/N
Add net SB_OSC 090326
090403
Correct to R1.1
T2087 TPC28TT2087 TPC28T
T2088 TPC28TT2088 TPC28T
071218
for measurement near U2001
del R2007,R2011
SB_OSC[29]
ALLOW_LDTSTOP[12]
CPU_PROCHOT#[5]
CPU_LDT_STOP#[5,12]
CPU_LDT_RST#[5]
A_RST#
C2001 0.1UF/10VC2001 0.1UF/10V C2007 0.1UF/10VC2007 0.1UF/10V C2009 0.1UF/10VC2009 0.1UF/10V C2010 0.1UF/10VC2010 0.1UF/10V
GND
1 2
R2004 2.05KOHMR2004 2.05KOHM
PCIE_PVDD_L
12
1
1
CPU_PWRGD[5]
change C2015,C2016 to 22pF 090407
C2015
C2015
1 2
22PF/50V
22PF/50V
C2016
A A
C2016
1 2
22PF/50V
22PF/50V
2 3
14
X2001
X2001
32.768Khz
32.768Khz
H=1.3 mm
@
@
4
T2019
T2019 TPC28T
TPC28T
1
12
C2008 0.1UF/10VC2008 0.1UF/10V
12 12 12
12
C2002 0.1UF/10VC2002 0.1UF/10V
12
C2003 0.1UF/10VC2003 0.1UF/10V
12
C2004 0.1UF/10VC2004 0.1UF/10V
12
R2005 562OhmR2005 562Ohm
1%
1 2
PCIE_CALRN
C2005
C2005
2.2UF/10V
2.2UF/10V
080212 R1.1
Del T2017~T2033 for GND Via improvement
T2034 TPC28TT2034 TPC28T
T2035 TPC28TT2035 TPC28T
32K_XIN
12
R2027
R2027 10MOhm
10MOhm
R2028 0OhmR2028 0Ohm
1 2
R1.11 080319 Change the SB Part number to SB700 (A12)
U2001A
U2001A
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700
SB700
BOM時要更換成SB710的料號:02G050003001 090406
1%
A_RX0P_C A_RX0N_C A_RX1P_C A_RX1N_C A_RX2P_C A_RX2N_C A_RX3P_C A_RX3N_C
PCIE_CALRP
071121
1
1
32K_XIN
32K_XOUT
32K_XOUT
SB700
SB700
Part 1 of 5
Part 1 of 5
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
RTC XTAL
RTC XTAL
CPU
CPU
3
PCICLK5/GPIO41
PCI CLKS
PCI CLKS
DEVSEL#
PCI INTERFACE
PCI INTERFACE
REQ3#/GPIO70 REQ4#/GPIO71
GNT3#/GPIO72 GNT4#/GPIO73
CLKRUN#
INTE#/GPIO33
CLOCK GENERATOR
CLOCK GENERATOR
INTF#/GPIO34 INTG#/GPIO35 INTH#/GPIO36
LPCCLK0 LPCCLK1
LPC
LPC
RTC
RTC
LFRAME#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
INTRUDER_ALERT#
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4
PCIRST#
AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30
AD31 CBE0# CBE1# CBE2# CBE3#
FRAME#
IRDY#
TRDY# STOP#
PERR# SERR# REQ0# REQ1# REQ2#
GNT0# GNT1# GNT2#
LOCK#
LAD0
LAD1
LAD2
LAD3
LDRQ0#
SERIRQ
RTCCLK
VBAT
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9
PAR
071120 add net name
PCI_CLK0
P4
PCI_CLK1
P3
CLK_DBGPCI2_R
P1
CLK_DBGPCI1_R
P2
PCI_CLK4_R
T4
PCI_CLK5_R
T3
N1
U2 P7 V4 T1 V3 U1 V1 V2
Del T2052~T2074 for
T2 W1
GND Via improvement
T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2
1
AA2
1
AB4
1
AA1
1
AB3
1
AB2
1
AC1
1
AC2
1
AD1
1
W2
1 U7 AA7
1 Y1
1 AA6
1 W5 AA5
1 Y5
1
1
U6
1
W6 W4
1 V7 AC3
1 AD4
1 AB7
1
GPIO70
AE6
GPIO71
AB6 AD2
1 AE4
1 AD5
1
GPIO72
AC6
GPIO73
AE5 AD6 V5
1
GPIO33
AD3
GPIO34
AC4
GPIO35
AE2
GPIO36
AE3
LPC_CLK0
G22
LPC_CLK1_R
E22 H24 H23 J25 J24 H25 H22
1
GPIO68
AB8
GPIO65
AD7 V15
C3
INTRUDER_ALERT#
C2
VBAT
B2
1
T2020
T2020 TPC28T
TPC28T
071204 AMD review
1 1
R2006 22OhmR2006 22Ohm
1 2
R2008 22OhmR2008 22Ohm
1 2
080212 R1.1
T2075TPC28T T2075TPC28T T2076TPC28T T2076TPC28T T2077TPC28T T2077TPC28T T2078TPC28T T2078TPC28T T2079TPC28T T2079TPC28T T2080TPC28T T2080TPC28T T2081TPC28T T2081TPC28T
080218
T2082TPC28T T2082TPC28T T2083TPC28T T2083TPC28T
Add Test Point
T2036TPC28T T2036TPC28T
CBE1#_VIA
DELSEL#_VIA
SERR#_VIA
071127 071127
071127 071127
1 1 1 1
071127
12
0.1UF/10V
0.1UF/10V
1
T2038TPC28T T2038TPC28T T2039TPC28T T2039TPC28T T2040TPC28T T2040TPC28T
T2042TPC28T T2042TPC28T T2043TPC28T T2043TPC28T T2044TPC28T T2044TPC28T T2045TPC28T T2045TPC28T T2046TPC28T T2046TPC28T
T2002TPC28T T2002TPC28T T2003TPC28T T2003TPC28T T2004TPC28T T2004TPC28T
T2048TPC28T T2048TPC28T T2049TPC28T T2049TPC28T T2050TPC28T T2050TPC28T
T2051TPC28T T2051TPC28T
R2025 22OhmR2025 22Ohm
C2013
C2013
Reserved Via
T2041TPC28T T2041TPC28T
1
1
T2005TPC28T T2005TPC28T
1
T2007TPC28T T2007TPC28T
1
T2009TPC28T T2009TPC28T T2010TPC28T T2010TPC28T T2011TPC28T T2011TPC28T T2012TPC28T T2012TPC28T
1 2
T2013TPC28T T2013TPC28T
T2014TPC28T T2014TPC28T
1
T2015TPC28T T2015TPC28T
1
T2017TPC28T T2017TPC28T
1
12
C2014
C2014 1UF/6.3V
1UF/6.3V
080828
GND GND
T2084 TPC28TT2084 TPC28T T2089 TPC28TT2089 TPC28T
1
A_RST#
1
T2022
T2022 TPC28T
TPC28T
T2086TPC28T T2086TPC28T
8.2KOhm
8.2KOhm
CLK_DBGPCI2 [24,44]
CLK_DBGPCI1 [24,44] PCI_CLK4 [24] PCI_CLK5 [24]
R2032
R2032
1 2
2
071207 AMD
review
SL2020
SL2020
U2002
U2002
NC
NC
1
A
A
2 3 4
GND
GND
74LVC1G17GW
74LVC1G17GW
@
@
GND
STRAP
0402
0402
CHANGE
21
VCC
VCC
080130 R1.1 Change TPM CLK
+3VSUS
5
Y
Y
1
T2023
T2023 TPC28T
TPC28T
R2031 33OhmR2031 33Ohm
1 2
R2033 33OhmR2033 33Ohm
1 2
1
R1.1
T2037TPC28T T2037TPC28T
080218 R1.1
Add Test Point
T2085TPC28T T2085TPC28T
AMD review 071206
internal Pull Up 15K
T2006TPC28T T2006TPC28T
1
AMD review 071206
1
LPC_AD0 [30,44] LPC_AD1 [30,44] LPC_AD2 [30,44] LPC_AD3 [30,44]
R2026 510OhmR2026 510Ohm
SGL_JUMP
SGL_JUMP
R2.02 080519 Un-Mount D2001 and Mount R2035. 080526 Change R2035 P/N form 10G212000004030 to 10G212000004070 for ECN requirement
internal Pull Up 8.2K
T2008TPC28T T2008TPC28T
PM_CLKRUN# [30]
080130 R1.1 Change TPM CLK
LPC_FRAME# [30,44]
INT_SERIRQ [30]
RTC_CLK [24]
1 2
1
JRST1
JRST1
112
2
071204 AMD review
LPC_CLK0 [24]
CLK_KBCPCI [24,30]
+VCC_RTC
T2016TPC28T T2016TPC28T
1
T2021
T2021 TPC28T
TPC28T
3
RB715F
RB715F
R2035 0OhmR2035 0Ohm
1 2
標注
STRAP
D2001
D2001
071119
@
@
2 1
3 4
CLK_KBCPCI
+3VA +RTCBAT
R2037
R2037 1KOhm
1KOhm
@
@
1 2
1 1
12
R1.11
BAT2001
BAT2001
BATT_HOLDER_2P
BATT_HOLDER_2P
080310 Change the P/N of BAT2001 from
12G201100203 to 12G201100208
GND
12
C2060
C2060
@
@
EMI
10PF/50V
10PF/50V
090414
GND
R2.0 080327 Add test point for factory
ICT test
T2018TPC28T T2018TPC28T T2024TPC28T T2024TPC28T
NB_RST# [12]
BUF_PLT_RST# [5,30,33,40,43,53,71]
change ctystal (SB710) 07G010413277 090331
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
F5Z
F5Z
F5Z
Title :
Title :
Title :
Engineer:
Engineer:
Engineer:
1
SB700_CPU/PCIE/LPC/CLK
SB700_CPU/PCIE/LPC/CLK
SB700_CPU/PCIE/LPC/CLK
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
of
of
20 91Tuesday, May 26, 2009
20 91Tuesday, May 26, 2009
20 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
071114
1
1
T2117 TPC28TT2117 TPC28T
PM_RSMRST#_EC[30]
1 1 1
PM_PWRBTN#[30]
PM_PWROK_EC[30]
A20GATE[30] RC_IN#[30]
CPPE_DET#[43,44]
SYS_REST#
PCIE_WAKE#[33,43,53]
T2118 TPC28TT2118 TPC28T T2102 TPC28TT2102 TPC28T
T2111 TPC28TT2111 TPC28T T2104 TPC28TT2104 TPC28T
071113
R2137
R2137 300Ohm
300Ohm
+1.8VS
1 2
( I / PU )
T2105 TPC28TT2105 TPC28T
T2107 TPC28TT2107 TPC28T
T2109 TPC28TT2109 TPC28T T2103 TPC28TT2103 TPC28T T2110 TPC28TT2110 TPC28T
071207
RS780 POWERGOOD is 1.8VS rail
NB_PWRGD[12]
C C
SMBCLK_DRAM[7,8,29,44]
SMBDATA_DRAM[7,8,29,44]
SMBDATA_NEWCARD[7,8,29,44] SMBCLK_NEWCARD[7,8,29,44]
R2.0 080401 Add R2108 and R2113 for SMBCLK_NEWCARD and SMBDATA_NEWCARD.
071114
USB_OC4_NEWCARD#[43]
080212 R1.1
Del T2115 and T2116 for GND Via improvement (GPIO44 and 46)
internal P/U 8.2k
PCB_ID2 PCB_ID1
B B
PCB_ID0[22]
R2.01 080411 Change P/N to
10G212472004010
PCB_ID0
R2118
R2118
R2117
R2117
4.7KOhm
4.7KOhm
4.7KOhm
4.7KOhm
1 2
1 2
R2.0
080402
Mount R2117 and un-monent R2118 for PCB ID
@
@
080215
R2119
R2119
change 4.7K P/N from
4.7KOhm
4.7KOhm
10G212472004040 to
1 2
10G212472004010
071120
res. value 10k -> 4.7k to get LOW level < Vih(1.8V)
ACZ_SDIN0_AUD[36]
T2115 TPC28TT2115 TPC28T
080218 R1.1
Add Test Point
R1.1
EXT_SMI#[30]
EXT_SCI#[30] PM_SUSB#[30] PM_SUSC#[30]
SUS_STAT#[12]
071119
SB_THRMTRIP#
1
071127
SB_SPKR[36]
T2112 TPC28TT2112 TPC28T
080118 Reserve Via
USB_OC1#[52] USB_OC0#[52]
4
T2101 TPC28TT2101 TPC28T
PM_RSMRST#_EC
T2121 TPC28TT2121 TPC28T
1 1
GPIO39 GPIO40
071204
GPIO8
1
GPIO66
1
1
T2119 TPC28TT2119 TPC28T T2120 TPC28TT2120 TPC28T
071204
T2106 TPC28TT2106 TPC28T
T2108 TPC28TT2108 TPC28T
NB_PWRGD_R
071127
GPIO10 GPIO6 PCB_ID1
T2123 TPC28TT2123 TPC28T T2113 TPC28TT2113 TPC28T
071127
PCB_ID2
DDR3_RST#_Via
1
T2114 TPC28TT2114 TPC28T T2116 TPC28TT2116 TPC28T
ACZ_BCLK ACZ_SDOUT
ACZ_SYNC ACZ_RST# GPM8#_VIA
TEST2 TEST1 TEST0
GPIO0
SB_SPKR_R
SPI_CS2#
1 1
R1.11 080319 Change the SB Part number to SB700 (A12)
U2001D
U2001D
E1
1
1
E2 H7 F5 G1 H2 H1 K3 H5 H4 H3
Y15
W15
K4
K24
F1
1
J2 H6 F2
1
J6
W14
D3
AE18 AD18 AA19
W17
V17 W20 W21
AA18
W18
K1
1
K2
1
AA20
Y18
C1
Y19
G5
B9 B8
1
A8 A9
1
E5 F8 E4
M1 M2
J7 J8 L8
M3
L6
M4
L5
H19 H20 H21
F25 D22
E24
E25 D23
SB700
SB700
PCI_PME#/GEVENT4# RI#/EXTEVNT0# SLP_S2/GPM9# SLP_S3# SLP_S5# PWR_BTN# PWR_GOOD SUS_STAT# TEST2 TEST1 TEST0 GA20IN/GEVENT0# KBRST#/GEVENT1# LPC_PME#/GEVENT3# LPC_SMI#/EXTEVNT1# S3_STATE/GEVENT5# SYS_RESET#/GPM7# WAKE#/GEVENT8# BLINK/GPM6# SMBALERT#/THRMTRIP#/GEVENT2# NB_PWRGD
RSMRST#
SATA_IS0#/GPIO10 CLK_REQ3#/SATA_IS1#/GPIO6 SMARTVOLT1/SATA_IS2#/GPIO4 CLK_REQ0#/SATA_IS3#/GPIO0 CLK_REQ1#/SATA_IS4#/FANOUT3 CLK_REQ2#/SATA_IS5#/FANIN3 SPKR/GPIO2 SCL0/GPOC0# SDA0/GPOC1# SCL1/GPOC2# SDA1/GPOC3# DDC1_SCL/GPIO9 DDC1_SDA/GPIO8 LLB#/GPIO66 SMARTVOLT2/SHUTDOWN#/GPIO5 DDR3_RST#/GEVENT7#
USB_OC6#/IR_TX1/GEVENT6# USB_OC5#/IR_TX0/GPM5# USB_OC4#/IR_RX0/GPM4# USB_OC3#/IR_RX1/GPM3# USB_OC2#/GPM2# USB_OC1#/GPM1# USB_OC0#/GPM0#
AZ_BITCLK AZ_SDOUT AZ_SDIN0/GPIO42 AZ_SDIN1/GPIO43 AZ_SDIN2/GPIO44 AZ_SDIN3/GPIO46 AZ_SYNC AZ_RST# AZ_DOCK_RST#/GPM8#
IMC_GPIO0 IMC_GPIO1 SPI_CS2#/IMC_GPIO2 IDE_RST#/F_RST#/IMC_GPO3
IMC_GPIO4 IMC_GPIO5 IMC_GPIO6 IMC_GPIO7
HD AUDIO
HD AUDIO
3
SB700
SB700
USBCLK/14M_25M_48M_OSC
USB MISC
USB MISC
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
/GPIO39
/GPIO39
/GPIO40
/GPIO40
GPIO
GPIO
IMC_PWM0/IMC_GPIO10
USB OC
USB OC
SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17
INTEGRATED uC
INTEGRATED uC
INTEGRATED uC
INTEGRATED uC
Part 4 of 5
Part 4 of 5
USB_RCOMP
USB_FSD13P USB_FSD13N
USB_FSD12P USB_FSD12N
USB_HSD11P
USB 1.1
USB 1.1
USB_HSD11N USB_HSD10P
USB_HSD10N
USB_HSD9P USB_HSD9N
USB_HSD8P USB_HSD8N
USB_HSD7P USB_HSD7N
USB_HSD6P USB_HSD6N
USB_HSD5P
USB_HSD5N USB_HSD4P
USB 2.0
USB 2.0
USB_HSD4N USB_HSD3P
USB_HSD3N USB_HSD2P
USB_HSD2N USB_HSD1P
USB_HSD1N USB_HSD0P
USB_HSD0N
IMC_GPIO8 IMC_GPIO9
SCL2/IMC_GPIO11 SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25
IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41
071129 Add net name
USBCLK_48_SB
C8
USB_RCOMP
G8
E6 E7
F7 E8
H11 J10
E11 F11
A11 B11
C10 D10
G11 H12
E12 E14
C12 D12
B12 A12
G12 G14
H14 H15
A13 B13
B14 A14
A18 B18 F21 D21 F19 E20 E21 E19 D19 E18
G20 G21 D25 D24 C25 C24 B25 C23
B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18
1 2
R2104 11.8KOhm
R2104 11.8KOhm
r0603_h24
r0603_h24
SMBCLK_SYS [53] SMBDATA_SYS [53]
SB_GP16 [24] SB_GP17 [24]
GND
USB_PP13 [61] USB_PN13 [61]
USB_PP12 [61] USB_PN12 [61]
USB_PP10 [40] USB_PN10 [40]
USB_PP6 [45] USB_PN6 [45]
USB_PP4 [43] USB_PN4 [43]
USB_PP2 [52] USB_PN2 [52]
USB_PP1 [52] USB_PN1 [52]
USB_PP0 [52] USB_PN0 [52]
1 1
071122
for strap
2
USBCLK_48 [29]
Fingerprint
Bluetooth
AU6433
CCD
NewCard
USB CONN
071204 AMD review
T2122
T2122
FOR MINICARD/NEWCARD
T2124
T2124 TPC28T
TPC28T TPC28T
TPC28T
USB [3:0] ->USB PORT USB 4 -> NEW CARD USB 6 -> CAMERA
USB 10 -> CARDREADER
USB 12 -> BT Module
071203
AMD review
SMBCLK_SYS SMBDATA_SYS
071204 AMD review
SUS_STAT#
TEST2 TEST1 TEST0
S0 power
SMBCLK_DRAM SMBDATA_DRAM
1
R2110 4.7KOhm
R2110 4.7KOhm
@
@
SUS_STAT#
R2109 4.7KOhmR2109 4.7KOhm
5 6 7 8
090404 cost
1 2
2.2KOHM
2.2KOHM
3 4
2.2KOHM
2.2KOHM
R2120 2.2kOHM@R2120 2.2kOHM@
1 2
R2121 2.2kOHM@R2121 2.2kOHM@
1 2
R2132 2.2kOHM@R2132 2.2kOHM@
1 2
12
2.2KOHM
2.2KOHM
2.2KOHM
2.2KOHM
RN2112A
RN2112A RN2112B
RN2112B
071119
12
RN2112C
RN2112C RN2112D
RN2112D
GND
+3VS
+3VSUS
071204 AMD review
ACZ_SDIN0_AUD
A A
@
@
R2134 10KOhm
R2134 10KOhm
12
need to modify topology??
5
for strap
ACZ_RST#[24]
EMI 090415
AMD review
R2133 10KOhm@ R2133 10KOhm@
ACZ_BCLK
4
ACZ_RST#
C2148
C2148
1 2
22PF/50V
22PF/50V
/EMI
/EMI
ACZ_SYNC
ACZ_SDOUT
12
PUT AT SB700 SIDE
R2123A
R2123A
1 2
33OHM
33OHM
R2123D
R2123D
7 8
33OHM
33OHM
R2123B
R2123B
3 4
33OHM
33OHM
R2123C
R2123C
5 6
33OHM
33OHM
Change 33ohm to 4R8P 090405
ACZ_RST#_AUD
SB700A11 EC enable Strap Workaround
SB700A11
ACZ_BCLK_AUD
ACZ_BCLK_AUD
ACZ_SYNC_AUD
ACZ_SDOUT_AUD
3
ACZ_RST#_AUD [36,37]
ACZ_BCLK_AUD [36]
ACZ_SYNC_AUD [36]
ACZ_SDOUT_AUD [36]
SB700_GPIO/USB/HD/ACPI
SB700_GPIO/USB/HD/ACPI
SB700_GPIO/USB/HD/ACPI
Title :
Title :
Title :
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
<OrgAddr1>
of
of
of
21 91Tuesday, May 26, 2009
21 91Tuesday, May 26, 2009
21 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
R2.0 080331
Change the R2208, R2209 to C2218 and C2219.
Change the R2210, R2211 to C2220 and C2221.
C2218 0.01UF/16VC2218 0.01UF/16V
SATA_TXP0[51]
D D
C C
for SATA HDD
for SATA ODD
SATA_TXN0[51]
SATA_RXN0[51] SATA_RXP0[51]
SATA_TXP1[51] SATA_TXN1[51]
SATA_RXN1[51] SATA_RXP1[51]
071119
change P/N
12
C2209
C2209
27PF/50V
27PF/50V
+1.2V_CPU_NB_SB
10MOhm
10MOhm
220Ohm/100Mhz
220Ohm/100Mhz
1 2
C2219 0.01UF/16VC2219 0.01UF/16V
1 2
C2220 3900PF/50VC2220 3900PF/50V
1 2
C2221 3900PF/50VC2221 3900PF/50V
1 2
GND
R2205
R2205
12
X2201
X2201
12
12
25Mhz
25Mhz
C2210
C2210
27PF/50V
27PF/50V
GND
L2202
L2202
21
Place SATA_CAL RES very close to ball of SB700
R2201 1KOhm
R2201 1KOhm
1%
1%
1 2
SATA_LED#[56]
12
PLLVDD_SATA
12
090403
+3VS XTLVDD_SATA
L2203
B B
L2203
21
220Ohm/100Mhz
220Ohm/100Mhz
PLLVDD_SATA XTLVDD_SATA
C2222
C2222 1UF/6.3V
1UF/6.3V
12
C2217
C2217
0.1UF/10V
0.1UF/10V
4
071121
add net name
SATA_TXP0_R SATA_TXN0_R
SATA_TXP1_R SATA_TXN1_R
SATA_CAL
1%
SATA_X1 SATA_X2
12
C2213
C2213
0.1UF/10V
0.1UF/10V
@
@
R1.11 080319 Change the SB Part number to SB700 (A12)
change
U2001B
AB10 AC10
AE10 AD10
AD11 AE11
AB12 AC12
AE12 AD12
AD13 AE13
AB14 AC14
AE14 AD14
AD15 AE15
AB16 AC16
AE16 AD16
AA12
AA11
U2001B
AD9 AE9
V12 Y12
W11
W12
SB700
SB700
SATA_TX0P SATA_TX0N
SATA_RX0N SATA_RX0P
SATA_TX1P SATA_TX1N
SATA_RX1N SATA_RX1P
SATA_TX2P SATA_TX2N
SATA_RX2N SATA_RX2P
SATA_TX3P SATA_TX3N
SATA_RX3N SATA_RX3P
SATA_TX4P SATA_TX4N
SATA_RX4N SATA_RX4P
SATA_TX5P SATA_TX5N
SATA_RX5N SATA_RX5P
SATA_CAL SATA_X1 SATA_X2 SATA_ACT#/GPIO67
PLLVDD_SATA XTLVDD_SATA
SB700
SB700
Part 2 of 5
Part 2 of 5
SATA PWR SERIAL ATA
SATA PWR SERIAL ATA
HW MONITOR
HW MONITOR
IDE_IORDY
IDE_IRQ
IDE_A0 IDE_A1 IDE_A2
IDE_DACK#
IDE_DRQ IDE_IOR#
IDE_IOW#
IDE_CS1# IDE_CS3#
IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24
ATA 66/100/133
ATA 66/100/133
IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS1#/GPIO32
LAN_RST#/GPIO13
ROM_RST#/GPIO14
SPI ROM
SPI ROM
FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49
FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52
TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60
AVDD AVSS
HWM not Implemented: Decoupling caps not used.
071119
3
AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24
AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23
G6 D2 D1 F4 F3
U15 J1
M8 M5 M7
P5 P8 R8
C6 B6 A6 A5 B5
A4 B4 C4 D4 D5 D6 A7 B7
F6 G7
GPIO12 GPIO11
GPIO31 GPIO32
GPIO14
GPIO48 GPIO49
GPIO50 GPIO51_VIA GPIO52
TEMP_COMM
GPIO61 GPIO62 GPIO63 GPIO64
GPIO53 GPIO54
GPIO57 GPIO58 GPIO59 GPIO60
remove tp 090416
1 1
1 1
071127
1 1 1
AVDD_HWM
PCB_ID0 [21]
071204
T2217 TPC28TT2217 TPC28T T2218 TPC28TT2218 TPC28T
T2219 TPC28TT2219 TPC28T T2220 TPC28TT2220 TPC28T
WLAN_ON [53]
1 1 1 1
T2234 TPC28TT2234 TPC28T T2235 TPC28TT2235 TPC28T T2236 TPC28TT2236 TPC28T
@ C2214
@
1
T2223 TPC28TT2223 TPC28T
1
T2224 TPC28TT2224 TPC28T
1
T2226 TPC28TT2226 TPC28T
1
T2228 TPC28TT2228 TPC28T T2229 TPC28TT2229 TPC28T T2230 TPC28TT2230 TPC28T T2231 TPC28TT2231 TPC28T
1
12
C2214
0.1UF/16V
0.1UF/16V
GND
071119 add TP
BT_ON [61]
T2221 TPC28TT2221 TPC28T
1
T2222 TPC28TT2222 TPC28T
T2232 TPC28TT2232 TPC28T
WLAN_LED_ON [56] BTLED_ON [56]
GND trace at least 10mil wide
1
1
T2227 TPC28TT2227 TPC28T
2
080218
R1.1
Add Test Point
071114 071120
modify net name
T2233 TPC28TT2233 TPC28T
+3VSUS
GPIO54,GPIO57 可設成output low R2204 & R2207可以Costdown 090405
071119
071203
WLAN_LED_ON BTLED_ON GPIO57
R2202 10KOhmR2202 10KOhm R2203 10KOhmR2203 10KOhm R2204 10KOhm
R2204 10KOhm
TEMP_COMM
GND
21
R2206
R2206
0603
0603
12 12 12
@
@
090404 cost
M51/X71 NO USE
Notice GPIO 54 090410
GPIO54
+3VSUS
GND
@
@
GND
12
R2207
R2207 10KOhm
10KOhm
1
REMOVE C2216 090403
A A
Title :
Title :
Title :
SB700_PATA/SATA
SB700_PATA/SATA
SB700_PATA/SATA
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
22 91Tuesday, May 26, 2009
22 91Tuesday, May 26, 2009
22 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
4
3
2
1
R1.11 080319
D D
+3VS
C C
B B
X7R
12
+1.2V_CPU_NB_SB
1 2
+3VSUS
C2301
C2301
0.1UF/10V
0.1UF/10V
L2301
L2301
0Ohm
0Ohm
1 2
10UF/6.3V
10UF/6.3V
+1.2V_CPU_NB_SB
L2303
L2303
0Ohm
0Ohm
12
C2338
C2338
+3VS VDDQ_R
12
C2303
C2303
090403 cost
1UF/6.3V
1UF/6.3V
GND
IDE and Flash Interface Not Implemented: Tied to +3.3V_S0.
VDD33_18_R
12
C2319
C2318
C2318
4.7UF/6.3V
4.7UF/6.3V
12
C2331
C2331
22UF/6.3V
22UF/6.3V
12
C2340
C2340 1UF/6.3V
1UF/6.3V
C2319 1UF/6.3V
1UF/6.3V
12
C2332
C2332 1UF/6.3V
1UF/6.3V
@
@
12
C2341
C2341 1UF/6.3V
1UF/6.3V
GND
GND
12
C2333
C2333 1UF/6.3V
1UF/6.3V
L2302
L2302
1 2
0Ohm
0Ohm
+3VS
090403 cost
12
090403 cost
0990403 cost
12
C2339
C2339
10UF/6.3V
10UF/6.3V
@
@
090403 cost
12
C2326
C2326
0.1UF/10V
0.1UF/10V
12
C2324
C2324
0.1UF/10V
0.1UF/10V
12
C2334
C2334
0.1UF/10V
0.1UF/10V
PCIE_VDDR
12
C2325
C2325
0.1UF/10V
0.1UF/10V
GND
12
C2330
C2330
0.1UF/10V
0.1UF/10V
@
@
AVDD_SATA
12
C2335
C2335
0.1UF/10V
0.1UF/10V
GND
AVDD_USB
Change the SB Part number to SB700 (A12) R1.11 080319
VDD_R +1.2V_CPU_NB_SB
090403 cost
12
C2348
C2348 1UF/6.3V
1UF/6.3V
@
remove bead & cap 090403
@
12
C2321
C2321
2.2UF/10V
2.2UF/10V
0990403
12
C2337
C2337 1UF/6.3V
12
C2355
C2355
0.1UF/10V
0.1UF/10V
1UF/6.3V
GND
12
GND
12
GND
L2304
L2304
C2351
C2351
2.2UF/10V
2.2UF/10V
220Ohm/100Mhz
220Ohm/100Mhz
C2357
C2357
2.2UF/10V
2.2UF/10V
080828
12
GND
090403 cost
+1.2V_USB_PHY_R
AVDDCK_1.2V
AB21
AA21 AA22 AE25
AA14 AB18 AA15 AA17 AC18 AD17 AE17
T15
U16 U17
AA4 AB5
Y20
P18 P19 P20
P21 R22 R24 R25
A16
B16 C16 D16 D17
E17
F15
F17
F18 G15 G17 G18
L9
M9 U9
V8
W7
Y6
U2001C
U2001C
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12
VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4
PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7
AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7
AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5
SB700
SB700
SB700
SB700
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
IDE/FLSH I/O
IDE/FLSH I/O
POWER
POWER
A-LINK I/O
A-LINK I/O
3.3V_S5 I/OCORE S5
3.3V_S5 I/OCORE S5
SATA I/O
SATA I/O
USB_PHY_1.2V_1 USB_PHY_1.2V_2
PLL CLKGEN I/O
PLL CLKGEN I/O
USB I/O
USB I/O
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8
CORE S0
CORE S0
VDD_9
CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4
S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7
S5_1.2V_1 S5_1.2V_2
V5_VREF AVDDCK_3.3V AVDDCK_1.2V
AVDDC
L15 M12 M14 N13 P12 P14 R11 R15 T16
L21 L22 L24 L25
A17 A24 B17 J4 J5 L1 L2
G2 G4
A10 B10
AE7
AVDDCK_3.3V
J16 K17
+3.3V_AVDDC
E9
12
C2310
C2310 1UF/6.3V
1UF/6.3V
@
@
12
GND
2 1
220Ohm/100Mhz
220Ohm/100Mhz
L2307
L2307
2 1
071204
AMD review
2 1
220Ohm/100Mhz
220Ohm/100Mhz
C2356
C2356
2.2UF/10V
2.2UF/10V
080828
@
@
+1.2V_CKVDD
C2322
C2322
2.2UF/10V
2.2UF/10V
L2306
L2306
change C2311 to 10uF 090403
12
C2328
C2328 1UF/6.3V
1UF/6.3V
GND
12
C2311
C2311 10UF/6.3V
10UF/6.3V
+1.2V_CPU_NB_SB
L2305
L2305
0603
0603
+3VSUS+3.3VALW_R
12
C2312
C2312
0.1UF/10V
0.1UF/10V
21
0990403
+1.2VSUS+1.2VALW_R
12
C2352
C2352
0.1UF/10V
0.1UF/10V
V5_VREF
+3VS
+1.2V_CPU_NB_SB
+3VSUS
071214 move L and C
R2306 1KOhmR2306 1KOhm
12
C2345
C2345 1UF/10V
1UF/10V
080828
SCHOTTKY BAT54AW-L SOT-323
SCHOTTKY BAT54AW-L SOT-323
GND
1 2
12
GND
12
D2301
D2301
BAT54AW
BAT54AW
C2313
C2313
0.1UF/10V
0.1UF/10V
C2353
C2353
0.1UF/10V
0.1UF/10V
12
+5VS
3
12
C2354
C2354 10UF/6.3V
10UF/6.3V
090403 cost
@
@
GND
+3VS
Change the SB Part number to SB700 (A12)
U2001E
U2001E
SB700
SB700
T10
AVSS_SATA_1
U10
AVSS_SATA_2
U11
AVSS_SATA_3
U12
AVSS_SATA_4
V11
AVSS_SATA_5
V14
AVSS_SATA_6
W9
AVSS_SATA_7
Y9
AVSS_SATA_8
Y11
AVSS_SATA_9
Y14
AVSS_SATA_10
Y17
AVSS_SATA_11
AA9
AVSS_SATA_12
AB9
AVSS_SATA_13
AB11
AVSS_SATA_14
AB13
AVSS_SATA_15
AB15
AVSS_SATA_16
AB17
AVSS_SATA_17
AC8
AVSS_SATA_18
AD8
AVSS_SATA_19
AE8
AVSS_SATA_20
A15
AVSS_USB_1
B15
AVSS_USB_2
C14
AVSS_USB_3
D8
AVSS_USB_4
D9
AVSS_USB_5
D11
AVSS_USB_6
D13
AVSS_USB_7
D14
AVSS_USB_8
D15
AVSS_USB_9
E15
AVSS_USB_10
F12
AVSS_USB_11
F14
AVSS_USB_12
+1.2VSUS
G9
AVSS_USB_13
H9
AVSS_USB_14
H17
AVSS_USB_15
J9
AVSS_USB_16
J11
AVSS_USB_17
J12
AVSS_USB_18
J14
AVSS_USB_19
J15
AVSS_USB_20
K10
AVSS_USB_21
K12
AVSS_USB_22
K14
AVSS_USB_23
K15
AVSS_USB_24
H18
PCIE_CK_VSS_1
J17
PCIE_CK_VSS_2
J22
PCIE_CK_VSS_3
K25
PCIE_CK_VSS_4
M16
PCIE_CK_VSS_5
M17
PCIE_CK_VSS_6
M21
PCIE_CK_VSS_7
P16
PCIE_CK_VSS_8
F9
AVSSC
SB700
SB700
GND GND
PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21
Part 5 of 5
Part 5 of 5
VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43
GROUND
GROUND
VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50
PCIE_CK_VSS_9
AVSSCK
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8 VSS_9
A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24
P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25
L17
A A
Title :
Title :
Title :
SB700_POWER
SB700_POWER
SB700_POWER
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
23 91Tuesday, May 26, 2009
23 91Tuesday, May 26, 2009
23 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
4
Remove R2405, R2406,R2416 R2408, R2418, R2420, R2418 090405
3
2
1
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
+3VS +3VS +3VS +3VSUS +3VSUS
R2401
R2401 10KOhm
10KOhm
@
@
1 2
(PCI_CLK2)
(PCI_CLK3)
080130 R1.1
(LPC_CLK0)
071204
(LPC_CLK1)
C C
AMD review
REQUIRED STRAPS
CLK_DBGPCI2[20,44] CLK_DBGPCI1[20,44]
PCI_CLK4[20]
PCI_CLK5[20] LPC_CLK0[20] CLK_KBCPCI[20,30]
RTC_CLK[20]
ACZ_RST#[21]
SB_GP17[21] SB_GP16[21]
R2410
R2410 10KOhm
10KOhm
1 2
GND GND GND GND GND GND GND
PCI_CLK3
BOOTFAIL
PULL
TIMER
HIGH
ENABLED
BOOTFAIL
PULL
TIMER
LOW
DISABLED
DEFAULT
B B
USE DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
R2402
R2402 10KOhm
10KOhm
@
@
1 2
R2411
R2411 10KOhm
10KOhm
1 2
PCI_CLK4 PCI_CLK5
RESERVED
+3VS
R2403
R2403 10KOhm
10KOhm
@
@
1 2
R2412
R2412 10KOhm
10KOhm
@
@
1 2
GND
1 2
1 2
RESERVED
R2404
R2404 10KOhm
10KOhm
@
@
071121
R2413
R2413 10KOhm
10KOhm
@
@
1 2
LPC_CLK0
EC ENABLED
EC DISABLED
DEFAULT
R2414
R2414 10KOhm
10KOhm
R2415
R2415 10KOhm
10KOhm
EXT
1 2
LPC_CLK1
CLKGEN ENABLED
CLKGEN DISABLED
DEFAULT
R2407
R2407 10KOhm
10KOhm
1 2
@
@
RTC_CLK
INTERNAL RTC
DEFAULT
EXT. RTC
(PD on X1, apply 32KHz to RTC_CLK)
R2417
R2417 10KOhm
10KOhm
1 2
ACZ_RST#
ENABLE PCI MEM BOOT
DISABLE PCI MEM BOOT
DEFAULT
R2409
R2409
2.2kOHM
2.2kOHM
1 2
GP17
GP16PCI_CLK2
H,H = Reserved H,L = SPI ROM
L,H = LPC ROM (Default)
L,L = FWH ROM
1 2
R2419
R2419
2.2kOHM
2.2kOHM
Remove EEPROM 090405
For SB700 A12 and later version
080204 R1.1 Change the Text Comment
A A
Title :
Title :
Title :
SB700_STRAP
SB700_STRAP
SB700_STRAP
<OrgAddr1>
<OrgAddr1>
Engineer:
Engineer:
F5Z
F5Z
F5Z
Engineer:
1
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
ASUSTeK.Computer.INC
Size Project Name
Size Project Name
Size Project Name
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
<OrgAddr1>
of
of
of
24 91Tuesday, May 26, 2009
24 91Tuesday, May 26, 2009
24 91Tuesday, May 26, 2009
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
of
of
25 91Tuesday, May 26, 2009
25 91Tuesday, May 26, 2009
25 91Tuesday, May 26, 2009
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
26 91
26 91
26 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
27 91
27 91
27 91
1
Rev
Rev
Rev
2.05
2.05
2.05
5
D D
C C
4
3
2
1
B B
A A
Title :
Title :
Title :
Engineer:
Engineer:
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
ASUSTeK COMPUTER INC. NB1
Size Project Name
Size Project Name
Size Project Name
A
A
A
Date: Sheet
Date: Sheet of
Date: Sheet of
Tuesday, May 26, 2009
Tuesday, May 26, 2009
5
4
3
Tuesday, May 26, 2009
F5Z
F5Z
F5Z
2
Engineer:
<OrgAddr1>
<OrgAddr1>
<OrgAddr1>
of
28 91
28 91
28 91
1
Rev
Rev
Rev
2.05
2.05
2.05
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