Arcam Diva CD-62 Service manual

Service Manual

ARCAM

CD62

Issue 1.0

DiVA CD62 Compact Disc Player (Text)

ARCAM

Contents List

Contents list

Circuit description

Service guide

Circuit diagrams

Component overlays

Circuit board parts list

General assembly parts list

CD62 (text) Circuit Description

Summary

The main Motherboard/Display PCBs for the Diva CD players may be assembled as three different versions:

! DiVA CD62 (text) - With alternate components fitted

and the 92DAC upgrade connections omitted (L933AY).

! DiVA CD72 (text) - With the standa rd s e t of

components fitted (L899AY).

! DiVA CD92 (text) - With analogue components and

connectors omitted, for use as a host motherboard for the plug-in 92DAC (L934AY).

All systems are based on a Sony kit, comprising CDM14BL5BD25 CD transport / loader / laser mechanism, micro-controller and fluorescent display.

Power Supplies

The CD62 may be fitted with any of the following transformers dependant on supply voltage required:-

! 230VAC only - part number L849TX ! 115VAC only - part number L850TX ! 100VAC only - part number L851TX

Later models are fitted with L867TX which is a 230/115VAC transformer.

The mains transformer has three secondary windings:

1. 13.7V – 0V – 13.7V to provide ±12V(A) supplies (IC201 and IC205) for the audio output circuitry via regulators IC201 and IC205.

2. 9V-0V-32V to produce the digital, motor drive and fluorescent display grid supplies:

+11V(U) Unregulated supply for relay drive and

+5V(D) supply

+7V (IC200) Mechanism and motor driver

supply +5V(D) (IC202) General digital logic supply +5V(A) (IC203) Supply to DAC

-30V (IC204) Display grid voltage.

3. 0-5V to provide an AC supply for the display filament.

Relay Mute Control

This circuit drives a relay to un-mute the analogue output ~5 seconds after the unit is powered on, and quickly mutes the output when the unit is switched off. Th e cir cu it works effectively as an “AND” gate. If AC is present on the transformer secondary winding and the 5second timer composed of R222 and C221 has reached the threshold voltage (Vbe of TR200 + Vbe of TR201 - Vce of TR202, or ~1.0V), the relay coil is connected to +11V (referenced to 0V_3 as required by the 9DAC’s internal circuitry) via TR204. When AC is removed, C231 discharges quickly through R225, the base voltage of TR204 rises and the relay coil voltage is removed, muting t he output. TR203 resets the ‘timer’ by discharging C221 quickly at turn-off.

Remote Control/PIC Micro

Remote control data is received from the IREye on the display PCB and buffered by TR300 and TR301. The Programmable Interrupt Controller converts the RC-5 format data into the NEC format required by the Sony micro.

Motor Driver

The status of the drawer is indicated to the micro by two micro switches ‘INSW’ and ‘OUTSW’ on SK205. The micro controls the drawer motor via driver IC303.

Clock Buffering

The clock and data signals LRCK, ADATA and BCLK from the mechanism connector SK300 are double buffered by IC300 before being delivered to the DAC.

Power-On/Reset

The power-on reset signal XRST (or RESET) is generated by R409, C410 and IC404. When the power is turned on, C410 is initially uncharged and pin 11 of IC404 is at high voltage, and thus the output is low. After a short time, C410 is charged via R409; IC404 pin 11 is then low, and the output switches high (RESET is de-asserted).

DAC & System Clock

The DAC is a Burr Brown PCM1716E, the DAC is configured for hardware control.

Digital audio is input on pins 1, 2 & 3 in standard Red Book Audio format, i.e . Word Clock, Bit Clock and Data.

The system clock is based around 16.9344 MHZ crystal X400 and transistor TR402. This produces a stable clock with low jitter. IC404A & B buffer the clock as linear buffers. IC404C & D buffer the individual mech & DAC clock lines.

Analogue Output

Left channel: IC400A and IC400B are cascaded 69kHz 2 Bessel filters. The output devices internal to both op-amps in IC400 are “pulled down” to the negative supply rail to force operation in class A (one output device is conducting at all times and crossover distortion is eliminated). C448 AC-couples the output, the muting relay shorts the output to ground through 120 ohm series resistors, and 3N3 Polypropylene shunt capacitors are used to swamp cable capacitance, ensuring stability and making up the 5 filter.

The right channel is the same as the left channel. IC401A & B are used as the buffer and filter.

order low-pass

pole of the

Microcontroller & Display Board

The system microcontroller IC100 serves the following functions:

! Control of the mechanism & decoder on the CDM14

mechanism

! Control of mute, attenuation and de-emphasis for the

DAC

! Direct drive of the fluorescent display ! Remote control decoding ! Keyboard scanning

The keyboard scanning works by connecting the keys to a resistor ladder on an ADC input to the micro. Pressing a key presents a unique voltage to this input, which the micro is pre-programmed to interpret accordingly.

The remote control data contains a ‘Customer Code’ that identifies this as an Arcam product. The diode network D100 to D106 configures the micro to accept this code.

Remote Bus Carrier Filter & Demodulator

Remote control commands can be delivered over wire to SK500 for multi-room applications. Incoming signals are attenuated and clipped by resistors and D500. L500 and C508 form a parallel resonant circuit at approximately 37kHz. This demodulates the incoming signal and the output is passed to IC501A where it is ‘chopped’, low pass filtered and fed to IC501B to provide the RC5 outp ut signal.

Digital Output

The decoder on the mechanism assembly generates an SPDIF format digital output signal. This is passed to buffer IC500A. IC500B through E are used in parallel to provide a transformer less 75-ohm source impedance to a single phono socket SK501. Optical digital output via IC502 is also tapped off the digital output signal via IC500F.

Jumper Settings / Technical Specifications

Jumper Description Jumper CD62T

Settings

Filter smoothing disable PL200 Not fitted Off On Filter smoothing disable PL201 Not fitted Off On IC201 Regulator bypass PL202 Not fitted Off On IC201 Regulator output enable IC205 Regulator bypass PL204 Not fitted Off On IC205 Regulator output enable System clock source select Main board clock power enable Main board PCM1716E DAC enable Main board output relay enable

CD Mechanism

Laser pick-up

DAC conversion system

Effective resolution

Dynamic Range

Signal to Noise ratio (CCIR)

Harmonic distortion (0dBFS 1kHz)

Harmonic distortion (0dBFS 10kHz)

Frequency response (-0.7dB)

Output level (0dBFS)

Output impedance

Minimum recommended load

Coaxial digital output (75 ohm)

Power consumption (max)

Size W/D/H (mm)

Weight, net

PL203 On On Off

PL205 On On Off PL300 Pin1 & 2 Pins 1 & 2 Pins 2 & 3 PL400 On On Off PL401 On On Off PL402 On On Off

CD72T Settings

CD62T / CD72T

Sony CDM14BL-5BD25

3 beam

Multi-level Delta Sigma

16 bits (24 bit capable DAC)

100dB

>104dB

<0.005%

< 10Hz to 20kHz

2.3VRMS

120 ohms

Class 2

430x290x84

4.6kg (CD92T 5.6kg)

CD92T Settings

5 kΩ

32VA

87654321

POWER SUPPLIES L933C2_1 L933C2_2.1.sch

FILA FILB

Please refer to the CD72T (Master) schematic if changes are to be made to this schematic! USE EXCLUDE NF WHEN CREATING BILL OF MATERIALS

MECH INTERCONNECTS DAC AND OSCILLATOR L933C3_1 L933C3_2.1.sch

FILA FILB

17MHZ RESET

BCLK

ADATA

LRCKRC5 IP

DIGOP

EMPHASIS

L933C4_1 L933C4_2.1.sch

DEEM LRCK ADATA BCLK

RESET

17MHZ

DISPLAY AND MICROCONTROLLER L933C7_1 L933C7_2.1.sch

FIX152 FIXING HOLE 3.5

DISPLAY PCB L933C1_1 L933C1_2.1.sch

FIX157 FIXING HOLE 3.2

FIX151 FIXING HOLE 3.2

RC5 INPUT AND DIG OUTPUTS L933C5_1 L933C5_2.1.sch

FIX153 FIXING HOLE 3.5

DIGOP RC5RP

FIX154 FIXING HOLE 3.5

FIX155 FIXING HOLE 3.5

FIX156 FIXING HOLE 3.5

FIX150 FIXING HOLE 3.5

0V_DIG

0V_MOT

0V_SIG

0V_30V_9DAC

0V_2

SP100

STARPOINT

0V_1

LK600 0R0 MF

LK601 0R0 MF

0V_DIG 0V_9DAC

(EARTH BY IEC SOCKET)

C150 1N0 CD C151

0V_DIG 0V_DIG 0V_DIG 0V_DIG 0V_DIG 0V_DIG 0V_DIG

1N0 CD

C152 1N0 CD

C153 1N0 CD

C154 1N0 CD

C155 1N0 CD

C156 1N0 CD

DRAWING TITLE

CD62T - TOP LEVEL SCHEMATIC

Circuit Diagram

23425

A & R Cambridge Ltd. Pembroke Avenue Denny Industrial Centre Waterbeach Cambridge CB5 9PB

1 2 3 4 5 6 7 8

Notes:

01_1127 TGP 18 July 2001

ECO No. DESCRIPTION OF CHANGE

Filename

J:\Change_Control\ECO_AGENDA\01_1127 CD62T RLEASE\Motherboard\l933ct_2.1.ddb - L933_2.1.prj

Date Printed

INITIALS

19-Jul-2001

DATE

Drawn by:

TGP

Production Release

6 7Sheet of

DRAWING NO.

2.1

ISSUE

L933CT

+ 12 hidden pages