APLUS APC5860 Datasheet

APLUS INTEGRATED CIRCUITS INC. APC5860

APC5860 DE-COMPRESSION VOICE IC

1. CHIP FEATURES.

 DUAL OPERATION FREQUENCIES:

- 32.768 KHZ & 0.5 SECOND TIMER INTERRUPT.

- BUILT-IN PLL CIRCUIT TO GENERATE SYSTEM CLOCK MAX 20MHZ.

 BUILT-IN 2KBYTES(1K*16) RAM.

 ADDRESS UP TO 8MBYTE(4M*16) RAM OR ROM OR “ROM AND RAM”

BUILT-IN 16KBYTE(8K*16) PROGRAM ROM AND 1M BYTE(512K*16) DATA ROM

 BUILT-IN DECOMPRESSION ENGINE

THE VOICE AND MUSIC DE-COMPRESSION RATE IS AS THE FOLLOWS:

- 2.25KBIT/SEC - 2.7KBIT/SEC - 3.15KBIT/SEC - 3.6KBIT/SEC - 4.8KBIT/SEC - 6.0KBIT/SEC

- 7.2KBIT/SEC - 8.4KBIT/SEC - 9.6KBIT/SEC - 10.8KBIT/SEC - 12.0 KBIT/SEC - 13.2 KBIT/SEC

- 14.4 KBIT/SEC

DE-COMPRESSION RATE

2.25 K BIT/SEC 60.68 min. 8.4 K BIT/SEC 16.25 min.

2.7 K BIT/SEC 50.57 min. 9.6 K BIT/SEC 14.22 min.

3.15 K BIT/SEC

3.6 K BIT/SEC 37.93 min. 12.0 K BIT/SEC 11.38 min.

4.8 K BIT/SEC 28.44 min. 13.2 K BIT/SEC 10.34 min.

6.0 K BIT/SEC 22.76 min. 14.4 K BIT/SEC 9.48 min.

7.2 K BIT/SEC 18.96 min.

 BUILT-IN 12 BITS D/A, 8 BITS ADC.

 I/O PORTS

16 I/O PINS FOR PORT A.

12 OUTPUT FOR PORT B.

VOICE DURATION

43.34 min.

DE-COMPRESSION RATE

10.8 K BIT/SEC 12.64 min.

VOICE DURATION

16 I/O PINS FOR PORT C.

 TWO 16BITS TIMERS : TIMER_A AND TIMER_B.

 WATCHDOG TIMER.

 SLEEP MODE : CRYSTAL & SYSTEM

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APLUS INTEGRATED CIRCUITS INC. APC5860

2. BLOCK DIAGRAM.

2. PIN DESCRIPTION :

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APLUS INTEGRATED CIRCUITS INC. APC5860

PIN NAME I/O DESCRIPTION

RESET I RESET INPUT. ACTIVE LOW.

PWM1,PWM2 O PWM OUTPUT.

DAC O OUTPUT FROM D/A CONVERTER.

XOSC1 I CRYSTAL OSCILLATOR INPUT PIN.

XOSC2 O CRYSTAL OSCILLATOR OUTPUT PIN.

CAP I CAPACITOR FOR PLL CIRCUIT.

PA0-PA7 I/O I/O PORT_A PIN 0 TO 7.

ALSO AS EXTERNAL INTERRUPT SOURCE

(FALL EDGE TRIGGER).

PA8-PA12 IO I/O PORT_A PIN 8 TO 12.

PA13/ADC I/O I/O PORT_A PIN 13 OR ANALOG SIGNAL INPUT.

PA14 I/O I/O PORT_A PIN 14

PA15 I/O I/O PORT_A PIN 15

PB0-PB5/BANK3-BANK8 O PORT_B OR EXTERNAL MEMORY BANK SELECT

PB6/EMEMRD O PORT_B PIN 6 OR EXTERNAL RAM READ

(ACTIVE LOW).

PB7/EXTRAM O PORT_B PIN 7 OR EXTERNAL RAM SELECT PIN

(ACTIVE LOW)

PB8/EMEMWRL O PORT_B PIN 8 OR EXTERNAL RAM LOW BYTE WRITE

(ACTIVE LOW).

PB9/EXTIRQ I/O PORT_B PIN 9 OR EXTERNAL IRQ INPUT PIN

(RISE EDGE TRIGGER).

PB10/EMEMWRH O PORT_B PIN 10 OR EXTERNAL RAM HIGH BYTE WRITE

(ACTIVE LOW)

PB11/EXTROMCS I/O PORT_B PIN 11 ROM SELECT OR EXTERNAL ROM CHIP

PC/EMEMAD

I/O

SELECT

PC:16 BITS PROGRAMMABLE IO PORTS.

EMEMAD: EXTERNAL MEMORY ADDRESS/DATA.

(ACTIVE LOW)

IF IT IS ADDRESS THEN

EMEMA0~EMEMA12 IS A1~A13.

EMEMA13~EMEMA15 IS BANK0~BANK2.

ALE O EXTERNAL MEMORY ADDRESS LATCH ENABLE.

VDD1-VDD4 I DIGITAL POWER INPUT.

GND1-GND4 I DIGITAL GROUND.

PLLVDD,PLLGND I POWER AND GROUND FOR PLL CIRCUIT.

DACVDD,DACGND I POWER AND GROUND FOR DAC CIRCUIT.

4. ADDRESS ARRANGEMENT :

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