The PA93 is a high voltage, low quiescent current MOSFET
operational amplifier designed as a low cost solution for driving
continuous output currents up to 8A and pulse currents up to
14A. The safe operating area (SOA) has no second breakdown limitations and can be observed for all type loads by
choosing an appropriate current limiting resistor. The MOSFET
output stage is biased AB for linear operation. External compensation provides flexibility in choosing bandwidth and slew
rate for the application. APEX’s Power SIP package uses a
minimum of board space allowing for high density circuit
boards.
PA93
TYPICAL APPLICATION
R
F
+V
S
R
IN
COMPUTER
FOCUS
COMMAND
VOLTAGE
LOW POWER, PIEZOELECTRIC POSITIONING
11,12
1
9,10
6
R
CL
PA93
2
7,8
–V
S
PIEZO DRIVE
V
OUT
EQUIVALENT SCHEMATIC
12
11
+V
–IN
+IN
–V
S
1
2
S
7
8
R1 R2C1R3
Q1Q2
Q6
Q5
R5
R8R9
Q15
R11R12
4
CC1
CC2
R6
Piezo positioning may be applied to the focusing of segmented mirror systems. The composite mirror may be composed of hundreds of elements, each requiring focusing under
computer control. In such complex systems the PA93 reduces
the costs of power supplies and cooling with its advantages of
low cost and low quiescent power consumption while increasing circuit density with the SIP package.
150°C
TEMPERATURE, storage–65 to +150°C
OPERATING TEMPERATURE RANGE, case–55 to +125°C
SPECIFICATIONS
PARAMETERTEST CONDITIONS
INPUT
OFFSET VOLTAGE, initial210mV
OFFSET VOLTAGE, vs. temperatureFull temperature range1550µV/°C
OFFSET VOLTAGE, vs. supply1025µV/V
OFFSET VOLTAGE, vs. time75µV/√kh
BIAS CURRENT, initial2002000pA
BIAS CURRENT, vs. supply4pA/V
OFFSET CURRENT, initial50500pA
INPUT IMPEDANCE, DC10
INPUT CAPACITANCE4pF
COMMON MODE VOLTAGE RANGE
3
COMMON MODE REJECTION, DCVCM = ±90V8098dB
NOISE100KHz BW, RS = 1KΩ, CC = 10pF1µVrms
GAIN
OPEN LOOP, @ 15HzRL = 2KΩ, CC = 10pF94111dB
GAIN BANDWIDTH PRODUCT at 1MHz RL = 2KΩ, CC = 10pF12MHz
POWER BANDWIDTHRL = 2KΩ, CC = 10pF30kHz
PHASE MARGINFull temperature range60°
OUTPUT
VOLTAGE SWING
3
IO = 8A±VS 12±VS 10V
CURRENT, continuous8A
SLEW RATE, AV = 100CC = 10pF50V/µs
CAPACITIVE LOAD, AV = +1Full temperature range1nf
SETTLING TIME to .1%CC = 10pF, 2V step1µs
RESISTANCE, no load10Ω
POWER SUPPLY
VOLTAGE
5
See note 5±40±150±200V
CURRENT, quiescent,1014mA
THERMAL
RESISTANCE, AC, junction to case
4
Full temperature range, F > 60Hz.7°C/W
RESISTANCE, DC, junction to caseFull temperature range, F < 60Hz1°C/W
RESISTANCE, junction to airFull temperature range30°C/W
TEMPERATURE RANGE, caseMeets full range specifications–25+85°C
1
MINTYPMAXUNITS
11
±
±VS 15V
Ω
±±
NOTES: 1.Unless otherwise noted: TC = 25°C, DC input specifications are ± value given. Power supply voltage is typical rating. RC = 100
CC = 220pF.
2.Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF.
3.+VS and –VS denote the positive and negative power supply rail respectively.
4.Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
5.Derate max supply rating .625 V/°C below 25°C case. No derating needed above 25°C case.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
The PA93 is constructed from MOSFET transistors. ESD handling procedures must be observed.
Please read the “General Operating Considerations” section, which covers stability, supplies, heatsinking, mounting,
current limit, SOA interpretation, and specification interpretation. Additional information can be found in the application
notes. For information on the package outline, heatsinks, and
mounting hardware, consult the “Accessory and Package
Mechanical Data” section of the handbook.
CURRENT LIMIT
For proper operation, the current limit resistor (RCL) must be
connected as shown in the external connection diagram. For
optimum reliability the resistor value should be set as high as
possible. The value is calculated as follows; with the maximum
practical value of 16 ohms.
R
CL
.65
=
I
LIM
SAFE OPERATING AREA (SOA)
The MOSFET output stage of this power operational amplifier has two distinct limitations:
1. The current handling capability of the MOSFET geometry
and the wire bonds.
2. The junction temperature of the output MOSFETs.
NOTE: The output stage is protected against transient flyback.
However, for protection against sustained, high energy flyback,
external fast-recovery diodes should be used.
SAFE OPERATING CURVES
The safe operating area curves define the maximum additional internal power dissipation the amplifier can tolerate
when it produces the necessary output to drive an external
load.
20
10
, (A)
OR –V
OUTPUT CURRENT FROM +V
8
S
6
4
S
3
2
1
.8
.6
.4
.3
.2
.1
.08
.06
102030 40100200 300500
DC, TC = 25°C
DC,T
200mS
DC,T
C
= 125°C
60 80
C
= 85°C
100mS
INPUT PROTECTION
Although the PA93 can withstand differential voltages up to
±20V, additional external protection is recommended. Low
leakage, low capacitance JFETs connected as diodes are
recommended (e.g. 2N4416, Q1-Q4 in Figure 2). The differential input voltage will be clamped to ±1.4V. This is sufficient
overdrive to produce maximum power bandwidth.
POWER SUPPLY PROTECTION
Unidirectional zener diode transient suppressors are recommended as protection on the supply pins. See Figure 2. The
zeners clamp transients to voltages within the power supply
rating and also clamp power supply reversals to ground.
Whether the zeners are used or not, the system power supply
should be evaluated for transient performance including poweron overshoot and power-off polarity reversals as well as line
regulation.
Conditions which can cause open circuits or polarity reversals on either power supply rail should be avoided or protected
against. Reversals or opens on the negative supply rail is
known to induce input stage failure. Unidirectional transzorbs
prevent this, and it is desirable that they be both electrically and
physically as close to the amplifier as possible.
STABILITY
The PA93 is externally compensated and performance can
be tailored to the application. Use the graphs of small signal
response and power response as a guide. The compensation
capacitor C
capacitor is recommended. The compensation network C
must be rated at 500V working voltage. An NPO
C
CRC
must be mounted closely to the amplifier pins 4 and 5 to avoid
spurious oscillation.
QUIESCENT CURRENT REDUCTION
When pin 3 (IQ) is shorted to pin 5 (CC2) the AB biasing of
the output stage is disabled. This lowers quiescent power but
also raises distortion since the output stage is then class C
biased. The output stage bias current is nominally set at 1mA.
Pin 3 may be left open if not used.
+V
S
Z1
1
–IN
Q1
Q2
+IN
FIGURE 2.
OVERVOLTAGE
PROTECTION
Q3
Q4
11, 12
PA93
7, 8
2
–V
S
6
Z2
SUPPLY TO OUTPUT DIFFERENTIAL, VS – VO (V)
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.