Apex PA84, PA84A, PA84S Datasheet

POWER OPERATIONAL AMPLIFIERS

PA84 • PA84A • PA84S

MICROTECHNOLOGY

FEATURES

• HIGH SLEW RATE — 200V/µs

• FAST SETTLING TIME — .1% in 1µs (PA84S)

• FULLY PROTECTED INPUT — Up to ±150v

• LOW BIAS CURRENT, LOW NOISE — FET Input

• WIDE SUPPLY RANGE — ±15V to ±150V

APPLICATIONS

• HIGH VOLTAGE INSTRUMENTATION

• ELECTROSTATIC TRANSDUCERS & DEFLECTION

• PROGRAMMABLE POWER SUPPLIES UP TO 290V

• ANALOG SIMULATORS

DESCRIPTION

The PA84 is a high voltage operational amplifier designed for
output voltage swings up to ±145V with a dual supply or 290V
with a single supply. Two versions are available. The new
PA84S, fast settling amplifier can absorb differential input over­voltages up to ±50V while the established PA84 and PA84A can
handle differential input overvoltages of up to ±300V. Both
versions are protected against common mode transients and
overvoltages up to the supply rails. High accuracy is achieved
with a cascode input circuit configuration. All internal biasing is
referenced to a zener diode fed by a FET constant current
source. As a result, the PA84 features an unprecedented supply
range and excellent supply rejection. The output stage is biased­on for linear operation. External phase compensation allows for
user flexibility in obtaining the maximum slew rate. Fixed current
limits protect these amplifiers against shorts to common at
supply voltages up to 150V. For operation into inductive loads,
two external flyback pulse protection diodes are recommended.
However, a heatsink may be necessary to maintain the proper
case temperature under normal operating conditions.

This hybrid integrated circuit utilizes a beryllia (BeO) sub­strate, thick film resistors, ceramic capacitors and semicon­ductor chips to maximize reliability, minimize size and give top
performance. Ultrasonically bonded aluminum wires provide
reliable interconnections at all operating temperatures. The 8­pin TO-3 package is hermetically sealed and electrically
isolated. The use of compressible thermal isolation washers
and/or improper mounting torque will void the product war­ranty. Please see “General Operating Considerations”.

EXTERNAL CONNECTION

+V

2

7

–V

S

OUT

1

8

COMP

S

BAL

–IN

BAL

4

5

+IN

3

TOP VIEW

6

HTTP://WWW.APEXMICROTECH.COM (800) 546-APEX [phone]

PHASE COMPENSATION

GAIN

C

C

100

1000

R

NOTES:

C

1. Phase Compensation required
for safe operation.

2. Input offset trimpot optional.

Recommended value 100K .Ω

10

C

10nF

1

500pF

50pF
none

R

C

C

200

2K
20K
none

Ω

Ω

Ω

100K

50K

+150V

4.7K

PA84

–150V

390pF

INK JET

CONTROL

......

......

......

DAC

±10V

10K

TYPICAL APPLICATION

The PA84 is ideally suited to driving ink jet control units
(often a piezo electric device) which require precise pulse
shape control to deposit crisp clear date or lot code information
on product containers. The external compensation network
has been optimized to match the gain setting of the circuit and
the complex impedance of the ink jet control unit. The combi­nation of speed and high voltage capabilities of the PA84 form
ink droplets of uniform volume at high production rates to
enhance the value of the printer.

EQUIVALENT SCHEMATIC

4
2

3

8

5

6

7

Q1

Q5

Q8

C5

*

*

*

C6

*

Q13
Q14

C4

Q12A

*
*

Q15

Q2

Q9

Q12B

Q10

D1

Q4

Q11

D2

Q3

Q16

C1

Q6

Q7

1

Q17

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PA84 • PA84A • PA84S

ABSOLUTE MAXIMUM RATINGS

SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

SUPPLY VOLTAGE, +VS to –V
OUTPUT CURRENT, within SOA Internally Limited

S

POWER DISSIPATION, internal at TC = 25°C217.5W
INPUT VOLTAGE, differential PA84/PA84A
INPUT VOLTAGE, differential PA84S ±50V
INPUT VOLTAGE, common mode
TEMPERATURE, pins for 10s max (solder) 300°C
TEMPERATURE, junction

1

2

300V

1

±300V
±V

S

200°C
TEMPERATURE RANGE, storage –65 to +150°C
OPERATING TEMPERATURE RANGE, case –55 to +125°C

SPECIFICATIONS

PARAMETER TEST CONDITIONS

PA84/PA84S

3

MIN TYP MAX MIN TYP MAX UNITS

PA84A

INPUT

OFFSET VOLTAGE, initial TC = 25°C ±1.5 ±3 ±.5 ±1mV
OFFSET VOLTAGE, vs. temperature TC = –25° to +85°C ±10 ±25 ±5 ±10 µV/°C
OFFSET VOLTAGE, vs. supply TC = 25°C ±.5 ±.2 µV/V
OFFSET VOLTAGE, vs. time TC = 25°C ±75 * µV/√kh
BIAS CURRENT, initial
BIAS CURRENT, vs. supply TC = 25°C .01 * pA/V
OFFSET CURRENT, initial
OFFSET CURRENT, vs. supply TC = 25°C ±.01 * pA/V
INPUT IMPEDANCE, DC TC = 25°C10

4

4

TC = 25°C550310pA
TC = 25°C ±2.5 ±50 ±1.5 ±10 pA

11

* Ω
INPUT CAPACITANCE TC = –25° to +85°C6*pF
COMMON MODE VOLTAGE RANGE5TC = –25° to +85°C ±VS–10 ±VS–8.5 * * V
COMMON MODE REJECTION, DC TC = –25° to +85°C 130 * dB

GAIN

OPEN LOOP GAIN at 10Hz TC = 25°C, RL = ∞ 120 * dB
OPEN LOOP GAIN at 10Hz. TC = 25°C, RL = 3.5KΩ 100 118 * * dB
GAIN BANDWIDTH PRODUCT@ 1MHz TC = 25°C, RL = 3.5KΩ, RC = 20KΩ 75 * MHz
POWER BANDWIDTH, high gain TC = 25°C, RL = 3.5KΩ, RC = 20KΩ 250 180 * kHz
POWER BANDWIDTH, low gain TC = 25°C, RL = 3.5KΩ, RC = 20KΩ 120 * kHz

OUTPUT

VOLTAGE SWING
VOLTAGE SWING

5
5

TC = 25°C, IO = ±40mA ±VS–7 ±VS–3** V

TC = –25° to +85°C, IO = ±15mA ±VS–5 ±VS–2** V
CURRENT, peak TC = 25°C40*mA
CURRENT, short circuit TC = 25°C50*mA
SLEW RATE, high gain TC = 25°C, RL = 3.5KΩ, RC = 20KΩ 200 150 * V/µs
SLEW RATE, low gain TC = 25°C, RL = 3.5KΩ, RC = 2KΩ 125 * V/µs
SETTLING TIME .01% at gain = 100 TC = 25°C, RL = 3.5KΩ PA84S 2 µs

SETTLING TIME .1% at gain = 100 RC = 20KΩ, VIN = 2V step

ONLY 1 µs
SETTLING TIME .01% at gain = 100 TC = 25°C, RL = 3.5KΩ PA84/84A 20 20 µs
SETTLING TIME .1% at gain = 100 RC = 20KΩ, VIN = 2V step 12 12 µs

POWER SUPPLY

VOLTAGE TC = –55°C to +125°C ±15 ±150 * * V
CURRENT, quiescent TC = 25°C 5.5 7.5 * * mA

THERMAL

RESISTANCE, AC, junction to case

6

TC = –55°C to +125°C, F > 60Hz 3.8 * °C/W
RESISTANCE, DC, junction to case TC = –55°C to +125°C, F < 60Hz 6 6.5 * * °C/W
RESISTANCE, case to air TC = –55°C to +125°C30*°C/W
TEMPERATURE RANGE, case Meets full range specifications –25 +85 * * °C

NOTES: * The specification of PA84A is identical to the specification for PA84/PA84S in applicable column to the left.

1. Signal slew rates at pins 5 and 6 must be limited to less than 1V/ns to avoid damage. When faster waveforms are unavoidable,
resistors in series with those pins, limiting current to 150mA will protect the amplifier from damage.

2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF.

3. The power supply voltage for all tests is ±150V, unless otherwise noted as a test condition.

4. Doubles for every 10°C of temperature increase.

5. +VS and –VS denote the positive and negative power supply rail respectively.

6. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.

CAUTION

The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.

APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: [phone]

TYPICAL PERFORMANCE
GRAPHS

PA84 • PA84A • PA84S

POWER DERATING

30

25

20

15

10

5

0

0 25 50 75 100 125

INTERNAL POWER DISSIPATION, P(W)

TEMPERATURE, T

(°C)

C

SMALL SIGNAL RESPONSE

120
100

(dB)

80

OL

60
40
20

0

OPEN LOOP GAIN, A

–20

1

SLEW RATE VS. COMP

200

150

100

70
50

R

R

C

C

/C

/C

C

C

= 2K /500pF

R

C

/C

C

= 200 /10nF

= 20K /50pF

Ω

Ω

ΩRL = 3.5K

10010

10K 1M 10M

1K .1M

FREQUENCY, F (Hz)

Ω

150

80
70

(mA)

60

LIM

50

40

30

CURRENT LIMIT, I

20

5.0

(V)

O

4.5

–V

S

4.0

3.5

3.0

2.5

2.0

1.5

VOLTAGE DROP SUPPLY, V

1.6

1.4

1.2

1.0

.8

CURRENT LIMIT

OPEN LOOP GAIN

4

TC = 85°C

2

RL = 3.5KΩ

0

TC = 25°C

–2

–4

TC = –25°C

–55 100

–25 25 50 75

0

125

–6

RELATIVE OPEN LOOP GAIN, A(dB)

–8

0 150 250

50 100 200

CASE TEMPERATURE, TC (°C) TOTAL SUPPLY VOLTAGE, VS (V)

OUTPUT VOLTAGE SWING

= 25

C

T

= –25°C

C

T

= 85°C

C

T

20

30 40

50

O

(mA)

10

0

OUTPUT CURRENT, I

SLEW RATE VS. SUPPLY

60

300
200

PP

150

O

°C

100

60

30

OUTPUT VOLTAGE, V (V )

70

15

20

√

15

(nV/ Hz)

N

10

POWER RESPONSE

R

C

/C

C

= 200 /10nFΩ

VS = ±150V

50K

.1M

FREQUENCY, F (Hz)

INPUT NOISE

R

C

/

R

C

C

C

/

C

C

=

2

K

Ω

.3M

.2M .5M

7
5

300

=

2

0

K

Ω

/

5

0

/

5

p

0

F

0

p

F

.7M

1M

SLEW RATE (V/µS)

30

20

200

EXT. COMPENSATION RESISTANCE, RC ( )

COMMON MODE REJECTION

140

1K 5K 20K2K

500 10K

RL = 3.5K RL = 3.5K

ΩΩ

Ω

120

100

80

.6

NORMALIZED SLEW RATE (X)

.4

3050 100 150

TOTAL SUPPLY VOLTAGE, V

POWER SUPPLY REJECTION

140

200

120

100

80

250 300

(V)

S

3

2

INPUT NOISE VOLTAGE, V

10 1K 10K

100

FREQUENCY, F (Hz)

COMMON MODE VOLTAGE

)

300

PP

(V

200

CM

150
100

.1M

50

60

40

20

1

COMMON MODE REJECTION, CMR (dB)

10 100

FREQUENCY, F (Hz)

1K

10K

.1M

1M

60

40

20

POWER SUPPLY REJECTION, PSR (dB)

10 100

1

FREQUENCY, F (Hz)

1K 10K 1M

.1M

30

VS = ±150V

15

COMMON MODE VOLTAGE, V

10K

20K

50K

.1M

.2M .5M

FREQUENCY, F (Hz)

1M

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PA84 • PA84A • PA84S

)

GENERAL

Please read the “General Operating Considerations” sec­tion, which covers stability, supplies, heatsinking, mounting,
current limit, SOA interpretation, and specification interpreta­tion. Additional information can be found in the application
notes. For information on the package outline, heatsinks, and
mounting hardware, consult the “Accessory and Package
Mechanical Data” section of the handbook.

SAFE OPERATING AREA (SOA)

The bipolar output stage of this high voltage operational
amplifier has two output limitations:

1. The internal current limit which limits maximum available

output current.

2. The second breakdown effect, which occurs whenever the

simultaneous collector current and collector-emitter voltage
exceeds specified limits.

50

(mA)

S

40

OR –V

S

35

30

25

20

OUTPUT CURRENT FROM +V

150

SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE (V

STEADY STATE

SAFE OPERATING AREA CURVES

170

200

t = 5ms

The SOA curves combine the effect of these limits. For a
given application, the direction and magnitude of the output
current should be calculated or measured and checked against
the SOA curves. This is simple for resistive loads but more
complex for reactive and EMF generating loads. However, the
following guidelines may save extensive analytical efforts:

1. The following capacitive and inductive loads are safe:

±V

S

C(MAX) L(MAX)
150V 1.2µF .7H
125V 6.0µF 25H
100V 12µF 90H

75V ALL ALL

2. Short circuits to ground are safe with dual supplies up to
±150V or single supplies up to 150V.

3. Short circuits to the supply rails are safe with total supply
voltages up to 150V (i.e. ±75V).

250

t = 1ms

300

OPERATING

CONSIDERATIONS

Be sure the diode voltage rating is greater than the total of both
supplies. The diode will turn on to divert the flyback energy into
the supply rails thus protecting the output transistors from
destruction due to reverse bias.

A note of caution about the supply. The energy of the flyback
pulse must be absorbed by the power supply. As a result, a
transient will be superimposed on the supply voltage, the
magnitude of the transient being a function of its transient
impedance and current sinking capability. If the supply voltage
plus transient exceeds the maximum supply rating or if the AC
impedance of the supply is unknown, it is best to clamp the
output and the supply with a zener diode to absorb the
transient.

FIGURE 1. PROTECTIVE,
INDUCTIVE LOAD

+V

–V

S

S

STABILITY

Due to its large bandwidth the PA84 is more likely to oscillate
than lower bandwidth Power Operational Amplifiers such as
the PA83 or PA08. To prevent oscillations, a reasonable phase
margin must be maintained by:

1. Selection of the proper phase compensation capacitor and

resistor. Use the values given in the table under external
connections and interpolate if necessary. The phase mar­gin can be increased by using a large capacitor and a
smaller resistor than the slew rate optimized values listed in
the table. The compensation capacitor may be connected to
common (in lieu of +V
bypassed to common. Because the voltage at pin 8 is only
a few volts below the positive supply, this ground connec­tion requires the use of a high voltage capacitor.

2. Keeping the external sumpoint stray capacitance to ground

at a minimum and the sumpoint load resistance (input and
feedback resistors in parallel) below 500Ω. Larger sumpoint
load resistance can be used with increased phase compen­sation (see 1 above).

3. Connecting the amplifier case to a local AC common thus

preventing it from acting as an antenna.

) if the positive supply is properly

S

OUTPUT PROTECTION

Two external diodes as shown in Figure 2, are required to
protect these amplifiers against flyback (kickback) pulses
exceeding the supply voltages of the amplifier when driving
inductive loads. For component selection, these external
diodes must be very quick, such as ultra fast recovery diodes
with no more than 200 nanoseconds of reverse recovery time.

This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.

PA84U REV. L JANUARY 2000 © 2000 Apex Microtechnology Corp.