The PA41/42 are high voltage monolithic MOSFET operational amplifiers achieving performance features previously
found only in hybrid designs while increasing reliability. Inputs
are protected from excessive common mode and differential
mode voltages. The safe operating area (SOA) has no second
breakdown limitations and can be observed with all type loads
by choosing an appropriate current limiting resistor. External
compensation provides the user flexibility in choosing
optimum gain and bandwidth for the application.
The PA41 is packaged in a hermetically sealed TO-3 and all
circuitry is isolated from the case by an aluminum nitride (AlN)
substrate.
The PA42 is packaged in APEX’s hermetic ceramic SIP10
package.
Two PA41/42 amplifiers operated as a bridge driver for a
piezo transducer provides a low cost 660 volt total drive capability. The RN CN network serves to raise the apparent gain of A2
at high frequencies. If R
is set equal to R the amplifiers can be
N
compensated identically and will have matching bandwidths.
10pF
R
CL
180
100Ω
330pF
20R
20R
2.2K
PA41/42
+175
A2
Rn
Cn
–175
EXTERNAL CONNECTIONS
R
CL
C
C
COMP
2
7
–V
S
12345678910
I
LIM
1
C
330pF
8
R
+V
100Ω
S
NC–V
S
C , C ARE NPO RATED
S
FOR FULL SUPPLY VOLTAGE.
R
TOP VIEW
S
COMP
OUT
PA41
PA42
–IN
R
4
5
C
3
TOP VIEW
6
+IN
–IN +IN
NOTE: PA41 Recommended mounting torque is 4-7 in•lbs
(.45 -.79 N•m)
CAUTION: The use of compressible, thermally conductive
TEMPERATURE, storage–65 to +150°C–65 to +150°C
TEMPERATURE RANGE, powered (case)–40 to +125°C–40 to +125°C
SPECIFICATIONS
PARAMETERTEST CONDITIONS
1
PA41/PA42PA41A/PA42A
MINTYPMAXMINTYPMAXUNITS
INPUT
OFFSET VOLTAGE, initial25401530mV
OFFSET VOLTAGE, vs. temperature
4, 7
Full temperature range7013040/*65/*µV/°C
OFFSET VOLTAGE, vs supply2032**µV/V
OFFSET VOLTAGE, vs time75*µV √kh
BIAS CURRENT, initial
BIAS CURRENT, vs supply.2/.5.5/50**pA/V
OFFSET CURRENT, initial
INPUT IMPEDANCE, DC10
7
7
5/100
50/2000
2.5/100 50/400**pA
11
INPUT CAPACITANCE5*pF
COMMON MODE, voltage range±VS–12*V
COMMON MODE REJECTION, DCVCM = ±90V DC8494**dB
NOISE, broad band10kHz BW, RS = 1KΩ50*µV RMS
NOISE, low frequency1-10 Hz110*µV p-p
GAIN
OPEN LOOP at 15HzRL = 5KΩ94106**dB
BANDWIDTH, open loop1.6*MHz
POWER BANDWIDTHCC = 10pf, 280V p-p26*kHz
PHASE MARGINFull temperature range60*°
OUTPUT
VOLTAGE SWINGIO = 40mA±VS–12 ±VS–10±VS–10
CURRENT, peak
5
120*mA
CURRENT, continuous60*mA
SETTLING TIME to .1%CC = 10pF, 10V step, AV = –1012*µs
SLEW RATECC = OPEN40*V/µs
CAPACITIVE LOADAV = +110*nF
RESISTANCE6, no loadRCL = 0150*Ω
RESISTANCE6, 20mA loadRCL = 025*Ω
POWER SUPPLY
VOLTAGE
3
See Note 3±50±150±175***V
CURRENT, quiescent1.62.0.91.41.8mA
THERMAL
PA41
RESISTANCE, AC junction to case
PA42
RESISTANCE, AC junction to case
PA41
RESISTANCE, DC junction to case
PA42
RESISTANCE, DC junction to case
F > 60Hz5.46.5**°C/W
F > 60Hz710**°C/W
F < 60Hz910.4**°C/W
F < 60Hz1214**°C/W
PA41 RESISTANCE, junction to airFull temperature range30*°C/W
PA42 RESISTANCE, junction to airFull temperature range55*°C/W
TEMPERATURE RANGE, caseMeets full range specifications–25+85**°C
350V350V
S
150°C150°C
SPECIFICATIONS
±V
S
**pA
*Ω
±VS–8.5
V
NOTES: *The specification for PA41A/PA42A is identical to the specification for PA41/PA42 in applicable column to the left.
1.Unless otherwise noted TC = 25°C, CC = 18pF, RC = 2.2KΩ. DC input specifications are ± value given. Power supply voltage is
typical rating.
2.Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF. For guidance, refer to heatsink data sheet.
3.Derate maximum supply voltage .5 V/°C below case temperature of 25°C. No derating is needed above TC = 25°C.
4.Sample tested by wafer to 95%.
5.Guaranteed but not tested.
6.The selected value of RCL must be added to the values given for total output resistance.
7.Specifications separated by / indicate values for the PA41 and PA42 respectively.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
The PA41/PA42 is constructed from MOSFET transistors. ESD handling procedures must be observed.
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexmicrotech.com for design tools that
help automate tasks such as calculations for stability, internal
power dissipation, current limit; heat sink selection; Apex’s
complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits.
CURRENT LIMIT
For proper operation the current limit resistor, RCL, must be
connected as shown in the external connection diagram. The
minimum value is 18 ohms, however for optimum reliability the
resistor value should be set as high as possible. The value can
be estimated as follows with the maximum practical value of
500 ohms.
R
3
=
CL
I
LIM
The PA41/42 is externally compensated and performance
can be tailored to the application. Use the graphs of small
signal gain and phase response as well as the graphs for slew
rate and power response as a guide. The compensation
capacitor C
compensation capacitor and associated resistor R
must be rated at 350V working voltage. The
C
must be
C
mounted closely to the amplifier pins to avoid spurious oscillation. An NPO capacitor is recommended for compensation.
SAFE OPERATING AREA (SOA)
The MOSFET output stage of this power operational amplifier has two distinct limitations:
1. The current handling capability of the die metallization.
2. The temperature of the output MOSFETs.
NOTE: The output stage is protected against transient
flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used.
Use the typical performance graphs as a guide for expected
variations in current limit value with a given RCL and variations
over temperature. The selected value of R
the specified typical value of output resistance to calculate the
total output resistance. Since the load current passes through
R
the value selected also affects the output voltage swing
CL
according to:
VR = IO R
*
where VR is the voltage swing reduction.
When the amplifier is current limiting, there may be small
signal spurious oscillation present during the current limited
portion of the negative half cycle. The frequency of the oscillation is not predictable and depends on the compensation,
gain of the amplifier, and load. The oscillation will cease as the
must be added to
CL
CL
200
120
100
, (mA)
S
50
OR –V
S
40
30
20
10
PA41 SOA
300mS
DC, T
DC, T
C
C
= 125
200mS
DC
= 85
°C
°C
amplifier comes out of current limit.
5
INPUT PROTECTION
The PA41/42 inputs are protected against common mode
voltages up the supply rails and differential voltages up to ±16
volts as well as static discharge. Differential voltages exceeding 16 volts will be clipped by the protection circuitry. However,
if more than a few milliamps of current is available from the
overload source, the protection circuitry could be destroyed.
The protection circuitry includes 300 ohm current limiting
resistors at each input, but this may be insufficient for severe
overloads. It may be necessary to add external resistors to the
application circuit where severe overload conditions are expected. Limiting input current to 1mA will prevent damage.
STABILITY
The PA41/42 has sufficient phase margin when compensated for unity gain to be stable with capacitive loads of at least
10 nF. However, the low pass circuit created by the sumpoint
4
3
OUTPUT CURRENT FROM +V
PULSE CURVES @ 10% DUTY CYCLE MAX
2
10203050100200 300500
SUPPLY TO OUTPUT DIFFERENTIAL, VS -VO (V)
200
120
100
, (mA)
S
50
OR –V
S
40
30
20
10
PA42 SOA
300mS
DC, T
DC, T
C
= 125
C
= 85
°C
100mS
200mS
DC
°C
(–in) capacitance and the feedback network may add phase
shift and cause instabilities. As a general rule, the sumpoint
load resistance (input and feedback resistors in parallel)
should be 5K ohm or less at low gain settings (up to 10).
Alternatively, use a bypass capacitor across the feedback
resistor. The time constant of the feedback resistor and
bypass capacitor combination should match the time constant
of the sumpoint resistance and sumpoint capacitance.
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.