The PA10 and PA10A are high voltage, high output current
operational amplifiers designed to drive resistive, inductive and
capacitive loads. For optimum linearity, the output stage is
biased for class A/B operation. The safe operating area (SOA)
can be observed for all operating conditions by selection of user
programmable current limiting resistors. Both amplifiers are
internally compensated for all gain settings. For continuous
operation under load, a heatsink of proper rating is recommended.
This hybrid integrated circuit utilizes thick film (cermet)
resistors, ceramic capacitors and semiconductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is
hermetically sealed and electrically isolated. The use of compressible isolation washers voids the warranty.
DC and low distortion AC current waveforms are delivered
to a grounded load by using matched resistors (A and B
sections) and taking advantage of the high common mode
rejection of the PA10.
Foldover current limit is used to modify current limits based
on output voltage. When load resistance drops to 0, the current
is limited based on output voltage. When load resistance
drops to 0, the current limit is 0.79A resulting in an internal
dissipation of 33.3 W. When output voltage increases to 36V,
the current limit is 1.69A. Refer to Application Note 9 on
foldover limiting for details.
SUPPLY VOLTAGE, +VS to –V
OUTPUT CURRENT, within SOA5A
S
100V
POWER DISSIPATION, internal67W
INPUT VOLTAGE, differential±VS –3V
INPUT VOLTAGE, common mode±V
TEMPERATURE, pin solder - 10s300°C
TEMPERATURE, junction
1
S
200°C
TEMPERATURE RANGE, storage–65 to +150°C
OPERATING TEMPERATURE RANGE, case –55 to +125°C
SPECIFICATIONS
PARAMETERTEST CONDITIONS
PA10
2, 5
MINTYPMAXMINTYPMAXUNITS
PA10A
INPUT
OFFSET VOLTAGE, initialTC = 25°C±2±6±1±3mV
OFFSET VOLTAGE, vs. temperatureFull temperature range±10±65*±40µV/°C
OFFSET VOLTAGE, vs. supplyTC = 25°C±30±200**µV/V
OFFSET VOLTAGE, vs. powerTC = 25°C±20*µVW
BIAS CURRENT, initialTC = 25°C12301020nA
BIAS CURRENT, vs. temperatureFull temperature range±50±500**pA/°C
BIAS CURRENT, vs. supplyTC = 25°C.±10*pA/V
OFFSET CURRENT, initialTC = 25°C±12±30±5±10nA
OFFSET CURRENT, vs. temperatureFull temperature range±50*pA/°C
INPUT IMPEDANCE, DCTC = 25°C200*MΩ
INPUT CAPACITANCETC = 25°C3*pF
COMMON MODE VOLTAGE RANGE3Full temperature range±VS–5±VS–3**V
COMMON MODE REJECTION, DC
3
Full temp. range, VCM = ±VS –6V74100**dB
GAIN
OPEN LOOP GAIN at 10HzTC = 25°C, 1KΩ load110*dB
OPEN LOOP GAIN at 10HzFull temp. range, 15Ω load96108**dB
GAIN BANDWIDTH PRODUCT @ 1MHz TC = 25°C, 15Ω load4*MHz
POWER BANDWIDTHTC = 25°C, 15Ω load1015**kHz
PHASE MARGINFull temp. range, 15Ω load20*°
OUTPUT
VOLTAGE SWING
VOLTAGE SWING
VOLTAGE SWING
3
3
3
TC = 25°C, IO = 5A±VS–8±VS–5±VS–6*V
Full temp. range, IO = 2A±VS–6* V
Full temp. range, IO = 80mA±VS–5* V
CURRENT, peakTC = 25°C5*A
SETTLING TIME to .1%TC = 25°C, 2V step2*µs
SLEW RATETC = 25°C23**V/µs
CAPACITIVE LOADFull temperature range, AV = 1.68*nF
CAPACITIVE LOADFull temperature range, AV = 2.510*nF
CAPACITIVE LOADFull temperature range, AV > 10SOA*nF
POWER SUPPLY
VOLTAGEFull temperature range±10±40±45**±50V
CURRENT, quiescentTC = 25°C81530***mA
THERMAL
RESISTANCE, AC, junction to case
4
TC = –55 to +125°C, F > 60Hz1.92.1**°C/W
RESISTANCE, DC, junction to caseTC = –55 to +125°C2.42.6**°C/W
RESISTANCE, junction to airTC = –55 to +125°C30*°C/W
TEMPERATURE RANGE, caseMeets full range specifications–25+85–55+125°C
NOTES: *The specification of PA10A is identical to the specification for PA10 in applicable column to the left.
1.Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF.
2.The power supply voltage for all tests is ±40, unless otherwise noted as a test condition.
3.+VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
4.Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
5.Full temperature range specifications are guaranteed but not tested.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking, mounting,
current limit, SOA interpretation, and specification interpretation.
Visit www.apexmicrotech.com for design tools that help automate
tasks such as calculations for stability, internal power dissipation,
current limit; heat sink selection; Apex’s complete Application
Notes library; Technical Seminar Workbook; and Evaluation Kits.
SAFE OPERATING AREA (SOA)
The output stage of most power amplifiers has three distinct
limitations:
1. The current handling capability of the transistor geometry and
the wire bonds.
2. The second breakdown effect which occurs whenever the
simultaneous collector current and collector-emitter voltage
exceeds specified limits.
3. The junction temperature of the output transistors.
Refer to Application Note 9, "Current Limiting", for details of both
fixed and foldover current limit operation. Visit the Apex web site
at www.apexmicrotech.com for a copy of the Power Design
spreadsheet (Excel) which plots current limits vs. steady state
SOA. Beware that current limit should be thought of as a +/–20%
function initially and varies about 2:1 over the range of –55°C to
125°C.
For fixed current limit, leave pin 7 open and use equations 1 and 2.
= 0.65/L
R
CL
= 0.65/R
I
CL
CL
CL
Where:
is the current limit in amperes.
I
CL
is the current limit resistor in ohms.
R
CL
For certain applications, foldover current limit adds a slope to
the current limit which allows more power to be delivered to the
load without violating the SOA. For maximum foldover slope,
ground pin 7 and use equations 3 and 4.
(1)
(2)
.4
.3
OUTPUT CURRENT FROM +V
.2
10152025 30 35 4050 60 70 80 100
SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE VS – VO (V)
The SOA curves combine the effect of these limits. For a given
application, the direction and magnitude of the output current
should be calculated or measured and checked against the SOA
curves. This is simple for resistive loads but more complex for
reactive and EMF generating loads.
1. For DC outputs, especially those resulting from fault condi-
tions, check worst case stress levels against the new SOA
graph.
For sine wave outputs, use Power Design
1
to plot a load line.
Make sure the load line does not cross the 0.5ms limit and that
excursions beyond any other second breakdown line do not
exceed the time label, and have a duty cycle of no more than
10%.
For other waveform outputs, manual load line plotting is
recommended. Applications Note 22, SOA AND LOAD LINES,
will be helpful. A Spice type analysis can be very useful in that
a hardware setup often calls for instruments or amplifiers with
wide common mode rejection ranges.
2. The amplifier can handle any EMF generating or reactive load
and short circuits to the supply rail or shorts to common if the
current limits are set as follows at T
1
Note 1. Power Design is a self-extracting Excel spreadsheet
= 85°C:
C
available free from www.apexmicrotech.com
0.65 + (Vo * 0.014)
=(3)
I
CL
R
CL
0.65 + (Vo * 0.014)
RCL =(4)
I
CL
Where:
Vo is the output voltage in volts.
Most designers start with either equation 1 to set R
desired current at 0v out, or with equation 4 to set R
maximum output voltage. Equation 3 should then be used to plot
for the
CL
CL
at the
the resulting foldover limits on the SOA graph. If equation 3 results
in a negative current limit, foldover slope must be reduced. This
can happen when the output voltage is the opposite polarity of the
supply conducting the current.
In applications where a reduced foldover slope is desired, this
can be achieved by adding a resistor (R
) between pin 7 and
FO
ground. Use equations 4 and 5 with this new resistor in the circuit.
0.65 + Vo
I
=(5)
CL
*
10.14 + R
R
CL
0.14
FO
0.65 + Vo * 0.14
10.14 + R
R
=(6)
CL
I
CL
FO
Where:
is in K ohms.
R
FO
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
APEX MICROTECHNOLOGY CORPORATION• 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739