Apex PA07A, PA07 Datasheet

CL+
+V
+IN
IN
V
BAL
CL–
OUT
S
S
TOP VIEW
R
CL+
R
CL–
R
T
R
S
OUTPUT
R
S
= ( VS++–VS) RT/1.6
1
2
3
4
5
6
7
8
MOTOR
R
CL+
R
CL–
C
L
C
F
R
L
R
F2
R
F1
+32V
.68
.68
–32V
+V
–V
PD1 PD2
LIGHT
V = 28 EMF = 14V R = 14
PA07
W
FET INPUT POWER OPERATIONAL AMPLIFIERS
MICROTECHNOLOGY
HTTP://WWW.APEXMICROTECH.COM (800) 546-APEX (800) 546-2739
FEATURES
• LOW BIAS CURRENT — FET Input
• PROTECTED OUTPUT STAGE — Thermal Shutoff
• EXCELLENT LINEARITY — Class A/B Output
• WIDE SUPPLY RANGE — ±12V TO ±50V
• HIGH OUTPUT CURRENT — ±5A Peak
APPLICATIONS
PA07 • PA07A
• MAGNETIC DEFLECTION CIRCUITS UP TO 4A
• POWER TRANSDUCERS UP TO 100kHz
• TEMPERATURE CONTROL UP TO 180W
• PROGRAMMABLE POWER SUPPLIES UP TO 90V
• AUDIO AMPLIFIERS UP TO 60W RMS
DESCRIPTION
The PA07 is a high voltage, high output current operational amplifier designed to drive resistive, inductive and capacitive loads. For optimum linearity, especially at low levels, the output stage is biased for class A/B operation using a ther­mistor compensated base-emitter voltage multiplier circuit. A thermal shutoff circuit protects against overheating and mini­mizes heatsink requirements for abnormal operating condi­tions. The safe operating area (SOA) can be observed for all operating conditions by selection of user programmable cur­rent limiting resistors. Both amplifiers are internally compen­sated for all gain settings. For continuous operation under load, a heatsink of proper rating is recommended.
This hybrid circuit utilizes thick film (cermet) resistors, ce­ramic capacitors and semiconductor chips to maximize reli­ability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3 package is hermeti­cally sealed and electrically isolated. The use of compressible washers and/or improper mounting torque will void the product warranty. Please see “General Operating Considerations”.
EQUIVALENT SCHEMATIC
3
TYPICAL APPLICATION
Negates optoelectronic instabilities
Lead network minimizes overshoot
SEQUENTIAL POSITION CONTROL
Position is sensed by the differentially connected photo diodes, a method that negates the time and temperature variations of the optical components. Off center positions produce an error current which is integrated by the op amp circuit, driving the system back to center position. A momen­tary switch contact forces the system out of lock and then the integrating capacitor holds drive level while both diodes are in a dark state. When the next index point arrives, the lead network of C1 and R1 optimize system response by reducing overshoot. The very low bias current of the PA07 augments performance of the integrator circuit.
7
Q1 Q2
Q5
Q8
5
Q12A Q12B
4
6
APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL prodlit@apexmicrotech.com
Q15
Q9
C3
Q18
D1
Q4
Q10
D3
D2
C2
C4
Q11
Q3
Q16
C1
Q7
Q19
Q6A
Q6B
2
1
8
Q17B
Q17A
EXTERNAL CONNECTIONS
NOTE: Input offset voltage trim optional. RT = 10K MAX
8-pin TO-3 package
PA07 PA07A
ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
SUPPLY VOLTAGE, +VS to –V OUTPUT CURRENT, within SOA 5A POWER DISSIPATION, internal
S
1
100V
67W INPUT VOLTAGE, differential ±50V INPUT VOLTAGE, common mode ±V TEMPERATURE, pin solder - 10s 300°C TEMPERATURE, junction
1
S
200°C TEMPERATURE RANGE, storage –65 to +150°C OPERATING TEMPERATURE RANGE, case –55 to +125°C
SPECIFICATIONS
PARAMETER TEST CONDITIONS
PA07
2
MIN TYP MAX MIN TYP MAX UNITS
PA07A
INPUT
OFFSET VOLTAGE, initial TC = 25°C.5±2 ±.25 ±.5 mV OFFSET VOLTAGE, vs. temperature Full temperature range 10 30 5 10 µV/°C OFFSET VOLTAGE, vs. supply TC = 25°C8*µV/V OFFSET VOLTAGE, vs. power Full temperature range 20 10 µV/W BIAS CURRENT, initial BIAS CURRENT,vs. supply TC = 25°C .01 * pA/V OFFSET CURRENT, initial INPUT IMPEDANCE, DC TC = 25°C10
3
3
TC = 25°C550310pA TC = 25°C 2.5 50 1.5 10 pA
11
* INPUT CAPACITANCE TC = 25°C4*pF COMMON MODE VOLTAGE RANGE4Full temperature range ±VS–10 * V COMMON MODE REJECTION, DC Full temperature range, VCM = ±20V 120 * dB
GAIN
OPEN LOOP GAIN at 10Hz TC = 25°C, RL = 15 92 98 * * dB GAIN BANDWIDTH PRODUCT @ 1MHz TC = 25°C, RL = 15 1.3 * MHz POWER BANDWIDTH TC = 25°C, RL = 15 18 * kHz PHASE MARGIN Full temperature range, RL = 15 70 * °
OUTPUT
VOLTAGE SWING VOLTAGE SWING VOLTAGE SWING
4 4 4
Full temp. range, IO = 5A ±VS–5* V Full temp. range, IO = 2A ±VS–5* V
Full temp. range, IO = 90mA ±VS–5* V CURRENT, peak TC = 25°C5*A SETTLING TIME to .1% TC = 25°C, 2V step 1.5 * µs SLEW RATE TC = 25°C5*V/µs CAPACITIVE LOAD, unity gain Full temperature range 10 * nF CAPACITIVE LOAD, gain>4 Full temperature range SOA *
POWER SUPPLY
VOLTAGE Full temperature range ±12 ±35 ±50 * * * V CURRENT, quiescent TC = 25°C1830**mA
THERMAL
RESISTANCE, AC, junction to case
5
F>60Hz 1.9 2.1 * * °C/W RESISTANCE, DC, junction to case F<60Hz 2.4 2.6 * * °C/W RESISTANCE, junction to air 30 * °C/W TEMPERATURE RANGE, case Meets full range specifications –25 25 +85 * * * °C
NOTES: * The specification of PA07A is identical to the specification for PA07 in applicable column to the left.
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF.
2. The power supply voltage for all specifications is the TYP rating unless otherwise noted as a test condition.
3. Doubles for every 10°C of temperature increase.
4. +VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
5. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
CAUTION
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes.
APEX MICROTECHNOLOGY CORPORATION 5980 NORTH SHANNON ROAD TUCSON, ARIZONA 85741 USA APPLICATIONS HOTLINE: 1 (800) 546-2739
TYPICAL PERFORMANCE GRAPHS
PA07 • PA07A
70
60 50
POWER DERATING
T = T
C
40 30 20 10
0
0 20 40 60 80 100 120
INTERNAL POWER DISSIPATION, P(W)
120
TEMPERATURE, TC (°C)
SMALL SIGNAL RESPONSE
T = T
A
100
80
OL
60 40
20
0
OPEN LOOP GAIN, A (dB)
–20
1 100 10M
10 1K 10K .1M 1M
FREQUENCY, F (Hz)
140
256
B
BIAS CURRENT
64
16
4
1
.25
.06
NORMALIZED BIAS CURRENT, I (X)
–15 25 105
5456585
TEMPERATURE, T (°C)
PHASE RESPONSE
0
C
306090
120
PHASE, (°)ϕ
150180
210
10 10K 1M
1 100 .1M 10M
1K
FREQUENCY, F (Hz)
3.0
2.5
LIM
2.0
1.5
R = 0.3CLΩ
R = 0.6CLΩ
1.0
.5
CURRENT LIMIT, I (A)
0
–50 –25 50 100
025 75
CASE TEMPERATURE, T
POWER RESPONSE
CURRENT LIMIT
100
68
PP
46
O
32 22
15 10
6.8
OUTPUT VOLTAGE, V (V )
4.6 10K 20K 50K .1M
|+V | + |-V | = 100V
SS
|+V | + |-V | = 70V
SS
30K
FREQUENCY, F (Hz)
C
70K
(°C)
COMMON MODE REJECTION
120
100
80
60 40
20
0
1 10K
COMMON MODE REJECTION, CMR (dB)
10
FREQUENCY, F (Hz)
HARMONIC DISTORTION
1K 1M
.1M10 100 0
G =10
3
1
.3
.1
DISTORTION, THD (%)
.03 .01
100 1K 3K .1M
, R = 8
S
O
P = 50mW
O
P = 50W, V = ±25V, R = 4
O
P = 60W, V = ±36V, R = 8
300 10K 30K
L
S
L
L
FREQUENCY, F (Hz)
PULSE RESPONSE
8
V = ±5V, t = 100ns
IN r
OPP
6 4 2 0
24
6
OUTPUT VOLTAGE, V (V )
–8
2 4 6 8 10 12
TIME, t (µs)
QUIESCENT CURRENT
Q
1.6
1.4
1.2
1.0
.8
.6
.4
50 60 70 80 90
40 100
TOTAL SUPPLY VOLTAGE, V
NORMALIZED QUIESCENT CURRENT, I (X)
–25
T =
C
T = 25
C
T = 85
C
T = 125
C
°C
°C
°C
°C
(V)
S
20
INPUT NOISE
N
10
6
4
2
INPUT NOISE VOLTAGE, V (nV/ Hz)
10 100 10K .1M
1K
FREQUENCY, F (Hz)
OUTPUT VOLTAGE SWING
6
SAT
5
4
3
2
T = 85
C
°C
C
T =
–25°C
T = 25
C
°C
1
0
023 6
VOLTAGE DROP FROM SUPPLY, V (V)
15
OUTPUT CURRENT, I (A)
4
O
APEX MICROTECHNOLOGY CORPORATION TELEPHONE (520) 690-8600 FAX (520) 888-3329 ORDERS (520) 690-8601 EMAIL prodlit@apexmicrotech.com
PA07 PA07A
GENERAL
Please read Application Note 1 "General Operating Consid­erations" which covers stability, supplies, heat sinking, mount­ing, current limit, SOA interpretation, and specification inter­pretation. Visit www.apexmicrotech.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selection; Apex’s complete Application Notes library; Technical Seminar Work­book; and Evaluation Kits.
SAFE OPERATING AREA (SOA)
The output stage of most power amplifiers has three distinct limitations:
1. The current handling capability of the wire bonds.
2. The second breakdown effect which occurs whenever the
simultaneous collector current and collector-emitter volt­age exceed specified limits.
3. The junction temperature of the output transistors.
5.0
Tc = 85°C
4.0
(A)
S
3.0
2.0
OR – V
S
1.5
1.0 .8
.6
.4 .3
OUTPUT CURRENT FROM +V
.2
10 15 20 25 30 35 40 50 60 70 80 100
SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE VS – VO (V)
steady state SECOND BREAKDOWN
Tc = 125°C
THERMAL
t = 5ms
t = 0.5ms
t = 1ms
OPERATING
CONSIDERATIONS
2. The amplifier can handle any reactive or EMF generating load and short circuits to the supply rail or common if the current limits are set as follows at T
SHORT TO
±V
S
C, L, OR EMF LOAD COMMON
±V
S
= 85°C:
C
SHORT TO
50V .21A .61A 40V .3A .87A 30V .46A 1.4A 20V .87A 2.5A 15V 1.4A 4.0A
These simplified limits may be exceeded with further analysis using the operating conditions for a specific application.
3. The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast-recovery diodes should be used.
THERMAL SHUTDOWN PROTECTION
The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approximately 150°C. This allows heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperature during temporary fault conditions.
Thermal protection is a fairly slow-acting circuit and there­fore does not protect the amplifier against transient SOA violations (areas outside of the T designed to protect against short-term fault conditions that result in high power dissipation within the amplifier. If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, will destroy signal integrity and reduce the reliability of the device.
= 25°C boundary). It is
C
SAFE OPERATING AREA CURVES
The SOA curves combine the effect of these limits. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. However, the following guidelines may save extensive analytical efforts.
CURRENT LIMIT
Proper operation requires the use of two current limit resis­tors, connected as shown in the external connections diagram. The minimum value for R reliability it should be set as high as possible. Refer to the General Operating Considerations section of the handbook for current limit adjust details.
is .12, however, for optimum
CL
1. For DC outputs, especially those resulting from fault condi­tions, check worst case stress levels against the new SOA graph.
For sine wave outputs, use Power Design
1
to plot a load line. Make sure the load line does not cross the 0.5ms limit and that excursions beyond any other second breakdown line do not exceed the time label, and have a duty cycle of no more than 10%.
For other waveform outputs, manual load line plotting is recommended. Applications Note 22, SOA AND LOAD LINES, will be helpful. A Spice type analysis can be very useful in that a hardware setup often calls for instruments or amplifiers with wide common mode rejection ranges.
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
APEX MICROTECHNOLOGY CORPORATION 5980 NORTH SHANNON ROAD TUCSON, ARIZONA 85741 USA APPLICATIONS HOTLINE: 1 (800) 546-2739
PA07U REV. L FEBRUARY 2001 © 2001 Apex Microtechnology Corp.
1
Note 1. Power Design is a self-extracting Excel spreadsheet
available free from www.apexmicrotech.com
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