The super power PA03 advances the state of the art in both
brute force power and self protection against abnormal operating conditions. Its features start with a copper dip package
developed by Apex to extend power capabilities well beyond
those attainable with the familiar TO-3 package. The increased pin count of the new package provides additional
control features, while the superior thermal conductivity of
copper allows substantially higher power ratings.
The PA03 incorporates innovative current limiting circuits
limiting internal power dissipation to a curve approximating the
safe operating area of the power transistors. The internal
current limit of 35A is supplemented with thermal sensing
which reduces the current limit as the substrate temperature
rises. Furthermore, a subcircuit monitors actual junction temperatures and with a response time of less than ten milliseconds reduces the current limit further to keep the junction
temperature at 175°C.
The PA03 also features a laser trimmed high performance
FET input stage providing superior DC accuracies both initially
and over the full temperature range.
PA03 • P03A
TYPICAL APPLICATION
The PA03 output power stages contain fast reverse recov-
ery diodes for sustained high energy flyback protection.
This hybrid integrated circuit utilizes thick film resistors,
ceramic capacitors and silicon semiconductors to maximize
reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The MO-127 Copper,
12-pin Power Dip™ package (see Package Outlines), is
hermetically sealed and isolated from the internal circuits.
Insulating washers are not recommended.
SUPPLY VOLTAGE, +VS to –V
OUTPUT CURRENT, within SOAInternally limited
S
POWER DISSIPATION, internal500W
INPUT VOLTAGE, differential±25V
INPUT VOLTAGE, common mode±V
TEMPERATURE, pin solder-10s300°C
TEMPERATURE, junction
1
TEMPERATURE RANGE, storage–65 to +150°C
OPERATING TEMP. RANGE, case–55 to +125°C
SHUTDOWN VOLTAGE, differential±5V
SHUTDOWN VOLTAGE, common mode ±V
150V
S
175°C
S
–SHUT DN
+SHUT DN
–OUTPUT
SPECIFICATIONS
PARAMETERTEST CONDITIONS
–INPUT
+INPUT
–SUPPLY
EXTERNAL CONNECTIONS
1
2
3
4
5
6
2
12
11
TOP
10
VIEW
†
MINTYPMAXMINTYPMAXUNITS
BALANCE CONTROL
BALANCE CONTROL
PHASE COMP.
9
PHASE COMP.
8
+SUPPLY
7
+OUTPUT
PA03
Pins 6 & 7 must be
connected together.
If unused, tie Pins
11 & 12 to +SUPPLY.
† IMPORTANT: OBSERVE
MOUNTING PRECAUTIONS.
REVERSE INSERTION
WILL DESTROY UNIT.
PA03A
INPUT
OFFSET VOLTAGE, initialTC = 25°C± .5± 2± .25± .5mV
OFFSET VOLTAGE, vs. temperatureFull temperature range1030510µV/°C
OFFSET VOLTAGE, vs. supplyTC = 25°C8*µV/V
OFFSET VOLTAGE, vs. powerFull temperature range2010µV/W
BIAS CURRENT, initialTC = 25°C550310pA
BIAS CURRENT, vs. supplyTC = 25°C.01*pA/V
OFFSET CURRENT, initialTC = 25°C2.5501.510pA
INPUT IMPEDANCE, DCTC = 25°C10
11
*Ω
INPUT CAPACITANCETC = 25°C6*pF
COMMON MODE VOLTAGE RANGE3Full temperature range± VS –10V*V
COMMON MODE REJECTION, DCFull temp. range, VCM = ±20V86108**dB
SHUTDOWN CURRENT
4
Full temperature range100*µA
SHUTDOWN VOLTAGEFull temp. range, amp enabled.85*V
SHUTDOWN VOLTAGEFull temp. range, amp disabled3.5*V
GAIN
OPEN LOOP GAIN at 10HzFull temp. range, full load92102**dB
GAIN BANDWIDTH PRODUCT at 1MHz TC = 25°C, full load1*MHz
POWER BANDWIDTHTC = 25°C, IO = 15A, VO = 88V
PHASE MARGINFull temp. range, CC = 1.8nF65*°
PP
30*kHz
OUTPUT
VOLTAGE SWING
VOLTAGE SWING
VOLTAGE SWING
3
3
3
TC = 25°C, IO = 30A± VS –76.2**V
Full temp. range, IO = 12A± VS –54.2**V
Full temp. range, IO = 146mA± VS –43.5**V
CURRENT, peakTC = 25°C30*A
SETTLING TIME to .1%TC = 25°C, 10V step8*µs
SLEW RATETC = 25°C, CC - open8*V/µs
CAPACITIVE LOADFull temp. range, AV = 12*nF
SHUTDOWN DELAYTC = –25°C, disable10*µs
TC = –25°C, operate20*µs
POWER SUPPLY
VOLTAGEFull temperature range± 15± 50± 75***V
CURRENT, quiescent
6
TC = 25°C125300**mA
CURRENT, disable modeFull temperature range2540**mA
THERMAL
RESISTANCE, AC junction to case
5
Full temp. range, F>60Hz.22.28**°C/W
RESISTANCE, DC junction to caseFull temp. range, F<60Hz.25.3**°C/W
RESISTANCE, junction to ambientFull temperature range14*°C/W
TEMPERATURE, junctionSustained operation150*°C
TEMPERATURE RANGE, caseMeets full range specification– 2585**°C
NOTES: *The specification of PA03A is identical to the specification for PA03 in applicable column to the left.
1.Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to
achieve high MTTF.
2.The power supply voltage for all specifications is the TYP rating unless noted as a test condition.
3.+VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
4.Rating applies if both shutdown inputs are least 1V inside supply rails. If one of the shutdown inputs is tied to a supply rail, the
current in that pin may increase to 2.4mA.
5.Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
6.The PA03 must be used with a heatsink or the quiescent power may drive the unit into thermal shutdown.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
Please read the “General Operating Considerations” section,
which covers stability, supplies, heatsinking, mounting, current
limit, SOA interpretation, and specification interpretation. Additional information can be found in the application notes. For
information on the package outline, heatsinks, and mounting
hardware, consult the “Accessory and Package Mechanical Data”
section of the handbook.
MOUNTING PRECAUTIONS
The PA03 copper base is very soft and easily bent. Do not put
any stress on the mounting ears of this package. This calls for
caution when pushing the amplifier into certain types of packaging
foam and particularly when inserting the device into a socket.
Insert the amplifier into the socket only by pushing on the perimeter
of the package lid. Pushing the unit into the socket by applying
pressure to the mounting tabs will bend the base due to the high
insertion force required. The base will then not contact the heatsink
evenly resulting in very poor heat transfer. To remove a unit from
a socket, pry the socket away from the heatsink so that the
heatsink will support the amplifier base evenly. Recommended
mounting torque is 8–10 in.-lbs. (.9–1.13 N•m).
SAFE OPERATING AREA (SOA)
Due to the internal (non-adjustable) current limit of the PA03,
worst case power dissipation calculations must assume current
capability of 46 amps. Application specific circuits should be
checked against the SOA curve when relying upon current limit for
fault protectio
n.
SAFE OPERATING AREA CURVES
Second breakdown limitations do apply to the PA03 but are
less severe, since junction temperature limiting responds
within 10ms. Stress levels shown as being safe for more than
10ms duration
will merely
cause thermal
shutdown.
Under normal operating
conditions, activation of the
)
40
(A
S
30
OR –V
S
10
5
THERMAL
CURRENT LIMIT ZONE
100mS
dc
SECOND BREAKDOWN
1.0mS
10mS
thermal shutdown is a sign
that the internal junction
temperatures
have reached
approximately
TC = 25°C
1
102050100150
SUPPLY TO OUTPUT DIFFERENTIAL VS –VO (V)
OUTPUT CURRENT FROM +V
175°C. Thermal shutdown is a short term safety feature. If the
conditions remain that cause thermal shutdown, the amplifier
will oscillate in and out of shutdown, creating peak high power
stresses, destroying useful signals, and reducing the reliability
of the device.
BALANCE CONTROL
The voltage offset of the PA03 may be externally adjusted to
zero. To implement this adjustment install a 100 to 200 ohm
potentiometer between pins 11 and 12 and connect the wiper arm
to the positive supply. Bypass pins 11 and 12 each with at least a
.01µF ceramic capacitor.
If the optional adjust provision is not used, connect both pins 11
and 12 to the positive supply.
OUTPUT STAGE SHUTDOWN
The entire power stage of the PA03 may be disabled using one
of the circuits shown in Figure 1. There are many applications for
this function. One is a load protection based on power delivered to
the load or thermal rise. Another one is conservation of power
when using batteries. The control voltage requirements accommodate a wide variety logic drivers.
1. CMOS operating at +5V can drive the control pins directly.
2. CMOS operating at greater than 5V supplies need a voltage
divider.
3. TTL logic needs a pull up resistor to +5V to provide a swing to
the fully disabled voltage (3.5V). When not using the shutdown
feature, connect both pins 3 and 4 to common.
PHASE COMPENSATION
At low gain settings an external compensation capacitor is
required to insure stability. In addition to the resistive feedback
network, roll off or integrating capacitors must also be considered.
A frequency of 1 MHz is most appropriate to calculate gain.
Operation at gains below 10, without the external compensation
capacitor opens the possibility of oscillations near output saturation regions when under load, the improper operation of the
thermal shutdown circuit. This can result in amplifier destruction.
At gains of 10 or more:
1. No external components are required.
2. Typical slew rate will be 8V/µs.
3. Typical phase margin will be 70°.
At a gain of 3:
1. Connect a 470pF compensation capacitor between pins 9 and
10.
2. Typical slew rate will be 5V/µs.
3. Typical phase margin will be 45°.
At unity gain:
1. Connect a 1.8nF compensation capacitor between pins 9 and
10.
2. Typical slew rate will be 1.8V/µs.
3. Typical phase margin will be 65°.
FIGURE 1a.
DIRECT DRIVE
OF SHUTDOWN
0 = OPERATE
1 = SHUT DN
0 = SHUT DN
1 = OPERATE
FIGURE 1b.
HIGH VOLTAGE
LOGIC INTERFACE
FIGURE 1c.
THERMALLY
ACTIVATED
SHUTDOWN
** SELECT SHUTOFF
TEMPERATURE
SELECT R4 FOR 5V
DROP ON R2
+5V
+15V
CMOS4
+V
S
360–
400mV
R3
360
Ω
500
Ω
4
*
500
Ω
3
2R
R
R2
R1
4.7K
**
R4
30K
THERMAL SENSE
TRANSISTOR
PA03
Q14
1K1K
Q22
500
500
3
4
3
500
500
Ω
Ω
Ω
Ω
* NOT REQUIRED
WHEN USING
CMOS LOGIC
PA03
Q14
1K
Q22
Q14
1K
Q22
LOAD
PA03
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.