Ultra Low Dropout - 0.2V(typical) at 1A Output Current
Low ESR Output Capacitor (Multi-layer Chip
Capacitors (MLCC)) Applicable
0.8V Reference Voltage
Fast Transient Response
Adjustable Output Voltage by External Resistors
Power-On-Reset Monitoring on Both VCNTL and VIN Pins
Internal Soft-Start
Under-Voltage Protection
Current-Limit and Thermal Shutdown Protection
Power-OK Output with a Delay Time
ESOP-8, SOT-26 and DFN 2x2 Pb-Free Packages.
The APE8901 is a 1A ultra low dropout linear
regulator. This product is specifically designed to provide
well supply voltage for front-side-bus termination on
motherboards and NB applications. The IC needs two
supply voltages, a control voltage for the circuitry and a
main supply voltage for power conversion, to reduce
power dissipation and provide extremely low dropout. The
APE8901 integrates many functions. A Power-On-Reset
(POR) circuit monitors both supply voltages to prevent
wrong operations. A thermal shutdown and current limit
functions protect the device against thermal and current
over-loads. A POK indicates the output status with time
delay which is set internally. It can control other converter
for power sequence. The APE8901 can be enabled by
other power system. Pulling and holding the EN pin below
0.3V shuts off the output.
The APE8901 is available in ESOP-8, SOT-26 and
DFN 2x2 packages. That features small size as SOP-8
with an Exposed Pad to reduce the junction-to-case
resistance, being applicable in 2~3W applications.
APE8901
TYPICAL APPLICATION CIRCUIT
1. Using an Output Capacitor with ESR > 20mΩ
VCNTL=5V
ON
OFF
C1
1uF
2. Using an MLCC as the Output Capacitor
VCNTL=5V
ON
OFF
C1
1uF
U1
VCNTL
POK
EN
GND
APE8901
U2
VCNTL
POK
EN
GND
APE8901
R3
1K
R3
1K
VOUT
VIN
NC
VOUT
VIN
NC
FB
C3
C4
220uF
VIN=1.5V
VIN=1.5V
Vout=1.2V/1A
C5
0.1u
Vout=1.2V/1A
C2
100uF
0.1uF
FB
R1
39K
R1
1K
R2
2K
22uF
56pF
C3
C6
C6
12~48nF
C5
22u
VOUT=VFB*(1+R1/R2)
VFB = 0.8V
Data and specifications subject to change without notice
R2
78K
1
200906252
Advanced Power
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Electronics Corp.APE8901
ABSOLUTE MAXIMUM RATINGS(at T
VCNTL Supply Voltage (V
VIN Supply Voltage (V
EN & FB Pin Voltage (VI/O) ----------------------------Power Voltage (V
Power Dissipation (P
) -------------------------------------- -0.3V to 7V
POK
)
D
Storage Temperature Range (T
Junction Temperature Range (T
Operating Temperature Range (T
Thermal Resistance Junction to Ambient (Rth
Thermal Resistance Junction to Case (Rth
) -------------------------- -0.3V to 7V
CNTL
) ---------------------------------- -0.3V to 6V
IN
-0.3V to VCNTL+0.3V
ESOP-8 ------ 3W
SOT-26 -----DFN 2x2 -----
) --------------------- -65°C To 150°C
ST
) ---------------------- -40°C To 125°C
J
) ------------------ -40°C To 85°C
OP
0.4W
0.8W
)
ja
ESOP-8 ------ 40°C/W
SOT-26 -----DFN 2x2 -----
jc
250°C/W
125°C/W
)
ESOP-8 ------ 15°C/W
SOT-26 -----DFN 2x2 -----
180°C/W
20°C/W
=25oC)
A
Note. Rth
is measured with the PCB copper area (need connect to Expose-Pad) of approximately 1.5 in2 (Multi-layer) by ESOP-8 and DFN-8L packages.
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RECOMMENDED OPERATING CONDITIONS
V
Supply Voltage (VCNTL) -------------------------- 3V to 6V
CNTL
VIN Supply Voltage (V
Output Voltage (V
Output Current (I
Connecting this pin to an external resistor divider receives the feedback voltage of the
regulator. The output voltage set by the resistor divider is determined by:
Power -ON
Reset
Enable
Thermal
Shutdown
Current
Limit
Soft-Start
And
Control Logic
UV
0.4V
-+
Delay
POK
N-MOSFET
-
+
Bandgap
POK
Error
Amp
-+
VOUT
90Ω
FB
90%
Vref
VIN
VCNTL
POK
EN
Where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected from FB
to GND. A bypass capacitor may be connected with R1in parallel to improve load transient
response. The recommended R2 and R1 are in the range of 1K~100kΩ.
Main supply input pins for power conversions. The voltage at this pin is monitored for
Power-On Reset
ose.
Power input pin of the control circuitry. Connecting this pin to a +5V (recommended) supply
voltage provides the bias for the control circuitry. The voltage at this pin is monitored for Power-On
Reset purpose.
Power-OK signal output pin. This pin is an open-drain output used to indicate status of
output voltage by sensing FB voltage. This pin is pulled low when the rising FB voltage is not
above the VPOK threshold or the falling FB voltage is below the VPOK threshold, indicating the
output is not OK.
Enable control pin. Pulling and holding this pin below 0.4V shuts down the output. When re-
enabled, the IC undergoes a new soft-start cycle. Left this pin open, this pin is internal pulled up to
VCNTL voltage, enabling the regulator.
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Advanced Power
Electronics Corp.APE8901
PIN DESCRIPTION
VOUT
Output of the regulator. Please connect Pin 6 using wide tracks. It is necessary to connect
an output capacitor with this pin for closed-loop compensation and improving transient responses.
FUNCTION DESCRIPTION
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins to
prevent wrong logic controls. The POR function initiates a soft-start process after the two supply
voltages exceed their rising POR threshold voltages during powering on. The POR function also
pulls low the POK pin regardless the output voltage when the VCNTL voltage falls below its falling
POR threshold.
Internal Soft-Start
An internal soft-start function controls rise rate of the output voltage to limit the current
surge at start-up. The typical soft-start interval is about 2mS.
Output Voltage Regulation
An error amplifier working with a temperature compensated 0.8V reference and an output
NMOS regulates output to the preset voltage. The error amplifier designed with high bandwidth
and DC gain provides very fast transient response and less load regulation. It compares the
reference with the feedback voltage and amplifies the difference to drive the output NMOS which
provides load current from VIN to VOUT.
Current-Limit
The APE8901 monitors the current via the output NMOS and limits the maximum current to
prevent load and APE8901 from damages during overload or short circuit conditions.
Under-Voltage Protection (UVP)
The APE8901 monitors the voltage on FB pin after soft-start process is finished. Therefore
the UVP is disabling during soft-start. When the voltage on FB pin falls below the under-voltage
threshold, the UVP circuit shuts off the output immediately. After a while, the APE8901 starts a
new soft-start to regulate output.
Thermal Shutdown
A thermal shutdown circuit limits the junction temperature of APE8901. When the junction
temperature exceeds +150°C, a thermal sensor turns off the output NMOS, allowing the device to
cool down. The regulator regulates the output again through initiation of a new soft-start cycle after
the junction temperature cools by 40°C, resulting in a pulsed output during continuous thermal
overload conditions. The thermal shutdown designed