AnyDATA DTG2000 Users Manual

CDMA DATA TERMINAL

DTG2000-Dual Reference Manual Application Information

AnyDATA.NET

International Contact AnyDATA Corp. 18902 Bardeen Ave Irvine, CA 92612-1522, U.S.A. e-mail :

johnkim@anydata.net

May. 25, 2004

01-DTG2000-Dual-1 X5

AnyTime AnyPlace Any Wireless Data Solutions™

Korea Contact

AnyDATA.NET

Hanvit Bank Bldg. 6th Fl., 1-12

Byulyang-dong Kwachon,

e-mail : info@anydata.net

Kyunggi-do, Korea

AnyDATA.NET Inc. AnyTime AnyPlace Any Wireless Dat a Solution

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Notice

All data and information contained in or disclosed by this document are confidential and proprietary information of AnyDATA.NET Inc., and all rights therein are expressly reserved. By accepting this material, the recipient agrees that this material and the information contained therein are held in confidence and in trust and will not be used, copied, reproduced, or distributed in whole or in part, nor its contents revealed in any manner to others without the express wr itten permission of AnyDATA.NET Inc.

AnyDATA.NET Inc. does not assume any liability arising out of the application or use of its products. AnyDATA.NET Inc.

products. A nyDATA.NET Inc. assumes no responsibility for any loss or claims by third parties, which may arise through the use of its products. AnyDATA.NET Inc. assumes no responsibility for any damage or loss caused by the deletion or loss of data as a result of malfunctions or repairs.

The information contained in this document is subject to change without notice. Information contained

assumes no responsibility for any damage or loss resulting from the misuse of its

herein is for reference only and does not constitute a commitment on the part of AnyDATA.NET Inc. Although the information in this document has been carefully reviewed and it’s believed to be reliable,

AnyDATA.NET Inc.

in this document nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this document.

It is advised for the customers to contact our engineers for more information with respect to Keypad, audio interface, RF interface and input power supply before they start an actual design.

OEM integrators and installers are instructed that the phrase 'This device contains transmitter FCC ID: P4M-DTG2000' must be placed on the outside of the host.

Warning: Exposure to Radio Frequen cy Radiation

!

The radiated output power of this device is far below the FCC radio frequency exposure limits. Nevertheless, the device should be used in such a manner that the potential for human contact during normal operation is minimized. In order to avoid the possibility of exceeding the FCC radio frequency exposure limits, human proximity to the antenna should not be less than 20cm during normal operation and the gain of the antenna must not exceed 1dBi

assumes no responsibility or liability for any errors or inaccuracies that may appear

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Contents

1 Introduction

1.1 Purpose

1.2 Organization

1.3 Revision History

1.4 Reference

1.5 Acronym List

2 Overview

2.1 Application Description

2.2 Technical Specifications

2.2.1 General Specification

2.2.2 Receive Specification

2.2.3 Transmit Specification

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2.2.4 Standards

2.3 Interface Diagram

3 PIN Description

3.1 I/O Description Parameters

3.2 PIN Names and Pin-outs

3.2.1 100-PIN Connector

3.3 100-Pin Connector Pin-out (Top view)

4 Interface Descriptions

4.1 Overview

4.2 Powering Up the Module

4.3 CODEC Interface

4.4 UART Interface

4.3.1 UART1 Interface

4.3.2 UART2 Interface

4.3.3 UART3 Interface

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4.5 General Purpose Interface

4.6 External Hardware Reset and Power Down Registration

4.7 User Interface

4.7.1 Key Pad

4.7.2 LCD

4.7.3 Ringer

4.7.4 LED Interface

5 Electrical Specifications

5.1 DC Electrical Specifications

5.1.1 Absolute Maximum Ratings

5.1.2 Recommended Operating Conditions

5.1.3 Power Consumption

5.1.4 Serial Interface Electrical Specifications

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5.2 Timing Characteristics

5.2.1 External CODEC Timing

5.2.2 LCD Timing

4 Mechanical Dimension

6.1 DTG2000-Dual Outline

6.2 100-Pin Connector

6.3 RF Connector

7 Application Schematic

Figures

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Figure 2-1 Interface Block Diagram ........................ ... .. ... .. ..... .. .. ... .. .. ..... .. ... .. .. ... .... ... .. ... .. .. ..... . 11

Figure 2-2 General Features ...................................................................................................... 12

Figure 4-1 Interface Block Diagram ........................ ... .. ... .. ..... .. .. ... .. .. ..... .. ... .. .. ... .... ... .. ... .. .. ..... . 16

Figure 4-2 Keypad Matrix ............................... .. ... .. ..... .. ... .. .. ..... .. ... .. .. ..... .. ... .. .. ... .... ... .. ... .. ........ 21

Figure 4-3 LCD Interface Block Diagram ................................................................................ 22

Figure 4-4 Reference External Ringer Driver Circuit .............................................................. 23

Figure 5-1 External PCM CODEC to Modul e timing .............................................................. 25

Figure 5-2 Module to External PCM CODEC timing ............................................... ..... .. .. ... .. . 25

Figure 5-3 LCD Timing ................................... ..... .. ... .. .. ..... .. ... .. .. ..... .. ... .. ..... .. ... .. .. ..... .. ... .. .. ...... 26

Figure 6-1 100-pin Female Connector …………………………………………………………... 29 Figure 6-2 PCB Connector .……………………………………………………………………..30 Figure 6-3 PCB Connector Layout .……………………………………………………………. 30 Figure 6-4 Mechanical Characteristics of Cable Harness Assembly .……………………….…. 31

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Tables

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Table 1-1 Revision History ........................... .. ... .. .. ... .... ... .. .. ... .... ... .. .. ... .. ..... .. ... .. .. ... .... ... .. .. ........ 7

Table 3-1 100-PIN Connector Pinouts ...................................................................................... 15

Table 4-1 Analog Audio Pinouts ................................... ............................................................ 17

Table 4-2 Digital CODEC Pinouts ............................................................................................ 18

Table 4-3 UART Interface Pinouts ........................................................................................ ... 18

Table 4-4 UART2 Interface Pinouts ……………..…………………………………………… 19

Table 4-5 UART3 Interface Pinouts ............... .......................................................................... 19

Table 4-6 General Purpose Interface Pinouts ………………………………………………… 20

Table 4-7 LCD Interface Signals ............................................. .................................................. 22

Table 5-1 Absolute Maximum Ratings ............................ ......................................................... 24

Table 5-2 External PCM CODEC Parameters .......................................................................... 26

Table 5-3 LCD Timing Parameters............................................................................................. 27

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1. Introduction

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1.1 Purpose

This manual provides hardware interface and programming information for the DTG2000-Dual

CDMA Wireless Data Module.

1.2 Organization

This manual will discuss the interface and operation of the module and is divided into the following

subsections:

 Section 2 – Introduces users to the DTG2000-Dual CDMA Wireless Data Module’s basic

features and general specifications.

 Section 3 – Lists each DTG2000-Dual pin and its function within the device. The pinout for the

module is listed in numeric sequence.

 Section 4 – Specifies the recommended operating conditions, DC voltage characteristics, I/O

timing, and power estimations for the module. Timing diagrams are also included.

 Section 5 – Details each subsystem or block within the module and shows how the subsystem

or block interfaces with external peripherals.

 Section 6 – Provides package dimensions for the module.

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1.3 Revision History

The revision history for this document is shown in Table 1-1.

Table 1-1 Revision History

Version Date Description

V1_X1 Dec. 2002 Initial Release V1_X2 Feb. 2003 1st Revision

2nd Revision

V1_X3 Mar. 2003

V1_X5 May. 2004

- 100 pin map

- RF connector

3rd Revision

- 100 pin map

- Metal case drawing

- Added Application schematic

1.4 References

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1. QUALCOMM Incorporated. MSM6050 Mobile Station Modem™: Component Supply Specification. 80-V2466-1, April 13, 2002.

2. QUALCOMM Incorporated. MSM6050™ Mobile Station Modem: Device Specification (Preliminary Information). 93-V3185-1, March 29, 2002.

3. QUALCOMM Incorporated. SURF6050 User Manual

. 80-V2551-40, March 29, 2002.

1.5 Acronym List

Term Definition

CDMA Code-Division Multiple Access

CODEC Coder-Decoder

GPIO General-purpose Input/Output JTAG Joint Test Action Gr oup (ANSI/ICEEE Std. 1149.1-1990)

LCD Liquid Crystal Display LDO Voltage Regulator LED Light Emitting Diode

PCB Printed Circuit Board

PCM Pulse Coded Modulation

PCS Personal Communications Service

RF Radio Frequency Rx Receive

TCXO Temperature-Co ntrolled Crystal Oscillator

Tx Transmit

UART Universal Asynchronous Receiver Transmitter

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2. Overview

2.1 Application Descriptions

The CDMA Wireless Data Module is a complex consumer co mmunications instrument that reli es heavily on both digital signal and embedded processor technologies. The Wireless Data Modules manufactured by AnyDATA.NET support Code-Division Multiple Access (CDMA). This operates in both the cellular and PCS spectrum band.

In a continuing effort to simplify the design and to reduce the size and production cost of the Wireless Data Module, AnyDATA.NET has su ccessful ly developed the DTG series . The DTG20 00-Dual is AnyDATA.NET’s latest compact Wireless Data Module operating in the Cellular and PCS spectrum band. The DTG2000-Dual contains not only a complete digital modulation and demodulation system for CDMA standards as specified in IS-95 A/B and IS-2000, but also GPSOne position location solution which offers wireless callers their location wherever and whenever they need it. GPSOne is QUALCOMM CDMA Technologies’ position location solution. It offers the availability of position location determination in hostile environments (such as indoors) where conventional GPS receivers do not work well. GPSOne uses a hybrid approach that utilizes signals from the GPS satellite constellation and from CDMA cell sites to determine location. Using the hybrid approach, GPSOne enhances location services availability, accelerates the location determination process, and provides improved accuracy. The hybrid mode approach for position location uses signals from CDMA cell stations and GPS satellites to compute the user’s location. This approach basically takes advantage of an accurate knowledge of GPS system timing on a CDMA m obile station. The knowledge of system timing allows the GPSOne solution to use both the CDMA signal measurements and GPS signal measurements collectively to compute the user’s location. It also allows for a central entity, named Position Determination Entity (PDE), to send estimated signal phases to the m obile. This knowledge reduces the time to search the satellite pseudo ranges on the mobile, thus improving the time taken to determine the user’s position.

The subsystem in the DTG2000-Dual includes a CDMA processor (MSM6050), an integrated CODEC with an ear piece and microphone amplifiers, and an RS-232 serial interface supporting forward link data communications at a rate of 153kbps.

The DTG2000-Dual provides an external interface that includes the standard RS-232, Digital Audio, External reset control, parallel LCD Display, Keypad, Ringer extension ports and R-UIM for China

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market.

The DTG2000-Dual has the capability to power down unused circuits in order to dynamically minimize power consumption.

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2.2 Technical Specifications

2.2.1 General Specifications

Parameters Descriptions

External Access Code-Division-Multiple-Access (CDMA) CDMA Prot ocol IS-95 A/B, IS-98A, IS-126, IS-637A, IS-707A, IS-2000 Data Rate 153.6Kbps max Transmit/Receive Frequency Interval 45MHz for Cellular and 80MHz for PCS Vocoder EVRC, 13kQCELP RF technology Zero Intermediate Frequency Number of Channel 832 for Cellular and 42 for PCS Operating Voltage DC +3.4V ~ +4.3V BATT_INT (Pin88 and 90)

DC +4.0V to +5.0V +VEXT_DC (Pin87 and 89)

Current Consumption 1. VCC applied to +VEXT_DC (Pin87 and Pin89)

Stand by mode: Idle (110mA), Sleep (less than 9mA) Busy mode: 900mA (Max)

2. VCC applied to BATT_INT (Pin88 and Pin90) Stand by mode: Idle (110mA), Sleep (less than 1mA) Busy mode: 900mA (Max)

See section 4.5.1 for detail

Operating Temperature -30ºC ~ +60ºC Frequency Stability ±300Hz for Cellular and ±150Hz for PCS Antenna GSC Connector, 50oh m Size 38 X 38 X 5.8mm with case Weight About 15g External Interface RS-232s, Digital/Analog Audios, LCD, Keyp ad, Ringer

External Reset Control, R-UIM, MP3, MIDI, GPIOs User Interface Software BREW support Additional Function GPSOne position location solution

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2.2.2 Receiver Specif ications

Parameters Descriptions

Frequency Range 869.04 ~ 893.97 MHz for Cellular and 1931.25 ~ 1988.75MHz for PCS Sensitivity Below –104 dBm Interference Rejection Single tone (-30dBm @900KHz): Below –101dBm

Two tone (-43 dBm @900KHz and 1700KHz): Below –101dBm

Two tone (-32 dBm @900KHz and 1700KHz): Below –90dBm

Two tone (-21 dBm @900KHz and 1700KHz): Below –79dBm Spurious Wave Suppression Below –80dBc Input Dynamic Range -25 dBm ~ -104dBm

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2.2.3 Transmitter Specifications

Parameters Descriptions

Frequency Range Nominal Max Power 0.32 W (24.7dBm ) Peak Power in Operation Mode 0.35W (25.5dBm) Minimum Controlled Out put Power Below –50dBm Max Power Spurious 900KHz: Below –42dBc/30KHz

2.2.4 gpsOne Receiver Specification s

Parameters Descriptions

Frequency Range C/A Code 1.023MHz Chip Rate Receiver Sensitivity -152dBm

2.2.5 Standards

824.04 ~ 848.97 MHz for Cellular and 1851.25 ~ 1908.75MHz for PCS

1.98MHz: Below –54dBc/30KHz

L1, 1575.42MHz

IS-95 A/B: Protocol Between MS & BTS IS-96A: Voice Signal Coding IS-98A: Base MS Function IS-126: Voice Loop-Back IS-637: Short Message Service IS-707: Data Service Built-in TCP/IP : AnyDATA proprietary software IS-657 : packet data

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2.3 Interface Diagram

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Figure 2-1 Interface Block Diagram

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3. PIN Description

3.1 I/O Description Parameters

Symbol Description

I O Output B Bi-directional N Voltage or Current Level IS Input with Schmitt Trigger

BS Bi-directional Schmitt Trigger PU Internal Pull-Up PD Internal Pull-Down

3.2 PIN Names and Pinouts

3.2.1 100-Pin Connector

CMOS Input

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PIN NAME TYPE DESCRIPTION

1 D15 B-K3 Data line 2 AGND AGND Analog Ground 3 D14 B-K3 Data line 4 AGND AGND Analog Ground 5 D12 B-K3 Data line 6 D13 B-K3 Data line 7 D10 B-K3 Data line 8 D11 B-K3 Data line 9 D08 B-K3 Data line

10 D09 B-K3 Data line

711 GND GND Signal ground

12 GND GND Signal ground 13 14 MSM_DP_RI/ (GPIO_INIT54) BS-PD Ring indicator ( UART1 ) 15 MSM_DP_RFR/ O Ready for Receive ( UART1 ) 16 MSM_DP_TXD O Transmit data ( UART1 ) 17 MSM_DP_DTR/ (GPIO_INIT50) BS-PU Data terminal ready ( UART 1 ) 18 MSM_DP_RXD IS-PD Receive data ( UART1 ) 19 MSM_DP_CTS/ IS-PD Clear to send ( UART1 ) 20 MSM_DP_RXD2(UIM_PWR_EN) BS_PD3 General purpose input output, Receive data ( UART2 ) 21 MSM_DP_TXD2 (UIM_DATA) BS_PD3 General purpose input output,Transmit data ( UART2 ) 22 MSM_DP_CTS2/ (UIM_RESET) BS_PD3 General purpose input output, Clear to send ( UART2 ) 23 MSM_DP_RFR2/ (UIM_CLK) BS_PD3 General purpose input Output, Ready for Receive(UART2) 24 GPIO_INT15 BS_PU3 General purpose input output

MSM_DP_DCD/ (GPIO_INIT44)

BS-PD Data carrier detect ( UART1 )

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PIN NAME TYPE DESCRIPTION

25 AUX_PCM_CLK BS_PD3 External CODEC PCM clock 26 AUX_PCM_DOUT BS_PU3 External CODEC PCM data output 27 AUX_PCM_SYNC BS_PD3 External CODEC PCM data strobe 28 AUX_PCM_DIN IS-PD External CODEC PCM data input 29 GPIO_INT49 BS_HK2 General purpose input output 30 POWER_ON

31 EX_RESET I External Reset (Low Enable) 32 GPIO_INT18 BS_PD3 General purpose input output 33 GPIO_INT45 BS_PD3 General purpose input output 34 GPIO_INT33 (IDLE LED) BS_P D3 General purpose input output, Idle LED Enable 35 GPIO_INT47 (BUSY LED BS_PU3 General purpose input output, Busy LED Enable 36 GND GND Signal ground 37 GND GND Signal ground 38 D00 B-K3 Data line 39 D01 B-K3 Data line 40 D02 B-K3 Data line 41 D03 B-K3 Data line 42 D04 B-K3 Data line 43 D05 B-K3 Data line 44 D06 B-K3 Data line 45 D07 B-K3 Data line 46 A02 B-K3 Address line 47 A01 B_K3 Address line 48 RESET_OUT/ O Reset Out 49 GPIO_INT37(LCS_CS/) BS_PU3 General purpose input output 50 GPIO_INT36(LCD_EN) BS_PU3 General purpose input output 51 OE/ O-3 Output Enable Signal 52 WE/ O-3 Write Enable Signal 53 KEYSENSE0/ (GPIO_INT62) IS_PU3 Key sense input 54 KEYSENSE1/ (GPIO_INT63) IS_PU3 Key sense input 55 KEYSENSE2/ (GPIO_INT64) IS_PU3 Key sense input 56 KEYSENSE3/ (GPIO_INT65) IS_PU3 Key sense input 57 KEYSENSE4/ (GPIO_INT66) IS_PU3 Key sense input 58 GPIO_INT61 ( KEYPAD00 ) BS_PD3 General purpose input output, Keypad input 59 GPIO_INT60 ( KEYPAD01 ) BS_PD3 General purpose input output, Keypad input 60 GPIO_INT59 ( KEYPAD02 ) BS_PD3 General purpose input output, Keypad input 61 GPIO_INT58 ( KEYPAD03 ) BS_PD3 General purpose input output, Keypad input 62 GPIO_INT57 ( KEYPAD04 ) BS_PD3 General purpose input output, Keypad input 63 GPIO_INT56 ( KEYPAD05 ) BS_PD3 General purpose input output, Keypad input 64 GPIO_INT48(ON_SW_SENSE) BS_PU3 General purpose input output 65 GPIO_INT09 BS_HK2 General purpose input output 66 GPIO_INT10 BS_HK2 General purpose input output 67 SMS LED O SMS LED Enable 68 GPIO_INT17 BS_PU3 General purpose input output 69 GPIO_INT04 BS_PD3 General purpose input output 70 GPIO_INT16 BS_PU3 General purpose input output 71 VIBRATOR_DRV O VIBRATOR_DRV output 72 PS_HOLD O PS_HOLD output, POWER LED Enable 73 AUXON OA Auxiliary output (-) 74 RINGER O Ringer Enable output

I

POWER ON used only when to use 3.6V 1cell battery External pulled up required

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PIN NAME TYPE DESCRIPTION

75 AUXOP OA Auxiliary output (+)

PIN NAME TYPE DESCRIPTION

76 GND GND Signal ground 77 GND GND Signal ground 78 GPIO_INT19(EAR_DET1) BS_PD3 General purpose input output, EAR Jack Detect 79 EAR2O OA Ear Jack speaker output 80 EAR1O_P OA External speaker (+) output 81 EAR1O_N OA External speaker (-) output 82 MIC1P IA External Mic (+) input 83 MIC2P IA Ear Jack Mic (+) input 84 GND GND Signal Ground 85 GND GND Signal ground 86 +VBATT IA Battery Gauge input 87 +VEXT_DC V External DC input 88 VATT_INT V Battery input 89 +VEXT_DC V External DC input 90 VATT_INT V Battery input 91 GPIO_INT11(RXD3) BS_PD3 General purpose input output ( UART3 ) 92 GPIO_INT12(TXD3) BS_PD3 General purpose input output ( UART3 ) 93 GPIO_INT13(CTS/3) BS_PD3 General purpose input output ( UART3 ) 94 GPIO_INT14(RFR/3) BS_PD3 General purpose input output ( UART3 ) 95 GPIO_INT02 BS_PU3 General purpose input output 96 GP_ADC_DET BS_PD3 General pu rpose ADC input 97 GPIO_INT34 BS_PU3 General purpose input output 98 GPIO_INT35 BS_PU3 General purpose input output 99 GND GND Signal ground

100 GND GND Signal ground

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3.3 100-PIN Connect Pinouts (Topview)

Table 3-1 100-PIN Connector Pinouts

1 D15 2 AGND 3 D14 4 AGND 5 D12 6 D13 7 D10 8 D11 9 D08 10 D09 11 GND 12 GND 13 MSM_DP_DCD/ ( GPIO_INT44 ) 14 MSM_DP_RI/ ( GPIO_INT54 ) 15 MSM_DP_RFR/ 16 MSM_DP_TXD 17 MSM_DP_DTR/ ( GPIO_INT50 ) 18 MSM_DP_RXD 19 MSM_DP_CTS/ 20 MSM_DP_RXD2 ( UIM_PWR_EN ) 21 MSM_DP_TXD2 ( UIM_DATA) 22 MSM_DP_CTS2/ ( UIM_RESET ) 23 MSM_DP_RFR2/ ( UIM_CLK ) 24 UART_EN 25 AUX_PCM_CLK 26 AUX_PCM_DOUT 27 AUX_PCM_SYNC 28 AUX_PCM_DIN 29 GPIO_INT49 30 POWER_ON 31 EX_RESET 32 GPIO_INT18 33 GPIO_INT45 34 IDLE LED 35 BUSY LED 36 GND 37 GND 38 D00 39 D01 40 D02 41 D03 42 D04 43 D05 44 D06 45 D07 46 A02 47 A01 48 RESET_OUT 49 LCD_CS/ ( GPIO_INT37 ) 50 LCD_EN ( GPIO_INT36 ) 51 OE/ 52 WE/ 53 KEYSENSE0/ ( GPIO_INT62 ) 54 KEYSENSE1/ ( GPIO_INT63 ) 55 KEYSENSE2/ ( GPIO_INT64 ) 56 KEYSENSE3/ ( GPIO_INT65 ) 57 KEYSENSE4/ ( GPIO_INT66 ) 58 KEYPAD00 ( GPIO_INT61 ) 59 KEYPAD01 ( GPIO_INT60 ) 60 KEYPAD02 ( GPIO_INT59 ) 61 KEYPAD03 ( GPIO_INT58 ) 62 KEYPAD04 ( GPIO_INT57 ) 63 KEYPAD05 ( GPIO_INT56 ) 64 GPIO_INT48 (ON_SW_SENSE/ ) 65 GPIO_INT09 66 GPIO_INT10 67 SMS LED 68 GPIO_INT17 69 GPIO_INT04 70 GPIO_INT16 71 VIBRATOR_DRV 72 PS_HOLD, Power On LED 73 AUXON 74 RINGER 75 AUXOP 76 GND 77 GND 78 GPIO_INT19 (EAR_DET1 ) 79 EAR2O 80 EAR1O_P

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81 EAR1O_N 82 MIC1P 83 MIC2P 84 GND 85 GND 86 +VBATT 87 +VEXT_DC 88 VATT_INT 89 +VEXT_DC 90 VATT_INT 91 GPIO_INT11 ( MSM_DP_RXD3 ) * 92 GPIO_INT12 ( MSM_DP_TXD3 ) * 93 GPIO_INT13 ( MSM_DP_CTS3/ ) 94 GPIO_INT14 ( MSM_DP_RFR3 ) 95 GPIO_INT02 96 GP_ADC_DET 97 GPIO_INT34 ( GP_CS0/ ) 98 GPIO_INT35 ( GP_CS1/ ) 99 GND 100 GND

Notes: * Pin 91 and Pin 92 can be used as the third UART for debugging. We strongly recommend that the user have a 3-pin connector or 3 test points on their board, so that one can easily monitor and diagnose their module.

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4. Interface Descriptions

4.1 Overview

This chapter covers information required to convert the DTG2000-Dual into a subscriber unit application. In addition, some of the internal blocks of the device are described. Understanding these internal blocks is necessary for one to completely grasp the functions of the various interfaces.

This chapter discusses the interface to the major blocks of the DTGD2000-Dual as shown in the following figure. These blocks include:

 Power Up

 CODEC Interface

 UART Interface

 General Purpose Interface

 External Hardware Reset

 User Interface

4.2 Powering Up the Module

There are two ways to power up the module and customers may choose one of the two ways to power

up DTG2000.

4.2.1 Supply input to +VEXT_DC (Pin 87 and Pin 89)

If the customers don’t need to save current in sleep mode, which is around 15mA, supplying the voltage input to +VEXT_DC (Pin 87 and 89) is recommended. When the input voltag e from +4V to +5.0V is supplied, DTG2000 wi ll automatically start it s power-on process and finish it within 2 seconds. In this case, using a regulator with an enable pin is highly recommended so that the customer can reset the module using the enable pin if software lock-up symptoms are found.

If a customer needs to use charging circuit built in the module, apply

and 89) and connect the 3.6V 1cell lithium-ion battery to BATT_INT (Pin86 and 88).

+4.5V DC

to +VEXT_DC (Pin87

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4.2.2 Supply Input to BATT_INT (Pin 86 and Pin 88)

If the customers need to get their device to operate in a very low sleep current mode, supplying the voltage input to BATT_INT (Pin 86 and 88) is recommended.

When the input voltage from +3.4V to +4.3V is supplied to BATT_INT(Pin86 and 88), DTG2000 won’t automatically start its power-on process without low assertion of POWER_ON (Pin 67). To power the module on, first apply VCC to BATT_INT and have POWER_ON (Pin 67) stay low for more than 500 msec and less than 2 sec.

POWER_ON (Pin 67) needs to be externally pulled up to 3V to 3.6V thru 100kohm resistor.

To power off the module, have POWER_ON(Pin 67) stay low for more than 2sec and less than 4sec and then the voltage in BATT_INT may or may not be removed.

If Vcc is supplied thru a regulator to BATT_INT(Pin86 and 88), using a regulator with an enable pin is highly recommended so that the customer can shut off the power to the module using the enable pin if software lock-up symptoms are found. If the modem is locked up, low assertion of POWER_ON(Pin 67) won’t power on or off the module. If Vcc is supplied directly from a battery, having a FET between the output of a battery and input of DTG2000 is recommended that the customer c an shut off the Vcc to DTG2000 using the FE T.

4.3 CODEC Interface

With the integrated microphone and earpiece amplifier including CODEC, the DTG2000-D ual

module interfaces directly, either differential or single-ended, to the microphone and earpiece. The audio features in the module are

- T wo microphone inputs

- T wo earphone outputs and one auxiliary audio output.

4.3.1 Internal CODEC Interf ace

The module contains analog audio interface circuitry. The contained audio interface supports all of the

required conversation and amplification stages for the audio front end.

The audio interface includes the amplification stages for both the microphone and earphone. The EAR10 and MIC1P are typically used for the handset microphone, The EAR_JACK+ and MIC2P are typically used for the ear-jack.

T able 4-1 Analog Audio Pinouts

NAME

MIC2P

EAR_DET1 EAR/MIC Set Detect Logic Input (Pin No. 78) **

EAR_JACK+ Earphone Output Analog Output (Pin No. 79 for Ear-Mic Jack)

GND_A Audio Ground Audio Ground (Pin No. 2, 4)

DESCRIPTION CHARACTERISTIC

Mic Jack Input Analog Input (Pin No. 83, for Ear-Mic Jack) *

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NAME

EAR10_N Speaker Output - Analog Output (Pin No. 81)

EAR10_P Speaker Output + Analog Output (Pin No. 80)

MIC1P Mic Input

AUXON Auxiliary Output - Analog Output (Pin No. 73)

AUXOP Auxiliary Output + Analog Output (Pin No. 75)

DESCRIPTION CHARACTERISTIC

Analog Input (Pin No. 82), Mic bias is supplied from this pin.

Note: * MIC2, along with being a microphone input, checks to see if the user has pressed the headset key, which allows the user to connect to or disconnect from a call. This pin is internally pulled high and is therefore normally in the high state. To activate this input and connect to or disconnect from a call, the user must set the MIC2 pin to a low state for 100ms to 200ms. ** EAR_DET1 checks to see if a heads et has been connected to the ear-jack. W hen there is no headset connected to the ear-jack, the audio path thru an ear jack is disconnected. When a headset is connected to the ear-jack, audio path is opened. To simulate a headset connected to the ear-jack, the user must apply a low signal to the EAR_DET1 pin for as long as the user wants the audio path to be kept open.

4.3.2 Extended CODEC Interface

The PCM CODEC interface is used for the car-kit audio system. This interface is optional. External CODEC interface signals are listed below:

Table 4-2 Digital CODEC Pinouts

NAME DESCRIPTION PINOUTS

AUX_PCM_CLK

AUX_PCM_DIN PCM Data Input Pin No. 28 AUX_PCM_DOUT PCM Data Output Pin No. 26 AUX_PCM_SYNC PCM Sync. Pin No. 27

PCM Clock Pin No. 25

4.4 UART Interface

The Universal Asynchronous Receiver Transmitter (UART) communicates with serial data that conforms to the RS-232 Interface protocol. The module has 3 UARTs which provides 3.0V CMOS level outputs and 3.0V CMOS input levels. All the control signals of the RS-232 are active low, however the data signals, RXD and TXD, are active high.

UART1 which has 512 bytes for Tx and Rx FIFO, supports high speed data communication up to

230.4kbps, program download and diagnostic monitor function.

UART2 and 3 which 64 bytes for T/Rx FIFO, support low speed data communication up to 115.2kbps, program download and diagnostic monitor function.

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The UART features hardware handshaking, programmable data sizes, programmable stop bits, and

odd, even, no parity.

4.4.1 UART1 interface

Table 4-3 UART1 Interface Pinouts

NAME

DP_DCD/ DP_RI/ DP_RFR/ DP_TXD DP_DTR/ DP_RXD DP_CTS/ Clear to Send 19 Clear to send to the host GND Signal Ground 11, 12 Signal ground

4.4.2 UART2 interface

The UART2 supports R- U IM interface.

DESCRIPTION PIN NUNBER CHARACTERISTIC

Data Carrier Detect 13 Network connected from the module Ring Indicator 14 Output to host indicating coming call Ready for Receive 15 Ready for receive from host Transmit Data 16 Output data from the module

Data Terminal Ready 17 Host ready signal

Receive Data 18 Input data to the module

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Table 4-4 UART2 Interface Pinouts

NAME

DP_RXD2 DP_TXD2 Transmit Data 21 Output data from the module DP_CTS2/ Clear to Send 22 Clear to send to the host DP_RFR2/ Ready for Receive 23 Ready for receive from host

GND Signal Ground 11, 12 Signal ground

DESCRIPTION PIN NUMBER CHARACTERISTIC

Receive Data 20 Input data to the module

If a customer wants to use R-UIM card, UART2 can’t be used as UART.

4.4.3 UART3 interface

The UART3 is used to monitor and diagnose the status of the DTG2000-Dual. It is strongly recommended for the user to have the following UART3 pins connected to an extra connector or to test points, in order to easily troubleshoot any problems with the module.

Table 4-5 UART3 Interface Pinouts

NAME

DP_RXD3 DP_TXD3 Transmit Data 30 Output data from the module DP_CTS3/ Clear to Send 34 Clear to send to the host DP_RFR3/ Ready for Receive 32 Ready for receive from host

GND Signal Ground 11, 12 Signal ground

DESCRIPTION PIN NUMBER CHARACTERISTIC

Receive Data 29 Input data to the module

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4.5 General Purpose Interface

The general purpose interface consists of 11 user-definable bi-directional pins.

Each GPIO pin can be configured as an input interrupt source. In addition, some GPIO pins can be used as output control pins from the module. The user can define these pins properly as follows.

Table 4-6 General Purpose Interface Pinouts

NAME

GPIO_INT15 24 Configured as a pull-up, Bi-directional

GPIO_INT45 33 Configured as a pull-up, Bi-directional

GPIO_INT17 68 Configured as a pull-up, Bi-directional

GPIO_INT04 69 Configured as a pull-down, Bi-directional

GPIO_INT16 70 Configured as a pull-down, Bi-directional

GPIO_INT09 65 Configured as a pull-down, Bi-directional

GPIO_INT10 66 Configured as a pull-up, Bi-directional

GPIO_INT42 93 Configured as a pull-up, Bi-directional

GPIO_INT49 29 Configured as a pull-down, Bi-directional

GPIO_INT02 95 Configured as a pull-down, Bi-directional

GPIO_INT18 32 Configured as a pull-down, Bi-directional

PIN NUMBER CHARACTERISTIC

4.6 External Hardware Reset and Power Down Registration

4.6.1 External Hardware Reset (P in #31)

There are two types of resets that the user can employ to restart the module. The first type will reset the MSM and the memory and is performed when the user gives the AT command, AT+RESET, to the MSM. Another way to reset the module is by using the external hardware reset. This type of reset will reset the hardware as well as the MSM and the memory. The flash memory will be the only information that is kept. To perform an external hardware reset, make sure the module has powered on and is not in the initialization stage, and then

pull low

the external hardware reset pin (Pin #31) for 200ms to 500ms.

Keep the external hardware reset pin high or floating when the module is initializing and booting up as well as during normal operation. This pin is internally pulled up to +3. 0 V .

4.6.2 Power Down Registration Before DTG-2000 is powered off, it has to send power down registration message to the CDMA base station to help the base station to maximize its capacity. Depending on air interface environment, it may take 12 seconds at maximum according to CDMA technical standard.

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4.6.2.1 Power Down Registration Protocol for CDMA device

4.6.2.1.1 Using AT command (When Vcc is applied to +VEXT_DC)

Before powering off DTG-2000, send “AT+POWEROFF” to DTG-2000.

After waiting for 12 seconds, the host device may shut down the power to DTG-2000.

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4.6.2.1.2 Using POWER_ON (Pin 67) (Only when Vcc is applied to BATT_INT)

HIGH

LOW

Booting stage. In normal operation

Powering the module off. 2 sec

T1

Status of POWER_ON(Pin 67)

T1+12sec. Shut off the Vcc to DTG-2000

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4.7 User Interface

4.7.1 Keypad

The keypad interface consists of a 5 X 6 matrix pattern. The 5-KEYSENSE/[4:0] pins are used to connect a matrix keypad to the module. The KE YSENSE/ pins are active low.

The 6-KEYPAD pins are necessary to construct the other side of the matrix. These KEYPAD pins must be active high in order for the keypad matrix to work properly. The general keypad matrix is shown below:

DTMF

When key is pressed, CDMA Module generates standard DTMF tone and sends it to the local audio path (speaker). If t he Mobi le st ation is in traffi c state, t he CDMA Module sends DTMF Message to the Base Station and to the local audio path (speaker) at the same time. The network will deliver the analog DTMF tone or DTMF Message to its final destination.

Figure 4-1 Keypad Matrix

*

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4.7.2 LCD

The module supports the 16 bits parallel LCD interface as well as the 8 bits. The LCD interface is

composed of 23-signals. Direct access to the LCD driver is not applicable.

Table 4-7 LCD Interface Signals

NAME

LWR/ RD/ A01 LCD_CS/ RES_OUT/ D00 ~ D015 VDD GND

TYPE CHARACTERISTIC

BS_PU LCD RW pin out from the m od ule

BS LCD E pin out from the module

B LCD RS pin out from the module O LCD Chip Select pin out from the module O LCD Reset from the module O LCD Data Lines from the modul e

LCD Power Supply LCD Signal Ground

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4.7.3 Ringer (Pin74)

The Ringer pin provides the output to drive the sound transducer on the host. It alerts the user of a

voice call event and outputs key tones if the keypad is connected.

The DTG2000-Dual module includes Ringer Driver and drives Buzzer directly .

Table 4-8 Ringer/Buzzer Driver Output Spe c.

PARAMETER

Drive Frequency Load Current Load Resistance

4.7.4 LED Interface

PIN NUMBER

34

35

67

72

Above pins can not drive LED directly. Must use driver I Cs to drive LEDs

TEST CONDITION TYPICAL VALUE

Max 8kHz

R_load=10 ohm Min 300mA

Typ 10 oh m

Table 4-9 LED interface

USE REMARK

Idle LED

Busy LED

SMS LED

Power On LED

High Enable, High indicates

“The device is in CDMA service area”

High Enable, High indicates

“The device is in CDMA Traffic state”

High Enable High indicates

“The device has received SMS message

High Enable High indicates

“The device is turned on”

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5. Electrical Specifications

5.1 DC Electrical Specifications

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5.1.1 Absolute Maximum Ratings

Operating the module und er conditions that exceed those list ed in the Absolute Maximum Ratings

table may result in damage to the module.

Absolute Maximum Ratings should be considered as limiting values. The module may not function properly and should not be operated if any one of the parameters is not within its specified operating range.

Table 5-1 Absolute M aximum Ratin gs

PARAMETER MIN MAX

Storage Temperature Voltage On Any Input or Output Pin

Supply Voltage

Initializing Current Drop

+VEXT_DC BATT_INT -1.0 +4.4 V

-50 +85 ºC

-0.8 +3.5 V

-1.0 +5.0 V

250 mA

No damages after 60-Inch drop over concrete floor

UNITS

5.1.2 Recommended Operating Condit ions

PARAMETER MIN TYP MAX

Supply Voltage

+VEXT_DC +4.0 BATT_INT +3.4

+4.5 +4.0

+5.0 V +4.3 V

UNITS

Operating T emperat ure -30 +60 ºC Operating Humidity

95% (50°C) Relative Humidity

5.1.3 Power Consumption

CONVERSATION

(Busy)

900mA (MAX)

Idle Sleep

110mA

STANDBY

+VEXT_DC : 9mA

BATT_INT : 1mA

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5.1.4 Serial Interface Electrical Spec if ication s

PARAMETER MIN

Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage

+2.0 +3 +3.3 V

-0.5 0 +0.8 V

+2.4 +2.8 +3.0 V

0 +0.4 V

TYP

(NO LOAD)

MAX

UNITS

5.2 Timing characteristics

5.2.1 External CODEC Timing

t

clk

PCM_CLK

t

clkl

t

su(sync)

t

clkh

t

h(sync)

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PCM_SYNC

PCM_DIN

PCM_CLK

PCM_SYNC

PCM_DOUT

t

clkl

t

h(din)

su(din)

MSB

Figure 5-1 External PCM CODEC to Module timing

t

clk

t

clkh

t

su(sync)

t

h(sync)

t

pdout

t

pdout

MSB LSB

Figure 5-2 Module to External PCM CODEC timing

LSB

t

zdout

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Table 5-2 External PCM CODEC Parameters

PARAMETER DESCRIPTION MIN TYP. MAX t

clk

t

clkl

t

clkh

t

su(sync)

t

h(sync)

t

su(din)

t

h(din)

t

pdout

5.2.2 LCD Timing

MCLK (modem)

A[21:0]

PCM-CLK cycle time 400 500 ns PCM-CLK low time 200 250 ns PCM-CLK high time 200 250 ns PCM_SYNC setup time to PCM_CLK falling 150 ns PCM_SYNC hold time after PCM_CLK falling 350 ns PCM_DIN setup time to PCM_CLK falling 50 ns PCM_DIN hold time after PCM_CLK falling 10 ns Delay from PCM_CLK falling to PCM_DOUT 50 ns

T

UNIT

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LWR/

Write Data[7:0]

LCD_CS/

RD/

LCD_E

Read Data[7:0]

t

LCDES

t

WRS

LCD Data Write

t

LCDEHI

Figure 5-3 LCD Timing

t

WRH

t

LCDEH

t

RDS

LCD Data Read

t

RDH

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Table 5-3 LCD Timing Parameters

PARAMETER DESCRIPTION MIN MAX

t

LCD_CS/ active to LCD_E active

LCDES

t

LCDEHI

t

LCDEH

t

LCDEHR

t

RDS

t

RDH

t

WRS

t

WRH

 k, I, n is integer lower than 16, MCLK is internal Clock of module

Pulse width if LCD_E active ns LCD_E inactive to LCD_CS/ inactive (write) ns LCD_E inactive to LCD_CS/ inactive (Read) Read data setup ns Read data hold ns Write data setup to L C D_E inactive ns Write data hold from LCD_E inactive ns

UNIT

ns

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6. Mechanical Dimensions

6.1 DTG2000-Dual Outline

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At least two of these 4 solder points in red circles MUST be soldered to PCB GND in the host device

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6.2 100-Pin Connector Mechanical Dimension

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Figure 6-1 100pins Connector (Units: mm)

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Counter-Part (the 100-pins socket connector (not on the DTG2000-Dual)):

Part Name: Socket pin connector (0.5mm pitch, straight, dual row) Part Number: AXK5F 00545J Manufacture : NAIS

Note: For more information on the 100-pins socket connector, Please visit http://www.nais-e.com/ CONNECTORS P5 SERIES P5KF” .

, click connector, and “NARROW PITCH(0.5mm)

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6.3 RF Connector

Our part number : MM9329-2700. Counter part number : MXTK92( )( )( ) Please, visit http://www.murata.com

and search for MXTK92 in product search engine

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7. Application Schematic

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AnyDATA DTG2000 Users Manual

Specifications and Main Features

Frequently Asked Questions

User Manual