ANPEC APW6020 Service Manual

APW6020

Advanced Dual PWM and Dual Linear Power Controllers

Features General Description

•

4 Regulated Voltages are provided

− Microprocessor Core (1.3V to 3.5V)

− AGP Bus (1.5V or 3.3V)

− Memory (1.8V) , GTL Bus (1.5V)

• Simple Single-Loop Control Designs

Voltage-Mode PWM Control

• Fast PWM Converter Transient Response

High-Bandwidth Error Amplifiers

− Full 0% to 100% Duty Ratios

• Excellent Output Voltage Regulation

− Core PWM Output : ± 1% Over Temperature

− Other Outputs : ± 3% Over Temperature

• TTL-Compatible 5- Bit DAC Microprocessor

Core Output Voltage Selection

− Wide Range - 1.3V

to 3.5 V

DC

DC

• Power-Good Output Voltage Monitor

• Over-Voltage and Over-Current Fault Monitors

• Small Converter Size

− Constant Frequency Operation

− 200kHz Free-Running Oscillator ; Program-

mable From 50kHz to Over 800kHz

− Small External Component Count

The APW6020 provides the power control and pro­tection for four output voltages in high-performance ,
graphics intensive microprocessor and computer
applications. The IC integrates two voltage-mode
PWM controllers and two linear controllers , as well
as the monitoring and protection functions into a single
package. One PWM controller regulates the micro­processor core voltage with a synchronous-rectified
buck converter. The second PWM controller sup­plies the computer’s AGP 1.5V or 3.3V bus power
with a standard Buck converter. The linear control­lers requlate the power for the 1.5V GTL bus , and
the 1.8V power for the North/South Bridge core volt­age and/or cache memory circuits. The APW6020
includes an Intel-compatible , TTL 5-input digital-to­analog converter (DAC) that adjusts the core PWM
output voltage from 1.3 VDC to 2.05 VDC in 0.05V steps
and from 2.1 VDC to 3.5 VDC in 0.1V increments. The
precision reference and voltage-mode control provide

±1% static regulation. The second PWM controller’s

output is user-selectable , through a TTL-compatible
signal applied at the SELECT pin , for levels of 1.5V
or 3.3V with ±3% accuracy. The two linear regula­tors provide fixed output voltages of 1.5V± 3% (V
) and 1.8V±3% (V
The APW6020 monitors all the output voltages. A
single Power Good signal is issued when the core is
within ±10% of the DAC setting and all other outputs
are above their under-voltage levels. Additional built­in over-voltage protection for the core output uses
the lower MOSFET to prevent output voltages above
115% of the DAC setting. The PWM controller’s over­current function monitors the output current by using
the voltage drop across the upper MOSFET’s r

OUT4

).

OUT3

DS(ON)

.

Applications

• Motherboard Power Regulation for Computers

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.

Copyright  ANPEC Electronics Corp.
Rev. A.2 - May, 2001

www.anpec.com.tw1

APW6020

Pin Description

UGATE2
PHASE2

PGOOD

OCSET2

SELECT

FAULT/ RT

Ordering Information

APW6020

Handling Code
Temp. Range
Package Code

VID4
VID3
VID2
VID1
VID0

VSEN2

SS

VSEN4

1
2
3
4
5
6
7
8
9
10
11

12
13
14

VCC

28

UGATE1

27

PHASE1

26

LGATE1

25

PGND

24

OCSET1

23

VSEN1

22

FB1

21

COMP1

20

VSEN3

19

DRIVE3

18

GND

17

VAUX

16
15

DRIVE4

Package Code
K : SOP - 28
Temp. Range
C : 0 to 70 C

°

Handling Code
TU : Tube TR : Tape & Reel

Block Diagram

VCC

1.5V

3.3V

or

DRIVE2

GATE

CONTROL

0.75

×

­+

+

-

PWM2

+

-

DRIVE3

DRIVE4

VSEN4

UGATE2

PHASE2

VSEN2

SELECT

VCC

VSEN3

INHIBIT

­+

ERROR

AMP2

­+

0.75

×

1.26V

PWM

COMP2

OSCILLATOR

FAULT/ RT

­+

+

-

+

-

INHIBIT

FAULT

OCSET2

LINEAR
UNDER-

VOLTAGE

A

200

µ

SOFT START &

FAULT LOGIC

VCC

200µA

+

-

+

-

PWM

COMP1

VID0

VID1VID2 VID3 VID4

OCSET1

PWM1

TTL D/A

CONVERTER

(DAC)

Reset (POR)

GATE

CONTROL

VCC

Power-on

DRIVER1

SYNCH

DRIVE

VAUX

PGOOD

VCC

UGATE1

PHASE1

VCC

LGATE1

PGND
GND

VSEN1

1.10

28

4.5V

×

+

-

0.90

×

+

-

1.15

×

+

-

OV

OC1

+

ERROR

-

AMP1

DACOUT

A

µ

COMP1SS

FB1

LUV

Copyright  ANPEC Electronics Corp.
Rev. A.2 - May, 2001

www.anpec.com.tw2

APW6020

Absolute Maximum Ratings

Symbol Parameter Rating Unit

V

CC

VI , V

O

T

A

T

J

T

STG

T

S

Thermal Characteristics

Symbol Parameter Va lue Unit

R

JA

θ

Supply Voltage 15 V
Input , Output or I/O Voltage GND -0.3 V to V

CC

Operating Ambient Temperature Range 0 to 70
Junction Temperature Range 0 to 125
Storage Temperature Range -65 to +150
Soldering Temperature 300 ,10 seconds

Thermal Resistance in Free Air

SOIC
SOIC (with 3in

2

of Copper)

75
65

V

C

°

C

°

C

°

C

°

C/W

°

Electrical Characteristics

(Recommended operating conditions , Unless otherwise noted) Refer to Block and Simplified Power System
Diagrams , and Typical Application Schematic

Symbol Parameter Test Conditions

VCC Supply Current

I

Nominal Supply Current UGA TE1, LGATE1,

CC

UGATE2, DRIVE3, and
DRIVE4 open

Power-on Reset

Rising VCC Threshold Vocset=4.5V 10.4 V
Falling VCC Threshold Vocset=4.5V 8.2 V
Rising VAUX Threshold Vocset=4.5V 2.5 V
VAUX Threshold Hysteresis Vocset=4.5V 0.5 V
Rising V

Threshold 1.26 V

OCSET1

Oscillator

F

V

∆

Free Running Frequency RT= Open 185 200 215 kHz

OCS

Ramp Amplitude RT= Open 1.9 V

OSC

DAC and Standard Buck Regulator Reference

DAC(VID0-VID4) Input Low
Voltage

APW6020

Min. Typ. Max.

9mA

0.8 V

Unit

P-P

Copyright  ANPEC Electronics Corp.
Rev. A.2 - May, 2001

www.anpec.com.tw3

APW6020

Electrical Characteristics Cont.

Symbol Parameter Test Conditions

APW6020

Min. T yp. Max.

DAC and Standard Buck Regulator Reference

DAC(VID0-VID4) Input High Voltage 2.0 V

DACOUT Voltage accuracy -1.0 +1.0 %
V
V

PWM2 Reference Voltage SELECT<0.8V 1.5 V

REG2

PWM2 Reference Voltage SELECT>2.0V 3.3 V

REG2

PWM2 Reference Voltage Tolerance 3 %

Linear Regulators (V

OUT3

and V

OUT4

)

Regulation (All Linears) 3 %

VREG3VSEN3 Regulation Voltage 1.5 V
VREG4VSEN4 Regulation Voltage 1.8 V

VSENUVUnder-Voltage Level (VSEN/ VREG) VSEN Rising 75 %

Under-Voltage Hysteresis (VSEN/ VREG) VSEN Falling 7 %

Output Drive Current (All Liners) V

=4.0V 20 40 mA

DRIVE

Synchronous PWM Controller Error Amplifier

DC Gain 88 dB

GBWP Gain-Bandwidth Product 15 MHz

SR Slew Rate COMP1=10pF 6

PWM Controllers Gate Drivers

I

UGATE

R

UGATE

I

LGATE

R

LGATE

UGATE1,2 Source VCC=12V, V

UGATE1,2 Sink V

UGATE1,2

=1V 3.5
LGATE1 Source VCC=12V, V
LGATE1 Sink V

= 1V 3

LGATE1

UGATE 1,2

LGATE 1

=6V 1 A

=1V 1 A

Protection

VSEN1 Over-Voltage (VSEN1/DACOUT) VSEN1 Rising 115 120 %

I

I

OCSET

FAULT Souring Current V

OVP

OCSET1,2 Current Source V

I

Soft Sta r t Cur rent 28

SS

=2.0V 8.5 mA

FAULT/RT

= 4.5V

OCSET

DC

170 200 230

Power Good

V

PGOOD

VSEN1 Upper Threshold
(VSEN1/DACOUT)

VSEN1 Under Voltage (V SE N1/DACO UT)
VSEN1 Hysteresis

(VSEN1 DACOUT)
PGOOD Voltage Low I

VSEN1 Rising
VSEN1 Rising

108 110 %

92 94 %

Upper /Lower Threshold 2 %

= -4mA 0.8 V

PGOOD

Unit

V/µs

Ω

Ω

A

µ

A

µ

Copyright  ANPEC Electronics Corp.
Rev. A.2 - May, 2001

www.anpec.com.tw4