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UG-370
Evaluation Board for the ADE7816 Six Current Channels, One Voltage Channel
Energy Metering IC
FEATURES
Evaluation board to implement a fully functional 6-channel
energy meter
Accompanying PC-based LabVIEW software
Easy connection of external transducers via screw terminals
Optically isolated metering components
USB-based PC connection
External voltage reference option available for on-chip
reference evaluation
ADE7816 INTERFACE AND EVALUATION BOARD
GENERAL DESCRIPTION
The ADE7816 evaluation kit includes an evaluation board that
allows the performance of the ADE7816 6-channel energy
measurement IC to be evaluated. The ADE7816 evaluation kit
includes evaluation software, written in LabVIEW®, that provides
access to the registers of the ADE7816 using a PC interface. This
document provides information to assist the user in evaluating
the ADE7816.
Complete specifications for the ADE7816 are available in the
ADE7816 data sheet available from Analog Devices, Inc., and
should be consulted in conjunction with this user guide when
using the evaluation board.
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
The ADE7816 evaluation kit includes an evaluation board that
is used to evaluate the silicon. The board includes the ADE7816
energy measurement IC, associated filtering, and isolation to
allow high voltage inputs to be applied. It also includes an NXP
Semiconductors LPC2368FBD100 microcontroller that handles
all communication from the PC to the ADE7816. Connect P14
of the ADE7816 evaluation board to the USB port of the PC,
using the cable provided in the evaluation board kit.
A schematic of the ADE7816 evaluation board is shown in
Figure 20, Figure 21, and Figure 22
POWERING THE ADE7816 EVALUATION BOARD
An external 3.3 V dc supply is required to power up the ADE7816
evaluation board. P9 provides the 3.3 V supply. This provides
power for the ADE7816 and the nonisolated side of the circuit,
including the ADE7816 IC. Power for the isolated side of the
circuit, which includes the microcontroller, is provided, by
default, by the USB connection. If an external power source
is preferred, apply this power source on P12. When using an
external power supply, Jumper JP24 must be changed to the
1, 2 position (see Tabl e 1).
TYPICAL INPUT CONFIGURATIONS
Voltage Channel
The voltage channel input is applied to P6. The ADE7816
evaluation board is designed to interface directly with a line
voltage source. A resistor divider is therefore included to step
down the input voltage. Figure 2 shows the default configuration
of the voltage channel input.
R28
VP
VN
1MΩ
R25
1kΩ
JP9A
JP7N
R31
1kΩ
123
JP8C
1
2
123
P6
JP9C
R34
1kΩ
VP
VN
Figure 2. Typical Voltage Channel Configuration
The maximum signal level that can be applied to the VP pin of
the ADE7816 is 0.5 V peak with respect to VN. Any input level
can be accommodated by modifying the resistor divider network,
R28 and R34.
C26
22nF
VN
C25
22nF
ADE7816
VP
VN
10489-002
Current Channels
The ADE7816 includes six, single-ended current channels that can
be interfaced with either a current transformer (CT) or Rogowski
coil. Apply the sensor output for Current Channel A to P1. Similar
to the voltage channel, all current inputs have a maximum input of
0.5 V peak. Figure 3 shows a typical configuration for Current
Channel A when a CT is being used.
JP3
R9
100Ω
BURDEN
RESISTOR
R1
IAP
IAN
JP1A
P1
Figure 3. Typical Current Channel A Configuration with a CT
22nF
C9
R94
1kΩ
C17
22nF
JP5A
R17
1kΩ
22nF
C17
IAN
IN
IAP
1kΩ
IAP
IAN
ADE7816
If a Rogowski coil is used, no burden resistor is required. A second
stage antialiasing filter is recommended and is enabled through
JP3A. Because the differential nature of the Rogowski coil output
counterbalances a single-pole filter, a second stage is required to
achieve a suitable level of attenuation at the Nyquist frequency.
JP3
R9
100Ω
DO NOT
INSTALL
R1
IAP
IAN
JP1A
P1
Figure 4. Typical Current Channel A Configuration with a Rogowski Coil
22nF
C9
R94
1kΩ
C17
22nF
JP5A
R17
1kΩ
22nF
C17
IAN
IN
IAP
1kΩ
IAP
IAN
ADE7816
Current Channel B through Current Channel F are configured
in a similar manner. Note, however, that Current Channel D,
Current Channel E, and Current Channel F share a common
neutral line and, therefore, only a single antialiasing filter is
present on the neutral line for all three channels.
JUMPER CONFIGURATION
Tabl e 1 describes the jumpers included on the ADE7816 evaluation
board and the required settings for different configurations.
Before connecting any high voltage signal, review the jumper
configuration and verify that it is correct for its specific setup.
10489-003
10489-004
Rev. 0 | Page 3 of 16
UG-370 Evaluation Board User Guide
Table 1. Jumper Configurations
Jumper Default Option Description
JP1 Closed Pin 2 (PULL_HIGH) is controlled externally by the microcontroller.
X Open Pin 2 (PULL_HIGH) is connected to VDD via the pull-up resistor, R86.
JP1A Closed
X Open
JP1B Closed
X Open
JP1C Closed
X Open
JP1N Closed
X Open
JP2 Closed Pin 3 (PULL_LOW) is controlled externally by the microcontroller.
X Open Pin 3 (PULL_LOW) is connected to GND via the pull-down resistor, R87.
JP3 Closed
X Open
JP3A X Closed
Open
JP3B X Closed
Open
JP3C X Closed
Open
JP3N X Closed
Open
JP4 Closed
X Open
JP5 X Closed
Open
JP5A Closed This disables the antialiasing filter comprised of R17 and C17 in the IAP signal path.
X Open This enables the antialiasing filter comprised of R17 and C17 in the IAP signal path.
JP5B Closed This disables the antialiasing filter comprised of R19 and C19 in the IBP signal path.
X Open This enables the antialiasing filter comprised of R19 and C19 in the IBP signal path.
JP5C Closed This disables the antialiasing filter comprised of R21 and C21 in the ICP signal path.
X Open This enables the antialiasing filter comprised of R21 and C21 in the ICP signal path.
This connects Pin 1 of the Channel IA pin connector (P1) to AGND. Use this configuration in conjunction
with JP3A and JP5A closed to short the IAP pin of the ADE7816 to AGND.
Pin 1 of the Channel IA pin connector (P1) is left floating. Use this configuration in normal operation to
drive the IAP pin with an analog signal.
This connects Pin 1 of the Channel IB pin connector (P2) to AGND. Use this configuration in conjunction
with JP3B and JP5B closed to short the IBP pin of the ADE7816 to AGND.
Pin 1 of the Channel IB pin connector (P2) is left floating. Use this configuration in normal operation to
drive the IBP pin with an analog signal.
This connects Pin 1 of the Channel IC pin connector (P3) to AGND. Use this configuration in conjunction
with JP3C and JP5C closed to short the ICP pin of the ADE7816 to AGND.
Pin 1 of the Channel IC pin connector (P3) is left floating. Use this configuration in normal operation to
drive the ICP pin with an analog signal.
This connects Pin 1 of the Channel IF pin connector (P4) to AGND. Use this configuration in conjunction
with JP3N and JP5N closed to short the IFP pin of the ADE7816 to AGND.
This connects Pin 1 of the Channel IC pin connector (P4) to AGND. Use this configuration in conjunction
with JP3N and JP5N closed to short the IFP pin of the ADE7816 to AGND.
This connects Pin 1 of the Channel ID pin connector (P38) to AGND. Use this configuration in conjunction
with JP5 and JP7 closed to short the IDP pin of the ADE7816 to AGND.
Pin 1 of the Channel ID pin connector (P38) is left floating. Use this configuration in normal operation to
drive the IDP pin with an analog signal.
This disables the antialiasing filter comprised of R9 and C9 in the IAP signal path. This filter is required
only when using a di/dt sensor.
This enables the antialiasing filter comprised of R9 and C9 in the IAP signal path. This filter is required
only when using a di/dt sensor.
This disables the antialiasing filter comprised of R11 and C11 in the IBP signal path. This filter is required
only when using a di/dt sensor.
This enables the antialiasing filter comprised of R11 and C11 in the IBP signal path. This filter is required
only when using a di/dt sensor.
This disables the antialiasing filter comprised of R13 and C13 in the ICP signal path. This filter is required
only when using a di/dt sensor.
This enables the antialiasing filter comprised of R13 and C13 in the ICP signal path. This filter is required
only when using a di/dt sensor.
This disables the antialiasing filter comprised of R15 and C15 in the IFP signal path. This filter is required
only when using a di/dt sensor.
This enables the antialiasing filter comprised of R15 and C15 in the IFP signal path. This filter is required
only when using a di/dt sensor.
This connects Pin 1 of the Channel IE pin connector (P39) to AGND. Use this configuration in conjunction
with JP6 and JP8 closed to short the IEP pin of the ADE7816 to AGND.
Pin 1 of the Channel IE pin connector (P39) is left floating. Use this configuration in normal operation to
drive the IEP pin with an analog signal.
This disables the antialiasing filter comprised of R90 and C69 in the IDP signal path. This filter is required
only when using a di/dt sensor.
This enables the antialiasing filter comprised of R90 and C69 in the IDP signal path. This filter is required
only when using a di/dt sensor.
Rev. 0 | Page 4 of 16
Evaluation Board User Guide UG-370
Jumper Default Option Description
JP5N Closed This disables the antialiasing filter comprised of R23 and C23 in the IFP signal path.
X Open This enables the antialiasing filter comprised of R23 and C23 in the IFP signal path.
JP6 X Closed
Open
JP7 Closed This disables the antialiasing filter comprised of R92 and C71 in the IDP signal path.
X Open This enables the antialiasing filter comprised of R92 and C71 in the IDP signal path.
JP7C 1, 2
2, 3 This connects the VP input to AGND.
X Open
JP7N X Closed
Open This enables the antialiasing filter comprised of R25 and C25 in the VN signal path.
JP8 Closed This disables the antialiasing filter comprised of R93 and C72 in the IEP signal path.
X Open This enables the antialiasing filter comprised of R93 and C72 in the IEP signal path.
JP8C X 1, 2 This connects R34 and C26 to AGND.
2, 3 This connects R34 and C26 to VN. This configuration is not typically used in normal operation.
JP9 Closed Pin 34 (NC) is connected to the microcontroller. This configuration is not required for normal operation.
X Open Pin 34 (NC) is left floating.
JP9C X Closed
Open
JP10 X 1, 2 This connects the 16.38 MHz, on-board crystal (Y1) to the CLKIN and CLKOUT pins of the ADE7816.
2, 3
JP11 X 1, 2 This connects the supply of second side of the isocouplers (VDD2) to VDD, the supply of the ADE7816.
2, 3
JP12 Closed
X Open
JP13 Closed Pin 33 (NC) is connected to the microcontroller. This configuration is not required for normal operation.
X Open Pin 33 (NC) is left floating.
JP14 Closed
X Open The antialiasing filter for the IAN pin is provided by R94 and C73.
JP15 Closed
X Open The antialiasing filter for the ICN pin is provided by R95 and C74.
JP17 Closed
X Open The antialiasing filter for the IBN pin is provided by R96 and C75.
JP18 Closed
X Open The antialiasing filter for the IN pin is provided by R97 and C76.
JP21 Closed
X Open
This disables the antialiasing filter comprised of R91 and C70 in the IEP signal path. This filter is only
required when using a di/dt sensor.
This enables the antialiasing filter comprised of R91 and C70 in the IEP signal path. This filter is only
required when using a di/dt sensor.
This bypasses the voltage divider. Use this configuration in conjunction with JP9C (open). Use this
configuration when applying low voltage signals.
This enables the voltage divider consisting of R28 and R34. Use in conjunction with JP9C (closed). Use
this configuration when applying high voltage signals.
This enables the antialiasing filter comprised of R25 and C25 in the VN signal path. Connects VN to
ground. Use this configuration when using high voltage signals.
This enables the voltage divider consisting of R28 and R34. Use in conjunction with JP7C (open). Use this
configuration when applying high voltage signals.
This bypasses the voltage divider. Use this configuration in conjunction with JP7C (1, 2). Use this
configuration when applying low voltage signals.
This allows an external clock to be connected to the EXT_CLKIN connector. This configuration
disconnects the on-board crystal (Y1).
This connects the supply of second side of the isocouplers (VDD2) to a 3.3 V supply provided at the P10
connector.
This connects the ADR280 voltage reference to the REF pin of the ADE7816. Use this configuration when
the ADE7816 is configured for external reference use.
This disconnects the ADR280 voltage reference from the REF pin of the ADE7816. Use this configuration
in normal operation when the ADE7816 internal reference is used.
This connects the IAN pin to the IBN, ICN, and IN pins. This allows a single antialiasing filter to be used for
all neutral inputs.
This connects the ICN pin to the IAN, IBN, and IN pins. This allows a single antialiasing filter to be used for
all neutral inputs.
This connects the IBN pin to the IAN, ICN, and IN pins. This allows a single antialiasing filter to be used for
all neutral inputs.
This connects the IN pin to the IAN, IBN, and ICN pins. This allows a single antialiasing filter to be used for
all neutral inputs.
This signals the microcontroller, NXP LPC2368, to declare all I/O pins as outputs. Use this configuration
when another microcontroller manages the ADE7816 through the P17 socket.
Disables the option to use another microcontroller to manage the ADE7816 through the P17 socket. Use
this in normal operation to allow the microcontroller, NXP LPC2368 (U8), to manage the ADE7816.
Rev. 0 | Page 5 of 16
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