AD2S1200/AD2S1205 User Guide
UG-365
LEVEL
SHIFTERS
AVDD, DVDD, +12V
DC
JACK
ON-BOARD
POWER SUPPLIES
DVDDAVDD
+12V
EXC
EXC
Sin
SinLO
CosLO
Cos
AD2S1200/
AD2S1205
SDP BOARD
CS
RD
SAMPLE
RDVEL
PARALLEL
5V
VDRIVE 3.3V
10442-001
AV
DD
DATA BUS
D0 TO D11
DV
DD
D0 TO D11,
A,B,NM, DIR,
DOS, LOT
26-WAY CONNECTOR
SAMPLE,
CS, RDVEL,
RD, SCLK,
SDO
8-WAY CONNECTOR
ADSP-BF527
DSP
LEVEL
SHIFTERS
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for the AD2S1200/AD2S1205 Resolver-to-Digital Converters
FEATURES
Full-featured evaluation board for the AD2S1200 and
AD2S1205
On-board excitation buffer
On-board power supplies
Standalone capability
PC control in conjunction with system demonstration
platform (EVAL-SDP-CB1Z)
PC software for control and data analysis
EVALUATION BOARD DESCRIPTION
The EVAL -AD2S1200/05SDZ is a full-featured evaluation board
designed to allow the user to easily evaluate all features of the
AD2S1200 and the AD2S1205 resolver-to-digital converters.
To evaluate the AD2S1200, order the EVAL-AD2S1200SDZ,
and to evaluate the AD2S1205, order the EVA L-AD2S1205SDZ
(see Table 7). The evaluation board can be controlled via the
SDP connector (J2). The SDP board allows the evaluation board
to be controlled through the USB port of a PC using the EVAL -
AD2S1200/05SDZ software.
On-board components include: the AD8664 precision rail-to-rail
quad op amp, the ADP1621 current mode step-up converter, the
ADM1185 4-channel voltage monitor and sequencer, the
ADP3303 high accuracy 200 mA low dropout linear regulator,
the ADP2301 step-down switching regulator, the ADP190 highside power switch, the ADM811 voltage supervisory device, and
the ADG3304 and ADG3308 bidirectional logic level translators.
The evaluation board features a high current driver with user
configurable gain that amplifies and biases the excitation
outputs, which allows the evaluation board to be connected
directly to a resolver. This high current driver circuit is
described in detail in Circuit Note CN-0192, available from
Analog Devices, Inc.
EVAL-AD2S1200/05SDZ CONTENTS
Evaluation board hardware
Evaluation software CD for the AD2S1200/AD2S1205
Mains power supply adapter
ADDITIONAL EQUIPMENT NEEDED
System demonstration platform (EVAL-SDP-CB1Z) when
using evaluation software
Resolver or resolver simulator
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
FUNCTIONAL BLOCK DIAGRAM
Rev. D | Page 1 of 24
Figure 1. EVAL-AD2S1200/05SDZ Block Diagram
UG-365 AD2S1200/AD2S1205 User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Board Description......................................................... 1
EVAL -AD2S1200/05SDZ Contents ................................................. 1
Additional Equipment Needed ....................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
EVAL-AD2S1200/05SDZ Quickstart Guide ................................. 3
Evaluation Board Hardware ............................................................ 4
Device Description ....................................................................... 4
Hardware Link Options ............................................................... 4
Power Supplies .............................................................................. 4
Parallel/Serial Interface ................................................................ 6
Sockets/Connectors...................................................................... 6
REVISION HISTORY
3/12—Rev. C to Rev. D
Document Title, Format, and Content Changed from EVALAD2S1200/AD2S1205
7—Rev. B to Rev. C
6/0
Updated Format .................................................................. Universal
Replaced Introduction ..................................................................... 1
Changes to Evaluation Board Interfacing Section ....................... 5
Changes to Bill of Materials .......................................................... 15
, Rev. C, to UG-365, Rev. D ........ Universal
Test Points ......................................................................................6
Encoder ...........................................................................................6
Fault Detection ..............................................................................6
EVAL-AD2S1200/05SDZ Basic Hardware Setup ......................7
Evaluation Board Software ...............................................................8
Software Installation .....................................................................8
Launching the Software ............................................................. 10
Description of Main Software Window .................................. 12
Data Capture ............................................................................... 13
Save File ....................................................................................... 14
Flash LED .................................................................................... 12
Evaluation Board Schematics and Artwork ................................ 15
Ordering Information .................................................................... 23
11/06—Rev. A to Rev. B
Added EVAL-AD2S1205 ................................................... Universal
11/05—Re
Added Evaluation Board Schematics and Artwork ................... 10
Added Bill of Materials .................................................................. 14
5/04—Revision 0: Initial Vers i on
v. 0 to Rev. A
Rev. D | Page 2 of 24
AD2S1200/AD2S1205 User Guide UG-365
EVAL-AD2S1200/05SDZ QUICKSTART GUIDE
Follow these steps to quickly evaluate the AD2S1200 or the
AD2S1205:
1. Install the EVAL-AD2S1200/05SDZ software from the
enclosed CD. Ensure that the EVA L-SDP-CB1Z board is
disconnected from the USB port of the PC while installing
the software. The PC may need to be restarted after the
installation.
2. Ensure that the default link options are configured as
outlined in Tabl e 2.
3. Connect the E VA L-SDP-CB1Z board to the E VA L -
AD2S1200/05SDZ board as shown in Figure 2.
4. Screw the two boards together with the enclosed nylon
screw-nut set to ensure that the boards connect firmly
together.
5. Connect the power supply adapter included in the kit to
Connecter J702 on the EVAL-AD2S1200/05SDZ board.
6. Connect the E VA L-SDP-CB1Z board to the PC via the
USB cable. For Windows® XP, you may need to search for
the EVA L -SDP-CB1Z drivers. Choose to automatically
search for the drivers for the E VA L-SDP-CB1Z board if
prompted by the operating system.
7. Launch the AD2S1200_05 software from the Analog
Devices subfolder in the Programs menu.
8. Press the RESET button, S1, on the EVA L -
AD2S1200/05SDZ board.
9V
DC INPUT
RESOLVER
INTERFACE
EXCITATION
BUFFER
POWER SUPPLIES
INDICATION LEDS
AD2S1200/
AD2S1205
LEVEL
SHIFTERS
Figure 2. Hardware Configuration—Setting Up the EVAL-AD2S1200/05SDZ
SDP BOARD
USB
INTERFACE
10442-002
Rev. D | Page 3 of 24
UG-365 AD2S1200/AD2S1205 User Guide
management devices
AVDD
5 V ± 5%
RDC analog supply rail
EVALUATION BOARD HARDWARE
DEVICE DESCRIPTION
This user guide describes the evaluation board for the
AD2S1200 and the AD2S1205, which are 12-bit resolution
tracking resolver-to-digital converters.
The AD2S1200 and the AD2S1205 integrate an on-chip
programmable sinusoidal oscillator that provides sine wave
excitation for resolvers.
The 12-bit angular position and velocity data is accessed via
either a 12-bit parallel port or a 3-wire serial interface. On-chip
incremental encoder emulation with direction output is also
available for positional data.
On-chip fault detection detects loss of resolver signals, out of
range input signals, input signal mismatch, and loss of position
tracking.
Complete specifications for the AD2S1200 and the AD2S1205
are provided in the AD2S1200 and the AD2S1205 data sheets,
available from Analog Devices, which should be consulted in
conjunction with this user guide when using the evaluation
board. Full details on the EVAL-SDP-CB1Z are available on the
Analog Devices website.
HARDWARE LINK OPTIONS
The function of the link options are described in Ta ble 2. The
default setup is configured to operate the board with the mains
power supply adapter and to interface to the EVA L-SDP-CB1Z
board via the parallel interface.
It is also possible to operate the board in standalone mode when
interfacing to a user defined system. The evaluation board can
be configured to operate in standalone serial or parallel mode
by setting the necessary link options. Angular positional data
can also be determined by interfacing with the encoder outputs.
POWER SUPPLIES
Care should be taken before applying power and signals to the
evaluation board to ensure that all link positions are as per the
required operating mode. See Table 2 for the complete list of
link options.
This evaluation board comes with a wall-mountable switching
power supply that provides a 9 V dc output. Connect the supply
to a 100 V to 240 V ac wall outlet at 50 Hz to 60 Hz. The output
from the supply is provided through a 2.0 mm inner diameter
jack that connects to the evaluation board at J702. The 9 V
supply is connected to the various on-board power management devices that supply the correct bias to each of the various
sections on the board and the E VA L -SDP-CB1Z board.
When using this evaluation board with the E VA L -SDP-CB1Z
board, it is necessary to power the board through the J702
connector. The V
CCY for the ADG3304 and ADG3308 level
translator devices are sourced from the EVAL -SDP-CB1Z board.
In standalone configuration, it is possible to power the
evaluation board through external power supplies via the
relevant screw terminal connectors.
If the evaluation board is used without the 9 V adapter, 5 V
must be connected to the AVDD input to supply the AD2S1200/
AD2S1205 AV
DVDD input to supply the AD2S1200/AD2S1205 DV
DD pin. In addition, 5 V must be connected to the
DD pin.
12 V must be connected to the +12 V connector to supply the
excitation buffer circuitry.
Each supply is decoupled on this board using 10 µF tantalum
and 10 nF multilayer ceramic capacitors.
Extensive ground planes are used on this board to minimize the
effect of high frequency noise interference. There are two main
ground planes, AGND and DGND. These are connected at one
location close to the AD2S1200/AD2S1205.
Table 1. External Power Supply Required
Power
Supply
VIN 9 V ± 5% Supplies power to on-board power
DVDD 5 V ± 5% RDC digital supply rail
12 V 9 V to 15 V Excitation buffer supply
Voltage
Range Purpose
Rev. D | Page 4 of 24
AD2S1200/AD2S1205 User Guide UG-365
internal pull-ups.
In Position B, the AVDD supply is sourced externally via the J703 connector.
In Position B, the DVDD supply is sourced externally via the J701 connector.
Table 2. Link Options
Default
Category Link
Interface LK1 B This link selects the source of the CS input signal for the AD2S1200/AD2S1205.
In Position A, the CS signal is taken from the externally applied signal via the J4 connector.
In Position B, the CS signal is taken from the SDP board via the 120-way connector.
LK2 B This link selects the source of the
In Position A, the
In Position B, the
LK3 B This link selects the source of the
In Position A, the
In Position B, the
In Position C, the
In Position D, the
LK4 B This link selects the source of the RD input signal for the AD2S1200/AD2S1205.
In Position A, the RD signal is taken from the externally applied signal via the J4 connector.
In Position B, the RD signal is taken from the SDP board via the 120-way connector.
LK6 A This link selects the source of the
In Position A, the
In Position B, the
Frequency
Selection
LK5 Not inserted
Position Function
This link selects the frequency of the sinusoidal excitation signals, the EXC and
(10 kHz)
AD2S1200/AD2S1205
frequencies (10 kHz, 12 kHz, 15 kHz, or 20 kHz) using the FS1 and FS2 pins. FS1 and FS2 have
SAMPLE
signal is taken from the externally applied signal via the J4 connector.
SAMPLE
SAMPLE
RDVEL
RDVEL
SOE
signal is taken from the SDP board via the 120-way connector.
RDVEL
signal is taken from the externally applied signal via the J4 connector.
RDVEL
signal is taken from the SDP board via the 120-way connector.
signal is tied to DVDD.
signal is tied to DGND.
RDVEL
SOE
signal is tied to DVDD (parallel mode).
SOE
signal is tied to DGND (serial mode).
. The frequency of this reference signal is programmable to four standard
input signal for the AD2S1200/AD2S1205.
input signal for the AD2S1200/AD2S1205.
input signal for the AD2S1200/AD2S1205.
EXC
pins of
Buffer Gain LK7,
LK8
Power
Supplies
LK501 A This link is used to select the source of the +12 V supply for the EVAL-AD2S1200/05SDZ.
LK701 A This link is used to select the source of the AVDD supply for the EVAL-AD2S1200/05SDZ.
In Position A, the AVDD supply is sourced internally from the on-board power supplies.
LK702 A This link is used to select the source of the DVDD supply for the EVAL-AD2S1200/05SDZ.
In Position A, the FS2 signal is tied to AGND.
In Position B, the FS1 signal is tied to AGND.
C These links select the gain of the EXC and
In Position A, the gain can be set by the user. Gain = R/10 kΩ, where R = R31 = R9.
In Position B, a gain of 1.54 is applied.
In Position C, a gain of 0.866 is applied.
In Position A, the +12 V supply is sourced internally from the on-board power supplies.
In Position B, the +12 V supply is sourced externally via the J500 connector.
In Position A, the DVDD supply is sourced internally from the on-board power supplies.
amplifier circuits.
EXC
Rev. D | Page 5 of 24
UG-365 AD2S1200/AD2S1205 User Guide
J4
External 8-way connector for serial operation
10
DGND
DGND
PARALLEL/SERIAL INTERFACE
In the default configuration, information is transferred to the
EVAL-SDP-CB1Z via the parallel interface.
SOCKETS/CONNECTORS
There is one SMB input socket, J1, on this evaluation board.
This socket allows external clock frequencies to be applied to
the EVA L -AD2S1200/05SDZ board. The on-board 8.192 MHz
crystal should be removed if an external clock is used.
There are nine connectors on the EVA L-AD2S1200/05SDZ
board, as outlined in Tab le 3.
Table 4. Pin Designations for 26-Way Connector J3
Pin No. Row A Row B
1 DB0 DB1
2 DB2 DB3
3 DB4 DB5
4 DB6 DB7
5 DB8 DB9
6 DB10 DB11
7 RST DGND
8 DIR NM
9 B A
Table 3. On-Board Connectors
Connector Function
J2 120-way connector for E VAL-SDP-CB1Z interface
J3 External 26-way connector for parallel operation
J5 Connector for SIN, SINLo, COS, and COSLo inputs
J6 Connector for EXC and
J500 External 12 V and AGND power connector
J701 External DVDD and DGND power connector
J702 9 V, 2.0 mm dc jack connector
J703 External AVDD and AGND power connector
EXC
outputs
The default interface to this evaluation board is via the 120-way
connector, which connects the EVAL-AD2S1200/05SDZ to the
EVAL-SDP-CB1Z board.
Additional options for interfacing with the evaluation board are
via J3, a 26-way connector, or via J4, an 8-way connector. These
connectors are provided to allow the evaluation board to be
interfaced with systems other than the Analog Devices E VA L -
SDP-CB1Z board. The 26-way connector, J3, is provided for use
in parallel mode. The 8-way connector, J4, is provided for use in
serial mode. The pin designations for both connectors are
shown in Tab le 4 and Tab le 5, respectively.
TEST POINTS
There are numerous test points on the EVA L-AD2S1200/05SDZ
board. These test points enable the user to have easy access to
the signals from the evaluation board, the external sensor, and
the controller board for probing, evaluation, and debugging.
11 LOT DOS
12 DGND DGND
13 DVDD DVDD
Table 5. Pin Designations for 8-Way Connector J4
Pin No. Row A Row B
1
2
3 SCLK SO
4 DGND DVDD
RD
SAMPLE
CS
RDVEL
ENCODER
The AD2S1200 and AD2S1205 emulate a 1024-line encoder
and a DIR direction output pin. These outputs allow the angular
position to be determined without the need for parallel or serial
communication interfaces. For ease of analysis, these outputs
are wired to on-board LEDs on the E VAL -AD2S1200/05SDZ
board. The status of these outputs can also be monitored via the
J3 connector. See Tabl e 4 for the connector pinout.
FAULT DETECTION
The AD2S1200 and AD2S1205 devices contain on-chip fault
detection. The fault status is flagged via the LOT and DOS output
pins. For ease of analysis, these outputs are wired to on-board
LEDs on the EVAL-AD2S1200/05SDZ board. The status of
these outputs can also be monitored via the J3 connector. See
Table 4 for the connector pinout.
Rev. D | Page 6 of 24
AD2S1200/AD2S1205 User Guide UG-365
S4
COSLO
2
EVAL-AD2S1200/05SDZ BASIC HARDWARE SETUP
The E VA L -AD2S1200/05SDZ board connects to the EVA L-
SDP-CB1Z system demonstration platform board. The
EVAL-SDP-CB1Z board is the controller board, which is the
communication link between the PC and the main evaluation
board. Figure 2 shows a photograph of the connections made
between the EVA L-AD2S1200/05SDZ daughter board and the
EVAL-SDP-CB1Z board.
A resolver or resolver simulator should be connected to the
EVAL-AD2S1200/05SDZ board as outlined in Table 6 . The
primary windings, R1 and R2, are connected to the buffered
excitation ouputs from the evaluation board. The resolver
stator outputs should be connected to the corresponding
EVAL-AD2S1200/05SDZ board inputs.
Table 6. Typical Resolver Connection
Resolver Name Pin Connector
R1 EXE 2 J6
R2
S1 SIN 4 J5
S2 COS 1
S3 SINLO 3
1
EXE
EVAL-AD2S1200/05SDZ
The gain stage for the excitation buffer can be controlled via
Link LK7 and Link LK8. These should be configured to provide
the necessary gain to allow the resolver inputs to lie within the
required specification. See Table 2 for the link options.
Before connecting power, connect the E VA L -AD2S1200/05SDZ
board to Connector A on the E VA L -SDP-CB1Z board. Nylon
screws are included in the E VA L -AD2S1200/05SDZ kit and can
be used to ensure that the EVAL-AD2S1200/05SDZ and EVAL-
SDP-CB1Z boards are connected firmly together.
After the EVAL-AD2S1200/05SDZ board and the E VAL -SDP-
CB1Z board are connected securely, connect the power to the
EVAL-AD2S1200/05SDZ board. The EVA L-AD2S1200/05SDZ
board requires an external power supply adapter, which is
included in the evaluation board kit. Connect this power supply
to Connector J702 on the EVA L -AD2S1200/05SDZ board. For
further details on the required power supply connections and
options, see the Power Supplies section.
Before connecting the EVAL-SDP-CB1Z board to your PC,
ensure that the EVAL-AD2S1200/05SDZ software has been
installed from the enclosed CD. The full software installation
procedure is detailed in the Evaluation Board Software section.
Finally, connect the EVA L-SDP-CB1Z board to the PC via the
USB cable enclosed in the EVA L-SDP-CB1Z kit. If using a
Windows XP platform, you may need to search for the E VA L -
SDP-CB1Z drivers. Choose to automatically search for the
drivers for the EVAL-SDP-CB1Z board if prompted by the
operating system.
Rev. D | Page 7 of 24
UG-365 AD2S1200/AD2S1205 User Guide
10442-003
10442-004
10442-005
EVALUATION BOARD SOFTWARE
SOFTWARE INSTALLATION
The E VA L -AD2S1200/05SDZ kit includes software on a CD.
Click the setup.exe file from the CD to run the install. The
default location for the software is
C:\Program Files\Analog Devices\AD2S1200_05\
Install the evaluation software before connecting the evaluation
board and E VAL -SDP-CB1Z board to the USB port of the PC to
ensure that the evaluation system is correctly recognized when
connected to the PC.
There are two parts to the installation:
• E VAL-AD2S1200/05SDZ board software installation
• E VAL-SDP-CB1Z system demonstration platform board
drivers installation
Follow Step 1 to Step 5 (see Figure 3 to Figure 7) to install the
EVAL-AD2S1200/05SDZ software. Follow Step 6 to Step 9 (see
Figure 8 to Figure 11) to install the EVAL-SDP-CB1Z drivers.
Proceed through all of the installation steps, allowing the
software and drivers to be placed in the appropriate locations.
Connect the E VA L-SDP-CB1Z board to the PC only after the
software and drivers have been installed.
Figure 4. EVAL-AD2S1200/05SDZ Installation—Destination Directory
2. Select the installation directory. Click Next.
Figure 3. EVAL-AD2S1200/05SDZ Installation—User Account Control
1. Click Ye s to begin the installation process.
Rev. D | Page 8 of 24
Figure 5. EVAL-AD2S1200/05SDZ Installation—License Agreement
3. Click I accept the License Agreement, and click Next.
AD2S1200/AD2S1205 User Guide UG-365
10442-006
10442-007
10442-010
Figure 6. EVAL-AD2S1200/05SDZ Installation—Start Installation
4. Click Next to install the software.
Figure 7. EVAL-AD2S1200/05SDZ Installation—Installation Complete
5. The installation of the evaluation software completes. Click
Next to proceed with the installation of the drivers.
Figure 8. EVAL-SDP-CB1Z Drivers Installation—Setup Wizard
6. The setup wizard opens. Click Next to begin the driver
installation process.
Figure 9. EVAL-SDP-CB1Z Drivers Installation—Choose Install Location
7. Select a destination folder for the SDP drivers, and click
Install.
10442-00810442-009
Figure 10. EVAL-SDP-CB1Z Drivers Installation—Windows Security
8. Click Install to proceed with the installation.
Rev. D | Page 9 of 24
UG-365 AD2S1200/AD2S1205 User Guide
10442-012
LAUNCHING THE SOFTWARE
After the EVAL-AD2S1200/05SDZ and EVAL-SDP-CB1Z
boards are correctly connected to your PC, the EVAL -
AD2S1200/05SDZ software can be launched.
To launch the software, perform the following steps:
1. From the Start menu, select Programs >Analog Devices >
AD2S1200_05. The main window of the software then
opens (see Figure 14).
2. If the E VA L-AD2S1200/05SDZ board is not connected to
the USB port via the E VA L-SDP-CB1Z when the software
is launched, a connectivity error displays (see Figure 13).
Connect the evaluation board to the USB port of the PC,
wait a few seconds, click Rescan, and follow the instructions.
10442-011
Figure 11. EVAL-SDP-CB1Z Drivers Installation—Complete
9. Click Finish.
After installation from the CD is complete, connect the EVAL -
AD2S1200/05SDZ board to the E VA L -SDP-CB1Z board as
described in the Evaluation Board Hardware section.
When you first plug in the EVAL-SDP-CB1Z board via the USB
cable provided, allow the Found Hardware Wizard to run.
After the drivers are installed, you can check that the board is
connected correctly by looking at the Device Manager of the
PC. The Device Manager can be found by right-clicking My
Computer > Manage > Device Manager from the list of
Sys te m Tool s, as shown in Figure 12. The E VA L -SDP-CB1Z
SDP-B board should appear under ADI Development Tools.
This completes the installation.
Figure 13. Connectivity Error Alert
10442-013
Figure 12. Device Manager
Rev. D | Page 10 of 24
AD2S1200/AD2S1205 User Guide UG-365
10442-014
1
2
3
1. MENU BAR.
2. CONTROL BUTTONS.
3. DATA CAPTURE DISPLAY.
Figure 14. Evaluation Software Main Window
Rev. D | Page 11 of 24
UG-365 AD2S1200/AD2S1205 User Guide
DESCRIPTION OF MAIN SOFTWARE WINDOW
When the software is launched, the main software window
opens (see Figure 14).
The user software panel as shown in Figure 14 has the following
features:
• Menu bar
• Control buttons
• Data capture display
Menu Bar
The menu bar consists of the File and Help menus.
File Menu
Save Data (Acquisition). Saves the position, velocity, and fault
data of a defined number of samples in normal mode into a
spreadsheet file.
Print Front Panel. Prints the software window displayed.
Save as Picture. Saves the front panel as a JPEG file.
Exit. Exits the program.
Help Menu
Analog.com. Opens www.analog.com.
Control Buttons
The E VA L -AD2S1200/05SDZ software includes the following
control buttons, drop-down boxes, and indicators.
Single Acquisition. Initiates the sampling and readback of
the defined number of resolver-to-digital converter (RDC)
measurements.
STOP. Stops the program.
Reoccurring Acquisition. Repeats single acquisition until the
button is released (normal mode).
Flash LED. Causes the orange LED1A on the SDP board to
flash, which can be a useful debugging tool.
Number of Samples. Selects the number of samples to be
completed in a single acquisition.
ON/OFF. Enables or disables the histogram option. (This button
appears on the Histogram Position and Histogram Velocity
tabs o nly. )
Data Capture Display
In the data capture display, you can select the format in which
to view the position and velocity conversion results. The position data can be displayed in digital output code format or in
degrees. The velocity data can be displayed in digital output
code format or in rotations per second (RPS). The desired
display options are selected by clicking on the Acquisition
(Codes), Acquisition (Degrees/RPS), Histogram Position,
and Histogram Velocity tabs.
Acquisition (Codes) Tab
The Acquisition (Codes) tab displays the conversion results
taken in normal mode of the position and velocity of the resolver
connected to the EVAL -AD2S1200/05SDZ board. The number
of conversions results displayed is defined by the Number of
Samples box. The conversion results are displayed as waveforms in digital code on two graphs. The upper graph displays
the position conversion results. The lower graph displays the
velocity conversion results. The maximum, minimum, and
mean values of the sample set are displayed on indicators to the
right of each graph.
At the bottom right of each graph are the zoom options. These
allow you to zoom in and out to obtain a closer look at a sample
if required.
Acquisition (Degrees/RPS) Tab
The Acquisition (Degrees/RPS) tab displays the conversion
results taken in normal mode of the position and velocity of
the resolver connected to the EVAL-AD2S1200/05SDZ board.
The number of conversions results displayed is defined by the
Number of Samples box. The position conversion result is
displayed in degrees on the upper graph. The lower graph displays
the velocity conversion results in RPS. The maximum,
minimum, and mean values of the sample set are displayed on
indicators to the right of each graph.
At the bottom right of each graph are the zoom options. These
allow you to zoom in and out to obtain a closer look at a sample
if required.
Histogram Position Tab
The Histogram Position tab displays the histogram of the position conversion results taken in normal mode of the resolver
connected to the EVAL -AD2S1200/05SDZ board. To enable this
option, you must set the ON/OFF button to the on position.
The histogram is displayed only when the output code varies for
the one block of samples; that is, if the same conversion result is
returned for all samples, the histogram is not displayed.
At the bottom right of each graph are the zoom options. These
allow you to zoom in and out to obtain a closer look at a sample
if required.
Histogram Velocity Tab
The Histogram Velocity tab displays the histogram of the velocity
conversion results taken in normal mode of the resolver connected to the E VA L -AD2S1200/05SDZ board. To enable this
option, you must set the ON/OFF button to the on position.
The histogram is displayed only when the output code varies for
the one block of samples; that is, if the same conversion result is
returned for all samples, the histogram is not displayed.
Within any of the chart panels, the tools shown in Figure 15
allow user control of the different chart displays.
Rev. D | Page 12 of 24
AD2S1200/AD2S1205 User Guide UG-365
10442-028
1
2 3
1. USED FOR CONTROLLING
THE CURSOR I F PRESENT.
2. USED FOR ZOOMING IN
AND OUT.
3. USED FO R P LANNING.
10442-015
1
2
1. SUMMARY O F THE MEASURED POSI TIONAL DATA.
2. SUMMARY O F THE MEASURED VELO CITY DATA.
When you click the Reoccurring Acquisition button, the software
instructs the EVAL -SDP-CB1Z to read back the conversion
results from the E VA L -AD2S1200/05SDZ board in a repeating
loop. The number of samples is selected via the Number of
Samples box. After each conversion, data from the AD2S120x is
Figure 15. Chart Tools
DATA CAPTURE
To initiate conversions and to capture the sample data, you must
click the Single Acquisition or the Reoccurring Acquisition
button.
When the Single Acquisition button is clicked, the software
instructs the EVAL -SDP-CB1Z to read back the conversion
results from the EVAL-AD2S1200/05SDZ board. The number
of samples is selected via the Number of Samples box. After
each conversion, data from the AD2S120x is written to external
memory on the E VAL -SDP-CB1Z. The required set of samples
is uploaded through the USB port to the PC when all conversions are completed.
written to external memory on the EVAL-SDP-CB1Z. The
required set of samples is uploaded through the USB port to the
PC when all the conversions are completed. If the Reoccurring
Acquisition button is not clicked again to release the loop, the
conversion loop repeats. While the data is being uploaded to the
PC, the AD2S120x device is not converting; therefore, there may
be a time delay between two blocks of samples.
In single acquisition and reoccurring acquisition mode, the data
is displayed on the data capture display. The data is displayed on
the Acquisition (Codes), Acquisition (Degrees/RPS),
Histogram Position, and Histogram Velocity tabs.
Figure 16 shows a typical data capture. Both position and velocity
data results are presented in the data capture display. Additionally,
the following data is displayed:
• A summary of the measured positional data
• A summary of the measured velocity data
Figure 16. Acquisition (Code) Tab—Typical Data Capture
Rev. D | Page 13 of 24
UG-365 AD2S1200/AD2S1205 User Guide
10442-016
SAVE FILE
The software can save the current captured data for future
analysis.
Go to the File menu, and click Save Data (Acquisition). The
save dialog box opens. Save to an appropriate folder location.
Figure 17. Save Dialog Box
Rev. D | Page 14 of 24
AD2S1200/AD2S1205 User Guide UG-365
10442-017
C
EVALUATION BOARD SCHEMATICS AND ARTWORK
EX
4
11
U7-E
+12V
C10
10nF
C9
EXC
Q1
+12V
C
B
R15
R16
2K2
D1
3R3
DNI
4R7
R13
E
4R7
R14
D19
1uF 12mR
C2
1uF 12mR
Q2
EBC
R44
3R3
2K2
R18
+12V
Q13
E
C
4R7
R47
B
Q14
EBC
4R7
R48
D3
R67
2K2
R65
3R3
D4
R68
3R3
DNI
R71
14
AD8664ARZ
-
U7-D
12+13
DNI
0r
DNI
0r
0r
R72
R73
R77
R78
R79
2K2
R66
R52
1
AD8664ARZ
3+2
DNI
0r
0r
R51
R56
0r
R69
U7-A
R19
DNI
R50
R20
0r
15k4
8K66
DNI
120pF
R31
R39
R40
C6
B
C
A
LK7
R70
DNI
8
AD8664ARZ
+9-
U7-C
10
VREF
X1
CLAMP-10MM
DGND
T_COSLO
EXC
T_COS
T_SINLO
COS
COSLO
SINLO
SIN
EXC
T_SIN
R53
0r
AVDD
+
C13
10nF
C14
10uF
15k4
8K66
DNI
120pF
R9
R10
R12
C1
B
C
A
LK8
**
**. Place as close to U1 as poss ible
R49
DNI
7
AD8664ARZ
-
U7-B
5+6
Note on Excitation Buffer Circuitry
Dual Op-Amp per Exc signal :
Two modes of operation:
Insert R49, R50, R51, R52, R70, R72, R77 & R71
Single Op-Amp per Excsignal :
Insert R53, R19, R20, R56, R69, R73, R78 & R79
VREF
10K
R54
R26
SIN
SINLO
COSLO
COS
0R
C33
R25
0R
0R
R24
C27
R23
0R
T_EXC
R21
68k
R22
68k
+
C4
VREF
C5
0.1uF
10uF
10K
R55
B
A
LK5
RESET
T_EXC
33
32
31
FS1
FS2
EXC
34
RESET
EXC
35
AGND
36
SIN
37
SINLO
38
AVDD
39
COSLO
40
COS
41
AGND
42
REFBYP
43
44
REFOUT
DVDD
RD
2
1
REFOUT
3CS4
T_REFOUT
DVDD
+
C3
10nF
**
C11
10nF
C12
10uF
CS
RD
**
22K
R74
+12V
R76
10K
R75
LINK-2-R0603
DOS
LOT
30
29
LOT
DOS
U1
AD2S1200
SAMPLE5RDVEL6SOE7DB11/SO
RDVEL
SAMPLE
LK6
28
DIR
DIR
A
27NM26B25
8
DB11/SO
B
LINK-2-R0603
Join underU1
AGND
T_CPO
ABNM
A
DB9
DB10/SCLK
9
DB9
DB10/SCLK
J1
CLKIN
24
23
CPO
DGND
DB7
DB8
11
10
DB7
DB8
Y1
CLKIN
22
XTALOUT
21
DB0
20
DB1
19
DB2
18
DVDD
17
DGND
16
DB3
15
DB4
14
DB5
13
DB6
12
DB3
DB4
DB5
DB6
T_EXC_OUT
T_EXC_OUT
J5-1
J5-2
J5-3
J5-4
J6-1
J6-2
C8
22pF
8.192MHz
C7
22pF
DVDD
+
C15
10nF
C16
10uF
**
DB0
DB1
DB2
Figure 18. Schematic Page 1
Rev. D | Page 15 of 24
DVDD
UG-365 AD2S1200/AD2S1205 User Guide
PAR_D0
PAR_D1
1
2A13A24A35A46NC7
VCCA
J3-4
DB0
2k2
R2
10k
2k2
R7
10K
PAR_D2
ADG 3304
DB1
DB2
D12
DOS
RED
D11
C17
0.1uF
PAR_RD
PAR_A0
TMR_A
PAR_CS
3.3V from SDP switched by FET
C21
0.1uF
VDRIVE_3V3
J4-3
A
LK2
SAMPLE
J4-7
J3-24
DVDD
J3-25
J3-26
J4-2
A
LK1
B
LINK-2-R 0603
CS
J3-14
J3-19
J3-20
J3-23
J4-8
AGND
DGND
1
2A13A24A35A46NC7
VCCA
ADG 3304
C20
0.1uF
DVDD
J4-1
B
A
B
LINK-2-R0603
LK4
LINK-2-R0603
RD
DGND
0.1uF
C19
NC10Y411Y312Y213Y114VCCY
J4-4
A
LK3
RDVEL
2
RESET
VCC3MR
4
DVDD RESET
DGND
VDRIVE_3V3
C18
0.1uF
GND
U3
8EN9
DVDD
B
C
D
LINK-4-R 0603
10k
R17
1
GND
U8
ADM811
S1
Reset
DVDD
J3-1
J3-2
J3-3
R3
DVDD DVDD
R1
J3-13
DGND
PAR_D3
VDRIVE_3V3
GND
U11
NC10Y411Y312Y213Y114VCCY
DB3
RED
LOT
C22
8EN9
DVDD
J3-9
J3-5
Q7
E
C
B
Q8
C
B
Q5
E
C
B
Q6
C
B
LOT DOS
J3-21 J3-22
PAR_D4
C23
0.1UF
1
2A13A24A35A46A57A68A79A810
VCCA
0.1uF
J3-10
J3-11
J3-12
J3-6
J3-7
J3-8
DB4
E
E
PAR_D5
PAR_D6
PAR_D7
PAR_D8
PAR_D9
PAR_D10
PAR_D11
EN
U14
R45
68k
ADG3308
GND12Y813Y714Y615Y516Y417Y318Y219Y120VCCY
11
DGND
J4-6
J4-5
DB5
DB6
DB7
DB8
DB9
DB11/SO
DB10/SCLK
GREEN
D10
2k2
R8
A
D9
2k2
R6
B
D8
2k2
R5
D7
2k2
R4
DVDD DVDD DVDD DVDD
DIR NM
Q12
E
C
B
ABNMDIR
GREEN
Q11
E
C
B
J3-17 J3-18
GREEN
Q10
E
C
B
J3-16
GREEN
Q9
E
C
B
10442-018
T_DG ND T_AGND
J3-15
Figure 19. Schematic Page 2
Rev. D | Page 16 of 24
AD2S1200/AD2S1205 User Guide UG-365
10442-019
Board ID EEPROM (24LC32) must be on I2C bus 0,
I2C bus 1 is comm on across both conn ectors on SDP - Pull up resistors required
BMODE1: Pull up with a 10K resistor to set SDP to boot from a SPI FLASH on the daughter board
(connected to blackfin GPIO - use I2C_0 first)
Main I2C bus (Connected to blackfin TWI - Pull up resistors not required)
VIN: Use this pin to power the SDP requires 5V 200 mA
VIO: USE to set IO voltage max draw 20 mA
Board ID EEPROM (24LC32) must be on I2C bus 0,
I2C bus 1 is comm on across both conn ectors on SDP - Pull up resistors required
BMODE1: Pull up with a 10K resistor to set SDP to boot from a SPI FLASH on the daughter board
(connected to blackfin GPIO - use I2C_0 first)
Main I2C bus (Connected to blackfin TWI - Pull up resistors not required)
Use SDP_GNDas return for VSDP
CONNECTOR
STANDARD
SDP
PARALLEL
PORT
SPORT
SPI
I2C
GENERAL
INPUT/OUTPUT
TIMERS
*
*
*
*
*
***
*
***
*
*NC on BLACKFIN SDP
120
NC
119
NC
118
GND
117
GND
116
VIO(+3.3V)
115
GND
114
PAR_D22
113
PAR_D20
112
PAR_D18
111
PAR_D16
110
PAR_D15
109
GND
108
PAR_D12
107
PAR_D10
106
PAR_D8
105
PAR_D6
104
GND
103
PAR_D4
102
PAR_D2
101
PAR_D0
100
PAR_WR
99
PAR_INT
98
GND
97
PAR_A296PAR_A0
95
PAR_FS2
94
PAR_CLK
93
GND
92
SPORT_RSCLK
91
SPORT_DR0
90
SPORT_RFS
89
SPORT_TFS
88
SPORT_DT0
87
SPORT_TSCLK
86
GND
85
SPI_SEL_A
84
SPI_MOSI
83
SPI_MISO
82
SPI_CLK
81
GND
80
SDA_0
79
SCL_0
78
GPIO177GPIO376GPIO5
75
GND
74
GPIO7
73
TMR_B
72
TMR_D
71NC70NC69
GND
68NC67NC66NC65NC64NC63
GND
62
UART_TX
61
BMODE1
60
RESET_IN
59
UART_RX
58
GND57NC56EEPROM_A0
55NC54NC53NC52
GND51NC50NC49TMR_C
48
TMR_A
47
GPIO646GND45GPIO444GPIO243GPIO042SCL_141SDA_1
40
GND39SPI_SEL1/SPI_SS
38
SPI_SEL_C37SPI_SEL_B36GND35SPORT_INT
34
SPORT_DT3
33
SPORT_DT2
32
SPORT_DT1
31
SPORT_DR1
30
SPORT_DR2
29
SPORT_DR3
28
GND27PAR_FS126PAR_FS325PAR_A1
24
PAR_A3
23
GND22PAR_CS
21
PAR_RD20PAR_D1
19
PAR_D3
18
PAR_D5
17
GND16PAR_D7
15
PAR_D9
14
PAR_D11
13
PAR_D13
12
PAR_D14
11
GND10PAR_D17
9
PAR_D19
8
PAR_D21
7
PAR_D23
6
GND5USB_VBUS
4
GND3GND2NC1VIN
J2
R11
R28
100K
R29
100K
1A02A13A24
VSS
8
VCC
7
WP
6
SCL
5
SDA
U2
24LC32 A-I/MS
SDP_VIO_3.3V
SDP_VIO_3.3V
PAR_D1
PAR_D3
PAR_D5
PAR_D7
PAR_D9
PAR_D11
PAR_D0
PAR_D2
PAR_D4
PAR_D6
PAR_D8
PAR_D10
TMR_A
PAR_CS
PAR_RD
VSDP
SDP_GND
SDP_VIO_3.3V
PAR_A0
Figure 20. Schematic Page 3
Rev. D | Page 17 of 24
UG-365 AD2S1200/AD2S1205 User Guide
AVDD
J703-1
V_IN
AVDD
10uF
C711
+
C723
10nF
LK701
BA
AGND
J703-2
GND
5%
R0402
330k
10nF
1
OUT12OUT2
IN17IN25SD
8
V_IN
C720
R712
3
6
NR
U704
ERROR
4
GND
C722
10nF
C721
1uF
Analog powersupply
ADP3303-5
AVDD_EN
J701-1
DVDD
10uF
C704
+
C703
10nF
LK702
BA
DGND
DGND
5%
J701-2
GND
DVDD
R0402
330k
10nF
Digital power supply
ADP3303-5
AVDD_EN
C701
R700
1
6
3
NR
U700
OUT12OUT2
ERROR
4
GND
IN1
IN2
SD
8
7
5
C702
10nF
C709
1uF
V_IN
AVDD_EN
VSDP_EN
+12V_EN
DGND
V_IN
2k4
1%
R713
VSDP
SDP_VIO_3.3V
C725
0.1uF
1
Power supply for SDP board
GREEN
LED702
Q701
PWR GD
2N7002
3
BST
U705
ADP2301 AUJZ
VIN
5
V_IN
2
VDRIVE_3V3
A2
ADP190ACBZ
VOUT
B2
GND
U741
EN
VIN
B1
A1
18k
68k
5%
R740
R714
L701
6.8uH
1 2
ELL6PG6R8N
30V,2A
D700 B230A-13-F
3
6
FB
SW
2
GND
EN
4
C712
10uF
VSDP_EN
+
R741
5%
C724
10uF 14mR
+
53k6
1%
SDP_GND
10k2
R711
1%
10442-020
SDP_GND
10k
5%
R719
10k
5%
R718
10k
5%
VINGND
AGND
SDP_GND
Q700
MMBT3904LT1G
E
C
61R9
R709
B
D701
470R
R710
68k
R707
J702-1
J702-3
J702-4
J702-2
2k4
1%
R715
V_IN
C700
5%
GREEN
LED701
PWR IN
R717
10k
5%
R716
7
6
OUT38OUT29OUT1
10
VDD
U703
BZT52
5.1V
1uF 5.5mR
PWRGD
1
GND
VIN1
2
ADM1185ARMZ
VIN2
VIN3
VIN4
3
4
5
68k
5%
18k
R708
5%
DNI
C715
R701
AVDD
1
18k
R705
5%
DNI
C710
68k
R704
+12V_500MA
18k
R702
5%
5%
DNI
C713
Caps placedonly if specificdelays needed
68k
5%
R703
VSDP
18k
R706
5%
DNI
C714
Figure 21. Schematic Page 4
Rev. D | Page 18 of 24
AD2S1200/AD2S1205 User Guide UG-365
10442-021
+12V
AGND
CoilcraftME3220-332MLB
Alternative part number forL501
1
SDSN
2
GND3COMP
4FB5
FREQ
6
PGND
7
GATE
8
PIN
9
CS
10
IN
U501 ADP1621
1
2
3
Q501
SI2304DDS-T1-GE3
D501
R501
33mR
C501
1uF 12mR
R507
200R
R508
442R
C503
2u2F 14mR
C502
1uF 12mR
R502
953R
R503
14k3
R504
4k53
C504
120pF
C505
2n2F
R505
75k
R506
8K45
C506
1uF
C507
1uF
R509
0R
BA
LK501
J500-1
J500-2
L501
3.3uH
V_IN
+12V_EN
+12V_500MA
VDD_SIGNAL_GND
VDD_SIGNAL_GND
VDD_SIGNAL_GND
VDD_SIGNAL_GND VDD_SIGNAL_GND
VDD_SIGNAL_GND
VDD_SIGNAL_GND
+12V_500MA
+12V
Figure 22. Schematic Page 5
Rev. D | Page 19 of 24
UG-365 AD2S1200/AD2S1205 User Guide
10442-022
10442-023
Figure 23. EVAL-AD2S1200/05SDZ Top-Side Silkscreen
Figure 24. EVAL-AD2S1200/05SDZ Bottom-Side Silkscreen
Rev. D | Page 20 of 24
AD2S1200/AD2S1205 User Guide UG-365
10442-024
10442-025
Figure 25. EVAL-AD2S1200/05SDZ Top Layer
Figure 26. EVAL-AD2S1200/05SDZ Layer 2
Rev. D | Page 21 of 24
UG-365 AD2S1200/AD2S1205 User Guide
10442-026
10442-027
Figure 27. EVAL-AD2S1200/05SDZ Layer 3
Figure 28. EVAL-AD2S1200/05SDZ Bottom Layer
Rev. D | Page 22 of 24
AD2S1200/AD2S1205 User Guide UG-365
ORDERING INFORMATION
See Table 7 for a list of the evaluation boards compatible with the hardware described in this user guide.
Table 7. Compatible Boards
Model1 Description
EVAL-AD2S1200SDZ AD2S1200 evaluation board
EVAL-AD2S1205SDZ AD2S1205 evaluation board
EVAL-SDP-CB1Z Evaluation controller board
ADZS-BRKOUT-EX3 Signal breakout board
1
Z = RoHS-compliant part.
Rev. D | Page 23 of 24
UG-365 AD2S1200/AD2S1205 User Guide
f the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
cense granted is expressly made subject to the following additional
S Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
O, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
ent shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high e nergy ESD. Therefore, proper ESD precaution s should be taken to avoid per formance degradation or loss of functionality.
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By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth bel ow (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms a nd Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance o
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Modifications to the Evaluation Board must comply with applicable law, inclu ding but not limited to the RoH
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AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
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registered trademarks are the property of their respective owners.
UG10442-0-3/12(D)
Rev. D | Page 24 of 24
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