2.5 V Precision
FEATURES
2.5 voltage output, ±0.6% max
Wide Input voltage range, 4.5 V to 33 V
Supply current 1.4 mA max
Output voltage tempco, 50 ppm/°C max
Line regulation, 50 ppm/V max
Load regulation, 100 ppm/mA max
Extended industrial temperature range, −40°C to +85°C
Low cost
GENERAL DESCRIPTION
The REF03 precision voltage reference provides a stable 2.5 V
output, with minimal change for variations in supply voltage,
ambient temperature, or loading conditions. Single-supply
operation over an input voltage range of 4.5 V to 33 V with a
current drain of 1 mA and good temperature stability is
achieved using an improved band gap design. Primarily
targeted at price sensitive applications, the REF03 is available in
plastic mini DIPs and surface-mount small outline plastic
packages. For improved performance or −40°C to +125°C
operation, see the ADR03 data sheet.
Voltage Reference
PIN CONFIGURATION
1
NC
REF03
V
2
IN
V
TEMP
GND
NC = NO CONNECT. DO NOT CONNECT ANYTHING
ON THESE PINS. SOME OF THEM ARE RESERVED
FOR FACTORY TESTING PURPOSES.
TOP VIEW
3
(Not to Scale)
4
Figure 1. 8-Lead PDIP (P-Suffix),
8-Lead SOIC (S-Suffix)
NC
8
NC
7
V
6
OUT
TRIM
5
REF03
00372-F-001
INPUT
2
Q19
6
R12 = 16.7kΩ
5
4
OUTPUT
TRIM
GROUND
00372-F-002
R3
R1
R2
Q1
R5
C1
R4
Q2
R6
R8
Q8
Q4
Q6
Q20
R10
Q5
R7
Q7
Q9
Q3
Q14
Q10
R14
Q12
Q11
≈
1.23V
Figure 2. Simplified Schematic
Q17
Q13
Q15
R15
Q18
Q16
Q21
R13
R9 = 50kΩ
R11 = 2kΩ
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
www.analog.com
REF03
TABLE OF CONTENTS
Electrical Specifications................................................................... 3
Generating a −2.5 V Reference....................................................6
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
Applications....................................................................................... 6
Generating an Adjustable Bipolar Voltage Reference.............. 6
Boost Transistor Provides High Output Current......................6
CMOS DAC Reference.................................................................7
Outline Dimensions ..........................................................................8
Ordering Guide .............................................................................8
REVISION HISTORY
6/04—Data Sheet changed from REV. E to REV. F
Updated Formatting......................................................................Universal
Changes to SIMPLIFIED SCHEMATIC........................................................1
Changes to ELECTRICAL SPECIFICATIONS ............................................3
Changes to ORDERING GUIDE....................................................................8
2/04—Data Sheet changed from REV. D to REV. E.
Changes to SIMPLIFIED SCHEMATIC........................................................1
Changes to ELECTRICAL SPECIFICATIONS.............................................2
Changes to ORDERING GUIDE....................................................................3
Replaced TPC 1 ................................................................................................4
8/03—Data Sheet changed from REV. C to REV. D.
Updated format...............................................................................Universal
Change to FEATURES.....................................................................................1
Change to GENERAL DESCRIPTION..........................................................1
Deleted WAFER TEST LIMITS.......................................................................2
Changes to ELECTRICAL SPECIFICATIONS.............................................2
Changes to ORDERING GUIDE....................................................................3
Added OUTLINE DIMENSIONS ...................................................................7
Revision 0: Initial Version
Rev. F | Page 2 of 8
REF03
()(
)
ELECTRICAL SPECIFICATIONS
@ VIN = 15 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1.
REF03G
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage V
O
No Load 2.485 2.500 2.515 V
Output Voltage Tolerance No Load 0.2 0.6 %
Output Voltage
Temperature Coefficient
Line Regulation V
1
TCV
O
10 50 ppm/°C
= 4.5 V to 33 V 20 50 ppm/V
IN
0.002 0.005 %/V
Load Regulation IL = 0 mA to 10 mA 60 100 ppm/mA
0.006 0.010 %/mA
Load Current (Sourcing) I
Load Current (Sinking) I
Short-Circuit Output Current I
Quiescent Supply Current I
Turn-On Settling Time
2
L
S
SC
SY
t
ON
10 mA
−0.3 −0.5 mA
Output Shorted to Ground 24 mA
No Load 1.0 1.4 mA
To ±0.1% of Final Value 5 µs
Output Voltage Noise en p-p 0.1 Hz to 10 Hz 6 µV p-p
Output Adjustment Range ∆V
TRIM
R
= 10 kΩ ±6 ±11 %
POT
Input Voltage Range 4.5 15 33 V
Temperature Voltage Output
3
V
T
620 mV
1
TCVO is measured by the endpoint method, and is equal to
()
.
×
2
Guaranteed by design.
3
Limit current in or out of Pin 3 to 50 nA and capacitance on Pin 3 to 30 pF.
oo
C40VC85V
−−
6oo
−
C1251052
()
Figure 3. Burn-In Circuit
Cppmin
/
+18V
V
IN
REF03
GND
–18V
10Ω
2
4
+
+
10µF
10µF
V+
2
V
IN
6
V
OUT
REF03
00372-F-003
GND
TRIM
4
5
10kΩ
V
OUT
Figure 4. Output Voltage Trim Method
00372-F-004
Rev. F | Page 3 of 8
REF03
ABSOLUTE MAXIMUM RATINGS
T
= 25°C, unless otherwise noted.
A
Table 2.
Parameter Rating
Input Voltage 40 V
Output Short-Circuit Duration Indefinite
Operating Temperature Range
REF03G (P, S) −40°C to +85°C
Storage Temperature Range −65°C to +175°C
Junction Temperature Range −65°C to +175°C
Lead Temperature (Soldering, 10 sec) 300°C
Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only;
functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 3. Package Thermal Resistance
Package Type θ
8-Lead PDIP (P) 110 50 °C/W
8-Lead SOIC (S) 160 44 °C/W
1
θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device in socket for PDIP package; θJA is specified for device soldered to printed circuit board
for SOIC package.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
1
JA
θ
JC
Unit
Rev. F | Page 4 of 8
REF03
TYPICAL PERFORMANCE CHARACTERISTICS
20
TA = 25°C
19
18
17
16
MAXIMUM LOAD CURRENT (mA)
15
14
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
Figure 5. Maximum Load Current vs. Input
Volta ge
65
TA = 25°C
60
55
50
LOAD REGULATION (ppm/mA)
45
4 8 12 16 20 24 28 32
Figure 6. Load Regulation (∆I
INPUT VOLTAGE (–V)
= 10 mA) vs.
L
Input Voltage
200
TA = 25°C
150
100
50
LOAD REGULATION (ppm/V)
0
4 8 12 16 20 24 28 32
Figure 7. Line Regulation vs. Input Voltage
35
VIN = 15V
30
25
20
15
10
MAXIMUM LOAD CURRENT (mA)
5
0
–40 –20 0 20 40 60 80 100
Figure 8. Maximum Load Current vs.
INPUT VOLTAGE (V)
TEMPERATURE (°C)
Temperature
00372-F-005
00372-F-006
00372-F-007
00372-F-008
1.2
VIN = 15V
1.1
1.0
0.9
QUIESCENT CURRENT (mA)
0.8
–40 –20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 9. Quiescent Current vs. Temperature
92
82
72
62
52
42
LINE REGULATION (dB)
32
VIN = 15V
TA = 25°C
22
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 10. Line R egulation vs. Frequ ency
1.4
VIN = 15V
1.3
1.2
1.1
1.0
0.9
0.8
LOAD REG–T/LOAD REG (25°C)
0.7
0.6
–40–200 20406080100
Figure 11. Normalized Load Regulation
(∆I
1000
VIN = 15V
T
= 25°C
A
100
10
OUTPUT NOISE (µV p-p)
1
10 100 1k 10k 100k 1M
Figure 12. Wideband Output Noise vs.
Bandwidth (0.1 Hz to Frequency Indicated)
TEMPERATURE (°C)
= 10 mA) vs. Temperature
L
FREQUENCY (Hz)
10
32
100
320
1000
3200
10000
32000
TA = 25°C
= 15V
V
IN
0.1Hz TO 10Hz
00372-F-009
3.2 5.9 8.6
OUTPUT VOLTAGE NOISE (µV p-p)
Figure 13. Typical Distribution of Output
Voltage Noise
–40°C≤T
≤
+85°C
A
= 15V
V
IN
LINE REGULATION (ppm/V)
00372-F-010
OUTPUT VOLTAGE TEMPCO (ppm/°C)
0153045–45 –30 –15
Figure 14. Typical Distribution of Output
Volta ge Tempco
00372-F-011
00372-F-012
00372-F-013
00372-F-014
Rev. F | Page 5 of 8
REF03
V
APPLICATIONS
The REF03 provides a stable 2.5 V output voltage with minimal
dependence on load current, line voltage, or temperature. This
voltage is typically used to set an absolute reference point in
data conversion circuits, or in analog circuits such as log amps,
4 to 20 mA transmitters and power supplies. The REF03 is of
particular value in systems requiring a precision reference using
a single 5 V supply rail.
Because an on-board operational amplifier is used to amplify
the basic band gap cell voltage to 2.5 V, supply decoupling is
critical to the transient performance of a voltage reference. The
supply line should be bypassed with a 10 µF tantalum capacitor
in parallel with a 0.01 µF to 0.1 µF ceramic capacitor for best
results, as shown in Figure 15. The bypass capacitors should be
located as close to the reference as possible. Inadequate
bypassing can lead to instabilities.
Output bypass capacitors are not generally recommended. If
necessary for high frequency output impedance reduction, the
capacitance value used should be at least 1 µF.
+
50kΩ
+
2
V
IN
REF03
V
GND
4
50kΩ
2
3
OUT
OP97
V+
7
4
6
+15V
2.5V
6
00372-F-015
V
OUT
–2.5V TO +2.5V
00372-F-016
10µF
0.1µF
Figure 15. Basic Connections
GENERATING AN ADJUSTABLE BIPOLAR VOLTAGE REFERENCE
There is often a requirement for an adjustable bipolar reference.
A simple method of generating such a reference is to connect
the output of the REF03 to an op amp in an adjustable gain
configuration, as shown in Figure 16. The trimmable resistor is
then used to generate the desired output voltage from −2.5 V to
+2.5 V.
V+
2
V
IN
6
V
OUT
REF03
50kΩ
GND
4
Figure 16. Adjustable Bipolar Reference
GENERATING A −2.5 V REFERENCE
Often, there is a requirement for a negative reference voltage.
The simplest method of generating a −2.5 V reference with the
REF03 is to connect an op amp in a gain of −1 to the output, as
shown in Figure 17. This provides both positive and negative
2.5 V references. Figure 18 shows another method of obtaining
a negative reference, in which the current-output element is a
PNP transistor, with the REF03 in a servo loop to ensure that
the output remains 2.5 V below ground.
V+
2
V
IN
6
V
OUT
REF03
GND
100kΩ
4
Figure 17. ±2.5 V Reference
+6.2V
2N2905
2kΩ
–5V
Figure 18. −2.5 V Reference
100kΩ
+5V
1kΩ
2
V
IN
V
REF03
GND
4
2
3
OUT
7
OP97
4
V–
6
–2.5V
+2.5V
6
–2.5V
00372-F-017
00372-F-018
BOOST TRANSISTOR PROVIDES HIGH OUTPUT CURRENT
When applications require more than 10 mA current delivery,
an external boost transistor may be added to the REF03 to pass
the required current without dissipating excessive power within
the IC. The maximum current output to the system is bounded
only by the capabilities of the boost transistor. Figure 19 shows
this technique, with and without current limiting.
Current limiting may be used to prevent damage to the boost
transistor. Figure 19a is an example of no current limit, while
Figure 19b shows the limit that occurs when the voltage
Rev. F | Page 6 of 8
REF03
dropped across R2 exceeds one VBE (0.6 V). The current limit is
sensitive to the variations of the diodes’ forward drop and the
PNP’s V
with temperature, and will decrease with increasing
BE
temperature.
V+
65Ω
6
2N2905
–2.5V
2.49kΩ
2
V
IN
REF03
V
OUT
GND
4
A. NO CURRENT LIMIT B. CURRENT LIMITING
Figure 19. Output Current Boost
V–
1N4148
2
V
IN
REF03
V
GND
4
OUT
R1
40Ω
6
2N2905
2.49kΩ
R2
10Ω
–2.5V
0mA TO 100mA
00372-F-019
CMOS DAC REFERENCE
The REF03 makes an excellent reference for use with CMOS
and bipolar DACs. Figure 20 shows the REF03 connected to the
DAC8012, a 12-bit parallel loading CMOS DAC with memory.
With an OP43 output amplifier for fast settling, the circuit
requires less than 3 mA when driven from TTL gates, and less
than 2 mA when driven from CMOS gates. In situations not
requiring the higher speed of the OP43, enhanced linearity and
some savings in power dissipation can be realized using an
OP97 for the output amplifier. Figure 21 shows a typical
multiplying DAC application using a REF03 reference.
+5V
2
V
IN
REF03
OP AMP IS OP43 IF HIGHER AND FASTER SETTING IS REQUIRED,
OP97 IF LOWER SPEED AND HIGHER LINEARITY IS REQUIRED.
GND
6
V
OUT
100Ω
19
V
4
REF
V
DD
DAC80102
DB11
4
DIGITAL INPUT
DB015DGND
33Ω
18
20
R
FB
OUT
AGND
3
33pF
1
2
2
3
–5V
Figure 20. CMOS DAC Reference
+12V
V
DD
VIN <±2.5V p-p
DAC80102*
V
IN
= –D/256× VIN WITH RESPECT TO VIRTUAL ZERO.
V
OUT
*DIGITAL INTERFACE OMITTED FOR CLARITY.
GND
V
OUT
1/2
V
Z
VIRTUAL ZERO +2.5V
6.9kΩ
6.9kΩ
1µF
V
<±2.5V p-p
IN
+
Figure 21. Multiplying CMOS DAC Reference
7
6
VO = 0V TO –2.5V
4
+12V
V
IN
REF03
V
OUT
GND
00372-F-020
00372-F-021
Rev. F | Page 7 of 8
REF03
Y
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARIT
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
Figure 22. 8-Lead Standard Small Outline Package [SOIC]
Dimensions shown in millimeters and (inches)
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
Narrow Body
0.25 (0.0098)
0.17 (0.0067)
(R-8)
S-Suffix
0.50 (0.0196)
0.25 (0.0099)
8°
1.27 (0.0500)
0°
0.40 (0.0157)
× 45°
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
8
1
0.100 (2.54)
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
BSC
5
4
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.015
(0.38)
MIN
SEATING
PLANE
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
Figure 23. 8-Lead Plastic Dual In-Line Package [PDIP]
(N-8)
P-Suffix
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Part Number Initial Accuracy Temperature Coefficient Temperature Range Package Option
REF03GP
REF03GS
REF03GS-REEL2 0.2% 10 −40°C to +85°C SOIC
REF03GS-REEL7
REF03GSZ-REEL7
1
Burn-in is available on commercial and industrial temperature range parts in PDIP package.
2
For availability and burn-in information on SOIC package, contact your local sales office.
3
Z = Pb-free part.
1
2
2
2, 3
0.2% 10 −40°C to +85°C PDIP
0.2% 10 −40°C to +85°C SOIC
0.2% 10 −40°C to +85°C SOIC
0.2% 10 −40°C to +85°C SOIC
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00372–0–6/04(F)
Rev. F | Page 8 of 8
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