Datasheet REF01 Datasheet (Analog Devices)

10 V Precision

FEATURES

10 V output, ±0.3% max Adjustment range, ±3% min Excellent temperature stability, 8.5 ppm/°C max Low noise, 30 µV p-p max Low supply current, 1.4 mA max Wide input voltage range, 12 V to 40 V High load driving capability, 10 mA No external components Short-circuit proof

GENERAL DESCRIPTION

The REF01 precision voltage reference provides a stable 10 V output that can be adjusted over a 3% range with minimal effect on temperature stability. Single-supply operation over an input voltage range of 12 V to 40 V, a low current drain of 1 mA, and excellent temperature stability are achieved with an improved band gap design. Low cost, low noise, and low power make the REF01 an excellent choice whenever a stable voltage reference is required. Applications include DACs and ADCs, portable instrumentation, and digital voltmeters. Full military temperature range devices with screening to MIL-STD-883 are available. For new designs, refer to ADR01.
OUTPUT RESISTORS REF01 OPTION R9 R11 R12 P AND S PACKAGES 18k4.5k33.3k J AND Z PACKAGES, 50k2k 16.7k
AND 883C PRODUCT
R8
Q8
Voltage Reference
REF01

PIN CONFIGURATIONS

NC
NC
V
IN
NC TRIM
NC = NO CONNECT. DO NOT CONNECT ANYTHING ON THESE PINS. SOME OF THEM ARE RESERVED FOR FACTORY TESTING PURPOSES.
NC V
IN
NC
GND
NC = NO CONNECT. DO NOT CONNECT ANYTHING ON THESE PINS. SOME OF THEM ARE RESERVED FOR FACTORY TESTING PURPOSES.
Figure 2. 8-Lead PDIP (P-Suffix)
8-Lead CERDIP (Z-Suffix)
R7
Q7
Q14
R14
Q13
8
NC
7
V
6
OUT
5
4
2
1
3
GROUND
(CASE)
Figure 1. TO-99 (J Suffix)
1
REF01
2
TOP VIEW
3
(Not to Scale)
4
8
NC
7
NC
6
V
5
TRIM
8-Lead SOIC (S-Suffix)
Q15
OUT
R15
2
00373-F-001
00373-F-002
INPUT
C1
R6
R3
Q1
R1
R2
R4
Q4
R5
Q2
Q6
Q5
Q20
R10
Figure 3. Simplified Schematic
Rev. G
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
Q3
Q9
Q12
Q10
Q11
1.23V
Q21
Q17
R13
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2005 Analog Devices, Inc. All rights reserved.
Q18
Q16
Q19
R12*
R9*
R11*
*SEE OUTPUT RESISTORS
OUTPUT
6
TRIM
5
GROUND
4
00373-F-003
REF01
TABLE OF CONTENTS
Specifications..................................................................................... 3
Typical Performance Characteristics ..............................................6
Electrical Specifications............................................................... 3
Electrical Specifications............................................................... 3
Electrical Specifications............................................................... 4
Electrical Specifications............................................................... 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
REVISION HISTORY
2/05—Rev. F to Rev. G
Changes to Electrical Specifications .............................................. 3
Changes to Electrical Specifications .............................................. 4
7/04—Rev. E to Rev. F
Updated Format..................................................................Universal
Changes to Simplified Schematic................................................... 1
Changes to Specifications................................................................ 3
Applications........................................................................................8
Precision Current Source.......................................................... 10
Supply Bypassing........................................................................ 10
Reference Stack with Excellent Line Regulation.................... 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 12
10/03—Rev. C to Rev. D
Changes to Features ..........................................................................1
Changes to Electrical Specifications ...............................................2
Deleted Figure 13...............................................................................3
Deleted Wafer Test Limits ................................................................4
Deleted Typical Electrical Characteristics......................................4
Changes to Ordering Guide.............................................................4
Changes to Specifications................................................................ 4
Changes to Applications .................................................................. 8
Changes to Ordering Guide............................................................ 9
2/04—Rev. D to Rev. E
Changes to Simplified Schematic .................................................. 1
Changes to Ordering Guide............................................................ 4
Replaced Figure 6 ............................................................................. 5
Replaced Figure 7 ............................................................................. 5
Updated Outline Dimensions..........................................................8
10/02—Rev. B to Rev. C
Edits to Features.................................................................................1
Delete RC-Suffix................................................................................1
Edits to Absolute Maximum Ratings..............................................5
Edits to Ordering Guide...................................................................5
Edits to Package Type .......................................................................5
Delete CP-20 ......................................................................................9
Updated Outline Dimensions..........................................................9
Rev. G | Page 2 of 12
REF01
(

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

@ VIN = 15 V, TA = 25°C, unless otherwise noted.
Table 1.
REF01A/REF01E REF01H Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
Output Voltage VO IL = 0 mA 9.97 10.00 10.03 9.95 10.00 10.05 V Output Adjustment Range ∆V Output Voltage Noise1
S, Z, P Packages
J, 883 Parts Line Regulation2 VIN = 13 V to 33 V 0.006 0.010 0.006 0.010 %/V Load Regulation2 IL = 0 mA to 10 mA 0.005 0.008 0.006 0.010 %/mA Turn-On Settling Time3 tON To ± 0.1% of final value 5 5 µs Quiescent Supply Current ISY No load 1.0 1.4 1.0 1.4 mA Load Current IL 10 10 mA Sink Current4 IS −0.3 −0.5 −0.3 −0.5 mA Short-Circuit Current ISC VO = 0 30 30 mA
1
Sample tested.
2
Line and load regulation specifications include the effect of self-heating.
3
Guaranteed by design.
4
During sink current test, the device meets the output voltage specified.
RP = 10 kΩ ±3.0 ±3.3 ±3.0 ±3.3 %
TRIM
e
n p-p
e
n p-p
0.1 Hz to 10 Hz
0.1 Hz to 10 Hz
30 35
30 35
µV p-p µV p-p

ELECTRICAL SPECIFICATIONS

@ VIN = 15 V, −55°C ≤ TA ≤ +125°C for REF01A/REF01E, and 0°C ≤ TA ≤ 70°C for REF01H and IL = 0 mA, unless otherwise noted.
Table 2.
REF01A/REF01E REF01H
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
Output Voltage Change ∆VOT 0°C ≤ TA ≤ 70°C 0.02 0.06 0.07 0.17 %
with Temperature1, 2 −55°C ≤ TA ≤+125°C 0.06 0.15 0.18 0.45 % Output Voltage TCVO 3.0 8.5 10.0 25.0 ppm/°C Temperature Coefficient3 Change in VO Temperature RP = 10 kΩ 0.7 0.7 ppm/%
Coefficient with Output
Adjustment Line Regulation 0°C ≤ TA ≤ 70°C 0.007 0.012 0.007 0.012 %/V
(VIN = 13 V to 33 V)4 −55°C ≤ TA ≤ + 125°C 0.009 0.015 0.009 0.015 %/V Load Regulation 0°C ≤ TA ≤ 70°C 0.006 0.010 0.007 0.012 %/mA
(IL = 0 mA to 8 mA)4 −55°C ≤ TA ≤ + 125°C 0.007 0.012 0.009 0.015 %/mA
1
∆VOT is defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as
a percentage of 10 V:
VV
=
V
OT
2
∆VOT specification applies trimmed to 10,000 V or untrimmed.
3
TCVO is defined as ∆Var divided by the temperature range, therefore
()
O
4
Line and load regulation specifications include the effect of self-heating.
MINMAX
V
700
10010×
CtoCV
°+°
70
700
C
°
and
()
O
12555
OT
CtoCTCV
=°+°
180
C
°
()
OT
CtoCTCV
=°+°
)
CtoCV
°+°
12555
Rev. G | Page 3 of 12
REF01
(

ELECTRICAL SPECIFICATIONS

@ VIN = 15 V, TA = 25°C, unless otherwise noted.
Table 3.
REF01C Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VO IL = 0 mA 9.90 10.00 10.10 V Output Adjustment Range ∆V Output Voltage Noise1
S, Z, P Packages
J, 883 Parts Line Regulation2 V Load Regulation2 IL = 0 mA to 8 mA 0.006 0.015 %/mA Turn-On Settling Time3 tON To ±0.1% of final value 5 µs Quiescent Supply Current ISY No load 1.0 1.6 mA Load Current IL 8 mA Sink Current4 IS −0.3 −0.5 mA Short-Circuit Current ISC VO = 0 30 mA
1
Sample tested.
2
Line and load regulation specifications include the effect of self-heating.
3
Guaranteed by design.
4
During sink current test, the device meets the output voltage specified.
RP = 10 kΩ ±2.7 ±3.3 %
TRIM
e
n p-p
e
n p-p
0.1 Hz to 10 Hz
0.1 Hz to 10 Hz = 13 V to 33 V 0.009 0.015 %/V
IN
30 35
µV p-p µV p-p

ELECTRICAL SPECIFICATIONS

@ VIN = 15 V, 0°C ≤ TA ≤ +70°C for REF01CJ, REF01CZ, and −40°C ≤ TA ≤ +85°C for REF01CP and REF01CS, unless otherwise noted.
Table 4.
REF01C Parameter Symbol Conditions Min Typ Max Unit
Output Voltage Change ∆VOT 0.14 0.45 %
with Temperature
Output Voltage TCVO 20 65 ppm/°C
Temperature Coefficient3
Change in VO Temperature
Coefficient with Output
Adjustment RP = 10 kΩ 0.7 ppm/°C Line Regulation4 VIN =13 V to 30 V 0.011 0.018 %/V Load Regulation4 IL = 0 to 5 mV 0.008 0.018 %/mA
1
∆VOT is defined as the absolute difference between the maximum output voltage and the minimum output voltage over the specified temperature range expressed as
a percentage of 10 V:
=
V
OT
2
∆VOT specification applies trimmed to +10,000 V or untrimmed.
3
TCVO is defined as ∆Var divided by the temperature range, therefore
()
O
4
Line and load regulation specifications include the effect of self-heating.
1, 2
VV
MINMAX
10010×
V
700
70
()
OT
CtoCTCV
=°+°
CtoCV
°+°
700
C
°
and
()
O
12555
OT
CtoCTCV
=°+°
180
C
°
)
CtoCV
°+°
12555
Rev. G | Page 4 of 12
REF01

ABSOLUTE MAXIMUM RATINGS

Table 5.
Parameter Rating
Input Voltage 40 V Output Short-Circuit Duration
(to Ground or VIN) Indefinite
Storage Temperature Range
J, S, and Z Packages −65°C to +150°C P Package −65°C to +125°C
Operating Temperature Range
REF01A −55°C to +125°C REF01CJ 0°C to 70°C REF01CP, REF01CS, REF01E,
REF01H Junction Temperature (TJ) −65°C to +150°C Lead Temperature
(Soldering @ 60 sec)
−40°C to +85°C
300°C
Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted.
Table 6. Package Thermal Resistance
Package Type θ
TO-99 (J) 170 24 °C/W 8-Lead CERDIP (Z) 162 26 °C/W 8-Lead PDIP (P) 110 50 °C/W 8-Pin SOIC (S) 160 44 °C/W
1
θJC Unit
JA
1
θJA is specified for worst-case mounting conditions, that is, θJA is specified for
device in socket for TO, CERDIP, and PDIP packages; θ soldered to printed circuit board for SOIC package.
is specified for device
JA
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. G | Page 5 of 12
REF01

TYPICAL PERFORMANCE CHARACTERISTICS

76
66
56
46
36
26
LINE REGULATION (dB)
VIN = 15V
16
= 25°C
T
A
0
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 4. Line Regulation vs. Frequency
10k
VIN = 15V T
= 25°C
A
1k
0.0031
0.0100
0.0310
0.1000
0.3100
1.0000
3.1000
10.0000
LINE REGULATION (%/V)
00373-F-006
20
TA = 25°C
19
18
17
16
MAXIMUM LOAD CURRENT (mA)
15
14
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
Figure 7. Maximum Load Current vs. Input Voltage
1.4 VIN = 15V
1.3
1.2
1.1
00373-F-009
100
OUTPUT NOISE (µV p-p)
10
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
Figure 5. Output Wideband Noise vs. Bandwidth
(0.1 Hz to Frequency Indicated)
0.016 VIN = 15V
0.014
0.012
0.010
0.008
0.006
0.004
25°C
0.002
PERCENT CHANGE IN OUTPUT VOLTAGE (%)
0
–10 0 10 20 30 40 50
DEVICE IMMERSED IN 75°C OIL BATH
TIME (s)
Figure 6. Output Change due to Thermal Shock
1.0
0.9
0.8
LOAD REG–T/LOAD REG (25°C)
0.7
00373-F-007
00373-F-008
0.6 –60 –40 –20 0 20 40 60 80 100 120 140
Figure 8. Normalized Load Regulation (∆I
1.4
1.3
1.2
1.1
1.0
0.9
0.8
LINE REG–T/LINE REG (25°C)
0.7
0.6 –60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
= 10 mA) vs. Temperature
L
TEMPERATURE (°C)
00373-F-010
00373-F-011
Figure 9. Normalized Line Regulation vs. Temperature
Rev. G | Page 6 of 12
REF01
30
VIN = 15V
25
1.3 VIN = 15V
1.2
20
15
10
MAXIMUM LOAD CURRENT (mA)
5
0
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 10. Maximum Load Current vs. Temperature
1.1
1.0
0.9
QUIESCENT CURRENT (mA)
0.8
00373-F-012
0.7
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
00373-F-013
Figure 11. Quiescent Current vs. Temperature
Rev. G | Page 7 of 12
REF01

APPLICATIONS

15V
2
V
IN
6
V
O
OUTPUT
REF01
5
TRIM
GND
4
10k
00373-F-004
Figure 12. Output Adjustment
The REF01 trim terminal can be used to adjust the output voltage over a 10 V ± 300 mV range. This feature lets the system designer trim system errors by setting the reference to a voltage other than 10 V. The output also can be set exactly to 10.000 V or to 10.240 V for binary applications.
Adjustment of the output does not significantly affect the temperature performance of the device. The temperature coefficient change is approximately 0.7 ppm/°C for 100 mV of output adjustment.
+18V
V
IN
1.1mA
2
9V
0.1µF 9V
V
IN
REF01
TRIM
GND
4
6
V
O
5
100k
10V
+
00373-F-015
Figure 15. Precision Calibration Standard
15V
VOLTAGE COMPLIANCE: –25V TO +3V
2
V
IN
6
V
O
REF01
5
TRIM
GND
4
I
OUT
Figure 16. Current Source
R
I
OUT
10V
+ 1mA
=
R
00373-F-016
0.1µF
REF01
GND
–18V
00373-F-005
Figure 13. Burn-In Circuit
10k
+15V
2
V
IN
V
O
REF01
GND
4
POS. FULL SCALE –1LSB 1 1 1 1 1 1 1 1 +4.960 ZERO SCALE 1 0 0 0 0 0 0 0 0.000 NEG. FULL SCALE +1LSB 0 0 0 0 0 0 0 1 –4.960 NEG. FULL SCALE 0 0 0 0 0 0 0 0 –5.000
MSB
B1 B2 B3 B4 B5 B6 B7 B8
5k
6
5
5k
DAC08
V+ V–
–15V
+15V
B1 B2 B3 B4 B5 B6 B7 B8 E
LSB
l
O
l
O
V
C
LC
C
5k
+15V
4
OP02
2
–15V
Figure 14. Burn-In Circuit
+15V
2
IN
V
TRIM
4
SERIAL
OUTPUT
START
6
O
5
5k
B1 B2 B3 B4 B5 B6 B7 B8
V
0.1µF
REF01
GND
E
O
–15V +15V
0.01µF
C
C
5k
16
14
15
1
10
APPROXIMATION
CONVERSION
COMPLETE
313
DAC08
7658
91011
AM2592
SUCCESSIVE-
REGISTER
2
TTL CLOCK
INPUT 2.25MHz
3.9M
I
O
I
O
12 1
345611121314
9
Figure 17. DAC Reference
ANALOG
INPUT
0V TO +10V
5k
2
4
7
3
CMP01C
2
1k
CONNECT START TO CONVERSION COMPLETE FOR CONTINUOUS CONVERSION
+15V
8
7
4
1
–15V
00373-F-017
00373-F-014
Rev. G | Page 8 of 12
REF01
0.1µF
+15V
2
V
IN
6
V
O
REF01
TRIM
GND
4
5k
10k
5
Figure 18. ±10 V Reference
±
0.1%
10k±0.1%
+15V
OP02
–15V
+10V
–10V
I
OUT
VOLTAGE COMPLIANCE: –3V TO +25V
2
V
IN
6
V
O
REF01
5
TRIM
GND
4
00373-F-018
–15V
Figure 19. Current Sink
R
I
OUT
10V
+ 1mA
=
R
00373-F-019
Rev. G | Page 9 of 12
REF01

PRECISION CURRENT SOURCE

A current source with 25 V output compliance and excellent output impedance can be obtained using this circuit. REF01 keeps the line voltage and power dissipation constant in the device; the only important error consideration at room temperature is the negative supply rejection of the op amp. The typical 3 µV/V PSRR of the OP02E creates an 8 ppm change (3 µV/V × 25 V/10 V) in output current over a 25 V range. For example, a 10 mA current source can be built (R = 1 kΩ) with 300 MΩ output impedance.
R
=
O
2
V
IN
REF01
1
GND
4
RC = 10–5 SEC
V25
6
××
6
V
O
R
C
Figure 20. Precision Current Source
6
6
mA10108
+50V
V
O
REF01
GND
OP02E
V
4
–5V
2
IN
2
4
R
C
(TRIM FOR CALIBRATION)
7
2
VO= 0V
3
TO 25V
10V
I
=
O
R

SUPPLY BYPASSING

For best results, it is recommended that the power supply pin is bypassed with a 0.1 µF disc ceramic capacitor.

REFERENCE STACK WITH EXCELLENT LINE REGULATION

Three REF01s can be stacked to yield 10.000 V, 20.000 V, and
30.000 V outputs. An additional advantage is near-perfect line regulation of the 10.0 V and 20.0 V output. A 32 V to 60 V input change produces an output change that is less than the noise voltage of the devices. A load bypass resistor (R a path for the supply current (I
) of the 20.000 V regulator.
SY
In general, any number of REF01s can be stacked this way. For example, 10 devices will yield outputs of 10 V, 20 V, 30 V . . . 100 V. The line voltage can change from 105 V to 130 V. However, care must be taken to ensure that the total load currents do not exceed the maximum usable current (typically 21 mA).
32V TO 60V
2
V
IN
6
V
O
REF01
5
TRIM
GND
4
2
V
6
IN
V
O
REF01
5
2
V
6
IN
V
O
REF01
5
TRIM
GND
4
00373-F-020
Figure 21. Reference Stack
GND
TRIM
4
10k
) provides
B
TRIMMED OUTPUTS
10k
10k
R
6.8k
B
30V
20V
10V
00373-F-021
Rev. G | Page 10 of 12
REF01

OUTLINE DIMENSIONS

0.005 (0.13)
PIN 1
0.200 (5.08) MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.055 (1.40)
MIN
0.405 (10.29) MAX
MAX
85
1
0.100 (2.54) BSC
4
0.070 (1.78)
0.030 (0.76)
0.310 (7.87)
0.220 (5.59)
0.060 (1.52)
0.015 (0.38)
0.150 (3.81) MIN
SEATING PLANE
Figure 22. 8-Lead Ceramic Dual In- Line Package [CERDIP]
(Q-8)
Z-Suffix
REFERENCE PLANE
0.5000 (12.70)
0.1850 (4.70)
0.1650 (4.19)
0.3700 (9.40)
0.3350 (8.51)
0.3350 (8.51)
0.3050 (7.75)
0.0400 (1.02) MAX
0.0400 (1.02)
0.0100 (0.25)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
MIN
0.2500 (6.35) MIN
0.0500 (1.27) MAX
0.0190 (0.48)
0.0160 (0.41)
0.0210 (0.53)
0.0160 (0.41)
BASE & SEATING PLANE
COMPLIANT TO JEDEC STANDARDS MO-002-AK
0.2000 (5.08)
BSC
0.1000 (2.54)
BSC
0.1000 (2.54) BSC
4
3
2
Figure 24. 8-Lead Metal Header [TO-99]
(H-08)
J-Suffix
0.320 (8.13)
0.290 (7.37)
15°
5
0.015 (0.38)
0.008 (0.20)
6
7
8
1
0.0340 (0.86)
0.0280 (0.71)
45° BSC
0.1600 (4.06)
0.1400 (3.56)
0.0450 (1.14)
0.0270 (0.69)
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
0.25 (0.0098)
0.10 (0.0040)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
85
1.27 (0.0500)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
BSC
6.20 (0.2440)
5.80 (0.2284)
41
1.75 (0.0688)
1.35 (0.0532)
0.51 (0.0201)
0.31 (0.0122)
0.25 (0.0098)
0.17 (0.0067)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
0.40 (0.0157)
× 45°
Figure 23. 8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
S-Suffix
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
0.280 (7.11)
4
0.250 (6.35)
0.240 (6.10)
0.015 (0.38) MIN
SEATING PLANE
0.005 (0.13) MIN
0.060 (1.52) MAX
0.015 (0.38) GAUGE
PLANE
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92) MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
1
PIN 1
0.100 (2.54)
0.210
(5.33)
MAX
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN. CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
BSC
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MS-001-BA
Figure 25. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
P-Suffix
Rev. G | Page 11 of 12
REF01

ORDERING GUIDE

Burn-in is available on commercial and industrial temperature range parts in CERDIP, PDIP, and TO-can packages.
T Model ∆VOS Max (mV) Operating Temperature Range (°C) Package Description Package Option
REF01EJ ± 30 −40 to +85 TO-99 J-8 REF01CJ ± 100 0 to 70 TO-99 J-8 REF01EZ ± 30 −40 to +85 CERDIP Z-8 REF01HZ ± 50 −40 to +85 CERDIP Z-8 REF01AZ/883C ± 30 −55 to +125 CERDIP Z-8 REF01CP ± 100 −40 to +85 PDIP P-8 REF01CPZ1 ± 100 −40 to +85 PDIP P-8 REF01HPZ1 ± 50 −40 to +85 PDIP P-8 REF01HP ± 50 −40 to +85 PDIP P-8 REF01HS2 ± 50 −40 to +85 SOIC R-8 REF01HS-REEL ± 50 −40 to +85 SOIC R-8 REF01HSZ1 ± 50 −40 to +85 SOIC R-8 REF01HSZ-REEL1 ± 50 −40 to +85 SOIC R-8 REF01CS2 ± 100 −40 to +85 SOIC R-8 REF01CS-REEL ± 100 −40 to +85 SOIC R-8 REF01CS-REEL7 ± 100 −40 to +85 SOIC R-8 REF01CSZ-REEL1 ± 100 −40 to +85 SOIC R-8 REF01CSZ-REEL71 ± 100 −40 to +85 SOIC R-8 REF01CSZ ± 100 −40 to +85 SOIC R-8 REF01AJ/883C2 ± 30 −55 to +125 TO-99 J-8
1
Z = Pb-free part.
2
For availability and burn-in information on SOIC packages, contact your local sales office.
= 25° C
A
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners.
C00373-0-2/05(G)
Rev. G | Page 12 of 12
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