Analog Devices PKD01AY, PKD01EP, PKD01EY, PKD01FP, PKD01FY Datasheet

Monolithic Peak Detector

a

FEATURES
Monolithic Design for Reliability and Low Cost
High Slew Rate: 0.5 V/␮s
Low Droop Rate

= 25ⴗC: 0.1 mV/ms

T

A

T

= 125ⴗC: 10 mV/ms

A

Low Zero-Scale Error: 4 mV
Digitally Selected Hold and Reset Modes
Reset to Positive or Negative Voltage Levels
Logic Signals TTL and CMOS Compatible
Uncommitted Comparator On-Chip
Available in Die Form

GENERAL DESCRIPTION

The PKD01 tracks an analog input signal until a maximum
amplitude is reached. The maximum value is then retained as a
peak voltage on a hold capacitor. Being a monolithic circuit, the
PKD01 offers significant performance and package density
advantages over hybrid modules and discrete designs without
sacrificing system versatility. The matching characteristics
attained in a monolithic circuit provide inherent advantages
when charge injection and droop rate error reduction are
primary goals.

Innovative design techniques maximize the advantages of mono­lithic technology. Transconductance (gm) amplifiers were chosen
over conventional voltage amplifier circuit building blocks. The
g

amplifiers simplify internal frequency compensation, minimize

m

acquisition time and maximize circuit accuracy. Their outputs
are easily switched by low glitch current steering circuits. The
steered outputs are clamped to reduce charge injection errors
upon entering the hold mode or exiting the reset mode. The inher­ently low zero-scale error is further reduced by active Zener-Zap
trimming to optimize overall accuracy.

with Reset-and-Hold Mode

PKD01

FUNCTIONAL BLOCK DIAGRAM

–IN+IN OUTPUT V+ V–

–
CMP
+

LOGIC

GND

DET

GATED

"

–IN

+IN

–IN

+IN

RST

RST

"g

m

–

AMP

A

+

GATED

"

"g

m

–

AMP

B

+

DET

OPERATIONAL MODE

0

0
0
1
1

PEAK DETECT

1

PEAK HOLD

1

RESET

0

INDETERMINATE

D

The output buffer amplifier features an FET input stage to
reduce droop rate error during lengthy peak hold periods. A bias
current cancellation circuit minimizes droop error at high ambi­ent temperatures.

Through the DET control pin, new peaks may either be detected
or ignored. Detected peaks are presented as positive output
levels. Positive or negative peaks may be detected without
additional active circuits, since Amplifier A can operate as an
inverting or noninverting gain stage.

An uncommitted comparator provides many application options.
Status indication and logic shaping/shifting are typical examples.

V–

OUTPUT
BUFFER

1

–

C

+

PKD01

C

H

SWITCHES SHOWN FOR:
RST = “0,” DET = “0”

OUTPUT

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] World Wide Web Site: http://www.analog.com
Fax: [phone] © Analog Devices, Inc., 2001

PKD01–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

AMPLIFIERS A, B

g

m

Zero-Scale Error V
Input Offset Voltage V
Input Bias Current I
Input Offset Current I
Voltage Gain A
Open-Loop Bandwidth BW A
Common-Mode Rejection Ratio CMRR –10 V ≤ V
Power Supply Rejection Ratio PSRR ± 9 V ≤ V
Input Voltage Range
Slew Rate SR 0.5 0.5 V/µs
Feedthrough Error
Acquisition Time to

0.1% Accuracy

Acquisition Time to t

0.01% Accuracy

1

1

1

1

COMPARATOR

Input Offset Voltage V
Input Bias Current I
Input Offset Current I
Voltage Gain A
Common-Mode Rejection Ratio CMRR –10 V ≤ V
Power Supply Rejection Ratio PSRR ± 9 V ≤ V
Input Voltage Range

1

Low Output Voltage V
“OFF” Output Leakage Current I
Output Short-Circuit Current I
Response Time

2

DIGITAL INPUTS – RST, DET

Logic “1” Input Voltage V
Logic “0” Input Voltage V
Logic “1” Input Current I
Logic “0” Input Current I

MISCELLANEOUS

Droop Rate

3

Output Voltage Swing: V
Amplifier C R
Short-Circuit Current:
Amplifier C I
Switch Aperture Time t
Switch Switching Time ts 50 50 ns
Slew Rate: Amplifier C SR R
Power Supply Current I

NOTES

1

Guaranteed by design.

2

DET = 1, RST = 0.

3

Due to limited production test times, the droop current corresponds to junction temperature (TJ). The droop current vs. time (after power-on) curve clarified this point. Since
most devices (in use) are on for more than 1 second, ADI specifies droop rate for ambient temperature (TA) also. The warmed-up (TA) droop current specification is correlated
to the junction temperature (T
are not subject to production testing.

Specifications subject to change without notice.

) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature. Ambient (T

J

ZS

OS

B

OS

V

V

CM

t

AQ

AQ

OS

B

OS

V

V

CM

OL

L

SC

t

S

2

H

L

INH

INL

V

DR

OP

SC

AP

SY

(@ VS = ⴞ15 V, CH = 1000 pF, TA = 25ⴗC, unless otherwise noted.)

PKD01A/E PKD01F

24 37mV
23 36mV
80 150 80 250 nA
20 40 20 75 nA

RL = 10 kΩ, VO = ±10 V 18 25 10 25 V/mV

= 1 0.4 0.4 MHz

V

≤ +10 V 8090 7490 dB

CM

≤ ±18 V 8696 7696 dB

S

±10 ±11 ± 10 ±11 V

∆VIN = 20 V, DET = 1, RST = 0 66 80 66 80 dB

20 V Step, A
20 V Step, A

= [phone] µs

VCL

= +1 45 45 µs

VCL

0.5 1.5 1 3 mV
700 1000 700 1000 nA
75 300 75 300 nA

2kΩ Pull-Up Resistor to 5 V 5 7.5 3.5 7.5 V/mV

≤ +10 V 82 106 82 106 dB

CM

≤ ±18 V 7690 7690 dB

S

±11.5 ±12.5 ±11.5 ±12.5 V

I

≤ 5 mA, Logic GND = 0 V –0.2 +0.15 +0.4 –0.2 +0.15 +0.4 V

SINK

V

= 5 V 2580 2580µA

OUT

V

= 5 V 7 12 45 7 12 45 mA

OUT

5 mV Overdrive, 2 kΩ Pull-Up 150 150 ns
Resistor to 5 V

22V

0.8 0.8 V
VH = 3.5 V 0.02 1 0.02 1 µA
VL = 0.4 V 1.6 10 1.6 10 µA

TJ = 25°C 0.01 0.07 0.01 0.1 mV/ms
T

= 25°C 0.02 0.15 0.03 0.20 mV/ms

A

DET = 1

= 2.5 kΩ±11.5 ±12.5 ± 11 ±12 V

L

7 15 40 7 15 40 mA

75 75 ns

= 2.5 kΩ 2.5 2.5 V/µs

L

No Load 57 69mA

) temperature specifications

A

–2–

REV. A

PKD01

(@ VS = ⴞ15 V, CH = 1000 pF, –55ⴗC ≤ TA ≤ +125ⴗC for PKD01AY, –25ⴗC ≤ TA ≤ +85ⴗC for

ELECTRICAL CHARACTERISTICS

Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

” AMPLIFIERS A, B

“g

m

Zero-Scale Error V
Input Offset Voltage V
Average Input Offset Drift
Input Bias Current I
Input Offset Current I
Voltage Gain A
Common-Mode Rejection Ratio CMRR –10 V ≤ V
Power Supply Rejection Ratio PSRR ± 9 V ≤ V
Input Voltage Range
Slew Rate SR 0.4 0.4 V/µs
Acquisition Time to 0.1% Accuracy1t

COMPARATOR

Input Offset Voltage V
Average Input Offset Drift
Input Bias Current I
Input Offset Current I
Voltage Gain A
Common-Mode Rejection Ratio CMRR –10 V ≤ V
Power Supply Rejection Ratio PSRR ± 9 V ≤ V
Input Voltage Range
Low Output Voltage V
OFF Output Leakage Current I
Output Short-Circuit Current I
Response Time t

DIGITAL INPUTS – RST, DET

Logic “1” Input Voltage V
Logic “0” Input Voltage V
Logic “1” Input Current I
Logic “0” Input Current I

MISCELLANEOUS

Droop Rate

3

Output Voltage Swing

Amplifier C V

Short-Circuit Current

Amplifier C I
Switch Aperture Time t
Slew Rate: Amplifier C SR R
Power Supply Current I

NOTES

1

Guaranteed by design.

2

DET = 1, RST = 0.

3

Due to limited production test times, the droop current corresponds to junction temperature (T
point. Since most devices (in use) are on for more than 1 second, ADI specifies droop rate for ambient temperature (T
specification is correlated to the junction temperature (TJ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature.
Ambient (TA) temperature specifications are not subject to production testing.

Specifications subject to change without notice.

1

1

1

1

TCV

B

OS

V

AQ

TCV

B

OS

V

L

SC

S

2

INH

INL

V

SC

AP

SY

PKD01EY, PKD01FY and 0ⴗC ≤ TA ≤ +70ⴗC for PKD01EP, PKD01FP, unless otherwise noted.)

PKD01A/E PKD01F

ZS

OS

OS

47 612mV
36 510mV
–9 –24 –9 –24 µV/°C
160 250 160 500 nA
30 100 30 150 nA

V

CM

OS

RL = 10 kΩ, VO = ±10 V 7.5 9 5 9 V/mV

≤ +10 V 74 82 72 80 dB

CM

≤ ±18 V 80 90 70 90 dB

S

±10 ± 11 ±10 ±11 V

20 V Step, A

= +1 60 60 µs

VCL

2 2.5 2 5 mV

OS

–4 –6 –4 –6 µV/°C
1000 2000 1100 2000 nA
100 600 100 600 nA

V

CM

OL

2 kΩ Pull-Up Resistor to 5 V 4 6.5 2.5 6.5 V/mV

≤ +10 V 80 100 80 92 dB

CM

≤ ±18 V 72 82 72 86 dB

S

±11 ±11 V

I

≤ 5 mA, Logic GND = 0 V –0.2 +0.15 +0.4 –0.2 +0.15 +0.4 V

SINK

V

= 5 V 25 100 100 180 µA

OUT

V

= 5 V 6 10 45 6 10 45 mA

OUT

5 mV Overdrive, 2 kΩ Pull-Up
Resistor to 5 V 200 200 ns

H

L

22 V

0.8 0.8 V
VH = 3.5 V 0.02 1 0.02 1 µA
VL = 0.4 V 2.5 15 2.5 15 µA

DR

TJ = Max Operating Temp. 1.2 10 3 15 mV/ms
T

= Max Operating Temp.

A

DET = 1 2.4 20 6 20 mV/ms

OP

RL = 2.5 kΩ±11 ± 12 ± 10.5 ±12 V

6 12406 1240 mA

75 75 ns

= 2.5 kΩ 22V/µs

L

No Load 5.5 8 6.5 10 mA

). The droop current vs. time (after power-on) curve clarifies this

J

) also. The warmed-up (TA) droop current

A

REV. A

–3–

PKD01

WARNING!

ESD SENSITIVE DEVICE

ABSOLUTE MAXIMUM RATINGS

1, 2

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V

Input Voltage . . . . . . . . . . . . . . . . . . . Equal to Supply Voltage

Logic and Logic Ground

Voltage . . . . . . . . . . . . . . . . . . . . . . Equal to Supply Voltage

Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite

Amplifier A or B Differential Input Voltage . . . . . . . . . . ±24 V

Comparator Differential Input Voltage . . . . . . . . . . . . . ±24 V

Comparator Output Voltage

. . . . . . . . . . . . . . . . . . . . . . Equal to Positive Supply Voltage

Hold Capacitor Short-Circuit Duration . . . . . . . . . . Indefinite

Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300°C

Storage Temperature Range

PKD01AY, PKD01EY, PKD01FY . . . . . –65°C to +150°C

PKD01EP, PKD01FP . . . . . . . . . . . . . . . –65°C to +125°C

Operating Temperature Range

PKD01AY . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C

PKD01EY, PKD01FY . . . . . . . . . . . . . . . . –25°C to +85°C

PKD01EP, PKD01FP . . . . . . . . . . . . . . . . . . . 0°C to 70°C

Junction Temperature . . . . . . . . . . . . . . . . . –65°C to +150°C

NOTES

1

Absolute maximum ratings apply to both DICE and packaged parts, unless

otherwise noted.

2

Stresses above those listed under Absolute Maximum Ratings may cause perma­nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

1

Model

ORDERING GUIDE

2

Temperature Package Package
Range Description Option

PKD01AY –55°C to +85°C Cerdip Q-14
PKD01EY –25°C to +85°C Cerdip Q-14
PKD01FY –25°C to +85°C Cerdip Q-14
PKD01EP 0°C to 70°C Plastic DIP N-14
PKD01FP 0°C to 70°C Plastic DIP N-14

NOTES

1

Burn-in is available on commercial and industrial temperature range parts in
cerdip, plastic DIP, and TO-can packages.

2

For devices processed in total compliance to MIL-STD-883, add /883 after
part number. Consult factory for 883 data sheet.

PIN CONFIGURATION

RST

OUTPUT

–IN A

+IN A

V+

PKD01

C

H

V–

DET

LOGIC GND

COMP OUT

–IN C

+IN C

–IN B

+IN B

THERMAL CHARACTERISTICS

Package Type ␪JA* ␪

JC

Unit

14-Lead Hermetic DIP (Y) 99 12 °C/W
14-Lead Plastic DIP (P) 76 33 °C/W

*θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device

in socket for cerdip and PDIP packages.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the PKD01 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

DICE CHARACTERISTICS

–4–

REV. A

PKD01

WAFER TEST LIMITS

(@ VS = ⴞ15 V, CH = 1000 pF, TA = 25ⴗC, unless otherwise noted.)

PKD01N

Parameter Symbol Conditions Limit Unit

“g

” AMPLIFIERS A, B

m

Zero-Scale Error V
Input Offset Voltage V
Input Bias Current I
Input Offset Current I
Voltage Gain A

B

OS

ZS

OS

V

RL = 10 kΩ, VO = ±10 V 10 V/mV min

Common-Mode Rejection Ratio CMRR –10 V ≤ V
Power Supply Rejection Ratio PSRR ±9 V ≤ V
Input Voltage Range

1

V

CM

≤ +10 V 74 dB min

CM

≤ ±18 V 76 dB min

S

7mV max
6mV max
250 nA max
75 nA max

±11.5 V min

Feedthrough Error ∆VIN = 20 V, DET = 1, RST = 0 66 dB min

COMPARATOR

Input Offset Voltage V
Input Bias Current I
Input Offset Current I
Voltage Gain

1

OS

B

OS

A

V

2 kΩ Pull-Up Resistor to 5 V 3.5 V/mV min
Common-Mode Rejection Ratio CMRR –10 V ≤ V
Power Supply Rejection Ratio PSRR ±9 V ≤ V
Input Voltage Range
Low Output Voltage V

1

V

CM

OL

I

≤ 5 mA, Logic GND = 5 V 0.4 V max

SINK

≤ +10 V 82 dB min

CM

≤ ±18 V 76 dB min

S

3mV max
1000 nA max
300 nA max

±11.5 V min

–0.2 V min
“OFF” Output Leakage Current I
Output Short-Circuit Current I

L

SC

V

= 5 V 80 µA max

OUT

V

= 5 V 45 mA min

OUT

7 mA min

DIGITAL INPUTS–RST, DET

Logic “1” Input Voltage V
Logic “0” Input Voltage V
Logic “1” Input Current I
Logic “0” Input Current I

MISCELLANEOUS

Droop Rate

3

Output Voltage Swing Amplifier C V
Short-Circuit Current Amplifier C I

2

2V min

0.8 V max

40 mA max

V

H

L

INH

INL

DR

OP

SC

VH = 3.5 V 1 µA max
VL = 0.4 V 10 µA max

TJ = 25°C, 0.1 mV/ms max

= 25°C 0.20 mV/ms max

T

A

RL = 2.5 kΩ±11 V min

7 mA min
Power Supply Current I

AMPLIFIERS A, B

g

m

Slew Rate SR 0.5 V/µs
Acquisition Time

1

SY

t

A

t

A

No Load 9 mA max

0.1% Accuracy, 20 V Step, A

0.01% Accuracy, 20 V Step, A

= 1 41 µs

VCL

= 1 45 µs

VCL

COMPARATOR

Response Time 5 mV Overdrive, 2 kΩ Pull-Up Resistor to 5 V 150 ns

MISCELLANEOUS

Switch Aperture Time t
Switching Time t

AP

S

75 ns

50 ns
Buffer Slew Rate SR RL = 2.5 kΩ 2.5 V/µs

NOTES

1

Guaranteed by design.

2

DET = 1, RST = 0.

3

Due to limited production test times, the droop current corresponds to junction temperature (T
point. Since most devices (in use) are on for more than 1 second, ADI specifies droop rate for ambient temperature (T
specification is correlated to the junction temperature (TJ) value. ADI has a droop current cancellation circuit that minimizes droop current at high temperature.
Ambient (TA) temperature specifications are not subject to production testing.

). The droop current vs. time (after power-on) curve clarifies this

J

) also. The warmed-up (TA) droop current

A

REV. A

–5–

PKD01

–Typical Performance Characteristics

18

14

10

6

2

–2

–6

–10

INPUT RANGE OF AMPLIFIER – V

V– SUPPLY

–14

–18

46 18

SUPPLY VOLTAGE +V AND –V –V

INPUT + RANGE = V+
–55ⴗC

TA +125ⴗC

–55ⴗC

+25ⴗC

+125ⴗC

91215

TPC 1. A and B Input Range vs.
Supply Voltage

1000

100

10

INPUT NOISE VOLTAGE – nV/ Hz

RS = 10k⍀

RS = 0

6

4

2

0

–2

OFFSET VOLTAGE – mV

–4

–6

–75 –50 125–25 0 25 50 75 100

TEMPERATURE – ⴗC

TPC 2. A and B Amplifiers Offset
Voltage vs. Temperature

100

VS = 15V
T

= 25ⴗC

A

A

= +1

V

10

1

RMS NOISE – ␮V

40

35

30

25

– nA

20

OS

A,B I

15

10

5

0

–25 0 25 75 100 12550

–75 –50 150

TEMPERATURE – ⴗC

TPC 3. A, B IOS vs. Temperature

1.0

0.5

0

ERROR – mV

–0.5

+125ⴗC

+25ⴗC

–55ⴗC

0

110 1k100

FREQUENCY – Hz

TPC 4. Input Spot Noise vs.
Frequency

1.0
POLARITY OF
ERROR MAY BE
POSITIVE OR
NEGATIVE

0.5

0

ERROR – mV

–0.5

–1.0

–10 –50510

V

IN

+125ⴗC

– V

+25ⴗC

–55ⴗC

CH = 1000pF
T

= 25ⴗC

A

TPC 7. Amplifier A Charge Injec­tion Error vs. Input Voltage and
Temperature

0

0.1 1 10010
BANDWIDTH – kHz

1000

TPC 5. Wideband Noise vs.
Bandwidth

18

RL = 10k⍀

14

V+ SUPPLY

10

6

2

–2

–6

OUTPUT SWING – V

–10

V– SUPPLY

–14

–18

46 18

SUPPLY VOLTAGE +V AND –V – V

–55ⴗC

–55ⴗC

91215

+125ⴗC

+25ⴗC

+25ⴗC

+125ⴗC

TPC 8. Output Voltage Swing vs.
Supply Voltage (Dual Supply
Operation)

–1.0

–10 –50 510

– V

V

IN

TPC 6. Amplifier B Charge Injec­tion Error vs. Input Voltage and
Temperature

OUTPUT SWING – Volts

–10.0

–12.5

15

12.5

10.0

7.5

5.0

2.5

0

–2.5

–5.0

–7.5

–15

+25ⴗC

–55ⴗC

+125ⴗC

–55ⴗC

+25ⴗC

+125ⴗC

1.0 10.0
LOAD RESISTOR TO GROUND – k⍀

0.1

TPC 9. Output Voltage vs. Load
Resistance

–6–

REV. A