ANALOG DEVICES OP 193 FSZ Datasheet

Operational Amplifiers

OP193/OP293

NULL

1

–IN A

2

+IN A

3

V–

4

NC

8

V+

7

OUT A

6

NULL

5

NC = NO CONNECT

OP193

TOP VIEW

(Not to Scale)

00295-001

OUT A

1

–IN A

2

+IN A

3

V–

4

V+

8

OUT B

7

–IN B

6

+IN B

5

OP293

TOP VIEW

(Not to S cal e)

00295-002

Data Sheet

FEATURES

Operates from +1.7 V to ±18 V Low supply current: 15 µA/amplifier Low offset voltage: 100 µV maximum Outputs sink and source: ±8 mA No phase reversal Single- or dual-supply operation High open-loop gain: 600 V/mV Unity-gain stable

APPLICATIONS

Digital scales Strain gages Portable medical equipment Battery-powered instrumentation Temperature transducer amplifier

GENERAL DESCRIPTION

The OP193/OP293 are single-supply operational amplifiers that feature a combination of high precision, low supply current, and the ability to operate at low voltages. For high performance in single-supply systems, the input and output ranges include ground, and the outputs swing from the negative rail to within 600 mV of the positive supply. For low voltage operation, the

OP193/OP293 can operate down to +1.7 V or ±0.85 V.

The combination of high accuracy and low power operation make the OP193/OP293 useful for battery-powered equipment. The p a r t’s low current drain and low voltage operation allow it to continue performing long after other amplifiers have ceased functioning either because of battery drain or headroom.

The OP193/OP293 are specified for single +2 V through dual ±15 V operation over the extended (−40°C to +125°C) temperature range. They are available in SOIC surface-mount packages.

Precision, Micropower

PIN CONFIGURATIONS

Figure 1. 8-Lead SOIC_N

(S Suffix)

Figure 2. 8-Lead SOIC_N

(S Suffix)

Document Feedback

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

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OP193/OP293 Data Sheet

REVISION HISTORY

1/15—Rev. C to Rev. D

Changed Minimum Output Voltage Swing High Parameter

from 4.0 V to 3.9 V; Table 2 ............................................................. 4

Changes to Ordering Guide .......................................................... 18

9/09—Rev. B to Rev. C

Updated Format .................................................................. Universal

Deleted OP493 .................................................................... Universal

Changes to Features and General Description Sections .............. 1

Deleted 8-Lead Epoxy DIP Pin Configurations for OP193 and OP293, and 14-Lead Epoxy DIP and 16-Lead Wide Body SOL

Pin Configurations for OP493 ........................................................ 1

Changes to Offset Voltage Parameter and Large Signal Voltage Gain, R

Power Supply Rejection Ratio Parameter, Table 1 ........................ 3

Changes to Offset Voltage Parameter and Power Supply

Rejection Ratio Parameter, Table 2 ................................................ 4

Changes to Offset Voltage Parameter and Power Supply

Rejection Ratio Parameter, Table 3 ................................................ 6

Changes to Offset Voltage Parameter and Power Supply

Rejection Ratio Parameter, Table 4 ................................................ 7

Changes to Table 5 and Table 6 ....................................................... 8

= 100 kΩ, −10 V ≤ V

L

≤ +10 V Parameter, and

OUT

Input Overvoltage Protection ................................................... 14

Output Phase Reversal—OP193 ............................................... 14

Output Phase Reversal—OP293 ............................................... 14

Battery-Powered Applications .................................................. 14

A Micropower False-Ground Generator ................................. 15

A Battery-Powered Voltage Reference ..................................... 15

A Single-Supply Current Monitor ............................................ 15

A Single-Supply Instrumentation Amplifier .......................... 16

A Low Power, Temperature to 4 mA to 20 mA Transmitter ... 16

A Micropower Voltage Controlled Oscillator ........................ 17

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 18

Changes to Figure 3 to Figure 6 ....................................................... 9

Changes to Figure 10 and Figure 12............................................. 10

Changes to Functional Description Section and Figure 26 ...... 13

Deleted A Micropower, Single-Supply Quad Voltage Output

8-Bit DAC Section .......................................................................... 13

Deleted Figure 13; Renumbered Sequentially ............................ 14

Deleted A Single-Supply Micropower Quad Programmable-

Gain Amplifier Section .................................................................. 14

Changes to Output Phase Reversal—OP293 Section, Battery-

Powered Applications Section, and Figure 27 ............................ 14

Deleted Figure 14 ............................................................................ 15

Changes to Figure 31, A Single-Supply Current Monitor

Section, and Figure 32 .................................................................... 15

Changes to A Low Power, Temperature to 4 mA to 20 mA

Transmitter Section and Figure 35 ............................................... 16

Updated Outline Dimensions ....................................................... 18

Changes to Ordering Guide .......................................................... 18

1/02—Rev. A to Rev. B

Deletion of Wafer Test Limits Table ................................................ 5

Deletion of Dice Characteristics Images ........................................ 6

Edits to Ordering Guide ................................................................... 6

Rev. D | Page 2 of 20

Data Sheet OP193/OP293

Parameter

Symbol

Conditions

Min

Typ

Max

Min

Typ

Max

Unit

Input Voltage Range

VCM −14.9

+13.5

−14.9

+13.5

V

−40°C ≤ TA ≤ +125°C

150

150 V/mV

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

VS = ±15.0 V, TA = 25°C, unless otherwise noted.

Table 1.

E Grade F Grade

INPUT CHARACTERISTICS

Offset Voltage VOS OP193 150 μV OP193, −40°C ≤ TA ≤ +125°C 250 μV OP293 100 250 μV OP293, −40°C ≤ TA ≤ +125°C 200 350 μV Input Bias Current IB VCM = 0 V, −40°C ≤ TA ≤ +125°C 15 20 nA Input Offset Current IOS VCM = 0 V, −40°C ≤ TA ≤ +125°C 2 4 nA

Common-Mode Rejection CMRR −14.9 V ≤ VCM ≤ +14 V 100 116 97 116 dB

−14.9 V ≤ VCM ≤ +14 V,

−40°C ≤ T

≤ +125°C

A

Large Signal Voltage Gain AVO RL = 100 kΩ,

−10 V ≤ V

≤ +10 V 500 600 500 600 V/mV

OUT

−40°C ≤ TA ≤ +85°C 300 300 V/mV

−40°C ≤ TA ≤ +125°C 300 300 V/mV Large Signal Voltage Gain AVO RL = 10 kΩ,

−10 V ≤ V

≤ +10 V 350 350 V/mV

OUT

−40°C ≤ TA ≤ +85°C 200 200 V/mV

97 94 dB

Large Signal Voltage Gain AVO RL = 2 kΩ,

−10 V ≤ V

≤ +10 V 200 200 V/mV

OUT

−40°C ≤ TA ≤ +85°C 125 125 V/mV

−40°C ≤ TA ≤ +125°C 100 100 V/mV Long-Term Offset Voltage1 VOS 150 300 μV Offset Voltage Drift2 ΔVOS/ΔT 0.2 1.75 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage Swing High VOH IL = 1 mA 14.1 14.2 14.1 14.2 V IL = 1 mA, −40°C ≤ TA ≤ +125°C 14.0 14.0 V IL = 5 mA 13.9 14.1 13.9 14.1 V Output Voltage Swing Low VOL IL = −1 mA −14.7 −14.6 −14.7 −14.6 V IL = −1 mA,

−40°C ≤ T

A

≤ +125°C

−14.4 −14.4 V

IL = −5 mA +14.2 −14.1 +14.2 −14.1 V Short-Circuit Current ISC ±25 ±25 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = ±1.5 V to ±18 V 100 120 97 120 dB

−40°C ≤ TA ≤ +125°C 97 94 dB Supply Current per Amplifier ISY V

= 0 V, VS = ±18 V,

OUT

−40°C ≤ T

≤ +125°C, RL = ∞

A

30 30 μA

NOISE PERFORMANCE

Voltage Noise Density en f = 1 kHz 65 65 nV/√Hz Current Noise Density in f = 1 kHz 0.05 0.05 pA/√Hz Voltage Noise en p-p 0.1 Hz to 10 Hz 3 3 μV p-p

Rev. D | Page 3 of 20

OP193/OP293 Data Sheet

Input Offset Current

IOS

−40°C ≤ TA ≤ +125°C

2

4

nA

−40°C ≤ TA ≤ +85°C

50

V/mV

IL = −1 mA, −40°C ≤ TA ≤ +125°C

500

mV

E Grade F Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 15 15 V/ms Gain Bandwidth Product GBP 35 35 kHz Channel Separation V

1

Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3.

2

Offset voltage drift is the average of the −40°C to +25°C delta and the +25°C to +125°C delta.

= 5.0 V, VCM = 0.1 V, TA = 25°C, unless otherwise noted.

V

S

Table 2.

E Grade F Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage VOS OP193 150 μV OP193, −40°C ≤ TA ≤ +125°C 250 μV OP293 100 250 μV OP293, −40°C ≤ TA ≤ +125°C 200 350 μV Input Bias Current IB −40°C ≤ TA ≤ +125°C 15 20 nA

= 10 V p-p, RL = 2 kΩ,

OUT

f = 1 kHz

120 120 dB

Input Voltage Range VCM 0 4 0 4 V Common-Mode Rejection CMRR 0.1 V ≤ VCM ≤ 4 V 100 116 96 116 dB

0.1 V ≤ VCM ≤ 4 V,

−40°C ≤ T

≤ +125°C

A

92 92 dB

Large Signal Voltage Gain AVO RL = 100 kΩ,

0.03 V ≤ V

≤ 4.0 V 200 200 V/mV

OUT

−40°C ≤ TA ≤ +85°C 125 125 V/mV

−40°C ≤ TA ≤ +125°C 130 130 V/mV Large Signal Voltage Gain AVO RL = 10 kΩ,

0.03 V ≤ V

≤ 4.0 V 75 75 V/mV

OUT

−40°C ≤ TA ≤ +125°C 70 70 V/mV Long-Term Offset Voltage1 VOS 150 300 μV Offset Voltage Drift2 ΔVOS/ΔT 0.2 1.25 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage Swing High VOH IL = 100 μA 4.4 4.4 V IL = 1 mA 4.1 4.4 4.1 4.4 V IL = 1 mA,

−40°C ≤ TA ≤ +125°C 4.0 4.0 V IL = 5 mA 3.9 4.4 3.9 4.4 V Output Voltage Swing Low VOL IL = −100 μA 140 160 140 160 mV IL = −100 μA,

−40°C ≤ TA ≤ +125°C 220 220 mV No load 5 5 mV IL = −1 mA 280 400 280 400 mV

IL = –5 mA 700 900 700 900 mV Short-Circuit Current ISC ±8 ±8 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = ±1.7 V to ±6.0 V 100 120 97 120 dB

−40°C ≤ TA ≤ +125°C 94 90 dB Supply Current per Amplifier ISY VCM = 2.5 V, RL = ∞ 14.5 14.5 μA

Rev. D | Page 4 of 20

Data Sheet OP193/OP293

E Grade F Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

NOISE PERFORMANCE

Voltage Noise Density en f = 1 kHz 65 65 nV/√Hz Current Noise Density in f = 1 kHz 0.05 0.05 pA/√Hz Voltage Noise en p-p 0.1 Hz to 10 Hz 3 3 μV p-p

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 12 12 V/ms Gain Bandwidth Product GBP 35 35 kHz

1

Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3.

2

Offset voltage drift is the average of the −40°C to +25°C delta and the +25°C to +125°C delta.

Rev. D | Page 5 of 20

OP193/OP293 Data Sheet

Offset Voltage

VOS

OP193

150

μV

Output Voltage Swing Low

VOL

IL = −1 mA

280

400 280

400

mV

Supply Voltage Range

VS +2 ±18

+2 ±18

V

VS = 3.0 V, VCM = 0.1 V, TA = 25°C, unless otherwise noted.

Table 3.

E Grade F Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

INPUT CHARACTERISTICS

OP193, −40°C ≤ TA ≤ +125°C 250 μV OP293 100 250 μV OP293, −40°C ≤ TA ≤ +125°C 200 350 μV Input Bias Current IB −40°C ≤ TA ≤ +125°C 15 20 nA Input Offset Current IOS −40°C ≤ TA ≤ +125°C 2 4 nA Input Voltage Range VCM 0 2 0 2 V Common-Mode Rejection CMRR 0.1 ≤ VCM ≤ 2 V 97 116 94 116 dB

0.1 ≤ VCM ≤ 2 V,

Large Signal Voltage Gain AVO RL = 100 kΩ,

0.03 V ≤ V

−40°C ≤ TA ≤ +85°C 75 75 V/mV

−40°C ≤ TA ≤ +125°C 100 100 V/mV Long-Term Offset Voltage1 VOS 150 300 μV Offset Voltage Drift2 ΔVOS/ΔT 0.2 1.25 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage Swing High VOH IL = 1 mA 2.1 2.14 2.1 2.14 V IL = 1 mA, –40°C ≤ TA ≤ +125°C 1.9 1.9 V IL = 5 mA 1.9 2.1 1.9 2.1 V

90 87 dB

−40°C ≤ T

≤ +125°C

A

≤ 2 V 100 100 V/mV

OUT

IL = −1 mA, −40°C ≤ TA ≤ +125°C 500 500 mV IL = −5 mA 700 900 700 900 mV Short-Circuit Current ISC ±8 ±8 mA

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = +1.7 V to +6 V 100 97 dB

−40°C ≤ TA ≤ +125°C 94 90 dB Supply Current per Amplifier ISY VCM = 1.5 V, RL = ∞ 14.5 22 14.5 22 μA

−40°C ≤ TA ≤ +125°C 22 22 μA

NOISE PERFORMANCE

Voltage Noise Density en f = 1 kHz 65 65 nV/√Hz Current Noise Density in f = 1 kHz 0.05 0.05 pA/√Hz Voltage Noise

DYNAMIC PERFORMANCE

p-p

e

n

0.1 Hz to 10 Hz 3 3 μV p-p

Slew Rate SR RL = 2 kΩ 10 10 V/ms Gain Bandwidth Product GBP 25 25 kHz Channel Separation V

= 10 V p-p, RL = 2 kΩ,

OUT

120 120 dB

f = 1 kHz

1

Long-term offset voltage is guaranteed by a 1000 hour life test performed on three independent lots at 125 °C, with an LTPD of 1.3.

2

Offset voltage drift is the average of the –40°C to +25°C delta and the +25°C to +125°C delta.

Rev. D | Page 6 of 20

Data Sheet OP193/OP293

Offset Voltage

VOS

OP193

150

μV

VS = 2.0 V, VCM = 0.1 V, TA = 25°C, unless otherwise noted.

Table 4.

E Grade F Grade Parameter Symbol Conditions Min Typ Max Min Typ Max Unit

INPUT CHARACTERISTICS

OP193, −40°C ≤ TA ≤ +125°C 250 μV OP293 100 250 μV OP293, −40°C ≤ TA ≤ +125°C 175 350 μV Input Bias Current IB −40°C ≤ TA ≤ +125°C 15 20 nA Input Offset Current IOS −40°C ≤ TA ≤ +125°C 2 4 nA Input Voltage Range VCM 0 1 0 1 V Large Signal Voltage Gain A

0.03 V ≤ V

−40°C ≤ TA ≤ +125°C 70 70 V/mV Long-Term Offset Voltage VOS 150 300 μV

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = 1.7 V to 6 V 100 97 dB

−40°C ≤ TA ≤ +125°C 94 90 dB Supply Current/Amplifier ISY VCM = 1.0 V, RL = ∞ 13.2 20 13.2 20 μA

−40°C ≤ TA ≤ +125°C 25 25 μA Supply Voltage Range VS +2 ±18 +2 ±18 V

NOISE PERFORMANCE

Voltage Noise Density en f = 1 kHz 65 65 nV/√Hz Current Noise Density in f = 1 kHz 0.05 0.05 pA/√Hz Voltage Noise

DYNAMIC PERFORMANCE

Slew Rate SR RL = 2 kΩ 10 25 V/ms Gain Bandwidth Product GBP 25 kHz

RL = 100 kΩ,

VO

≤ 1 V 60 60 V/mV

OUT

e

p-p

n

0.1 Hz to 10 Hz 3 3 μV p-p

Rev. D | Page 7 of 20

OP193/OP293 Data Sheet

Lead Temperature (Soldering, 60 sec)

300°C

ABSOLUTE MAXIMUM RATINGS

Table 5.

Parameter Rating

Supply Voltage1 ±18 V Input Voltage1 ±18 V Differential Input Voltage1 ±18 V Output Short-Circuit Duration to GND Indefinite Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +125°C Junction Temperature Range −65°C to +150°C

1

For supply voltages less than ±18 V, the input voltage is limited to the

supply voltage.

Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

THERMAL RESISTANCE

θJA is specified for the worst-case conditions, that is, a device soldered in a circuit board for surface-mount packages.

Table 6. Thermal Resistance

Package Type θ

1

θJC Unit

JA

8-Lead SOIC_N (S) 158 43 °C/W

1

θJA is specified for the worst-case conditions. θJA is specified for a device

soldered in a circuit board for the SOIC package.

ESD CAUTION

Rev. D | Page 8 of 20

Data Sheet OP193/OP293

200

160

120

80

40

0

756030150–15–30–45–60–75 45

NUMBER OF AMP LIFIERS

OFFSET (µV)

V

S

= ±15V

T

A

= 25°C

00295-003

200

160

120

80

40

0

756030150–15–30–45–60–75

45

NUMBER OF AMP LIFIERS

OFFSET (µV)

V

S

= 3V VCM = 0.1V T

A

= 25°C

00295-004

150

120

90

60

30

0

1.00.60.40.20 0.8

NUMBER OF AMP LIFIERS

TCVOS (µV/°C)

VS = 3V V

CM

= 0.1V

–40°C ≤ T

A

≤ +125°C

00295-005

150

120

90

60

30

0

1.00.6

0.4

0.2

0 0.8

NUMBER OF AMP LIFIERS

TCV

OS

(µV/°C)

VS = ±15V

–40°C ≤ T

A

≤ +125°C

00295-006

1

–4

50

INPUT BIAS CURRE NT (nA)

COMMON-MODE VOLTAGE (V)

0

–1

–2

–3

1 2 3 4

V

S

= 5V

–40°C

+125°C

+25°C

00295-007

120

0

10k10

PSRR (dB)

FREQUENCY (Hz )

100

80

60

40

20

100

1k

–PSRR

+PSRR

5V ≤ V

S

≤ 30V

T

A

= 25°C

00295-008

TYPICAL PERFORMANCE CHARACTERISTICS

Figure 3. Offset Distribution, VS = ±15 V

Figure 4. Offset Distribution, VS = +3 V

Figure 6. TCVOS Distribution, VS = ±15 V

Figure 7. Input Bias Current vs. Common-Mode Voltage

Figure 5. TCVOS Distribution, VS = +3 V

Figure 8. PSRR vs. Frequency

Rev. D | Page 9 of 20

OP193/OP293 Data Sheet

120

0

10k10

CMRR (dB)

FREQUENCY (Hz )

100

80

60

40

20

100

1k

T

A

= 25°C

VS = ±15V

V

S

= +5V

00295-009

25

0

125–50

SLEW RATE (V/ms)

TEMPERATURE (°C)

20

15

10

5

–25

0 25 50 75 100

+SR = –SR VS = ±15V

+SR = –SR V

S

= +5V

00295-010

40

0

125–50

SHORT-CI RCUI T CURRENT (mA)

TEMPERATURE (°C)

30

20

10

–25 0 25 50 75 100

| –I

SC

|

V

S

= ±15V

+I

SC

V

S

= +5V

| –I

SC

|

VS = +5V

+I

SC

VS = ±15V

00295-011

0

–0.25

125

–50

INPUT OF FSET CURRENT ( nA)

TEMPERATURE (°C)

–25

0 25

50

75 100

–0.05

–0.10

–0.15

–0.20

V

S

= +2V

V

CM

= 0.1V

V

S

= ±15V

00295-012

0

–5

125–50

INPUT BIAS CURRE NT (nA)

TEMPERATURE (°C)

–25 0 25 50 75 100

–1

–2

–3

–4

VS = ±15V

VS = +2V V

CM

= 0.1V

00295-013

25

0

125–50

SUPPLY CURRENT (μA)

TEMPERATURE (°C)

20

15

10

5

–25 0 25 50 75 100

V

S

= ±18V

VS = +2V V

CM

= 1V

00295-014

Figure 9. CMRR vs. Frequency

Figure 10. Slew Rate vs. Temperature

Figure 12. Input Offset Current vs. Temperature

Figure 13. Input Bias Current vs. Temperature

Figure 11. Short-Circuit Current vs. Temperature

Figure 14. Supply Current vs. Temperature

Rev. D | Page 10 of 20

Data Sheet OP193/OP293

1k

1

1k0.1

VOLTAGE NOISE DENSITY (nV/ Hz)

FREQUENCY (Hz )

1 10 100

10

100

5V ≤ VS ≤ 30V

T

A

= 25°C

00295-015

1k

1

1k0.1

CURRENT NOISE DE NS ITY (pA/ Hz)

FREQUENCY (Hz )

1 10 100

10

100

5V ≤ VS ≤ 30V

T

A

= 25°C

00295-016

10k

1

10k0.1

DELTA FROM SUPPLY RAIL (mV)

CURRENT LOAD (µA)

5V ≤ V

S

≤ 30V

T

A

= 25°C

1 10 100 1k

10

100

1k

DELTA

FROM V

EE

DELTA

FROM V

CC

00295-017

2500

0

125–50

VOLTAGE GAIN (V/mV)

TEMPERATURE (°C)

2000

1500

1000

500

–25 0 25

50 75

100

V

S

= +5V

0.03V ≤ V

OUT

≤ 4V

V

S

= ±15V

–10V ≤ V

OUT

≤ +10V

00295-018

1000

0

125–50

VOLTAGE GAIN (V/mV)

TEMPERATURE (°C)

800

600

400

200

–25 0 25 50 75 100

V

S

= +5V

0.03V ≤ V

OUT

≤ 4V

VS = ±15V

–10V ≤ V

OUT

≤ +10V

00295-019

60

–20

100k10

GAIN (dB)

FREQUENCY (Hz )

100 1k 10k

40

20

0

V

S

= 5V

TA = 25°C

00295-020

Figure 15. Voltage Noise Density vs. Frequency

Figure 16. Current Noise Density vs. Frequency

Figure 18. Voltage Gain (RL = 100 kΩ) vs. Temperature

Figure 19. Voltage Gain (RL = 10 kΩ) vs. Temperature

Figure 17. Delta Output Swing vs. Current Load

Figure 20. Closed-Loop Gain vs. Frequency, VS = 5 V

Rev. D | Page 11 of 20

OP193/OP293 Data Sheet

60

–20

100k10

GAIN (dB)

FREQUENCY (Hz )

100 1k 10k

40

20

0

VS = ±15V T

A

= 25°C

00295-021

60

0

10k10

OVERSHOOT (%)

CAPACITIVE LOAD (pF)

100 1k

50

40

30

20

10

+OS RL =

∞

–OS RL =

∞

+OS = | –OS | R

L

= 50kΩ

+OS = | –OS | R

L

= 10kΩ

V

S

= 5V TA = 25°C AV = 1

50mV ≤ VIN ≤ 150mV

LOADS TO GND

00295-022

60

–20

–40

1M100

GAIN (dB)

PHASE (Degrees)

FREQUENCY (Hz )

1k 10k

100k

40

20

0

–45

–90

90

45

0

PHASE

GAIN

VS = 5V

00295-023

60

–20

–40

1M100

GAIN (dB)

PHASE (Degrees)

FREQUENCY (Hz )

1k 10k 100k

40

20

0

–45

–90

90

45

0

PHASE

GAIN

V

S

= ±15V

00295-024

Figure 21. Closed-Loop Gain vs. Frequency, VS = ±15 V

Figure 22. Small Signal Overshoot vs. Capacitive Load

Figure 23. Open-Loop Gain and Phase vs. Frequency

Figure 24. Open-Loop Gain and Phase vs. Frequency

Rev. D | Page 12 of 20

Data Sheet OP193/OP293

V

S

V

FUNCTIONAL DESCRIPTION

The OP193/OP293 operational amplifiers are single-supply, micropower, precision amplifiers whose input and output ranges both include ground. Input offset voltage (V maximum, while the output delivers ±5 mA to a load. Supply current is only 15 μA.

A simplified schematic of the input stage is shown in Figure 26. The input transistors, Q1 and Q2, are PNP devices, which permit the inputs to operate down to ground potential. The input transistors have resistors in series with the base terminals to protect the junctions from overvoltage conditions. The second stage is an NPN cascode that is buffered by an emitter follower before driving the final PNP gain stage.

The OP193 includes connections to taps on the input load resistors, which can be used to null the input offset voltage, V The OP293 have two additional transistors, Q7 and Q8. The behavior of these transistors is discussed in the Output Phase Reversal— and Output Phase Reversal— sections.

The output stage, shown in Figure 25, is a noninverting NPN totem-pole configuration. Current is sourced to the load by Emitter Follower Q1, while Q2 provides current sink capability. When Q2 saturates, the output is pulled to within 5 mV of ground without an external pull-down resistor. The totem-pole output stage supplies a minimum of 5 mA to an external load, even when operating from a single 3.0 V power supply.

+INPUT

–INPUT

) is only 100 μV

OS

2kΩ

Q1

.

OS

I1

Q2

+

Q4

FROM INPUT

TAGE

Q3

Q1

I1I2I3

Q2

Q5

OUTPUT

V–

00295-026

Figure 25. OP193/OP293 Equivalent Output Circuit

By operating as an emitter follower, Q1 offers a high impedance load to the final PNP collector of the input stage. Base drive to Q2 is derived by monitoring Q1’s collector current. Transistor Q5 tracks the collector current of Q1. When Q1 is on, Q5 keeps Q4 off, and Current Source I1 keeps Q2 turned off. When Q1 is driven to cutoff (that is, the output must move toward V−), Q5 allows Q4 to turn on. Q4’s collector current then provides the base drive for Q3 and Q2, and the output low voltage swing is set by Q2’s V

, which is about 5 mV.

CE,SAT

DRIVING CAPACITIVE LOADS

The OP193/OP293 amplifiers are unconditionally stable with capacitive loads less than 200 pF. However, the small signal, unity-gain overshoot improves if a resistive load is added. For example, transient overshoot is 20% when driving a 1000 pF, 10 kΩ load. When driving large capacitive loads in unity-gain configurations, an in-the-loop compensation technique is recommended, as illustrated in Figure 30.

+

I2 I3 I4

Q5

Q6

OP293 ONLY

Q7

R1

A

R1

B

NULLING

TERMINALS

(OP193 ONL Y)

Q8

R2

A

R2

B

Q3

Q4

D1

I5 I6

TO OUTPUT STAGE

V–

00295-025

Figure 26. OP193/OP293 Equivalent Input Circuit

Rev. D | Page 13 of 20

OP193/OP293 Data Sheet

LITHIUM SULFUR DIOXIDE

CELL VOLTAGE (V)

2

1

HOURS

3

4

0

OP293

OP193

0

1000

2000 3000 4000 5000

6000

7000

00295-027

V+

OP193

100kΩ

V–

2

3

1

5

6

4

7

00295-028

V+

OP193

100kΩ

V–

2

3

1

5

6

4

7

00295-029

INPUT OVERVOLTAGE PROTECTION

As previously mentioned, the OP193/OP293 op amps use a PNP input stage with protection resistors in series with the inverting and noninverting inputs. The high breakdown of the PNP transistors, coupled with the protection resistors, provides a large amount of input protection from overvoltage conditions. The inputs can therefore be taken 20 V beyond either supply without damaging the amplifier.

OUTPUT PHASE REVERSAL—OP193

The OP193’s input PNP collector-base junction can be forwardbiased if the inputs are brought more than one diode drop (0.7 V) below ground. When this happens to the noninverting input, Q4 of the cascode stage turns on and the output goes high. If the positive input signal can go below ground, phase reversal can be prevented by clamping the input to the negative supply (that is, GND) with a diode. The reverse leakage of the diode does add to the input bias current of the amplifier. If input bias current is not critical, a 1N914 diode adds less than 10 nA of leakage. However, its leakage current doubles for every 10°C increase in ambient temperature. For critical applications, the collector-base junction of a 2N3906 transistor adds only about 10 pA of additional bias current. To limit the current through the diode under fault conditions, a 1 kΩ resistor is recommended in series with the input. (The OP193’s internal current limiting resistors do not protect the external diode.)

OUTPUT PHASE REVERSAL—OP293

The OP293 includes two lateral PNP transistors, Q7 and Q8, to protect against phase reversal. If an input is brought more than one diode drop (≈0.7 V) below ground, Q7 and Q8 combine to level shift the entire cascode stage, including the bias to Q3 and Q4, simultaneously. In this case, Q4 does not saturate and the output remains low.

The OP293 does not exhibit output phase reversal for inputs up to −5 V below V− at +25°C. The phase reversal limit at +125°C is about −3 V. If the inputs can be driven below these levels, an external clamp diode, as discussed in the previous section, should be added.

OP193/OP293 can be operated over the entire useful life of the

cell. Figure 27 shows the typical discharge characteristic of a 1 Ah lithium cell powering the OP193 and OP293, with each amplifier, in turn, driving 2.1 V into a 100 kΩ load.

Figure 27. Lithium Sulfur Dioxide Cell Discharge Characteristic with

OP193/OP293 and 100 kΩ Loads Input Offset Voltage Nulling

The OP193 provides two offset nulling terminals that can be used to adjust the OP193’s internal V

. In general, operational

OS

amplifier terminals should never be used to adjust system offset voltages. The offset nulling circuit of Figure 28 provides about ±7 mV of offset adjustment range. A 100 kΩ resistor placed in series with the wiper arm of the offset null potentiometer, as shown in Figure 29, reduces the offset adjustment range to 400 μV and is recommended for applications requiring high null resolution. Offset nulling does not adversely affect TCV

performance,

OS

providing that the trimming potentiometer temperature coefficient does not exceed ±100 ppm/°C.

BATTERY-POWERED APPLICATIONS

OP193/OP293 series op amps can be operated on a minimum

supply voltage of 1.7 V, and draw only 13 μA of supply current per amplifier from a 2.0 V supply. In many battery-powered cir-

Figure 28. Offset Nulling Circuit

cuits, OP193/OP293 devices can be continuously operated for thousands of hours before requiring battery replacement, thus reducing equipment downtime and operating cost.

High performance portable equipment and instruments frequently use lithium cells because of their long shelf life, light weight, and high energy density relative to older primary cells. Most lithium cells have a nominal output voltage of 3 V and are noted for a flat discharge characteristic. The low supply voltage requirement of the OP193/OP293, combined with the flat discharge characteristic of the lithium cell, indicates that the

Figure 29. High Resolution Offset Nulling Circuit

Rev. D | Page 14 of 20

Data Sheet OP193/OP293

OP193

2

3

6

7

5V OR 12V

2.5V OR 6V

+

4

10kΩ

100Ω

0.022µF

240kΩ

1µF

00295-030

3

OP193

2

4

5

6

7

V

BE2

Q1

V+ (2.5V TO 36V )

Q2

1

2

3

7

6

5

MAT01AH

R3

68kΩ

V1

R2

1.5MΩ

V

OUT

(1.23V @ 25°C)

C1 1000pF

R1

240kΩ

V

BE1

+

–

+

–

+

–

ΔV

BE

R4

130kΩ

R5, 20kΩ

OUTPUT

ADJUST

00295-031

TO CIRCUIT

UNDER TEST

V+

OP193

3

2

1

5

6

4

7

+

–

V

OUT

=

100mV/mA(I

TEST

)

R4

9.9kΩ

R2

100kΩ

I

TEST

R1

1Ω

R5

100ΩR3100kΩ

00295-032

A MICROPOWER FALSE-GROUND GENERATOR

Some single-supply circuits work best when inputs are biased above ground, typically at ½ of the supply voltage. In these cases, a false ground can be created by using a voltage divider buffered by an amplifier. One such circuit is shown in Figure 30.

This circuit generates a false-ground reference at ½ of the supply voltage, while drawing only about 27 μA from a 5 V supply. The circuit includes compensation to allow for a 1 μF bypass capacitor at the false-ground output. The benefit of a large capacitor is that not only does the false ground present a very low dc resistance to the load, but its ac impedance is low as well. The OP193 can both sink and source more than 5 mA, which improves recovery time from transients in the load current.

Figure 30. A Micropower False-Ground Generator

A BATTERY-POWERED VOLTAGE REFERENCE

The circuit of Figure 31 is a battery-powered voltage reference that draws only 17 μA of supply current. At this level, two AA alkaline cells can power this reference for more than 18 months. At an output voltage of 1.23 V at 25°C, drift of the reference is only 5.5 μV/°C over the industrial temperature range. Load regulation is 85 μV/mA with line regulation at 120 μV/V.

Design of the reference is based on the Brokaw band gap core technique. Scaling of Resistor R1 and Resistor R2 produces unequal currents in Q1 and Q2. The resulting ΔV creates a temperature-proportional voltage (PTAT), which, in turn, produces a larger temperature-proportional voltage across R4 and R5, V1. The temperature coefficient of V1 cancels (first order) the complementary to absolute temperature (CTAT) coefficient of V voltage temperature coefficient is at a minimum. Band gap references can have start-up problems. With no current in R1 and R2, the OP193 is beyond its positive input range limit and has an undefined output state. Shorting Pin 5 (an offset adjust pin) to ground forces the output high under these circumstances

. When adjusted to 1.23 V at 25°C, output

BE1

and ensures reliable startup without significantly degrading the

OP193’s offset drift.

across R3

BE

A SINGLE-SUPPLY CURRENT MONITOR

Current monitoring essentially consists of amplifying the voltage drop across a resistor placed in series with the current to be measured. The difficulty is that only small voltage drops can be

Rev. D | Page 15 of 20

tolerated, and with low precision op amps, this greatly limits the overall resolution. The single-supply current monitor of Figure 32 has a resolution of 10 μA and is capable of monitoring 30 mA of current. This range can be adjusted by changing the current sense resistor, R1. When measuring total system current, it may be necessary to include the supply current of the current monitor, which bypasses the current sense resistor, in the final result. This current can be measured and calibrated (together with the residual offset) by adjustment of the offset trim potentiometer, R2. This produces a deliberate temperature dependent offset. However, the supply current of the OP193 is also proportional to temperature, and the two effects tend to track. Voltage developed at the noninverting input and amplified by (1 + R4/R5) appears at V

Figure 31. A Battery-Powered Voltage Reference

.

OUT

Figure 32. Single-Supply Current Monitor

OP193/OP293 Data Sheet

5V

V+

V–

5V

+

–

+

–

V+

V–

R1

20kΩ

R2

1.98MΩ

–IN

+IN

V

OUT

R4

1.98MΩ

R3

20kΩ

I

SINK

A1

1/2 OP293

A2

1/2 OP293

00295-033

5V

V+

V–

5V

Q1 Q2

5V

+

–

+

–

V+

V–

R1

20kΩ

R2

1.98MΩ

A1

1/2 OP293

A2

1/2 OP293

–IN

+IN

V

OUT

R3

20kΩ

10kΩ

R4

1.98MΩ

VN2222

00295-034

( )



 





 



×

++

−

×

+×

+

102

762

102

76

RR

RRR

V

RR

RRV

I

SET

TEMP

OUT

( )

10276R

R

RR

T

V

T

I

TEMP

OUT

×

+

∆

=

∆

NOTES

1. ALL RESISTORS 1/ 4 W, 5% UNLESS OTHERWISE NOTED.

SPAN TRIM

8

4

V

TEMP

2N1711

1

2

3

REF43GPZ

6

5

7

1N4002

R

LOAD

I

OUT

V+

8V TO 40V

R10

100Ω

1%, 1/2 W

R8

1kΩ

R9

100kΩ

V

SET

R4

20kΩ

R6

3kΩ

R7

5kΩ

ZERO TRIM

R5

5kΩ

R2

1kΩ

1/2

OP293

–

+

1/2

OP293

–

+

R3

100kΩ

R1, 10kΩ

V

IN

V

OUT

TEMP

GND

2

6

3

4

00295-035

A SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER

Designing a true single-supply instrumentation amplifier with zero-input and zero-output operation requires special care. The traditional configuration, shown in Figure 33, depends upon Amplifier A1’s output being at 0 V when the applied commonmode input voltage is at 0 V. Any error at the output is multiplied by the gain of A2. In addition, current flows through Resistor R3 as A2’s output voltage increases. A1’s output must remain at 0 V while sinking the current through R3, or a gain error results. With a maximum output voltage of 4 V, the current through R3 is only 2 μA, but this still produces an appreciable error.

Figure 33. A Conventional Instrumentation Amplifier

One solution to this problem is to use a pull-down resistor. For example, if R3 = 20 kΩ, then the pull-down resistor must be less than 400 Ω. However, the pull-down resistor appears as a fixed load when a common-mode voltage is applied. With a 4 V common-mode voltage, the additional load current is 10 mA, which is unacceptable in a low power application.

Figure 34 shows a better solution. A1’s sink current is provided by a pair of N-channel FET transistors, configured as a current mirror. With the values shown, the sink current of Q2 is about 340 μA. Thus, with a common-mode voltage of 4 V, the additional load current is limited to 340 μA vs. 10 mA with a 400 Ω resistor.

, 0 V

Figure 34. An Improved Single-Supply, 0 V

Instrumentation Amplifier

IN

OUT

A LOW POWER, TEMPERATURE TO 4 mA TO 20 mA TRANSMITTER

A simple temperature to 4 mA to 20 mA transmitter is shown in Figure 35. After calibration, this transmitter is accurate to ±0.5°C over the −50°C to +150°C temperature range. The transmitter operates from 8 V to 40 V with supply rejection better than 3 ppm/V. One half of the OP293 is used to buffer the TEMP pin, and the other half regulates the output current to satisfy the current summation at its noninverting input.

The change in output current with temperature is the derivative of the following transfer function:

Figure 35. Temperature to 4 mA to 20 mA Transmitter

Rev. D | Page 16 of 20

Data Sheet OP193/OP293

( )

mA4+−



 





 



∆

=

MIN

AMBIENT

OPERATING

FS

OUT

TT

T

I

8

4

1

2

3

6

5

7

5V

S3

S4

S1

1

IN/OUT

2

OUT/IN

CONT

12

OUT/IN

10

3

OUT/IN

S2

CONT

13

4

IN/OUT

6

CONT

5

CONT

7

IN/OUT

8

IN/OUT

11

OUT/IN

9

14

5V

CD4066

5V

–

+

–

+

5V

SQUARE

OUT

TRIANGLE

OUT

A1

1/2 OP293

A2

1/2 OP293

C1

75nF

R5

200kΩ

R1

200kΩ

R7

200kΩ

R6

200kΩ

R8

200kΩ

R4

200kΩ

R3

100kΩ

R2

200kΩ

V

CONTROL

V

DD

V

SS

00295-036

From the formulas, it can be seen that if the span trim is adjusted before the zero trim, the two trims are not interactive, which greatly simplifies the calibration procedure.

Calibration of the transmitter is simple. First, the slope of the output current vs. temperature is calibrated by adjusting the span trim, R7. A couple of iterations may be required to be sure the slope is correct.

When the span trim has been adjusted, the zero trim can be made. Adjusting the zero trim does not affect the gain.

The zero trim can be set at any known temperature by adjusting R5 until the output current equals:

Tabl e 7 shows the values of R6 required for various temperature ranges.

Table 7. R6 Values vs. Temperature

Temp Range R6

0°C to 70°C 10 kΩ

−40°C to +85°C 6.2 kΩ

−55°C to +150°C 3 kΩ

A MICROPOWER VOLTAGE CONTROLLED OSCILLATOR

The OP293 CMOS analog switch forms the precision VCO of Figure 36. This circuit provides triangle and square wave outputs and draws only 50 μA from a single 5 V supply. A1 acts as an integrator; S1 switches the charging current symmetrically to yield positive and negative ramps. The integrator is bounded by A2, which acts as a Schmitt trigger with a precise hysteresis of 1.67 V, set by Resistor R5, Resistor R6, and Resistor R7, and associated CMOS switches. The resulting output of A1 is a triangle wave with upper and lower levels of 3.33 V and 1.67 V. The output of A2 is a square wave with almost rail-to-rail swing. With the components shown, frequency of operation is given by the equation:

However, the frequency can easily be changed by varying C1. The circuit operates well up to 500 Hz.

f

= V

OUT

CONTROL

V × 10 Hz/V

Figure 36. Micropower Voltage Controlled Oscillator

Rev. D | Page 17 of 20

OP193/OP293 Data Sheet

C

O

N

T

R

O

L

I

N

G

D

I

M

E

N

S

I

O

N

S A

RE

I

N M

I

LL

IM

E

TE

RS

;

IN

CH

D

IM

E

NS

IO

N

S

(

I

N

P

A

R

E

N

T

H

E

S

E

S

)

A

R

E

R

O

U

N

D

ED

-

OF

F M

I

LL

IM

E

TE

R

EQ

UI

V

AL

EN

T

S F

OR

R

E

F

E

R

E

N

C

E

O

N

L

Y

A

N

D

A

R

E

N

O

T

A

P

R

OP

RI

A

TE

F

OR

US

E

IN

DE

S

IG

N.

CO

MP

L

IA

N

T T

O J

E

DE

C S

T

AN

DA

R

DS

M

S-

01

2

-

A

0

1

2

4

0

7-

A

0

.2

5

(0

.0

0

98

)

0

.

1

7

(

0

.

0

6

7

)

1

.

27

(0

.

05

00

)

0

.

4

0

(

0

.

0

1

5

7

)

0

.

5

0

(

0

.

0

1

9

6

)

0.

2

5

(

0

.

0

9

)

45

°

8

°

0°

1

.

7

5

(

0

.

0

6

8

)

1.

3

5

(

0

.

0

5

3

2

)

S

E

A

T

I

N

G

P

L

A

N

E

0

.

2

5

(

0

.

0

9

8

)

0

.

10

(0

.

00

4

0

)

4

1

8

5

5.

0

0(

0.

1

96

8)

4

.

8

0

(

0

.

1

8

9

0

)

4

.0

0 (

0

.

1

5

7

4

)

3

.

8

0

(

0

.

1

4

9

7

)

1

.

2

7

(

0

.

0

5

0

)

B

S

C

6

.

2

0

(

0

.

2

4

1

)

5

.8

0 (

0

.

2

8

4

)

0

.

5

1

(

0

.

0

2

0

1

)

0

.

3

1

(

0

.0

1

22

)

C

O

P

L

A

N

A

R

I

T

Y

0

.

1

0

OP293FSZ-REEL

−40°C to +125°C

8-Lead SOIC_N

S-Suffix (R-8)

OUTLINE DIMENSIONS

Figure 37. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body (R-8)

Dimensions shown in millimeters and (inches)

ORDERING GUIDE

Model1 Temperature Range Package Description Package Option

OP193FS-REEL −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP193FSZ −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP193FSZ-REEL −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP193FSZ-REEL7 −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP293ESZ −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP293ESZ-REEL −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP293ESZ-REEL7 −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8) OP293FSZ −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8)

OP293FSZ-REEL7 −40°C to +125°C 8-Lead SOIC_N S-Suffix (R-8)

1

Z = RoHS Compliant Part.

Rev. D | Page 18 of 20

Data Sheet OP193/OP293

NOTES

Rev. D | Page 19 of 20

OP193/OP293 Data Sheet

NOTES

registered trademarks are the property of their respective owners. D00295-0-1/15(D)

Rev. D | Page 20 of 20

ANALOG DEVICES OP 193 FSZ Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

PIN CONFIGURATIONS

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ELECTRICAL SPECIFICATIONS

ABSOLUTE MAXIMUM RATINGS

THERMAL RESISTANCE

ESD CAUTION

TYPICAL PERFORMANCE CHARACTERISTICS

FUNCTIONAL DESCRIPTION

DRIVING CAPACITIVE LOADS

INPUT OVERVOLTAGE PROTECTION

OUTPUT PHASE REVERSAL—OP193

OUTPUT PHASE REVERSAL—OP293

BATTERY-POWERED APPLICATIONS

A MICROPOWER FALSE-GROUND GENERATOR

A BATTERY-POWERED VOLTAGE REFERENCE

A SINGLE-SUPPLY CURRENT MONITOR

A SINGLE-SUPPLY INSTRUMENTATION AMPLIFIER

A LOW POWER, TEMPERATURE TO 4 mA TO 20 mA TRANSMITTER

A MICROPOWER VOLTAGE CONTROLLED OSCILLATOR

OUTLINE DIMENSIONS

ORDERING GUIDE