Datasheet OP07D Datasheet (ANALOG DEVICES)

现货库存、技术资料、百科信息、热点资讯，精彩尽在鼎好!

FEATURES

Low offset voltage: 150 µV max
Input offset drift: 1.5 µV/°C max
Low noise: 0.25 V p-p
High gain CMRR and PSRR: 115 dB min
Low supply current: 1.1 mA
Wide supply voltage range: ±4 V to ±18 V operation

APPLICATIONS

Medical and industrial instrumentation
Sensors and controls

Thermocouple
RTDs
Strain bridges
Shunt current measurements

Precision filters

GENERAL DESCRIPTION

150 μV Maximum Offset Voltage Op Amp

OP07D

PIN CONFIGURATIONS

1

NULL

–IN

+IN

Figure 1. 8-Lead SOIC_N (R-8), 8-Lead DIP (N-8)

OP07D

2

TOP VIEW

3

(Not to Scale)

4

V–

NC = NO CO NNECT

8

NULL

7

V+

6

OUT

5

NC

05867-001

The OP07D is a precision, ultralow offset amplifier. It integrates
low power (1.1 mA typical), low input bias current (±1 nA
maximum), and high CMRR/PSRR (130 dB) in the small DIP
package. Operation is fully specified from ±5 V to ±15 V supply.

The OP07D provides higher accuracy than industry-standard
OP07-type amplifiers due to Analog Devices’ iPolar™ process,
which supports enhanced performance in a smaller footprint.
These performance enhancements include wider output swing,
lower power, and higher CMRR (common-mode rejection
ratio) and PSRR (power supply rejection ratio). The OP07D
maintains stability of offsets and gain virtually regardless of
variations in time or temperature. Excellent linearity and gain
accuracy can be maintained at high closed-loop gains.

The OP07D is fully specified over the extended industrial tem­perature range of −40°C to +125°C. The OP07D amplifier is
available in 8-lead DIP and the popular 8-lead, narrow SOIC
lead-free packages.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2005 Analog Devices, Inc. All rights reserved.

OP07D

TABLE OF CONTENTS

Features .............................................................................................. 1

Absolute Maximum Ratings ............................................................5

Applications....................................................................................... 1

General Description......................................................................... 1

Pin Configurations ........................................................................... 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

REVISION HISTORY

12/05—Revision 0: Initial Version

Thermal Resistance .......................................................................5

ESD Caution...................................................................................5

Typical Perf or m an c e Charac t e r istics ..............................................6

Outline Dimensions ....................................................................... 13

Ordering Guide .......................................................................... 14

Rev. 0 | Page 2 of 16

OP07D

SPECIFICATIONS

VS = ±5.0 V, TA = 25°C, unless otherwise specified.

Table 1.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage V

OS

0°C ≤ TA ≤ 70°C 250 μV

−40°C ≤ TA ≤ +125°C 350 μV
Input Bias Current

I

B

−40°C ≤ TA ≤ +125°C 1 nA
Input Offset Current I

OS

−40°C ≤ TA ≤ +125°C 1 nA
Input Voltage Range −3.5 +3.5 V
Common-Mode Rejection Ratio CMRR VCM = ±3 V 120 127 dB

−40°C ≤ TA ≤ +125°C 120 dB
Open-Loop Gain A

VO

−40°C ≤ TA ≤ +125°C 1000 V/mV
Offset Voltage Drift

ΔV

OS

/ΔT

−40°C ≤ TA ≤ +125°C 0.5 1.4 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage Swing V

OUT

−40°C ≤ TA ≤ +125°C ±3.95 V

R

−40°C ≤ TA ≤ +125°C ±3.9 V
Short-Circuit Current I
Output Current I

SC

O

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = ±4.0 V to ±18.0 V 115 130 dB
0°C ≤ TA ≤ 70°C 115 dB

−40°C ≤ TA ≤ +125°C 110 dB
Supply Current/Amplifier I

SY

0°C ≤ TA ≤ 70°C 1.45 mA

−40°C ≤ TA ≤ +125°C 1.75 mA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 10 kΩ 0.2 V/μs
Gain Bandwidth Product GBP 0.6 MHz
Phase Margin 80 Degrees

NOISE PERFORMANCE

Voltage Noise e
Voltage Noise Density e

Current Noise Density i

n p-p

n

n

40 150 μV

0.2 1 nA

0.1 1 nA

RL = 2 kΩ to ground, VO = ±3 V 1000 10,000 V/mV

0°C ≤ T

≤ 70°C 0.5 1.8 μV/°C

A

RL = 10 kΩ to ground ±3.95 ±4.1 V

= 2 kΩ to ground ±3.9 ±4 V

L

27 mA
VO = 3.5 V 15 mA

VO = 0 V 1.1 1.25 mA

0.1 Hz to 10 Hz 0.28 μV p-p
f = 1 kHz 10

f = 1 kHz 0.074

nV/√Hz
pA/√Hz

Rev. 0 | Page 3 of 16

OP07D

VS = ±15 V, TA = 25°C, unless otherwise specified.

Table 2.

Parameter Symbol Test Conditions/Comments Min Typ Max Unit

INPUT CHARACTERISTICS

Offset Voltage V

OS

0°C ≤ TA ≤ 70°C 250 μV

−40°C ≤ TA ≤ +125°C 350 μV
Input Bias Current

I

B

−40°C ≤ TA ≤ +125°C 1 nA
Input Offset Current I

OS

−40°C ≤ TA ≤ +125°C 1 nA
Input Voltage Range −13.5 +13.5 V
Common-Mode Rejection Ratio CMRR VCM = ±13.0 V 120 140 dB

−40°C ≤ TA ≤ +125°C 120 dB
Open-Loop Gain A

VO

−40°C ≤ TA ≤ +125°C 1000 V/mV
Offset Voltage Drift

ΔV

OS

/ΔT

−40°C ≤ TA ≤ +125°C 0.5 1.5 μV/°C

OUTPUT CHARACTERISTICS

Output Voltage Swing V

OUT

−40°C ≤ TA ≤ +125°C ±13.9 V

R

−40°C ≤ TA ≤ +125°C ±13.7 V
Short-Circuit Current I
Output Current I

SC

O

POWER SUPPLY

Power Supply Rejection Ratio PSRR VS = ±4.0 V to ±18.0 V 115 130 dB
0°C ≤ TA ≤ 70°C 115 dB

−40°C ≤ TA ≤ +125°C 110 dB
Supply Current/Amplifier I

SY

0°C ≤ TA ≤ 70°C 1.55 mA

−40°C ≤ TA ≤ +125°C 1.85 mA

DYNAMIC PERFORMANCE

Slew Rate SR RL = 10 kΩ 0.2 V/μs
Gain Bandwidth Product GBP 0.6 MHz
Phase Margin 80 Degrees

NOISE PERFORMANCE

Voltage Noise e
Voltage Noise Density e

Current Noise Density i

n p-p

n

n

45 150 μV

0.2 1 nA

0.2 1 nA

RL = 2 kΩ to ground, VO = ±11 V 1000 10,000 V/mV

0°C ≤ T

≤ 70°C 0.5 2.5 μV/°C

A

RL = 10 kΩ to ground ±13.95 +14 V

= 2 kΩ to ground ±13.75 +13.8 V

L

30 mA
VO = 13.5 V 15 mA

VO = 0 V 1.1 1.3 mA

0.1 Hz to 10 Hz 0.25 μV p-p
f = 1 kHz 10

f = 1 kHz 0.074

nV/√Hz
pA/√Hz

Rev. 0 | Page 4 of 16

OP07D

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter Rating

Supply Voltage ±18 V
Input Voltage ±V supply
Differential Input Voltage ±0.7 V
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) +300°C

Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.

THERMAL RESISTANCE

θJA is specified for worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.

Table 4.

Package Type θ

8-Lead DIP (N-8) 103 43 °C/W
8-Lead SOIC (R-8) 158 43 °C/W

JA

θJC Unit

ESD CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.

Rev. 0 | Page 5 of 16

OP07D

TYPICAL PERFORMANCE CHARACTERISTICS

50

45

40

35

30

25

20

15

NUMBER OF AMPLIFIERS

10

5

0

–100 –80 –60 –40 –20 0 20 40 60 80 100

VOS (µV)

Figure 2. Number of Amplifiers vs. Offset Voltage

VS = ±15V

05867-003

45

40

35

30

25

20

15

NUMBER OF AMPLIFIERS

10

5

0

011.050.900.750.600.450.300.15

TCVOS (µV/°C)

Figure 5. Number of Amplifiers vs. TCV

VS = ±15V

.20

05867-048

OS

40

35

30

25

20

15

NUMBER OF AMPLIFIERS

10

5

0

–100 –80 –60 –40 –20 0 20 40 60 80 100

VOS (µV)

Figure 3. Number of Amplifiers vs. Offset Voltage

50

40

30

VS = ±5V

VS = ±5V

200

150

100

50

(µV)

0

OS

V

–50

–100

–150

–200

–50 0 50 100 150

05867-004

TEMPERATURE (° C)

VS = ±15V

05867-005

Figure 6. Offset Voltage vs. Temperature

200

150

100

50

VS = ±5V

NUMBER OF AMPLI FIE RS

20

10

0

010.900.750.600.450.300.15

TCVOS (µV/°C)

Figure 4. Number of Amplifiers vs. TCV

(µV)

OS

V

–50

–100

–150

.05

05867-047

OS

–200

Rev. 0 | Page 6 of 16

0

–50 0 50 100 150

TEMPERATURE (° C)

Figure 7. Offset Voltage vs. Temperature

05867-006

OP07D

–

–

1.6

1.4

1.2

1.0

(mA)

SY

I

0.8

0.6

0.4
–50 0 50 100 150

VS = ±15V

VS = ±5V

TEMPERATURE (°C)

Figure 8. Supply Current vs. Temperature

13.92

–13.94

–13.96

–13.98

–14.00

(V)

OL

–14.02

V

–14.04

–14.06

–14.08

–14.10

–50 0 50 100 150

05867-007

TEMPERATURE ( °C)

Figure 11. Negative Output Voltage Swing vs. Temperature

V

S

R

L

= ±15V
= 10kΩ

05867-011

14.40

14.35

14.30

(V)

14.25

OH

V

14.20

14.15

14.10
–50 0 50 100 150

TEMPERATURE (° C)

VS = ±15V
R

Figure 9. Positive Output Voltage Swing vs. Temperature

4.45
V

= ±5V

S

= 10kΩ

R

L

4.40

4.35

(V)

4.30

OH

V

4.25

= 10kΩ

L

3.98

–4.00

–4.02

–4.04

–4.06

(V)

OL

–4.08

V

–4.10

–4.12

–4.14

–4.16

–50 0 50 100 150

05867-009

TEMPERATURE ( °C)

V

S

R

L

= ±5V
= 10kΩ

05867-012

Figure 12. Negative Output Voltage Swing vs. Temperature

0

–0.1

–0.2

(nA)

B

I

–0.3

V

S

= ±15V

4.20

4.15

–50 0 50 100 150

TEMPERATURE (° C)

Figure 10. Positive Output Voltage Swing vs. Temperature

05867-010

–0.4

–0.5

–50 0 50 100 150

TEMPERATURE ( °C)

Figure 13. Input Bias Current vs. Temperature

05867-013

Rev. 0 | Page 7 of 16

OP07D

0

–0.05

–0.10

–0.15

–0.20

(nA)

B

I

–0.25

–0.30

–0.35

V

= ±5V

S

150

VS = ±4V TO ± 18V

140

PSRR (dB)

130

–0.40

–50 0 50 100 150

TEMPERATURE ( °C)

Figure 14. Input Bias Current vs. Temperature

146

144

142

140

138

134

134

CMRR (dB)

132

130

128

126

124

–50 0 50 100 150

VS = ±15V

= ±5V

V

S

TEMPERATURE ( °C)

Figure 15. CMRR vs. Temperature

120

–50 0 50 100 150

05867-014

TEMPERATURE ( °C)

05867-019

Figure 17. PSRR vs. Temperature

40

= ±15V

V

S

30

(mA)

SC

I

20

10

–50 0 50 100 150

05867-015

V

= ±5V

S

TEMPERATURE ( °C)

05867-020

Figure 18. Short-Circuit Current vs. Temperature

16000

14000

12000

10000

(V/mV)

8000

VO

A

6000

4000

2000

–50 0 50 100 150

= ±15V

V

S

V

= ±5V

S

TEMPERATURE ( °C)

Figure 16. Open-Loop Gain vs. Temperature

R

= 2kΩ

L

05867-017

Rev. 0 | Page 8 of 16

1.4

1.2

1.0

0.8

0.6

0.4

SUPPLY CURRENT (mA)

0.2

0

0 1020304

SUPPLY VOLTAGE (V)

Figure 19. Supply Current vs. Supply Voltage

0

05867-022

OP07D

V

V

10

VS= ±15V

VOH = +V

OUT

(V)

OUT

1

–

SY

V

VOL = –V

OUT

50

40

G = +100

30

G = +10

20

10

CLOSED-LOOP GAIN (dB)

G = +1

0

VS= ±15V

= 28mV

V

IN

R

=

∞

L

CL= 20pF

0.1

0.01 0. 1 1 10 100

I

LOAD

(mA)

Figure 20. Output Voltage Swing vs. Load Current

10

VS= ±5V

(V)

OUT

1

–

SY

V

0.1

0.01 0. 1 1 10 100

VOL = –V

I

LOAD

OUT

VOH = +V

(mA)

Figure 21. Output Voltage Swing vs. Load Current

OUT

–10

100 1k 10k 100k 1M

05867-023

FREQUENCY (Hz)

05867-026

Figure 23. Closed-Loop Gain vs. Frequency

50

G = +100

40

30

G = +10

20

10

CLOSED-LOOP GAIN (dB)

05867-024

G = +1

0

–10

100 1k 10k 100k 1M

FREQUENCY (Hz)

VS= ±5V
V

= 28mV

IN

=

∞

R

L

CL= 20pF

05867-027

Figure 24. Closed-Loop Gain vs. Frequency

100

80

60

40

GAIN

20

0

VS= ±15V

–20

=

∞

R

L

CL= 20pF

ΦM = 80°

–40

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

GAIN

Figure 22. Open-Loop Gain and Phase vs. Frequency

PHASE

100

80

60

40

20

0

PHASE MARG IN (Deg rees)

05867-025

30

VS= ±15V
V

= ±50mV

IN

G = +1

25

20

15

OVERSHOOT (%)

10

5

0

01108

Figure 25. Overshoot vs. Capacitive Load

C

LOAD

642

–OS

(nF)

+OS

2

05867-028

Rev. 0 | Page 9 of 16

OP07D

30

VS= ±5V
V

= ±50mV

IN

G = +1

25

20

15

OVERSHOOT (%)

10

5

0

024681012

C

LOAD

(nF)

–OS

+OS

Figure 26. Overshoot vs. Capacitive Load

112

VS= ±15V

110

108

106

104

CMRR (dB)

102

100

100

VS= ±15V
V

= 28mV

IN

R

=

∞

L

CL= 20pF

10

(Ω)

OUT

R

1

0.1
10 1M10k 100k1k100

05867-029

G = +100

FREQUENCY (Hz)

G = +10

G = +1

05867-032

Figure 29. Output Impedance vs. Frequency

100

VS= ±5V
V

= 28mV

IN

R

=

∞

L

CL= 20pF

10

(Ω)

OUT

R

1

G = +100

G = +10

G = +1

98

96

100 1M10k 100k1k

100

80

60

PSRR (dB)

40

20

0

10 1M10k 100k1k100

FREQUENCY (Hz)

Figure 27. CMRR vs. Frequency

–PSRR

+PSRR

FREQUENCY (Hz)

Figure 28. PSRR vs. Frequency

0.1
10 1M10k 100k1k100

05867-030

FREQUENCY (Hz)

05867-033

Figure 30. Output Impedance vs. Frequency

100

VS = ±15V

10

VOLTAGE NOISE DENSI TY (nV/ Hz)

1

0.1 1k100101

05867-031

FREQUENCY (Hz)

05867-034

Figure 31. Voltage Noise Density vs. Frequency

Rev. 0 | Page 10 of 16

OP07D

V

V

10

VS = ±15V

1

VS = ±5V

= 1nF

C

L

G = +1

= 4V p-p

V

IN

(pA/ Hz )

n

i

0.1

0.01

0.1 1k100101

2

OUTPUT VOLTAGE (100mV/DIV)

FREQUENCY (Hz)

Figure 32. Current Noise Density vs. Frequency

VS = ±5V AND ±15V

= 1nF

C

L

G = +1

= 100mV p-p

V

IN

2

OUTPUT VO LTAGE (1V/ DIV)

05867-035

TIME (100µ s/DIV)

5867-039

Figure 35. Large-Signal Transient

400m

200mV

–200mV

–5V

–10V

–15V

V

0V

0V

IN

V

OUT

VS = ±15V

= 200mV

V

IN

G = –100
RECOVERY = 1µs

OUTPUT VOLTAGE (1V/DIV)

2

TIME (100µ s/DIV)

Figure 33. Small-Signal Transient

VS = ±15V

= 1nF

C

L

G = +1

= 4V p-p

V

IN

TIME (100µ s/DIV)

Figure 34. Large-Signal Transient

–20V

05867-036

TIME (10µs/DIV)

05867-040

Figure 36. Positive Overload Recovery

400m

200mV

0V

–200mV

15V

10V

5V

0V

–5V

05867-038

V

IN

V

OUT

TIME (10µs/DIV)

VS = ±15V

= 200mV

V

IN

G = –100
RECOVERY = 5µs

5867-041

Figure 37. Negative Overload Recovery

Rev. 0 | Page 11 of 16

OP07D

V

V

T

1200m

600mV

0V

–600mV

VS = ±5V

= 600mV

V

IN

G = –10

V

IN

RECOVERY = 2.4µs

VS = ±15V
VN p-p = 0.24µV

0V

–2V

–4V

–6V

–8V

1200m

600mV

0V

–600mV

4V

2V

0V

–2V

–4V

V

OUT

TIME (4µs/DIV)

Figure 38. Positive Overload Recovery

VS = ±5V
V

= 600mV

IN

G = –10

V

IN

V

OUT

TIME (4µs/DIV)

RECOVERY = 5.6µs

Figure 39. Negative Overload Recovery

1

VOLTAGE NOISE (0.2µV/DIV)

05867-042

TIME (1s/ DIV)

05867-045

Figure 41. Voltage Noise (0.1 Hz to 10 Hz)

20kΩ

–

INPU

+

5867-043

–

3

+

OP07D

4

V–

1

8

2

V+

7

5

TRIM RANGE IS

V

OS

TYPICALLY ±3.5mV

OUTPUT

05867-049

Figure 42. Optional Offset Nulling Circuit

VS = ±5V

= ±5.7V

V

IN

V

IN

V

OUT

2

TIME (400µ s/DIV)

05867-044

Figure 40. No Phase Reversal

Rev. 0 | Page 12 of 16

OP07D

OUTLINE DIMENSIONS

5.00 (0.1968)

4.80 (0.1890)

4.00 (0.1574)

3.80 (0.1497)

85

6.20 (0.2440)

5.80 (0.2284)

41

1.27 (0.0500)
BSC

0.25 (0.0098)

0.10 (0.0040)

COPLANARITY

0.10

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.

SEATING

PLANE

COMPLIANT TO JEDEC STANDARDS MS-012-AA

1.75 (0.0688)

1.35 (0.0532)

0.51 (0.0201)

0.31 (0.0122)

0.25 (0.0098)

0.17 (0.0067)

0.50 (0.0196)

0.25 (0.0099)

8°

1.27 (0.0500)

0°

0.40 (0.0157)

× 45°

Figure 43. 8-Lead Standard Small Outline Package [SOIC_N]

Narrow Body

(R-8)

Dimensions shown in millimeters and (inches)

0.400 (10.16)

0.365 (9.27)

0.355 (9.02)

0.210

(5.33)

0.150 (3.81)

0.130 (3.30)

0.115 (2.92)

0.022 (0.56)

0.018 (0.46)

0.014 (0.36)

8

1

PIN 1

0.100 (2.54)

MAX

0.070 (1.78)

0.060 (1.52)

0.045 (1.14)

BSC

5

4

0.280 (7.11)

0.250 (6.35)

0.240 (6.10)

0.015
(0.38)
MIN

SEATING
PLANE

0.005 (0.13)
MIN

0.060 (1.52)
MAX

0.015 (0.38)
GAUGE

PLANE

0.325 (8.26)

0.310 (7.87)

0.300 (7.62)

0.430 (10.92)
MAX

0.195 (4.95)

0.130 (3.30)

0.115 (2.92)

0.014 (0.36)

0.010 (0.25)

0.008 (0.20)

CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.

Figure 44. 8-Lead Plastic Dual In-Line Package [PDIP]

(N-8)

Dimensions shown in inches and (millimeters)

Rev. 0 | Page 13 of 16

COMPLIANT TO JEDEC STANDARDS MS-001-BA

OP07D

ORDERING GUIDE

Model Temperature Range Package Description Package Option

OP07DN −40°C to +125°C 8-Lead PDIP N-8
OP07DNZ
OP07DR −40°C to +125°C 8-Lead SOIC_N R-8
OP07DR-REEL −40°C to +125°C 8-Lead SOIC_N R-8
OP07DR-REEL7 −40°C to +125°C 8-Lead SOIC_N R-8
OP07DRZ
OP07DRZ-REEL
OP07DRZ-REEL7

1

Z = Pb-free part.

1

1

1

1

−40°C to +125°C 8-Lead PDIP N-8

−40°C to +125°C 8-Lead SOIC_N R-8

−40°C to +125°C 8-Lead SOIC_N R-8

−40°C to +125°C 8-Lead SOIC_N R-8

Rev. 0 | Page 14 of 16

OP07D

NOTES

Rev. 0 | Page 15 of 16

OP07D Preliminary Technical Data

NOTES

© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05867–0–12/05(0)

Rev. 0 | Page 16 of 16