Analog Devices MLT04 Datasheet

123456789181716151413121110

MLT-04

18
17

16
15

14
13

12

11

10

4

1
2

3

5

6
7

8

9

MLT04

W4

GND4
X4

V

EE

Y4

Y3
X3

GND3
W3

W1

GND1

X1

Y1

V

CC

Y2

X2

GND2

W2

W = (X • Y)/2.5V

Four-Channel, Four-Quadrant

a

FEATURES
Four Independent Channels
Voltage IN, Voltage OUT
No External Parts Required
8 MHz Bandwidth
Four-Quadrant Multiplication
Voltage Output; W = (X × Y)/2.5 V

0.2% Typical Linearity Error on X or Y Inputs

Excellent Temperature Stability: 0.005%
±2.5 V Analog Input Range
Operates from ±5 V Supplies
Low Power Dissipation: 150 mW typ
Spice Model Available

APPLICATIONS
Geometry Correction in High-Resolution CRT Displays
Waveform Modulation & Generation
Voltage Controlled Amplifiers
Automatic Gain Control
Modulation and Demodulation

GENERAL DESCRIPTION

The MLT04 is a complete, four-channel, voltage output analog
multiplier packaged in an 18-pin DIP or SOIC-18. These complete
multipliers are ideal for general purpose applications such as voltage
controlled amplifiers, variable active filters, “zipper” noise free
audio level adjustment, and automatic gain control. Other applica­tions include cost-effective multiple-channel power calculations
(I × V), polynomial correction generation, and low frequency
modulation. The MLT04 multiplier is ideally suited for generating
complex, high-order waveforms especially suitable for geometry
correction in high-resolution CRT display systems.

Analog Multiplier

MLT04

FUNCTIONAL BLOCK DIAGRAM

18-Lead Epoxy DIP (P Suffix)

18-Lead Wide Body SOIC (S Suffix)

Fabricated in a complementary bipolar process, the MLT04
includes four 4-quadrant multiplying cells which have been laser­trimmed for accuracy. A precision internal bandgap reference
normalizes signal computation to a 0.4 scale factor. Drift over
temperature is under 0.005%/°C. Spot noise voltage of 0.3 µV/√Hz
results in a THD + Noise performance of 0.02% (LPF = 22 kHz)
for the lower distortion Y channel. The four 8 MHz channels
consume a total of 150 mW of quiescent power.

The MLT04 is available in 18-pin plastic DIP, and SOIC-18
surface mount packages. All parts are offered in the extended
industrial temperature range (–40°C to +85°C).

100

40

V

= +5V

CC

VEE = –5V
TA = +25°C

20

Ø (X OR Y)

8.9MHz
–3dB

0

Av GAIN – dB

–20

X & Y MEASUREMENTS
SUPERIMPOSED:
X = 100mV RMS, Y = 2.5V DC

–40

Y = 100mV RMS, X = 2.5V DC

REV. B

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.

1k 10k 100M10M1M100k

Figure 1. Gain & Phase vs. Frequency Response

Av (X OR Y)

FREQUENCY – Hz

90

0

Ø – Phase Degrees

–90

THD + NOISE – %

0.01

One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: [phone] Fax: [phone]

V

= +5V

CC

V

= –5V

10

0.1

EE

T

= +25°C

A

1

10 100 1M100k10k1k

LPF = 500kHz

THDX: X = 2.5VP, Y = +2.5V DC

THDY: Y = 2.5VP, X = +2.5V DC

FREQUENCY – Hz

Figure 2. THD + Noise vs. Frequency

MLT04–SPECIFICATIONS

(VCC = +5 V, VEE = –5 V, VIN = ±2.5 VP, RL = 2 kΩ, TA = +25°C unless otherwise noted.)

Parameter Symbol Conditions Min Typ Max Units

MULTIPLIER PERFORMANCE

Total Error2 XE
Total Error
Linearity Error2 XLE
Linearity Error

2

YE

2

YLE
Total Error Drift TCE
Total Error Drift TCE
Scale Factor

3

Output Offset Voltage Z
Output Offset Drift TCZ
Offset Voltage, X X
Offset Voltage, Y Y

1

X
Y

X
Y

–2.5 V < X < +2.5 V, Y = +2.5 V –5 ±2 5 % FS
–2.5 V < Y < +2.5 V, X = +2.5 V –5 ±2 5 % FS
–2.5 V < X < +2.5 V, Y = +2.5 V –1 ±0.2 +1 % FS
–2.5 V < Y < +2.5 V, X = +2.5 V –1 ±0.2 +1 % FS
X = –2.5 V, Y = 2.5 V, TA = –40°C to +85°C 0.005 %/°C

X

Y = –2.5 V, X = 2.5 V, TA = –40°C to +85°C 0.005 %/°C

Y

K X = ±2.5 V, Y = ±2.5 V, TA = –40°C to +85°C 0.38 0.40 0.42 1/V

OS

OS

OS

X = 0 V, Y = 0 V, TA= –40°C to +85°C –50 ±10 50 mV
X = 0 V, Y = 0 V, TA= –40°C to +85°C50µV/°C

OS

X = 0 V, Y = ±2.5 V, TA = –40°C to +85°C –50 ±10.5 50 mV
Y = 0 V, X = ±2.5 V, TA = –40°C to +85°C –50 ±10.5 50 mV

DYNAMIC PERFORMANCE

Small Signal Bandwidth BW V
Slew Rate SR V
Settling Time t
AC Feedthrough FT
Crosstalk @ 100 kHz CT

S

AC

AC

= 0.1 V rms 8 MHz

OUT

= ±2.5 V 30 53 V/µs

OUT

V

= ∆2.5 V to 1% Error Band 1 µs

OUT

X = 0 V, Y = 1 V rms @ f = 100 kHz –65 dB
X = Y = 1 V rms Applied to Adjacent Channel –90 dB

OUTPUTS

Audio Band Noise E
Wide Band Noise E
Spot Noise Voltage e

N
N

N

Total Harmonic Distortion THD

THD
Open Loop Output Resistance R
Voltage Swing V
Short Circuit Current I

OUT
PK

SC

f = 10 Hz to 50 kHz 76 µV rms
Noise BW = 1.9 MHz 380 µV rms
f = 1 kHz 0.3 µV/√Hz
f = 1 kHz, LPF = 22 kHz, Y = 2.5 V 0.1 %

X

f = 1 kHz, LPF = 22 kHz, X = 2.5 V 0.02 %

Y

40 Ω

VCC = +5 V, VEE = –5 V ±3.0 ±3.3 V

30 mA

P

INPUTS

Analog Input Range IVR GND = 0 V –2.5 +2.5 V
Bias Current I
Resistance R
Capacitance C

B

IN

IN

X = Y = 0 V 2.3 10 µA

1MΩ
3pF

SQUARE PERFORMANCE

Total Square Error E

SQ

X = Y = 1 5 % FS

POWER SUPPLIES

V

Positive Current I
Negative Current I
Power Dissipation P

CC
EE

DISS

= 5.25 V, V

CC

V

= 5.25 V, V

CC

Calculated = 5 V × I
Supply Sensitivity PSSR X = Y = 0 V, V
Supply Voltage Range V

NOTES

1

Specifications apply to all four multipliers.

2

Error is measured as a percent of the ±2.5 V full scale, i.e., 1% FS = 25 mV.

3

Scale Factor K is an internally set constant in the multiplier transfer equation W = K × X × Y.

Specifications subject to change without notice.

RANGE

For VCC & V

= –5.25 V 15 20 mA

EE

= –5.25 V 15 20 mA

EE

= ∆5% or V

CC

EE

+ 5 V × I

CC

EE

= ∆5% 10 mV/V

EE

150 200 mW

±4.75 ±5.25 V

ABSOLUTE MAXIMUM RATINGS*

Supply Voltages V
Inputs X
Outputs W

, Y

I

I

, VEE to GND ±7 V

CC

I

VCC, V
VCC, V

EE
EE

Operating Temperature Range –40°C to +85°C
Maximum Junction Temperature (T

max) +150°C

J

Storage Temperature –65°C to +150°C
Lead Temperature (Soldering, 10 sec) +300°C
Package Power Dissipation (T
Thermal Resistance θ

JA

max–TA)/θ

J

JA

PDIP-18 (N-18) 74°C/W
SOIC-18 (SOL-18) 89°C/W

*Stresses above those listed under “Absolute Maximum Ratings” may cause perma-

nent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification are not implied.

–2–

ORDERING INFORMATION*

Temperature Package Package

Model Range Description Option

MLT04GP –40°C to +85°C 18-Pin P-DIP N-18
MLT04GS –40°C to +85°C 18-Lead SOIC SOL-18
MLT04GS-REEL –40°C to +85°C 18-Lead SOIC SOL-18
MLT04GBC +25°C Die

*For die specifications contact your local Analog sales office. The MLT04

contains 211 transistors.

REV. B

MLT04

50kΩ

–V

S

50kΩ

+V

S

±100mV
FOR X

OS

, YOS TRIM

CONNECT TO SUM
NODE OF AN EXT OP AMP

I

FUNCTIONAL DESCRIPTION

The MLT04 is a low cost quad, 4-quadrant analog multiplier with
single-ended voltage inputs and voltage outputs. The functional
block diagram for each of the multipliers is illustrated in Figure 3.
Due to packaging constraints, access to internal nodes for externally
adjusting scale factor, output offset voltage, or additional summing
signals is not provided.

+V

S

X1, X2, X3, X4

G1, G2, G3, G4

Y1, Y2, Y3, Y4

0.4

MLT04

W1, W2, W3, W4

–V

S

Figure 3. Functional Block Diagram of Each MLT04
Multiplier

Each of the MLT04’s analog multipliers is based on a Gilbert cell
multiplier configuration, a 1.23 V bandgap reference, and a unity­connected output amplifier. Multiplier scale factor is determined
through a differential pair/trimmable resistor network external to
the core. An equivalent circuit for each of the multipliers is shown
in Figure 4.

V

CC

W

SCALE
FACTOR

OUT

INTERNAL

BIAS

X

GND

Y

V

IN

IN

EE

22k

22k

200µA 200µA

200µA 200µA 200µA 200µA

22k

Figure 4. Equivalent Circuit for the MLT04

Details of each multiplier’s output-stage amplifier are shown in
Figure 5. The output stages idles at 200 µA, and the resistors in
series with the emitters of the output stage are 25 Ω. The output
stage can drive load capacitances up to 500 pF without oscillation.
For loads greater than 500 pF, the outputs of the MLT04 should
be isolated from the load capacitance with a 100 Ω resistor.

V

CC

ANALOG MULTIPLIER ERROR SOURCES

Multiplier errors consist primarily of input and output offsets, scale
factor errors, and nonlinearity in the multiplying core. An expres­sion for the output of a real analog multiplier is given by:

= (K +∆K){(VX+ XOS)(VY+ YOS) + ZOS+ f(X , Y )}

V

O

where: K = Multiplier Scale Factor

∆K = Scale Factor Error
V
X
V
Y
Z

OS

ƒ(X, Y) = Nonlinearity

= X-Input Signal

X

= X-Input Offset Voltage

OS

= Y-Input Signal

Y

= Y-Input Offset Voltage

OS

= Multiplier Output Offset Voltage

Executing the algebra to simplify the above expression yields
expressions for all the errors in an analog multiplier:

Term Description Dependence on Input

KV

True Product Goes to Zero As Either or

XVY

Both Inputs Go to Zero
∆KVYVYScale-Factor Error Goes to Zero at VX, VY = 0
V

XYOS

Linear “X” Feedthrough Proportional to V

X

Due to Y-Input Offset

V

YXOS

Linear “Y” Feedthrough Proportional to V

Y

Due to X-Input Offset

X

OSYOS

Z

OS

Output Offset Due to X-, Independent of VX, V
Y-Input Offsets

Output Offset Independent of VX, V

Y

Y

ƒ(X, Y) Nonlinearity Depends on Both VX, VY.

Contains Terms Dependent

, VY, Their Powers

on V

X

and Cross Products

As shown in the table, the primary static errors in an analog
multiplier are input offset voltages, output offset voltage, scale
factor, and nonlinearity. Of the four sources of error, only two are
externally trimmable in the MLT04: the X- and Y-input offset
voltages. Output offset voltage in the MLT04 is factory-trimmed to
±50 mV, and the scale factor is internally adjusted to ±2.5% of full
scale. Input offset voltage errors can be eliminated by using the
optional trim circuit of Figure 6. This scheme then reduces the net
error to output offset, scale-factor (gain) error, and an irreducible
nonlinearity component in the multiplying core.

25Ω

W
OUT

25Ω

Figure 6. Optional Offset Voltage Trim Configuration

Figure 5. Equivalent Circuit for MLT04 Output Stages

REV. B

V

EE

–3–

MLT04

Feedthrough

In the ideal case, the output of the multiplier should be zero if
either input is zero. In reality, some portion of the nonzero input
will “feedthrough” the multiplier and appear at the output. This is
caused by the product of the nonzero input and the offset voltage of
the “zero” input. Introducing an offset equal to and opposite of the
“zero” input offset voltage will null the linear component of the
feedthrough. Residual feedthrough at the output of the multiplier
is then irreducible core nonlinearity.

Typical X- and Y-input feedthrough curves for the MLT04 are
shown in Figures 7 and 8, respectively. These curves illustrate
MLT04 feedthrough after “zero” input offset voltage trim.
Residual X-input feedthrough measures 0.08% of full scale,
whereas residual Y-input feedthrough is almost immeasurable.

100

90

X-INPUT: ±2.5V @ 10Hz

10

VERTICAL – 5mV/DIV

0%

Y-INPUT: +2.5V

NULLED

Y

OS

T

= +25°C

A

HORIZONTAL – 0.5V/DIV

Figure 9. X-Input Nonlinearity @ Y = +2.5 V

100

90

10

VERTICAL – 5mV/DIV

0%

X-INPUT: ±2.5V @ 10Hz

NULLED

Y

OS

TA = +25°C

HORIZONTAL – 0.5V/DIV

Figure 7. X-Input Feedthrough with YOS Nulled

100

90

10

VERTICAL – 5mV/DIV

0%

Y-INPUT: ±2.5V @ 10Hz

NULLED

X

OS

TA = +25°C

HORIZONTAL – 0.5V/DIV

100

90

X-INPUT: ±2.5V @ 10Hz

10

VERTICAL – 5mV/DIV

0%

Y-INPUT: –2.5V

NULLED

Y

OS

T

= +25°C

A

HORIZONTAL – 0.5V/DIV

Figure 10. X-Input Nonlinearity @ Y = –2.5 V

Y-INPUT: ±2.5V @ 10Hz

100

90

10

VERTICAL – 5mV/DIV

0%

X-INPUT: +2.5V

NULLED

X

OS

TA = +25°C

HORIZONTAL – 0.5V/DIV

Figure 8. Y-Input Feedthrough with X

Nulled

OS

Nonlinearity

Multiplier core nonlinearity is the irreducible component of error.
It is the difference between actual performance and “best-straight­line” theoretical output, for all pairs of input values. It is expressed
as a percentage of full scale with all other dc errors nulled. Typical
X- and Y-input nonlinearities for the MLT04 are shown in Figures
9 through 12. Worst-case X-input nonlinearity measured less than

0.2%, and Y-input nonlinearity measured better than 0.06%. For
modulator/demodulator or mixer applications it is, therefore,
recommended that the carrier be connected to the X-input while
the signal is applied to the Y-input.

–4–

Figure 11. Y-Input Nonlinearity @ X = +2.5 V

Y-INPUT: ±2.5V @ 10Hz

100

90

10

VERTICAL – 5mV/DIV

0%

X-INPUT: –2.5V

NULLED

X

OS

T

= +25°C

A

HORIZONTAL – 0.5V/DIV

Figure 12. Y-Input Nonlinearity @ X = –2.5 V

REV. B