All registered trademarks and trademarks are the property of their respective owners. Protected
by U.S. Patents including 6342817 and 6614313.
The LTC®1799 is a precision oscillator that is easy to use
and occupies very little PC board space. The oscillator
frequency is programmed by a single external resistor
). The LTC1799 has been designed for high accuracy
(R
SET
operation (≤1.5% frequency error) without the need for
external trim components.
The LTC1799 operates with a single 2.7V to 5.5V power
supply and provides a rail-to-rail, 50% duty cycle square
wave output. The CMOS output driver ensures fast rise/
fall times and rail-to-rail switching. The frequency-setting
resistor can vary from 3k to 1M to select a master oscil
lator frequency between 100kHz and 33MHz (5V supply).
The three-state DIV input determines whether the master
clock is divided by 1, 10 or 100 before driving the out
put, providing three frequency ranges spanning 1kHz to
33MHz
(5V supply). The LTC1799 features a proprietary
feedback loop that linearizes the relationship between R
and frequency, eliminating the need for tables to calculate
frequency. The oscillator can be easily programmed using
the simple formula outlined below:
⎛
f
OSC
= 10MHz •
⎜
N •R
⎝
10k
LTC1799
1kHz to 33MHz
⎧
DIV Pin = V
100,
⎪
⎨
10,
DIV Pin = Open
⎪
1,
DIV Pin = GND
⎩
SET
⎞
, N =
⎟
⎠
-
-
SET
+
TYPICAL APPLICATION
Basic Connection
SET
5V
0.1µF
≤ 1M
TSOT-23 Actual Size
1
2
3
+
V
LTC1799
GND
SET
OUT
DIV
1799 TA01
Typical Distribution of Frequency Error,
TA = 25°C (5kHz ≤ f
OSC
5
5V
÷100
4
÷10
÷1
For more information www.analog.comDocument Feedback
20
15
10
5
0
–1.25–0.75–0.25 0 0.250.75
FREQUENCY ERROR (%)
≤ 20MHz, V+ = 5V)
OSC
Rev. E
1
Page 2
LTC1799
TOP VIEW
5-LEAD PLASTIC TSOT-23
GND
OUT
(Note 1)
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
Supply Voltage (V+) to GND ......................... –0.3V to 6V
+
DIV to GND .....................................–0.3V to (V
SET to GND ..................................... –0.3V to (V
+ 0.3V)
+
+ 0.3V)
SET
+
1
V
2
3
5
4
DIV
Operating Temperature Range
1799C ................................................ 0°C to 70°C
LTC
1799I .............................................–40°C to 85°C
LTC
1799H .......................................... –40°C to 125°C
LTC
S5 PACKAGE
= 150°C, θJA = 256°C/W
T
JMAX
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ...................300°C
ORDER INFORMATION
TAPE AND REEL (MINI)TAPE AND REELPART MARKING*PACKAGE DESCRIPTIONTEMPERATURE RANGE
LTC1799CS5#TRMPBFLTC1799CS5#TRPBFLTND5-Lead Plastic TSOT-230°C to 70°C
LTC1799IS5#TRMPBFLTC1799IS5#TRPBFLTNE5-Lead Plastic TSOT-23–40°C to 85°C
LTC1799HS5#TRMPBFLTC1799HS5#TRPBFLTND5-Lead Plastic TSOT-23–40°C to 125°C
AUTOMOTIVE PRODUCTS**
LTC1799IS5#WTRMPBFLTC1799IS5#WTRPBFLTNE5-Lead Plastic TSOT-23–40°C to 85°C
LTC1799HS5#WTRMPBFLTC1799HS5#WTRPBFLTND5-Lead Plastic TSOT-23–40°C to 125°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Contact the factory for parts specified with wider operating temperature ranges.
Contact the factory for information on lead based finish parts.
Tape and reel specifications
**Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These
models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your
local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for
thesemodels.
. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
2
Rev. E
For more information www.analog.com
Page 3
LTC1799
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 2.7V to 5.5V, RL = 5k, CL = 5pF, unless otherwise noted. All
voltages are with respect to GND.
Minimum Frequency|∆f| < 2.5%, Pin 4 = V
∆f/∆TFreq Drift Over Temp (Note 3)R
∆f/∆VFreq Drift Over Supply (Note 3)V
Timing Jitter
(Note 4)
Long-T
erm Stability of Output Frequency300ppm/√kHr
Duty Cycle (Note 7)Pin 4 = V
V
I
V
V
I
+
S
IH
IL
DIV
Operating Supply Range
Power Supply CurrentR
High Level DIV Input Voltage
Low Level DIV Input Voltage
DIV Input Current (Note 5)Pin 4 = V
+
= 5V5kHz ≤ f ≤ 20MHz
V
5kHz ≤ f ≤ 20MHz, LTC1799C
5kHz ≤ f ≤ 20MHz, LTC1799I/H
1kHz ≤ f ≤ 5kHz
20MHz ≤ f ≤ 33MHz
+
= 3V5kHz ≤ f ≤ 10MHz
V
5kHz ≤ f ≤ 10MHz, LTC1799C
5kHz ≤ f ≤ 10MHz, LTC1799I/H
1kHz ≤ f ≤ 5kHz
10MHz ≤ f ≤ 20MHz
+
= 31.6k
SET
+
= 3V to 5V, R
+
= V
Pin 4
SET
= 31.6k
Pin 4 = Open
Pin 4 = 0V
+
Pin 4 = 0V (DIV by 1), R
R
or Open (DIV Either by 100 or 10)
= 5k to 200k
SET
= 200k, Pin 4 = V+, RL = ∞V+ = 5V
SET
= 10k, Pin 4 = 0V, RL = ∞V+ = 5V
SET
+
Pin 4 = 0V
+
V
+
V
+
V
+
V
+
V
= 3V
= 3V
= 3V
= 5V
= 5V
l
l
±0.5
±
1.5
±2
±2.5
±2.5
±2.5
l
l
±0.5
±
1.5
±2
±2.5
±2.5
±2.5
5
10
200
200
33
20
1kHz
l
l
±0.004%/°C
0.050.1%/V
0.06
0.13
0.4
l
49
l
45
l
2.75.5V
l
l
l
l
V+ – 0.4V
l
l
l
–8
50
50
51
55
0.71.1mA
2.4
2
0.5V
5
8µA
–5
kΩ
kΩ
MHz
MHz
mA
mA
µA
%
%
%
%
%
%
%
%
%
%
%
%
%
%
%
For more information www.analog.com
Rev. E
3
Page 4
LTC1799
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 2.7V to 5.5V, RL = 5k, CL = 5pF, unless otherwise noted. All
voltages are with respect to GND.
SYMBOL PARAMETERCONDITIONSMINTYPMAXUNITS
V
OH
High Level Output Voltage (Note 5)V+ = 5V,
LTC1799C/I
+
= 5V,
V
LTC1799H
+
= 3V,
V
LTC1799C/I
V+ = 3V,
LTC1799H
V
OL
Low Level Output Voltage (Note 5)V+ = 5V,
LTC1799C/I
+
= 5V,
V
LTC1799H
+
= 3V,
V
LTC1799C/I
+
= 3V,
V
LTC1799H
t
r
OUT Rise Time
V+ = 5VPin 4 = V+ or Floating, RL = ∞
(Note 6)
+
= 3VPin 4 = V+ or Floating, RL = ∞
V
IOH = –1mA
I
= –4mA
OH
IOH = –1mA
I
= –4mA
OH
IOH = –1mA
I
= –4mA
OH
IOH = –1mA
I
= –4mA
OH
IOL = 1mA
I
= 4mA
OL
IOL = 1mA
I
= 4mA
OL
IOL = 1mA
I
= 4mA
OL
IOL = 1mA
I
= 4mA
OL
Pin 4 = 0V, RL = ∞
Pin 4 = 0V, RL = ∞
t
f
OUT Fall Time
(Note 6)
V+ = 5VPin 4 = V+ or Floating, RL = ∞
Pin 4 = 0V, RL = ∞
+
= 3VPin 4 = V+ or Floating, RL = ∞
V
Pin 4 = 0V, RL = ∞
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
4.8
4.5
4.75
4.40
2.7
2.2
2.65
2.10
4.95
4.8
4.95
4.75
2.9
2.6
2.90
2.55
0.05
0.2
0.05
0.25
0.1
0.4
0.10
0.45
14
7
19
11
13
6
19
10
0.15
0.4
0.20
0.50
0.3
0.7
0.35
0.80
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Frequencies near 100kHz and 1MHz may be generated using two
different values of R
(see the Table 1 in the Applications Information
SET
section). For these frequencies, the error is specified under the following
assumption: 10k < R
≤ 100k. The frequency accuracy for f
SET
= 20MHz
OSC
is guaranteed by design and test correlation.
Note 3: Frequency accuracy is defined as the deviation from the
equation.
f
OSC
Note 4: Jitter is the ratio of the peak-to-peak distribution of the period to
the mean of the period. This specification is based on characterization and
is not 100% tested.
Note 5: To conform with the Logic IC Standard convention, current out of
a pin is arbitrarily given as a negative value.
Note 6: Output rise and fall times are measured between the 10% and 90%
power supply levels. These specifications are based on characterization.
Note 7: Guaranteed by 5V test.
4
Rev. E
For more information www.analog.com
Page 5
TYPICAL PERFORMANCE CHARACTERISTICS
4
1000
1799 G01
VARIATION (%)
VARIATION (%)
1.00
1799 G02
JITTER (%)
0.7
100M
1799 G03
SUPPLY CURRENT (mA)
4.5
100M
1799 G04
OUTPUT RESISTANCE (Ω)
140
1799 G05
6.0
12.5ns/DIV
1V/DIV
1799 G06
25ns/DIV
1V/DIV
1799 G07
LTC1799
Frequency Variation
vs R
SET
TA = 25°C
GUARANTEED LIMITS APPLY
3
OVER 5k TO 200k RANGE
2
1
0
–1
–2
–3
–4
110100
TYPICAL
HIGH
TYPICAL
LOW
R
(kΩ)
SET
Peak-to-Peak Jitter vs Frequency
0.6
0.5
0.4
0.3
0.2
0.1
0
1k100k1M10M
÷10
÷100
10k
OUTPUT FREQUENCY, f
÷1
(Hz)
OUT
Frequency Variation
Over Temperature
R
= 31.6k
SET
÷1 OR ÷10 OR ÷100
0.75
0.50
0.25
–0.25
–0.50
–0.75
–1.00
0
–40
TYPICAL
HIGH
TYPICAL
LOW
–200
TEMPERATURE (°C)
Supply Current
vs Output Frequency
TA = 25°C
= 5pF
C
4.0
L
= 1M
R
L
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
÷100 (5V)
÷100 (3V)
1k100k1M
÷10 (3V)
10k
OUTPUT FREQUENCY, f
4080
2060
÷1 (5V)
÷10 (5V)
÷1 (3V)
OUT
10M
(Hz)
Output Resistance
vs Supply Voltage
120
OUTPUT SOURCING CURRENT
100
80
60
OUTPUT SINKING CURRENT
40
2.5 3.0
3.5
SUPPLY VOLTAGE (V)
4.0
4.5
5.0
T
A
= 25°C
5.5
LTC1799 Output Operating at
20MHz, VS = 5V
V+ = 5V, R
For more information www.analog.com
= 5k, CL = 10pF
SET
LTC1799 Output Operating at
10MHz, VS = 3V
V+ = 3V, R
= 10k, CL = 10pF
SET
Rev. E
5
Page 6
LTC1799
1799 BD
PIN FUNCTIONS
V+ (Pin 1): Voltage Supply (2.7V ≤ V+ ≤ 5.5V). This sup-
ply must be kept free from noise and ripple. It should be
bypassed directly to a ground plane with a
0.1µF capacitor.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
+
of the resistor connected between this pin and V
determines the oscillator frequency. The voltage on this pin is
held by the
+
voltage. For best performance, use a precision metal
V
LTC1799 to approximately 1.13V below the
film resistor with a value between 10k and 200k and limit
the capacitance on this pin to less than 10pF.
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the
value of N in the frequency equation. Pin 4 should be tied
to GND for the ÷1 setting, the highest frequency range.
BLOCK DIAGRAM
Floating Pin 4 divides the master oscillator by 10. Pin 4
+
should be tied to V
for the ÷100 setting, the lowest frequency range. To detect a floating DIV pin, the LTC1799
attempts to pull the pin toward midsupply
with two internal current sources, one tied to V
. This is realized
+
and Pin
4 and the other one tied to ground and Pin 4. Therefore,
driving the DIV pin high requires sourcing approximately
5µA. Likewise, driving DIV low requires sinking 5µA.
When Pin 4 is floated, preferably it should be bypassed
by a 1nF capacitor to ground or it should be surrounded
by a ground shield to prevent excessive coupling from
other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ
and/or 10pF loads. Larger loads may cause inaccuracies
due to supply bounce at high frequencies. Transients will
not cause latchup if the current into/out of the OUT pin is
limited to 50mA.
= 1.13V ±25%
V
RES
+
V
1
I
+
–
RES
GAIN = 1
R
SET
I
RES
SET
3
+
V
BIAS
–
GND
+
– V
)
(V
SET
MASTER OSCILLATOR
I
= 100MHz • kΩ •
ƒ
MO
RES
(V+ – V
SET
)
PROGRAMMABLE
DIVIDER
(÷1, 10 OR 100)
DIVIDER
SELECT
THREE-STATE
INPUT DETECT
OUT
V
5µA
DIV
5µA
GND
5
+
42
6
Rev. E
For more information www.analog.com
Page 7
THEORY OF OPERATION
+
1.4
1000
1799 F01
R
(kΩ)
1799 F02
1000
100M
LTC1799
As shown in the Block Diagram, the LTC1799’s master
oscillator is controlled by the ratio of the voltage between
+
and SET pins and the current entering the SET pin
the V
). The voltage on the SET pin is forced to approximately
(I
RES
1.13V below V
+
by the PMOS transistor and its gate bias
voltage. This voltage is accurate to ±7% at a particular
input current and supply voltage (see Figure 1). The ef
-
fective input resistance is approximately 2k.
A resistor R
“locks together” the voltage (V
, connected between the V+ and SET pins,
SET
+
– V
SET
) and current, I
RES
,
variation. This provides the LTC1799’s high precision. The
master oscillation frequency reduces to:
ƒMO= 10MHz •
⎛
⎜
⎝
10kΩ
R
SET
⎞
⎟
⎠
The LTC1799 is optimized for use with resistors between
10k and 200k, corresponding to master oscillator frequencies between 0.5MHz and 10MHz. Accurate frequencies up
= 5k) are attainable if the supply voltage
to 20MHz
(R
SET
is greater than 4V.
(Pin 5). The divide-by value is determined by the state of
the DIV input (Pin 4). Tie DIV to GND or drive it below 0.5V
to select ÷1. This is the highest frequency range, with the
master output frequency passed directly to OUT. The DIV
pin may be floated or driven to midsupply to select ÷10,
the intermediate frequency range. The lowest frequency
+
range, ÷100, is selected by tying DIV to V
+
within 0.4V of V
, divider setting and output frequency, including the
R
SET
. Figure 2 shows the relationship between
or driving it to
overlapping frequency ranges near 100kHz and 1MHz.
The CMOS output driver has an on resistance that is typi
cally less than 100Ω. In the ÷1 (high frequency) mode,
the rise and fall times are typically 7ns with a 5V supply
and 11ns with a 3V supply. These times maintain a clean
square wave at 10MHz (20MHz at 5V supply). In the ÷10
and ÷100 modes, where the output frequency is much lower,
slew rate control circuitry in the output driver increases
the rise/fall times to typically 14ns for a 5V supply and
19ns for a 3V supply. The reduced slew rate lowers EMI
(electromagnetic interference) and supply bounce.
To extend the output frequency range, the master oscillator
signal may be divided by 1, 10 or 100 before driving OUT
TA = 25°C
1.3
V+ = 5V
V+ = 3V
10100
I
RES
SET
(µA)
Variation with I
RES
1.2
SET
– V
1.1
= V
RES
V
1.0
0.9
0.8
1
Figure 1. V+ – V
100
SET
10
1
1k100k1M10M
Figure 2. R
÷100÷10÷1
10k
DESIRED OUTPUT FREQUENCY (Hz)
vs Desired Output Frequency
SET
MOST
ACCURATE
OPERATION
Rev. E
For more information www.analog.com
7
Page 8
LTC1799
400kHz TO 21MHz
(APPROXIMATE, SEE TEXT)
5µA TO 200µA
CONTROL
+
0V TO 1.13V
()
APPLICATIONS INFORMATION
SELECTING THE DIVIDER SETTING AND RESISTOR
The LTC1799’s master oscillator has a frequency range
spanning 0.1MHz to 33MHz. However, accuracy may suffer
if the master oscillator is operated at greater than 10MHz
with a supply voltage lower than 4V. A programmable
divider extends the frequency range to greater than three
decades. Table 1 describes the recommended frequencies
for each divider setting. Note that the ranges overlap; at
some frequencies there are two divider/resistor combina
-
tions that result in the desired frequency.
general, any given oscillator frequency (f
In
) should
OSC
be obtained using the lowest master oscillator frequency.
Lower master oscillator frequencies use less power and
are more accurate. For instance, f
obtained by either R
10MHz or R
tor =
1MHz. The R
= 100k is preferred for lower power and
SET
= 10k, N = 100, master oscilla-
SET
= 100k, N = 10, master oscillator =
SET
= 100kHz can be
OSC
better accuracy.
Table 1. Frequency Range vs Divider Setting
DIVIDER SETTINGFREQUENCY RANGE
÷1 ⇒DIV (Pin 4) = GND>500kHz*
÷10 ⇒DIV (Pin 4) = Floating50kHz to 1MHz
÷100 ⇒DIV (Pin 4) = V
*At master oscillator frequencies greater than 10MHz (R
LTC1799 may suffer reduced accuracy with a supply voltage less than 4V.
+
<100kHz
< 10kΩ), the
SET
After choosing the proper divider setting, determine the
correct frequency-setting resistor. Because of the linear
correspondence between oscillation period and resistance,
a simple equation relates resistance with frequency.
⎧
R
= 10k •
SET
(R
R
SETMAX
= 3k (5V Supply), 5k (3V Supply),
SETMIN
= 1M)
Any resistor, R
the oscillator, f
⎛
10MHz
⎜
N • f
⎝
, tolerance adds to the inaccuracy of
SET
.
OSC
⎞
, N =
⎟
⎠
OSC
⎪
⎨
⎪
⎩
100
10
1
ALTERNATIVE METHODS OF SETTING THE OUTPUT
FREQUENCY OF THE LTC1799
The oscillator may be programmed by any method that
sources a current into the SET pin (Pin 3). The circuit in
Figure 3 sets the oscillator frequency using a program
mable current source and in the expression for f
resistor R
is replaced by the ratio of 1.13V/I
SET
OSC
CONTROL
-
, the
.
As already explained in the “Theory of Operation,” the
+
voltage difference between V
and SET is approximately
1.13V, therefore, the Figure 3 circuit is less accurate than
if a resistor controls the oscillator frequency.
Figure 4 shows the LTC1799 configured as a VCO. A voltage
source is connected in series with an external 10k resis
tor. The output frequency, f
that is the voltage source connected between V
, will vary with V
OSC
CONTROL
+
and the
,
SET pin. Again, this circuit decouples the relationship
+
between the input current and the voltage between V
and SET; the frequency accuracy will be degraded. The
oscillator frequency, however, will monotonically increase
with decreasing V
+
V
I
CONTROL
Figure 3. Current Controlled Oscillator
V
V
CONTROL
+
–
Figure 4. Voltage Controlled Oscillator
CONTROL
0.1µF
0.1µF
R
SET
10k
.
1
+
V
LTC1799
2
GND
3
SET
10MHz
ƒ
≅
OSC
N
I
EXPRESSED IN (A)
1
+
V
LTC1799
2
GND
3
SET
10MHz
ƒ
≅
OSC
•• 1 –
N
OUT
DIV
1799 F03
10kΩ
•• I
1.13V
OUT
DIV
1799 F04
10k
R
SET
5
4
CONTROL
5
4
V
N = 1
N = 1
CONTROL
1.13V
8
Rev. E
For more information www.analog.com
Page 9
APPLICATIONS INFORMATION
FREQUENCY DEVIATION (%)
0.15
1799 F05
5.5
60
1799 F06
600
FREQUENCY ERROR (%)
1799 F07
()
)
LTC1799
POWER SUPPLY REJECTION
Low Frequency Supply Rejection (Voltage Coefficient)
Figure 5 shows the output frequency sensitivity to power
supply voltage at several different temperatures. The
LTC1799 has a conservative guaranteed voltage coeffi
cient of 0.1%/V but, as Figure 5 shows, the typical supply
sensitivity is lower
–0.05
.
R
= 31.6k
SET
PIN 4 = FLOATING (÷10)
0.10
0.05
0
2.5
3.03.54.04.5
SUPPLY VOLTAGE (V)
Figure 5. Supply Sensitivity
25°C
–40°C
85°C
5.0
High Frequency Power Supply Rejection
START-UP TIME
The start-up time and settling time to within 1% of the
final value can be estimated by t
START
≅ R
+ 20µs. Note the start-up time depends on R
(2.8µs/kΩ)
SET
SET
and it
is independent from the setting of the divider pin. For
instance with R
= 50k, the LTC1799 will settle with 1%
SET
of its 200kHz final value (N = 10) in approximately 160µs.
Figure 6 shows start-up times for various R
resistors.
SET
Figure 7 shows an application where a second set resistor
is connected in parallel with set resistor R
R
SET2
SET1
via
switch S1. When switch S1 is open, the output frequency
of the LTC1799 depends on the value of the resistor R
SET1
.
When switch S1 is closed, the output frequency of the
LTC1799 depends on the value of the parallel combination
of R
SET1
and R
SET2
.
The start-up time and settling time of the LTC1799 with
switch S1 open (or closed) is described by t
START
shown
above. Once the LTC1799 starts and settles, and switch
S1 closes (or opens), the LTC1799 will settle to its new
output frequency within approximately 25µs.
TA = 25°C
+
= 5V
50
V
The accuracy of the LTC1799 may be affected when its
power supply generates significant noise with frequency
contents in the vicinity of the programmed value of f
a switching power supply is used to power up the LTC1799,
and if the ripple of the power supply is more than a few
tens of millivolts, make sure the switching frequency and
its harmonics are not related to the output frequency of
the LTC1799. Otherwise, the oscillator may show an ad
ditional 0.1% to 0.2% of frequency error.
If the LTC1799 is powered by a switching regulator and
the switching frequency or its harmonics coincide with
the output frequency of the LTC1799, the jitter of the
oscillator output may be affected. This phenomenon will
become noticeable if the switching regulator exhibits
ripples beyond 30mV.
40
30
. If
OSC
-
–10
20
10
0
0
200k
10k
31.6k
100200
TIME AFTER POWER APPLIED (µs)
400
300500
Figure 6. Start-Up Time
S1
R
SET1
R
SET2
3V OR 5V
1
2
3
+
V
LTC1799
GND
SET
OUT
DIV
5
÷100
4
÷1
f
= 10MHz •
OSC
OR
+
V
f
= 10MHz •
OSC
÷10
N • R
(
N • R
10k
SET1
10k
SET1
//R
SET2
Figure 7.
Rev. E
For more information www.analog.com
9
Page 10
LTC1799
10MHz
10k
1
5
1799 F08
OPEN
1
5
1799 F09
OPEN
APPLICATIONS INFORMATION
Jitter
The typical jitter is listed in the Electrical Characteristics
and shown in the Typical Performance Characteristics.
These specifications assume that the capacitance on SET
(Pin 3) is limited to less than 10pF, as suggested in the Pin
Functions description. If this requirement is not met, the
jitter will increase. For more information, contact Linear
Technology Applications group.
A Ground Referenced Voltage Controlled Oscillator
The LTC1799 output frequency can also be programmed
by steering current in or out of the SET pin, as conceptually
shown in Figure 8. This technique can degrade accuracy
+
as the ratio of (V
– V
dependent of the value of R
SET
) / I
is no longer uniquely
RES
, as shown in the LTC1799
SET
Block Diagram. This loss of accuracy will become noticeable when the magnitude of I
is comparable to I
PROG
RES
.
The frequency variation of the LTC1799 is still monotonic.
Figure 9 shows how to implement the concept shown in
Figure 8 by connecting a second resistor, R
the SET pin and a ground referenced voltage source, V
, between
IN
IN
.
For a given power supply voltage in Figure 9, the output
frequency of the LTC1799 is a function of V
+
and (V
f
OSC
⎡
⎢
⎢
1+
⎢
⎢
⎣
– V
=
()
) = V
SET
N
IN
V
− V
RES
+
V
RES
•
RINR
⎛
⎜
⎜
•
⎜
1+
⎜
⎝
:
•
SET
⎤
⎞
⎥
⎟
1
⎥
⎟
R
⎥
⎟
IN
⎟
⎥
R
⎠
⎦
SET
, RIN, R
IN
SET
(1)
When V
= V+, the output frequency of the LTC1799 as-
IN
sumes the highest value and it is set by the parallel combination of R
, is independent of the value of V
f
OSC
the accuracy of f
When V
and R
IN
OSC
is less than V+, and especially when VIN ap-
IN
. Also note, the output frequency,
SET
= (V+ – V
RES
SET
is within the data sheet limits.
) so
proaches the ground potential, the oscillator frequency,
, assumes its lowest value and its accuracy is affected
f
OSC
by the change of V
RES
= (V+ – V
by ±8%, assuming the variation of V
perature coefficient of V
is 0.02%/°C.
RES
By manipulating the algebraic relation for f
). At 25°C V
SET
+
is ±5%. The tem-
RES
above, a
OSC
varies
simple algorithm can be derived to set the values of external
resistors R
and RIN, as shown in Figure 9.
SET
1. Choose the desired value of the maximum oscillator
frequency, f
voltage V
IN(MAX)
OSC(MAX)
, occurring at maximum input
≤ V+.
2. Set the desired value of the minimum oscillator fre-
quency, f
IN(MIN)
≥ 0.
V
3. Choose V
OSC(MIN)
RES
, occurring at minimum input voltage
= 1.1 and calculate the ratio of RIN/R
SET
from the following:
R
IN
=
R
SET
V
IN(MAX)
()
− V
V
+
RES
⎛
f
OSC(MAX)
⎜
−
⎜
f
OSC(MIN)
⎝
⎡
f
()
OSC(MAX)
⎢
f
⎢
OSC(MIN)
⎣
⎞
⎟
V
IN(MIN)
()
⎟
− V
⎠
⎤
⎥
− 1
⎥
⎦
+
− 1
(2)
+
V
0.1µF
R
SET
I
RES
I
PR
Figure 8. Concept for Programming via Current SteeringFigure 9. Implementation of Concept Shown in Figure 8 Steering
10
+
V
OUT
LTC1799
2
GND
3
SET
DIV
5V
÷100
4
÷10
÷1
For more information www.analog.com
+
V
+
0.1µF
V
R
SET
RES
–
R
IN
+
V
IN
–
2
3
+
V
LTC1799
GND
SET
OUT
DIV
f
OSC
5V
÷100
4
÷10
÷1
Rev. E
Page 11
APPLICATIONS INFORMATION
10MHz
10k
3V
0.1µF
()
SET
LTC1799
Once RIN/R
R
SET
⎡
V
⎢
IN(MAX)
()
⎢
⎢
⎢
⎣
is known, calculate R
SET
=
N
− V
V
+
RES
•
f
OSC(MAX)
+ V
RES
⎛
R
IN
⎜
R
⎝
SET
from:
SET
•
⎛
1+
⎜
⎝
⎞
⎟
⎠
⎤
⎞
R
IN
⎥
⎟
R
⎠
⎥
SET
(3)
⎥
⎥
⎦
Maximum VCO Modulation Bandwidth
The maximum VCO modulation bandwidth is 10kHz; that
is, the LTC1799 will respond to changes in VIN at a rate
up to 25kHz. In lower frequency applications however, the
modulation frequency may need to be limited to a lower
rate to prevent an increase in output jitter. This lower limit
TYPICAL APPLICATION
is the master oscillator frequency divided by 20, (f
OSC
/20).
In general, for minimum output jitter the modulation frequency should be limited to f
/20 or 10kHz, whichever
OSC
is less. For best performance at all frequencies, the value
for f
when V
Table 2. Variation of V
RIN || R
10k0.98V1.06V
20k1.03V1.11V
40k1.09V1.17V
80k1.13V1.21V
160k1.16V1.24V
V
Note: All of the calculations above assume V
completeness, Table 2 shows the variation of V
of R
approximation of V
should be the master oscillator frequency (N=1)
OSC
is at the lowest level.
IN
for Various Values of RIN || R
RES
(VIN = V+)V
SET
= Voltage across R
RES
and R
(VIN = V+). Calculate first with V
IN
SET
RES
SET
, then recalculate the resistor values using the new value for V
, V+ = 3VV
RES
= 1.1V, although V
RES
against various parallel combinations
RES
≈ 1.1V, then use Table 2 to get a better
RES
RES
≈ 1.1V. For
RES
SET
, V+ = 5V
RES
.
C1
R
SET
1
+
V
LTC1799
2
GND
3
SET
800Hz ≤ f
80Hz ≤ f
5
OUT
SW1
4
DIV
8kHz, N = 10
SINE
800Hz, N = 100
SINE
3V
OPEN, N = 10
C2
0.1µF
Low Power 80Hz to 8kHz Sine Wave Generator (IQ < 4mA)
f
OSC
3V, N = 100
3V
R61
10k
0.1µF
C3
R31 51.1k
C4
÷2
÷4
÷8
÷16
÷32
÷64
÷128
÷256
1µF
R11
100k
f
OSC
64
74HC4520
1
3V
2
16
10
7
8
9
15
CLOCK A
ENABLE A
V
DD
ENABLE B
RESET A
V
SS
CLOCK B
RESET B
Q1A
Q2A
Q3A
Q4A
Q1B
Q2B
Q3B
Q4B
3
4
5
6
11
12
13
14
LTC1067-50
1
+
V
2
NC
3
+
V
4
R51 5.11k
R21 20k
A STOPBAND NOTCH AT THE 3rd HARMONIC
SA
5
LPA
6
BPA
7
HPA/NA
8
INV A
CLOCK-TUNABLE LOWPASS FILTER WITH
CLK
AGND
V
SB
LPB
BPB
HPB/NB
INV B
R
249k
H1
51.1k
R
L1
f
OSC
• 3
64
16
15
R62 14k
14
–
13
12
11
10
9
R32 51.1k
R22 20k
R52
5.11k
SINEWAVE
OUT
f
SINE
1799 TA05
10MHz
= •
N
64R
10k
Rev. E
For more information www.analog.com
11
Page 12
LTC1799
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
PACKAGE DESCRIPTION
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
0.62
MAX
3.85 MAX
0.20 BSC
DATUM ‘A’
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
2.62 REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.30 – 0.50 REF
0.95
REF
1.22 REF
1.4 MIN
0.09 – 0.20
(NOTE 3)
2.80 BSC
1.50 – 1.75
(NOTE 4)
1.00 MAX
PIN ONE
0.95 BSC
0.80 – 0.90
2.90 BSC
(NOTE 4)
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
0.01 – 0.10
1.90 BSC
S5 TSOT-23 0302
12
Rev. E
For more information www.analog.com
Page 13
LTC1799
REVISION HISTORY
REVDATEDESCRIPTIONPAGE NUMBER
C1/11Revised part number in Maximum VCO Modulation Bandwidth section.10
D07/16Updated T
E01/20Added AEC-Q100 Qualified Note
Added W Grade Automotive Products to Order Information
(150°C)2
JMAX
(Revision history begins at Rev C)
1
2
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Formoreinformationwww.analog.com
Rev. E
13
Page 14
LTC1799
5V
THERMISTOR
T
10k
1799 TA04
1400
90
FREQUENCY (kHz)
ON
5V
1799 TA08
OUT
TYPICAL APPLICATIONS
Shutting Down the LTC1799
Temperature-to-Frequency Converter
C1
T
0.1µF
: YSI 44011 800 765-4974
R
100k
R
1
2
3
+
V
LTC1799
GND
SET
OUT
DIV
5
4
1799 TA03
f
OSC
/SHDN
=
10MHz
10
•
R
T
74AC04
R1
10k
0.1µF
1
+
C1
2
3
V
LTC1799
GND
SET
OUT
DIV
5
4
Output Frequency vs Temperature
MAX
1200
1000
800
600
400
200
0
–20 –10 0 10 20 30 40 50 60 70 80
TYP
MIN
TEMPERATURE (°C)
14
Formoreinformationwww.analog.com
Rev. E
01/20
www.analog.com
ANALOG DEVICES, INC. 2001–2020
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