ANALOG DEVICES LTC 1150 CS8 Datasheet

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Page 1

FEATURES

■

High Voltage Operation: ±16V

■

No External Components Required

■

Maximum Offset Voltage: 10µV

■

Maximum Offset Voltage Drift: 0.05µV/°C

■

Low Noise 1.8µV

■

Minimum Voltage Gain: 135dB

■

Minimum PSRR: 120dB

■

Minimum CMRR: 110dB

■

Low Supply Current: 0.8mA

■

Single Supply Operation: 4.75V to 32V

■

Input Common Mode Range Includes Ground

■

200µA Supply Current with Pin 1 Grounded

■

Typical Overload Recovery Time 20ms

(0.1Hz to 10Hz)

P-P

LTC1150

±15V Zero-Drift

Operational Amplifier with

Internal Capacitors

DESCRIPTIO

The LTC zero-drift operational amplifier. The two sample-and-hold capacitors usually required externally by other chopper amplifiers are integrated on-chip. Further, LTC’s proprietary high-voltage CMOS structures allow the LTC1150 to operate at up to 32V total supply voltage.

The LTC1150 has an offset voltage of 0.5µV, drift of

0.01µV/°C, 0.1Hz to 10Hz input noise voltage of 1.8µV and a typical voltage gain of 180dB. The slew rate of 3V/µs and a gain bandwidth product of 2.5MHz are achieved with

0.8mA of supply current. Overload recovery times from positive and negative saturation conditions are 3ms and 20ms, respectively.

1150 is a high-voltage, high-performance

P-P

APPLICATIO S

■

Strain Gauge Amplifiers

■

Electronic Scales

■

Medical Instrumentation

■

Thermocouple Amplifiers

■

High Resolution Data Acquisition

TYPICAL APPLICATIO

Single Supply Instrumentation Amplifier Noise Spectrum

–

LTC1150

–V

For applications demanding low power consumption, Pin 1 can be used to program the supply current. Pin 5 is an optional AC-coupled clock input, useful for synchronization.

The LTC1150 is available in standard 8-lead, plastic dualin-line package, as well as an 8-lead SO package. The LTC1150 can be a plug-in replacement for most standard bipolar op amps with significant improvement in DC performance.

, LTC and LT are registered trademarks of Linear Technology Corporation.

160

–

LTC1150

GAIN = 1000V/V

OUTPUT OFFSET ≤ 5mV TOTAL SUPPLY CURRENT DECREASES TO 400µA WHEN BOTH PIN 1s ARE GROUNDED

OUT

LTC1150 •TA01

140

120

100

VOLTAGE NOISE DENSITY (nV√Hz)

10 1k 10k 100k

100

FREQUENCY (Hz)

LTC1150 •TA02

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LTC1150

WWWU

ABSOLUTE AXI U RATI GS

(Note 1)

Total Supply Voltage (V+ to V–) ............................... 32V

Input Voltage (Note 2) .............. (V

0.3V) to (V– –0.3V)

Output Short Circuit Duration .......................... Indefinite

Burn-In Voltage ....................................................... 32V

Operating Temperature Range

LTC1150M (OBSOLETE).....................–55°C to 125°C

LTC1150C .......................................... – 40°C to 85°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

PACKAGE/ORDER I FOR ATIO

TOP VIEW

SUPPLY

–IN

+IN

–

N8 PACKAGE 8-LEAD PDIP

= 110°C, θJA = 130°C/W

JMAX

J8 PACKAGE

8-LEAD CERDIP

CLOCK OUT

OUT

EXT CLOCK

OBSOLETE PACKAGE

Consider the N8 or S8 Package as an Alternate Source

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ORDER PART

NUMBER

LTC1150CN8

LTC1150MJ8 LTC1150CJ8

SUPPLY

TOP VIEW

–IN

+IN

–

S8 PACKAGE

8-LEAD PLASTIC SO

= 110°C, θJA = 200°C/W

JMAX

ORDER PART

NUMBER

CLOCK OUT

– +

OUT

EXT CLOCK

LTC1150CS8

S8 PART

MARKING

1150

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range otherwise specifications are at TA = 25°C. VS = ±15V, Pin 1 = Open, unless otherwise noted.

LTC1150M LTC1150C

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

Input Offset Voltage (Note 3) ±0.5 ±10 ±0.5 ±10 µV Average Input Offset Drift (Note 3) ● ±0.01 ±0.05 ±0.01 ±0.05 µV/°C

Long Term Offset Voltage Drift 50 50 nV/√mo

Input Offset Current ±20 ±60 ±20 ±200 pA

● ±1.5 ±0.5 nA

Input Bias Current ±10 ±50 ±10 ±100 pA

● ±2.5 ±1.0 nA

Input Noise Voltage RS = 100Ω, 0.1Hz to 10Hz, TC2 1.8 1.8 µV

RS = 100Ω, 0.1Hz to 1Hz, TC2 0.6 0.6

Input Noise Current f = 10Hz (Note 4) 1.8 1.8 fA/√Hz

Common Mode Rejection Ratio VCM = V– to 12V ● 110 130 110 130 dB

Power Supply Rejection Ratio VS = ±2.375V to ±16V ● 120 145 120 145 dB

Large-Signal Voltage Gain RL = 10kΩ, V

Maximum Output Voltage Swing RL = 10kΩ ±13.5 ±14.5 ±13.5 ±14.5 V

RL = 10kΩ ● 10.5/ 10.5/

RL = 100kΩ ±14.95 ±14.95

= ±10V ● 135 180 135 180 dB

OUT

–13.5 –13.5

P-P

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LTC1150

ELECTRICAL CHARACTERISTICS

The ● denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, Pin 1 = Open, unless otherwise noted.

LTC1150M LTC1150C

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

Slew Rate RL = 10kΩ, CL = 50pF 3 3 V/µs

Gain Bandwidth Product 2.5 2.5 MHz

Supply Current No Load 0.8 1.5 0.8 1.5 mA

No Load, Pin 1 = V No Load

Internal Sampling Frequency 550 550 Hz

–

● 22

0.2 0.2

The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V

= 5V, Pin 1 = Open, unless otherwise noted.

LTC1150M LTC1150C

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

Input Offset Voltage (Note 3) ±0.5 ±10 ±0.05 ±10 µV Average Input Offset Drift (Note 3) ● ±0.01 ±0.05 ±0.01 ±0.05 µV/°C

Long Term Offset Voltage Drift 50 50 µV/√mo

Input Offset Current ±10 ±60 ±10 ±60 pA

Input Bias Current ±5 ±30 ±5 ±30 pA

Input Noise Voltage RS = 100Ω, 0.1Hz to 10Hz, TC2 2.0 2.0 µV

RS = 100Ω, 0.1Hz to 1Hz, TC2 0.7 0.7

Input Noise Current f = 10Hz (Note 4) 1.3 1.3 fA/√Hz

Common Mode Rejection Ratio VCM = 0V to 2.7V ● 106 130 106 130 dB

Power Supply Rejection Ratio VS = ±2.375V to ±16V ● 120 145 120 145 dB

Large-Signal Voltage Gain RL = 10kΩ, V

Maximum Output Voltage Swing RL = 10kΩ 0.15 to 4.85 0.15 to 4.85 V

= 100kΩ 0.02 to 4.97 0.02 to 4.97

Slew Rate RL = 10kΩ, CL = 50pF 1.5 1.5 V/µs

Gain Bandwidth Product 1.8 1.8 MHz

Supply Current No Load 0.4 1 0.4 1 mA

Internal Sampling Frequency 300 300 Hz

= 0.3V to 4.5V ● 115 180 115 180 dB

OUT

● 1.5 1.5

P-P

Note 1: Absolute Maximum Ratings are those values beyond which life of the device may be impaired.

Note 2: Connecting any terminal to voltages greater than V

–

may cause destructive latch-up. It is recommended that no sources

V operating from external supplies be applied prior to power-up of the

LTC1150.

or less than

Note 3: These parameters are guaranteed by design. Thermocouple effects

preclude measurement of these voltage levels in high-speed automatic test systems. V capability.

Note 4: Current Noise is calculated from the formula:

where q = 1.6 • 10

is measured to a limit determined by test equipment

= √(2q • Ib)

–19

Coulomb.

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LTC1150

LTC1150 •TC02

100k

475k

TO X-Y RECORDER

475k

FOR 1Hz NOISE BW, INCREASE ALL THE CAPACITORS BY A FACTOR OF 10

316k

0.1µF 0.1µF

0.1µF

158k

10Ω

LTC1150

–

LT1012

–

LTC1150 • TPC06

FREQUENCY (Hz)

GAIN (dB)

PHASE (DEGREES)

100

120

100 10k 100k 10M

–20

–40

180

160

120

200

100

140

220

VS = ± 15V C

= 100pF

PIN 1 = –15V

PHASE

GAIN

TEST CIRCUITS

Offset Voltage Test Circuit

–

LTC1150

OUTPUT

–

LTC1150 •TC01

TYPICAL PERFOR A CE CHARACTERISTICS

Supply Current vs Supply Voltage

1000

TA = 25°C

900

800

700

600

500

SUPPLY CURRENT (µA)

400

300

200

TOTAL SUPPLY VOLTAGE, V+ TO V– (V)

LTC1150 • TPC01

1400

VS = ± 15V

1200

1000

800

600

SUPPLY CURRENT (µA)

400

200

–55

53565

–25

AMBIENT TEMPERATURE (°C)

95 125

LTC1150 • TPC02

DC-10Hz Noise Test Circuit

Gain/Phase vs FrequencySupply Current vs Temperature

120

VS = ± 15V

= 100pF

100

GAIN (dB)

–20

–40

100 10k 100k 10M

GAIN

FREQUENCY (Hz)

PHASE

LTC1150 • TPC03

100

PHASE (DEGREES)

120

140

160

180

200

220

Output Short-Circuit Current vs Supply Voltage

(mA)

OUT

–3

–6

–9

–12

SHORT-CIRCIUT OUTPUT CURRENT, I

–15

–

= V

OUT

SOURCE

= V

OUT

SINK

TOTAL SUPPLY VOLTAGE, V+ TO V– (V)

PIN 1 = OPEN

–

PIN 1 = V

TA = 25°C

–

LTC1150 • TPC04

SET

1200

= ± 15V

= 25°C

1000

800

600

400

SUPPLY CURRENT (µA)

200

10k 100k 1M

, PIN 1 TO V

SET

–

(Ω)

LTC1150 • TPC05

Gain/Phase vs FrequencySupply Current vs R

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TYPICAL PERFOR A CE CHARACTERISTICS

LTC1150

Input Bias Current vs Supply Voltage Gain/Phase vs Frequency

TA = 25°C

= OV

INPUT BIAS CURRENT (pA)

± 4 ± 8

± 2 ± 6

SUPPLY VOLTAGE (V)

± 10

± 12

LTC1150 • TPC07

±14

±16

Input Bias Current vs Input Common Mode Voltage Input Bias Current vs Temperature

–10

–20

INPUT BIAS CURRENT (pA)

–30

–40

–I

–15 –10 –5

INPUT COMMON MODE VOLTAGE (V)

VS = ± 15V

= 25°C

LTC1150 • TPC10

Undistorted Output Swing vs Frequency

OUTPUT VOLTAGE (Vp-p)

100 10k 100k 1M

–1000

–100

–10

INPUT BIAS CURRENT (pA)

–1

–50 –25

PIN 1 = FLOATING

VCM = 0

= ± 15V

–I

0255075100 125

TEMPERATURE (°C)

–

PIN 1 = V

RL = 10k

= 100k

FREQUENCY (Hz)

LTC1150 • TPC08

LTC1150 • TPC11

120

VS = ±2.5V

= 100pF

100

GAIN (dB)

–20

–40

100 10k 100k 10M

GAIN

FREQUENCY (Hz)

Common Mode Input Range vs Supply Voltage

TA = 25°C

–5

COMMON MODE RANGE (V)

–10

–15

±5 ±7.5 ±10

±2.5

SUPPLY VOLTAGE (V)

PHASE

LTC1150 • TPC09

±12.5 ±15

LTC1150 • TPC12

100

PHASE (DEGREES)

120

140

160

180

200

220

CMRR vs Frequency

160

140

120

100

CMRR (dB)

1 100 1k 100k

FREQUENCY (Hz)

10k

LTC1150 • TPC13

PSRR vs Frequency

160

140

120

100

PSRR (dB)

1 100 1k 100k

POSITIVE SUPPLY, PIN 1 = OPEN

POSITIVE SUPPLY, PIN 1 = V

NEGATIVE SUPPLY,

PIN 1 = OPEN

NEGATIVE SUPPLY, PIN 1 = V

FREQUENCY (Hz)

–

10k

LTC1150 • TPC14

Offset Voltage vs Sampling Frequency

VA = ± 15V T

= 25°C

OFFSET VOLTAGE (µV)

–

PIN 1 = V

SAMPLING FREQUENCY, fS (Hz)

PIN 1 = OPEN

LTC1150 • TPC15

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LTC1150

LTC1150 • TPC18

AMBIENT TEMPERATURE (°C)

–55

300

SAMPLING FREQUENCY (Hz)

400

500

600

700

900

–25

53565

95 125

800

VS = ± 15V

TYPICAL PERFOR A CE CHARACTERISTICS

Offset Voltage Drift vs Sampling Frequency

100

VS = ± 15V

OFFSET VOLTAGE DRIFT (nV/C°)

100

SAMPLING FREQUENCY, fS (Hz)

PIN 1 = OPEN

1k 10k

Large-Signal Transient Response

LTC1150 • TPC16

10Hz p-p Noise vs Sampling Frequency

VS = ± 15V

= 25°C

10Hz PEAK-TO-PEAK NOISE (µV)

100

SAMPLING FREQUENCY, fS (Hz)

Large-Signal Transient Response, Pin 1 = V

1k 10k

LTC1150 • TPC17

–

Sampling Frequency vs Temperature

Small-Signal Transient Response

Small-Signal Transient Response, Pin 1 = V

VS = ±15V, AV = 1, CL = 100pF, RL = 10kΩ

–

VS = ±15V, AV = 1, CL = 100pF, RL = 10kΩ,

PIN 1 = V

–

VS = ±15V, AV = 1, CL = 100pF, PIN 1 = V

–

Overload Recovery from Negative Saturation

VS = ±15V, AV = –100, 2ms/DIV

VS = ±15V, AV = 1, CL = 100pF, RL = 10kΩ

Overload Recovery from Positive Saturation

VS = ±15V, AV = –100, 2ms/DIV

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TYPICAL PERFOR A CE CHARACTERISTICS

0.1Hz to 10Hz Noise, V = ±15V, TA = 25°C, Internal Clock

1µV

LTC1150

2.0µV

P-P

0.1Hz to 10Hz Noise, V = ±15V, TA = 25°C, fS = 1800Hz

1µV

0.1Hz to 1Hz Noise, V = ±15V, TA = 25°C, Internal Clock

10s

LTC1150 • TPC25

1.0µV

LTC1150 • TPC26

P-P

500nV

10s

100s

700nV

LTC1150 • TPC27

P-P

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LTC1150

TYPICAL PERFOR A CE CHARACTERISTICS

0.1Hz to 1Hz Noise, V = ±15V, TA = 25°C, fS = 1800Hz

500nV

300nV

P-P

10s

PI DESCRIPTIO S

SUPPLY

ply current can be programmed through Pin 1. When Pin 1 is left open or tied to V+, the supply current defaults to 800µA. Tying a resistor between Pin 1 and Pin 4, the negative supply pin, will reduce the supply current. The supply current, as a function of the resistor value, is shown in Typical Performance Characteristics.

–IN (Pin 2): Inverting Input.

+IN (Pin 3): Noninverting Input.

V– (Pin 4): Negative Supply.

EXT CLOCK IN (Pin 5): Optional External Clock Input. The

LTC1150 has an internal oscillator to control the circuit operation of the amplifier if Pin 5 is left open or biased at any DC voltage in the supply voltage range. When an external clock is desirable, it can be applied to Pin 5. The applied clock is AC-coupled to the internal circuitry to

(Pin 1): Supply Current Programming. The sup-

8-Pin Packages

100s

simplified interface requirements. The amplitude of the clock input signal needs to be greater than 2V and the voltage level has to be within the supply voltage range. Duty cycle is not critical. The internal chopping frequency is the external clock frequency divided by four. When frequency of the external clock falls below 100Hz (internal chopping at 25Hz), the internal oscillator takes over and the circuit chops at 550Hz.

OUT (Pin 6): Output.

V+ (Pin 7): Positive Supply.

CLOCK OUT (Pin 8): Clock Output. The signal coming out

of this pin is at the internal oscillator frequency of about

2.2kHz (four times the chopping frequency) and has voltage levels at VH = VS and VL = VS –4.6. If the circuit is driven by an external clock, Pin 8 is pulled up to VS.

LTC1150 • TPC28

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LTC1150 •AI01

OUTPUT

NOMINALLY UNNECESSARY

RESISTOR USED TO

THERMALLY BALANCE

OTHER INPUT RESISTOR

RESISTOR LEAD, SOLDER, COPPER TRACE JUNCTION

LEAD WIRE/SOLDER COPPER TRACE JUNCTION

LTC1150

–

WUUU

APPLICATIO S I FOR ATIO

LTC1150

ACHIEVING PICOAMPERE/MICROVOLT PERFORMANCE

Picoamperes

In order to realize the picoampere level of accuracy of the LTC1150, proper care must be exercised. Leakage currents in circuitry external to the amplifier can significantly degrade performance. High quality insulation should be used (e.g., Teflon, Kel-F); cleaning of all insulating surfaces to remove fluxes and other residues will probably be necessary–particularly for high temperature performance. Surface coating may be necessary to provide a moisture barrier in high humidity environments.

Board leakage can be minimized by encircling the input connections with a guard ring operated at a potential close to that of the inputs: in inverting configurations the guard ring should be tied to ground; in noninverting connections to the inverting input. Guarding both sides of the printed circuit board is required. Bulk leakage reduction depends on the guard ring width.

number of junctions in the amplifier’s input signal path. Avoid connectors, sockets, switches, and relays where possible. In instances where this is not possible, attempt to balance the number and type of junctions so that differential cancellation occurs. Doing this may involve deliberately introducing junctions to offset unavoidable junctions.

Figure 1 is an example of the introduction of an unnecessary resistor to promote differential thermal balance. Maintaining compensating junctions in close physical proximity will keep them at the same temperature and reduce thermal EMF errors.

Microvolts

Thermocouple effects must be considered if the LTC1150’s ultralow drift is to be fully utilized. Any connection of dissimilar metals forms a thermoelectric junction producing an electric potential which varies with temperature (Seebeck effect). As temperature sensors, thermocouples exploit this phenomenon to produce useful information. In low drift amplifier circuits the effect is a primary source of error.

Connectors, switches, relay contacts, sockets, resistors, solder, and even copper wire are all candidates for thermal EMF generation. Junctions of copper wire from different manufacturers can generate thermal EMFs of 200nV/°C—four times the maximum drift specification of the LTC1150. The copper/kovar junction, formed when wire or printed circuit traces contact a package lead, has a thermal EMF of approximately 35µV/°C—700 times the maximum drift specification of the LTC1150.

Minimizing thermal EMF-induced errors is possible if judicious attention is given to circuit board layout and component selection. It is good practice to minimize the

Figure 1. Extra Resistors Cancel Thermal EMF

When connectors, switches, relays and/or sockets are necessary, they should be selected for low thermal EMF activity. The same techniques of thermally-balancing and coupling the matching junctions are effective in reducing the thermal EMF errors of these components.

Resistors are another source of thermal EMF errors. Table 1 shows the thermal EMF generated for different resistors. The temperature gradient across the resistor is important, not the ambient temperature. There are two junctions formed at each end of the resistor and if these junctions are at the same temperature, their thermal EMFs will cancel each other. The thermal EMF numbers are approximate and vary with resistor value. High values give higher thermal EMF.

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LTC1150

WUUU

APPLICATIO S I FOR ATIO

Table 1. Resistor Thermal EMF

RESISTOR TYPE THERMAL EMF/°C GRADIENT

Tin Oxide ~mV/°C

Carbon Composition ~450µV/°C

Metal Film ~20µV/°C

WireWound

Evenohm ~2µV/°C Manganin ~2µV/°C

PACKAGE-INDUCED OFFSET VOLTAGE

Package-induced thermal EMF effects are another important source of errors. It arises at the copper/kovar junctions formed when wire or printed circuit traces contact a package lead. Like all the previously mentioned thermal EMF effects, it is outside the LTC1150’s offset nulling loop and cannot be cancelled. Metal can H packages exhibit the worst warm-up drift. The input offset voltage specification of the LTC1150 is actually set by the package-induced warm-up drift rather than by the circuit itself. The thermal time constant ranges from 0.5 to 3 minutes, depending on package type.

ALIASING

Like all sampled data systems, the LTC1150 exhibits aliasing behavior at input frequencies near the sampling frequency. The LTC1150 includes a high-frequency correction loop which minimizes this effect; as a result, aliasing is not a problem for most applications.

LEVEL SHIFTING THE CLOCK

Level shifting is needed if the clock output of the LTC1150 in ±15V operation must interface to regular 5V logic circuits. Figures 2 and 3 show some typical level shifting circuits.

When operated from single 5V or ±5V supplies, the LTC1150 clock output at Pin 8 can interface to TTL or CMOS inputs directly.

LOW SUPPLY OPERATION

The minimum supply for proper operation of the LTC1150 is typically below 4.0V (±2.0V). In single supply applications, PSRR is guaranteed down to 4.7V (±2.35V) to ensure proper operation down to the minimum TTL specified voltage of 4.75V.

15V

10k

–

LTC1150

–15V

Figure 2. Output Level Shift (Option 1)

10k

LOGIC

CIRCUIT

LTC1150 • AI02

For a complete discussion of the correction circuitry and aliasing behavior, please refer to the LTC1051/53 data sheet.

SYNCHRONIZATION OF MULTIPLE LTC115O’S

When synchronization of several LTC1150’s is required, one of the LTC1150’s can be used to provide the “master” clock to control over 100 “slave” LTC1150’s. The master clock, coming from Pin 8 of the master LTC1150, can directly drive Pin 5 of the slaves. Note that Pin 8 of the slave LTC1150’s will be pulled up to V

If all the LTC1150’s are to be synchronized with an external clock, then the external clock should drive Pin 5 of all the LTC1150’s.

15V

–

LTC1150

–15V

Figure 3. Output Level Shift (Option 2)

100pF

10k

GND

10k

5V5V

LOGIC

CIRCUIT

LTC1150 • AI03

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TYPICAL APPLICATIO S

LTC1150

Low Level Photodetector

15pF

SINGLE

POINT

SENSE

GROUND

HP 5082-4204

15V

–

LTC1150

–15V

–

LTC1150

Ground Force Reference

15V

1000pF

LT1010

–15V

10k

10Ω

OUTPUT = I

LTC1150 • TA03

• 109Ω

FORCED GROUND

APPLICATION: TO FORCE TWO GROUND POINTS IN A SYSTEM WITHIN 5µV

LTC1150 • TA04

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LTC1150

TYPICAL APPLICATIO S

10Ω

Paralleling to Improve Noise

10k

–

LTC1150

10k

–

LTC1150

10k 25k

10k

CLK IN

MEASURED NOISE

CLK FREE RUN

CLK DRIVEN 1800Hz

10Hz = 700nV 1Hz = 200nV

10Hz = 360nV 1Hz = 160nV

VOS = 1.1µV

P-P

VOS = 10µV

P-P

10Ω

–

LTC1150

10k

–

LTC1150

10k

–

LTC1150

OUT

= 10k V

LTC1150 • TA05

Battery Discharge Monitor

OPEN AT t = 0

LOAD

–

LTC1150

ERROR ≤ +

5µV

IR1

OUT

–IR1

= t

R2C

30pAIR2

LTC1150 • TA06

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PACKAGE DESCRIPTIO

LTC1150

J8 Package

8-Lead CERDIP (Narrow .300 Inch, Hermetic)

(Reference LTC DWG # 05-08-1110)

CORNER LEADS OPTION

(4 PLCS)

.023 – .045

(0.584 – 1.143)

HALF LEAD

.045 – .068

(1.143 – 1.650)

FULL LEAD

OPTION

.300 BSC

(7.62 BSC)

.008 – .018

(0.203 – 0.457)

NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS

0° – 15°

OPTION

OBSOLETE PACKAGE

.005

(0.127)

MIN

.025

(0.635)

RAD TYP

.045 – .065

(1.143 – 1.651)

.014 – .026

(0.360 – 0.660)

.405

(10.287)

MAX

.220 – .310

(5.588 – 7.874)

.015 – .060

(0.381 – 1.524)

.100

(2.54)

BSC

.200

(5.080)

MAX

.125

3.175 MIN

J8 0801

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LTC1150

PACKAGE DESCRIPTIO

N8 Package

8-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510)

.255 ± .015*

(6.477 ± 0.381)

.400*

(10.160)

MAX

87 6

.300 – .325

(7.620 – 8.255)

.065

(1.651)

.008 – .015

(0.203 – 0.381)

+.035

.325

–.015 +0.889

8.255

()

–0.381

NOTE:

1. DIMENSIONS ARE

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

INCHES

MILLIMETERS

TYP

.045 – .065

(1.143 – 1.651)

.100

(2.54)

BSC

.130 ± .005

(3.302 ± 0.127)

.120

(3.048)

MIN

.018 ± .003

(0.457 ± 0.076)

.020

(0.508)

MIN

N8 1002

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PACKAGE DESCRIPTIO

.050 BSC

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.189 – .197

.045 ±.005

(4.801 – 5.004)

NOTE 3

LTC1150

.245 MIN

123 N/2

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

× 45°

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

.160 ±.005

.228 – .244

(5.791 – 6.197)

.053 – .069

(1.346 – 1.752)

0°– 8° TYP

.014 – .019

(0.355 – 0.483)

TYP

.150 – .157

(3.810 – 3.988)

N/2

NOTE 3

.004 – .010

(0.101 – 0.254)

.050

(1.270)

BSC

SO8 0502

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

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Page 16

LTC1150

TYPICAL APPLICATIO

DC Stabilized, Low Noise Amplifier

15V

INPUT

100k

LTC1150

–

–15V

0.01µF

130Ω

15V

LT1028

–

–15V

68Ω

15V

OUTPUT

10k

(A = 1000)

10Ω

LTC1150 • TA07

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

●

www.linear.com

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LW/TP 1202 1K REV B • PRINTED IN USA

 LINEAR TE CHNO LOG Y CO RPORATION 1991