LT3757/LT3757A
Boost, Flyback, SEPIC and
Inverting Controller
FeaTures
n
Wide Input Voltage Range: 2.9V to 40V
n
Positive or Negative Output Voltage Programming
with a Single Feedback Pin
n
Current Mode Control Provides Excellent Transient
Response
n
Programmable Operating Frequency (100kHz to
1MHz) with One External Resistor
n
Synchronizable to an External Clock
n
Low Shutdown Current < 1µA
n
Internal 7.2V Low Dropout Voltage Regulator
n
Programmable Input Undervoltage Lockout with
Hysteresis
n
Programmable Soft-Start
n
Small 10-Lead DFN (3mm × 3mm) and Thermally
Enhanced 10-Pin MSOP Packages
applicaTions
n
Automotive and Industrial Boost, Flyback, SEPIC and
Inverting Converters
n
Telecom Power Supplies
n
Portable Electronic Equipment
DescripTion
The LT®3757/LT3757A are wide input range, current
mode, DC/DC controllers which are capable of generating
either positive or negative output voltages. They can be
configured as either a boost, flyback, SEPIC or inverting
converter. The LT3757/LT3757A drive a low side external
N-channel power MOSFET from an internal regulated 7.2V
supply. The fixed frequency, current-mode architecture
results in stable operation over a wide range of supply
and output voltages.
The operating frequency of LT3757/LT3757A can be set
with an external resistor over a 100kHz to 1MHz range,
and can be synchronized to an external clock using the
SYNC pin. A low minimum operating supply voltage of
2.9V, and a low shutdown quiescent current of less than
1µA, make the LT3757/LT3757A ideally suited for batteryoperated systems.
The LT3757/LT3757A feature soft-start and frequency
foldback functions to limit inductor current during start-up
and output short-circuit. The LT3757A has improved load
transient performance compared to the LT3757.
L, LT , LTC , LTM , Linear Technology, the Linear logo and Burst Mode are registered trademarks
and No R
trademarks are the property of their respective owners.
and ThinSOT are trademarks of Linear Technology Corporation. All other
SENSE
Typical applicaTion
High Efficiency Boost Converter
V
IN
8V TO 16V
300kHz
41.2k
10µF
25V
X5R
200k
43.2k
0.1µF
SHDN/UVLO
LT3757
SYNC
RT
SS
V
C
22k
6.8nF
V
IN
GND
GATE
SENSE
FBX
INTV
CC
4.7µF
10V
X5R
10µH
0.01Ω
226k
16.2k
Efficiency
100
90
0.001
VIN = 8V
VIN = 16V
0.01
0.1 1
OUTPUT CURRENT (A)
10
3757 TA01b
3757afd
V
OUT
24V
2A
+
47µF
35V
×2
10µF
25V
X5R
3757 TA01a
80
70
60
EFFICIENCY (%)
50
40
30
1
LT3757/LT3757A
TOP VIEW
absoluTe MaxiMuM raTings
(Note 1)
VIN, SHDN/UVLO (Note 6) .........................................40V
INTV
GATE ........................................................ INTV
....................................................VIN + 0.3V, 20V
CC
+ 0.3V
CC
SYNC ..........................................................................8V
, SS .........................................................................3V
V
C
RT ............................................................................ 1.5V
SENSE ....................................................................±0.3V
FBX ................................................................. –6V to 6V
pin conFiguraTion
10
V
1
C
FBX
2
11
3
SS
4
RT
5
SYNC
10-LEAD (3mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
DD PACKAGE
= 125°C, θJA = 43°C/W
T
JMAX
V
IN
9
SHDN/UVLO
INTV
8
7
GATE
6
SENSE
CC
Operating Temperature Range (Notes 2, 8)
LT3757E/LT3757AE............................–40°C to 125°C
LT3757I/LT3757AI ............................. –40°C to 125°C
LT3757H/LT3757AH ........................... –40°C to 150°C
LT3757MP/LT3757AMP ..................... –55°C to 150°C
Storage Temperature Range
DFN .................................................... –65°C to 125°C
MSOP ................................................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP ............................................................... 300°C
TOP VIEW
10
1
V
C
FBX
2
SS
RT
SYNC
10-LEAD PLASTIC MSOP
T
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
11
3
4
5
MSE PACKAGE
= 150°C, θJA = 40°C/W
V
SHDN/UVLO
9
INTV
8
GATE
7
SENSE
6
IN
CC
orDer inForMaTion
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LT3757EDD#PBF LT3757EDD#TRPBF LDYW
LT3757IDD#PBF LT3757IDD#TRPBF LDYW
LT3757EMSE#PBF LT3757EMSE#TRPBF LTDYX
LT3757IMSE#PBF LT3757IMSE#TRPBF LTDYX
LT3757HMSE#PBF LT3757HMSE#TRPBF LTDYX
LT3757MPMSE#PBF LT3757MPMSE#TRPBF LTDYX
LT3757AEDD#PBF LT3757AEDD#TRPBF LGGR
LT3757AIDD#PBF LT3757AIDD#TRPBF LGGR
LT3757AEMSE#PBF LT3757AEMSE#TRPBF LTGGM
LT3757AIMSE#PBF LT3757AIMSE#TRPBF LTGGM
LT3757AHMSE#PBF LT3757AHMSE#TRPBF LTGGM
LT3757AMPMSE#PBF LT3757AMPMSE#TRPBF LTGGM
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
10-Lead (3mm × 3mm) Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is
identified by
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
2
3757afd
LT3757/LT3757A
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, SENSE = 0V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Operating Range 2.9 40 V
V
IN
Shutdown I
V
IN
Operating I
V
IN
Operating IQ with Internal LDO Disabled VC = 0.3V, RT = 41.2k, INTVCC = 7.5V 280 400 µA
V
IN
Q
Q
SENSE Current Limit Threshold
SENSE Input Bias Current Current Out of Pin –65 µA
Error Amplifier
FBX Regulation Voltage (V
) V
FBX(REG)
FBX Overvoltage Lockout V
FBX Pin Input Current V
Transconductance g
Output Impedance (Note 3) 5 MΩ
V
C
Line Regulation [∆V
V
FBX
Current Mode Gain (∆VVC/∆V
V
C
Source Current V
V
C
Sink Current V
V
C
(∆IVC/∆V
m
FBX
) (Note 3) 230 µS
FBX
/(∆VIN • V
FBX(REG)
) 5.5 V/V
SENSE
Oscillator
Switching Frequency R
RT Voltage V
Minimum Off-Time 220 ns
Minimum On-Time 220 ns
SYNC Input Low 0.4 V
SYNC Input High 1.5 V
SS Pull-Up Current SS = 0V, Current Out of Pin –10 µA
Low Dropout Regulator
Regulation Voltage
INTV
CC
Undervoltage Lockout Threshold Falling INTVCC
INTV
CC
Overvoltage Lockout Threshold 16 17.5 V
INTV
CC
Current Limit V
INTV
CC
Load Regulation (∆V
INTV
CC
Line Regulation ∆V
INTV
CC
Dropout Voltage (V
Current in Shutdown SHDN/UVLO = 0V, INTVCC = 8V 16 µA
INTV
CC
– V
IN
INTVCC
/ V
INTVCC
INTVCC
/(V
) 0 < I
INTVCC
• ∆VIN) 8V < VIN < 40V 0.008 0.03 %/V
INTVCC
) V
SHDN/UVLO = 0V
0.1 1
SHDN/UVLO = 1.15V
VC = 0.3V, RT = 41.2k 1.6 2.2 mA
)] V
l
> 0V (Note 3)
FBX
V
< 0V (Note 3)
FBX
> 0V (Note 4)
FBX
V
< 0V (Note 4)
FBX
= 1.6V (Note 3)
FBX
V
= –0.8V (Note 3)
FBX
> 0V, 2.9V < VIN < 40V (Notes 3, 7)
FBX
V
< 0V, 2.9V < VIN < 40V (Notes 3, 7)
FBX
= 0V, VC = 1.5V –15 µA
FBX
= 1.7V
FBX
V
= –0.85V
FBX
= 41.2k to GND, V
T
R
= 140k to GND, V
T
R
= 10.5k to GND, V
T
= 1.6V 1.2 V
FBX
FBX
FBX
FBX
= 1.6V
= 1.6V
= 1.6V
l
l
l
100 110 120 mV
1.569
–0.816
6
7
1.6
–0.80
8
11
70 100
–10
0.002
0.0025
12
11
270 300
100
1000
7 7.2 7.4 V
2.6 2.7
UVLO Hysteresis
= 40V
IN
V
= 15V
IN
< 20mA, V
INTVCC
= 6V, I
IN
INTVCC
30 40
= 8V –0.9 –0.5 %
IN
= 20mA 400 mV
0.1
95
6
1.631
–0.784
10
14
10
0.056
0.05
330 kHz
2.8 V
55 mA
µA
µA
V
V
%
%
nA
nA
%/V
%/V
µA
µA
kHz
kHz
V
mA
3757afd
3
LT3757/LT3757A
REGULATED FEEDBACK VOLTAGE (mV)
1605
REGULATED FEEDBACK VOLTAGE (mV)
–788
QUIESCENT CURRENT (mA)
1.8
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, SHDN/UVLO = 24V, SENSE = 0V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Voltage to Bypass Internal LDO 7.5 V
INTV
CC
Logic Inputs
SHDN/UVLO Threshold Voltage Falling V
SHDN/UVLO Input Low Voltage I(V
= INTVCC = 8V
IN
) Drops Below 1µA 0.4 V
IN
SHDN/UVLO Pin Bias Current Low SHDN/UVLO = 1.15V 1.7 2 2.5 µA
SHDN/UVLO Pin Bias Current High SHDN/UVLO = 1.30V 10 100 nA
Gate Driver
Gate Driver Output Rise Time CL = 3300pF (Note 5), INTVCC = 7.5V 22 ns
t
r
Gate Driver Output Fall Time CL = 3300pF (Note 5), INTVCC = 7.5V 20 ns
t
f
Gate V
OL
Gate V
OH
l
1.17 1.22 1.27 V
0.05 V
INTVCC –0.05 V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LT3757E/LT3757AE are guaranteed to meet performance
specifications from the 0°C to 125°C junction temperature. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LT3757I/LT3757AI are guaranteed over the full –40°C to
125°C operating junction temperature range. The LT3757H/LT3757AH are
guaranteed over the full –40°C to 150°C operating junction temperature
range. High junction temperatures degrade operating lifetimes.
lifetime is
derated at junction temperatures greater than 125°C. The
LT3757MP/LT3757AMP are 100% tested and guaranteed over the full
–55°C to 150°C operating junction temperature range.
Typical perForMance characTerisTics
Positive Feedback Voltage
vs Temperature, V
1600
1595
1590
1585
1580
VIN = 8V
–75 –50
–25 25 100 150125
4
IN
VIN = 40V
VIN = 24V
VIN = INTVCC = 2.9V
SHDN/UVLO = 1.33V
0 50 75
TEMPERATURE (°C)
3757 G01
Note 3: The LT3757/LT3757A are tested in a feedback loop which servos
V
to the reference voltages (1.6V and –0.8V) with the VC pin forced
FBX
to 1.3V.
Note 4: FBX overvoltage lockout is measured at V
to regulated V
Note 5: Rise and fall times are measured at 10% and 90% levels.
Note 6: For V
Note 7: SHDN/UVLO = 1.33V when V
Note 8: The LT3757/LT3757A include overtemperature protection that
is intended to protect the device during momentary overload conditions.
Operating
Junction temperature will exceed the maximum operating junction
temperature when overtemperature protection is active. Continuous
operation above the specified maximum operating junction temperature
may impair device reliability.
Negative Feedback Voltage
vs Temperature, VIN
–790
–792
–794
–796
–798
–800
–802
–804
VIN = INTVCC = 2.9V
SHDN/UVLO = 1.33V
VIN = 8V
VIN = 24V
–75 –50 0 50 75–25 25 100 150125
TEMPERATURE (°C)
.
FBX(REG)
below 6V, the SHDN/UVLO pin must not exceed VIN.
IN
= 2.9V.
IN
FBX(OVERVOLTAGE)
TA = 25°C, unless otherwise noted.
Quiescent Current
vs Temperature, V
VIN = 40V
3757 G02
1.7
1.6
1.5
1.4
–75 –50 0 50 75–25 25 100 150125
VIN = 40V
VIN = INTVCC = 2.9V
TEMPERATURE (°C)
relative
IN
VIN = 24V
3757 G03
3757afd
Typical perForMance characTerisTics
SENSE THRESHOLD (mV)
120
I
(µA)
330
LT3757/LT3757A
= 25°C, unless otherwise noted.
T
A
Dynamic Quiescent Current
vs Switching Frequency R
35
CL = 3300pF
30
25
20
(mA)
Q
I
15
10
5
0
0
300
100 200
SWITCHING FREQUENCY (KHz)
400
500 600
700
900800
3757 G04
1000
Switching Frequency
vs Temperature
RT = 41.2K
320
310
vs Switching Frequency
T
1000
(kΩ)
100
T
R
10
0
100 200
SWITCHING FREQUENCY (KHz)
300
400
500 600
700
SENSE Current Limit Threshold
vs Temperature
115
900800
3757 G05
1000
Normalized Switching Frequency
vs FBX
120
100
80
60
40
NORMALIZED FREQUENCY (%)
20
0
–0.8
–0.4
0 0.4 0.8
FBX VOLTAGE (V)
SENSE Current Limit Threshold
vs Duty Cycle
115
110
1.2 1.6
3757 G06
300
290
SWITCHING FREQUENCY (kHz)
280
270
–75 –50 0 50 75–25 25 100 150125
1.28
1.26
1.24
1.22
SHDN/UVLO VOLTAGE (V)
1.20
1.18
–75 –50 0 50 75–25 25 100 150125
110
105
100
TEMPERATURE (°C)
3757 G07
–75 –50 0 50 75–25 25 100 150125
TEMPERATURE (°C)
SHDN/UVLO Threshold
vs Temperature SHDN/UVLO Current vs Voltage
40
30
SHDN/UVLO RISING
20
SHDN/UVLO FALLING
10
SHDN/UVLO CURRENT (µA)
0
TEMPERATURE (°C)
0
3757 G10
10 20 30
SHDN/UVLO VOLTAGE (V)
3757 G08
3757 G11
105
100
SENSE THRESHOLD (mV)
SHDN/ UVLO
40
95
0
20 40 8060
DUTY CYCLE (%)
SHDN/UVLO Hysteresis Current
vs Temperature
2.4
2.2
2.0
1.8
1.6
–75 –50 0 50 75–25 25 100 150125
TEMPERATURE (°C)
100
3757 G09
3757 G12
3757afd
5
LT3757/LT3757A
INTV
(V)
7.4
DROPOUT VOLTAGE (mV)
700
90
Typical perForMance characTerisTics
INTVCC Minimum Output Current
vs Temperature
INTV
CC
7.3
CC
7.2
7.1
7.0
–75 –50 0 50 75–25 25 100 150125
TEMPERATURE (°C)
3757 G13
vs V
IN
TJ = 150°C
80
70
60
50
40
CURRENT (mA)
CC
30
INTV
20
10
0
0
INTVCC = 6V
INTVCC = 4.5V
10 20 305 15 25 35
VIN (V)
= 25°C, unless otherwise noted.
T
A
INTVCC Load Regulation
7.3
VIN = 8V
7.2
7.1
VOLTAGE (V)
CC
7
INTV
6.9
40
3757 G14
6.8
0
20
10
INTVCC LOAD (mA)
40 50
30
60
70
3757 G15
INTVCC Line Regulation
7.30
7.25
7.20
VOLTAGE (V)
CC
INTV
7.15
7.10
5
0
10
Gate Drive Rise
and Fall Time vs INTV
30
CL = 3300pF
25
20
FALL TIME
15
TIME (ns)
10
5
0
3
6
15
VIN (V)
RISE TIME
INTVCC (V)
25 30 40
20
CC
9
35
3757 G16
12 15
3757 G19
I
L1A
INTVCC Dropout Voltage
vs Current, Temperature
VIN = 6V
600
500
400
300
200
100
0
0
5
INTVCC LOAD (mA)
Typical Start-Up Waveforms
V
= 12V
IN
V
OUT
5V/DIV
+ I
L1B
5A/DIV
2ms/DIV
PAGE 31 CIRCUIT
125°C
10
150°C
75°C
25°C
0°C
–55°C
15 20
3757 G17
3757 G20
10V/DIV
20V/DIV
I
L1A
Gate Drive Rise
and Fall Time vs C
90
INTVCC = 7.2V
80
70
60
50
40
TIME (ns)
30
20
10
0
0
5 1510 20 25 30
RISE TIME
L
CL (nF)
FBX Frequency Foldback
Waveforms During Overcurrent
V
OUT
V
SW
+ I
L1B
5A/DIV
50µs/DIV
PAGE 31 CIRCUIT
FALL TIME
3757 G18
V
= 12V
IN
3757 G21
3757afd
6
pin FuncTions
LT3757/LT3757A
VC (Pin 1): Error Amplifier Compensation Pin. Used to
stabilize the voltage loop with an external RC network.
FBX (Pin 2): Positive and Negative Feedback Pin. Receives
the feedback voltage from the external resistor divider
across the output. Also modulates the frequency during
start-up and fault conditions when FBX is close to GND.
SS (Pin 3): Soft-Start Pin. This pin modulates compensation
pin voltage (V
) clamp. The soft-start interval is set with
C
an external capacitor. The pin has a 10µA (typical) pull-up
current source to an internal 2.5V rail. The soft-start pin
is reset to GND by an undervoltage condition at SHDN/
UVLO, an INTV
undervoltage or overvoltage condition
CC
or an internal thermal lockout.
RT (Pin 4): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND. Do not leave this pin
open.
SYNC (Pin 5): Frequency Synchronization Pin. Used to
synchronize the switching frequency to an outside clock.
If this feature is used, an R
resistor should be chosen to
T
program a switching frequency 20% slower than the SYNC
pulse frequency. Tie the SYNC pin to GND if this feature
is not used. SYNC is ignored when FBX is close to GND
.
SENSE (Pin 6): The Current Sense Input for the Control
Loop. Kelvin connect this pin to the positive terminal of
the switch current sense resistor in the source of the
N-channel MOSFET. The negative terminal of the current
sense resistor should be connected to GND plane close
to the IC.
GATE (Pin 7): N-Channel MOSFET Gate Driver Output.
Switches between INTV
IC is shut down, during thermal lockout or when INTV
and GND. Driven to GND when
CC
CC
is above or below the OV or UV thresholds, respectively.
INTV
Gate Driver. Supplied from V
cal). INTV
capacitor placed close to pin. INTV
directly to V
(Pin 8): Regulated Supply for Internal Loads and
CC
and regulated to 7.2V (typi-
IN
must be bypassed with a minimum of 4.7µF
CC
can be connected
CC
, if VIN is less than 17.5V. INTVCC can also
IN
be connected to a power supply whose voltage is higher
than 7.5V, and lower than V
, provided that supply does
IN
not exceed 17.5V.
SHDN/UVLO (Pin 9): Shutdown and Undervoltage Detect
Pin. An accurate 1.22V (nominal) falling threshold with
externally programmable hysteresis detects when power
is okay to enable switching. Rising hysteresis is generated
by the external resistor
divider and an accurate internal
2µA pull-down current. An undervoltage condition resets
sort-start. Tie to 0.4V, or less, to disable the device and
reduce V
(Pin 10): Input Supply Pin. Must be locally bypassed
V
IN
quiescent current below 1µA.
IN
with a 0.22µF, or larger, capacitor placed close to the pin.
Exposed Pad (Pin 11): Ground. This pin also serves as the
negative terminal of the current sense resistor. The Exposed
Pad must be soldered directly to the local ground plane.
3757afd
7
LT3757/LT3757A
block DiagraM
L1
G2
–
+
+
–
10
V
108mV
•
IN
INTV
GATE
SENSE
GND
CC
11
V
IN
I
2.5V
I
S3
V
C
1
C
R
C2
C
C
C1
1.72V
A11
–
2µA
2.5V
S1
INTERNAL
REGULATOR
I
S2
10µA
Q3
AND UVLO
UVLO
G4 G3
+
G6
FBX
A12
–
–0.88V
+
+
1.6V
FBX
2
–0.8V
A1
–
+
A2
–
1.25V
Q2
–
A3
+
VC
PWM
COMPARATOR
A10
TSD
165˚C
–
A7
+
G1
9
SHDN/UVLO
–
1.22V
+
A9
A8
G5
SLOPE
RAMP
GENERATOR
100kHz-1MHz
OSCILLATOR
R3R4
RAMP
17.5V
+
–
+
2.7V UP
–
2.6V DOWN
V
ISENSE
+
CURRENT
LIMIT
7.2V LDO
SR1
R O
C
IN
DRIVER
S
A6
A5
C
DC
D1
V
OUT
L2
•
FBX
C
VCC
8
7
6
M1
R
SENSE
C
OUT2
R2
+
C
OUT1
R1
8
R5
8k
FREQUENCY
FOLDBACK
D2
FREQ
FOLDBACK
D3
SS
3 5 4
C
SS
1.25V
SYNC
+
+
A4
–
FREQ
PROG
Q1
RT
R
T
Figure 1. LT3757 Block Diagram Working as a SEPIC Converter
3757 F01
3757afd
applicaTions inForMaTion
(R3 + R4)
LT3757/LT3757A
Main Control Loop
The LT3757 uses a fixed frequency, current mode control
scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block
Diagram in Figure 1.
The start of each oscillator cycle sets the SR latch (SR1) and
turns on the external power MOSFET switch M1 through
driver G2. The switch current flows through the external
current sensing resistor R
and generates a voltage
SENSE
proportional to the switch current. This current sense
voltage V
(amplified by A5) is added to a stabilizing
ISENSE
slope compensation ramp and the resulting sum (SLOPE)
is fed into the positive terminal of the PWM comparator A7.
When SLOPE exceeds the level at the negative input of A7
pin), SR1 is reset, turning off the power switch. The
(V
C
level at the negative input of A7 is set by the error amplifier
A1 (or A2) and is an amplified version of the difference
between the feedback voltage (FBX pin) and the reference
voltage (1.6V or –0.8V, depending on the configuration).
In this manner, the error amplifier sets the correct peak
switch current level to keep the output in regulation.
The LT3757 has a switch
current limit
function. The current
sense voltage is input to the current limit comparator A6.
If the SENSE pin voltage is higher than the sense current
limit threshold V
SENSE(MAX)
(110mV, typical), A6 will reset
SR1 and turn off M1 immediately.
The LT3757 is capable of generating either positive or
negative output voltage with a single FBX pin. It can be
configured as a boost, flyback or SEPIC converter to generate positive output voltage, or as an inverting converter
to generate negative output voltage. When configured as
a SEPIC converter, as shown in Figure 1, the FBX pin is
pulled up to the internal bias voltage of 1.6V by a voltage divider (R1 and R2) connected from V
to GND.
OUT
Comparator A2 becomes inactive and comparator A1
performs the inverting amplification from FBX to V
. When
C
the LT3757 is in an inverting configuration, the FBX pin
is pulled down to –0.8V by a voltage divider connected
from V
to GND. Comparator A1 becomes inactive and
OUT
comparator A2 performs the noninverting amplification
from FBX to V
.
C
The LT3757 has overvoltage protection functions to
protect the converter from excessive output voltage
overshoot during start-up or
recovery from a short-circuit
condition. An overvoltage comparator A11 (with 20mV
hysteresis) senses when the FBX pin voltage exceeds the
positive regulated voltage (1.6V) by 8% and provides a
reset pulse. Similarly, an overvoltage comparator A12
(with 10mV hysteresis) senses when the FBX pin voltage
exceeds the negative regulated voltage (–0.8V) by 11%
and provides a reset pulse. Both reset pulses are sent to
the main RS latch (SR1) through G6 and G5. The power
MOSFET switch M1 is actively held off for the duration of
an output overvoltage condition.
Programming Turn-On and Turn-Off Thresholds with
the SHDN/UVLO Pin
The SHDN/UVLO pin controls whether the LT3757 is
enabled or is in shutdown state. A micropower 1.22V
reference, a comparator A10 and a controllable current
source I
allow the user to accurately program the supply
S1
voltage at which the IC turns on and off. The falling value
can be accurately set by the resistor dividers R3 and R4.
When SHDN/UVLO is above 0.7V, and below the 1.22V
threshold, the small pull-down current source I
(typical
S1
2µA) is active.
The purpose of this current is to allow the user to program
the rising hysteresis.
The Block Diagram of the comparator
and the external resistors is shown in Figure 1. The typical
falling threshold voltage and rising threshold voltage can
be calculated by the following equations:
V
V
VIN,FALLING
VIN,RISING
= 1.22 •
= 2µA • R3+ V
R4
IN,FALLING
For applications where the SHDN/UVLO pin is only used
as a logic input, the SHDN/UVLO pin can be connected
directly to the input voltage V
for always-on operation.
IN
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LT3757/LT3757A
−
applicaTions inForMaTion
INTVCC Regulator Bypassing and Operation
An internal, low dropout (LDO) voltage regulator produces
the 7.2V INTV
supply which powers the gate driver,
CC
as shown in Figure 1. If a low input voltage operation is
expected (e.g., supplying power from a lithium-ion battery
or a 3.3V logic supply), low threshold MOSFETs should
be used. The LT3757 contains an undervoltage lockout
comparator A8 and an overvoltage lockout comparator
A9 for the INTV
supply. The INTVCC undervoltage (UV)
CC
threshold is 2.7V (typical), with 100mV hysteresis, to
ensure that the MOSFETs have sufficient gate drive voltage
before turning on. The logic circuitry within the LT3757 is
also powered from the internal INTV
The INTV
overvoltage (OV) threshold is set to be 17.5V
CC
supply.
CC
(typical) to protect the gate of the power MOSFET. When
INTV
is below the UV threshold, or above the OV thresh-
CC
old, the GATE pin will be forced to GND and the soft-start
operation will be triggered.
The INTV
regulator must be bypassed to ground imme-
CC
diately adjacent to the IC pins with a minimum of 4.7µF ceramic capacitor. Good bypassing is necessary to supply the
high transient currents required
by the MOSFET gate driver.
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
The on-chip power dissipation can be a significant concern
when a large power MOSFET is being driven at a high frequency and the V
voltage is high. It is important to limit
IN
the power dissipation through selection of MOSFET and/
or operating frequency so the LT3757 does not exceed its
maximum junction temperature rating. The junction temperature T
T
J
can be estimated using the following equations:
J
= TA + PIC • θ
JA
TA = ambient temperature
= junction-to-ambient thermal resistance
θ
JA
= IC power consumption
P
IC
= V
= VIN operation IQ = 1.6mA
I
Q
I
DRIVE
• (IQ + I
IN
= average gate drive current = f • Q
DRIVE
)
G
f = switching frequency
= power MOSFET total gate charge
Q
G
The LT3757 uses packages with an Exposed Pad for enhanced thermal conduction. With proper soldering to the
Exposed Pad on the underside of the package and a full
copper plane underneath the device, thermal resistance
) will be about 43°C/W for the DD package and 40°C/W
(θ
JA
for the MSE package. For an ambient board temperature of
= 70°C and maximum junction temperature of 125°C,
T
A
the maximum I
DRIVE
(I
DRIVE(MAX)
) of the DD package can
be calculated as:
TA)
(T
I
DRIVE(MAX )
J
=
(θ
JA
− IQ=
• VIN)
The LT3757 has an internal INTVCC I
1.28W
V
IN
DRIVE
− 1.6mA
current limit
function to protect the IC from excessive on-chip power
dissipation. The I
increases (see the INTV
current limit decreases as the VIN
DRIVE
Minimum Output Current vs VIN
CC
graph in the Typical Performance Characteristics section).
If I
reaches the current limit, INTVCC voltage will fall
DRIVE
and may trigger the soft-start.
Based on the preceding equation and the INTV
Output Current vs V
graph, the user can calculate the
IN
Minimum
CC
maximum MOSFET gate charge the LT3757 can drive at
a given V
vs VIN at different frequencies to guarantee a minimum
Q
G
4.5V INTV
and switch frequency. A plot of the maximum
IN
is shown in Figure 2.
CC
As illustrated in Figure 2, a trade-off between the operating
frequency and the size of the power MOSFET may be needed
in order to maintain a reliable IC junction temperature.
300
250
300kHz
200
150
(nC)
G
Q
100
50
0
5
0
Figure 2. Recommended Maximum QG vs VIN at Different
Frequencies to Ensure INTVCC Higher Than 4.5V
1MHz
10 20
15 30 4025 35
VIN (V)
3757 F02
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applicaTions inForMaTion
LT3757/LT3757A
Prior to lowering the operating frequency, however, be
sure to check with power MOSFET manufacturers for their
most recent low QG, low R
devices. Power MOSFET
DS(ON)
manufacturing technologies are continually improving, with
newer and better performance devices being introduced
almost yearly.
An effective approach to reduce the power consumption
of the internal LDO for gate drive is to tie the INTVCC pin
to an external voltage source high enough to turn off the
internal LDO regulator.
If the input voltage VIN does not exceed the absolute
maximum rating of both the power MOSFET gate-source
voltage (VGS) and the INTVCC overvoltage lockout threshold
voltage (17.5V), the INTVCC pin can be shorted directly
to the VIN pin. In this condition, the internal LDO will be
turned off and the gate driver will be powered directly
from the input voltage, VIN. With the INTVCC pin shorted to
VIN, however, a small current (around 16µA) will load the
INTVCC in shutdown mode. For applications that require
the lowest shutdown mode input supply current, do not
connect the INTVCC pin to VIN.
In SEPIC or flyback applications, the INTVCC pin can be
connected to the output voltage V
diode, as shown in Figure 3, if V
through a blocking
OUT
meets the following
OUT
conditions:
1. V
2. V
3. V
A resistor R
limit the inrush current from V
< VIN (pin voltage)
OUT
< 17.5V
OUT
< maximum VGS rating of power MOSFET
OUT
can be connected, as shown in Figure 3, to
VCC
. Regardless of whether
OUT
or not the INTVCC pin is connected to an external voltage
source, it is always necessary to have the driver circuitry
bypassed with a 4.7µF low ESR ceramic capacitor to
ground immediately adjacent to the INTVCC and GND pins.
LT3757
INTV
CC
GND
C
4.7µF
3757 F03
D
VCC
VCC
R
VCC
V
OUT
Operating Frequency and Synchronization
The choice of operating frequency may be determined
by on-chip power dissipation, otherwise it is a trade-off
between efficiency and component size. Low frequency
operation improves efficiency by reducing gate drive current and MOSFET and diode switching losses. However,
lower frequency operation requires a physically larger
inductor. Switching frequency also has implications for
loop compensation. The LT3757 uses a constant-frequency
architecture that can be programmed over a 100kHz to
1000kHz range with a single external resistor from the
RT pin to ground, as shown in Figure 1. The RT pin must
have an external resistor to GND for proper operation of
the LT3757. A table for selecting the value of R
for a given
T
operating frequency is shown in Table 1.
Table 1. Timing Resistor (RT) Value
OSCILLATOR FREQUENCY (kHz) RT (kΩ)
100 140
200 63.4
300 41.2
400 30.9
500 24.3
600 19.6
700 16.5
800 14
900 12.1
1000 10.5
The operating frequency of the LT3757 can be synchronized
to an external clock source. By providing a digital clock
signal into the SYNC pin, the LT3757 will operate at the
SYNC clock frequency. If this feature is used, an R
resistor
T
should be chosen to program a switching frequency 20%
slower than SYNC pulse frequency. The SYNC pulse should
have a minimum pulse width of 200ns. Tie the SYNC pin
to GND if this feature is not used.
Figure 3. Connecting INTVCC to V
OUT
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