ANALOG DEVICES LT 1963 AEQ Datasheet

LT1963A Series

OUTPUT CURRENT (A)

0

DROPOUT VOLTAGE (mV)

200

300

1.6

1963A TA02

100

0

0.4

0.8

1.2

0.2

0.6

1.0

1.4

400

150

250

50

350

, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Protected by U.S. Patents,
including 6118263, 6144250.

*See Applications Information Section.

1.5A, Low Noise,

Fast Transient Response

LDO Regulators

FEATURES

n

Optimized for Fast Transient Response

n

Output Current: 1.5A

n

Dropout Voltage: 340mV

n

Low Noise: 40μV

n

1mA Quiescent Current

n

No Protection Diodes Needed

n

Controlled Quiescent Current in Dropout

n

Fixed Output Voltages: 1.5V, 1.8V, 2.5V, 3.3V

n

Adjustable Output from 1.21V to 20V

n

<1μA Quiescent Current in Shutdown

n

Stable with 10μF Output Capacitor*

n

Stable with Ceramic Capacitors*

n

Reverse Battery Protection

n

No Reverse Current

n

Thermal Limiting

n

5-Lead TO-220, DD, 3-Lead SOT-223 and

(10Hz to 100kHz)

RMS

8-Lead SO Packages

APPLICATIONS

n

3.3V to 2.5V Logic Power Supplies

n

Post Regulator for Switching Supplies

DESCRIPTION

®

The LT
for fast transient response. The devices are capable of
supplying 1.5A of output current with a dropout voltage of
340mV. Operating quiescent current is 1mA, dropping to
<1μA in shutdown. Quiescent current is well controlled; it
does not rise in dropout as it does with many other regula­tors. In addition to fast transient response, the LT1963A
regulators have very low output noise which makes them
ideal for sensitive RF supply applications.

Output voltage range is from 1.21V to 20V. The LT1963A
regulators are stable with output capacitors as low as
10μF. Internal protection circuitry includes reverse battery
protection, current limiting, thermal limiting and reverse
current protection. The devices are available in fi xed output
voltages of 1.5V, 1.8V, 2.5V, 3.3V and as an adjustable
device with a 1.21V reference voltage. The LT1963A regula­tors are available in 5-lead TO-220, DD, 3-lead SOT-223,
8-lead SO and 16-lead TSSOP packages.

1963A series are low dropout regulators optimized

TYPICAL APPLICATION

3.3V to 2.5V Regulator

IN

VIN> 3V

10μF*

SHDN

LT1963A-2.5

SENSE

GND

1963A TA01

OUT

++

*TANTALUM,
CERAMIC OR
ALUMINUM ELECTROLYTIC

2.5V

1.5A

10μF*

Dropout Voltage

1963afd

1

LT1963A Series

ABSOLUTE MAXIMUM RATINGS

(Note 1)

IN Pin Voltage ........................................................ ±20V

OUT Pin Voltage ......................................................±20V

Input to Output Differential Voltage (Note 2) ...........±20V

SENSE Pin Voltage ............................................... ±20V

ADJ Pin Voltage ...................................................... ±7V

SHDN Pin Voltage ................................................. ±20V

Output Short-Circuit Duration ........................ Indefi nite

PIN CONFIGURATION

FRONT VIEW

5

TAB IS

GND

*PIN 5 = SENSE FOR LT1963A-1.5/LT1963A-1.8/

5-LEAD PLASTIC DD

LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

T

JMAX

4
3
2
1

Q PACKAGE

= 150°C, θJA = 30°C/ W

SENSE/ADJ*
OUT
GND
IN

SHDN

TAB IS

GND

*PIN 5 = SENSE FOR LT1963A-1.5/LT1963A-1.8/

FRONT VIEW

T PACKAGE

5-LEAD PLASTIC TO-220

LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

= 150°C, θJA = 50°C/ W

T

JMAX

Operating Junction Temperature Range (Note 3)

LT1963AE ...........................................–40°C to 125°C

LT1963AI............................................–40°C to 125°C

LT1963AMP .......................................–55°C to 125°C

Storage Temperature Range ...................–65°C to 150°C

Lead Temperature (Soldering, 10 sec) ..................300°C

TOP VIEW

1

GND

2

NC

3

5
4
3
2
1

SENSE/
ADJ*

OUT
GND
IN

SHDN

*PIN 6 = SENSE FOR LT1963A-1.5/LT1963A-1.8/

OUT

4

OUT

OUT

SENSE/ADJ*

GND

GND

EXPOSED PAD (PIN 17) IS GND. MUST BE

LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

T

JMAX

17

5

6

7

8

FE PACKAGE

16-LEAD PLASTIC TSSOP

SOLDERED TO THE PCB.

= 150°C, θJA = 38°C/ W

GND

16

NC

15

IN

14

IN

13

IN

12

NC

11

SHDN

10

GND

9

2

TAB IS

GND

3-LEAD PLASTIC SOT-223

T

= 150°C, θJA = 50°C/ W

JMAX

FRONT VIEW

ST PACKAGE

TOP VIEW

OUT

3

OUT

2

GND

1

IN

SENSE/ADJ*

*PIN 2 = SENSE FOR LT1963A-1.5/LT1963A-1.8/

1

2

GND

3

NC

4

S8 PACKAGE

8-LEAD PLASTIC SO

LT1963A-2.5/LT1963A-3.3

= ADJ FOR LT1963A

= 150°C, θJA = 70°C/ W

T

JMAX

IN

8

GND

7

GND

6

SHDN

5

1963afd

LT1963A Series

ORDER INFORMATION

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT1963AEQ#PBF LT1963AEQ#TRPBF LT1963AEQ 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AIQ#PBF LT1963AIQ#TRPBF LT1963AIQ 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AMPQ#PBF LT1963AMPQ#TRPBF LT1963AMPQ 5-Lead Plastic DD-PAK –55°C to 125°C
LT1963AEQ-1.5#PBF LT1963AEQ-1.5#TRPBF LT1963AEQ-1.5 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AEQ-1.8#PBF LT1963AEQ-1.8#TRPBF LT1963AEQ-1.8 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AEQ-2.5#PBF LT1963AEQ-2.5#TRPBF LT1963AEQ-2.5 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AEQ-3.3#PBF LT1963AEQ-3.3#TRPBF LT1963AEQ-3.3 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AET#PBF LT1963AET#TRPBF LT1963AET 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AIT#PBF LT1963AIT#TRPBF LT1963AIT 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-1.5#PBF LT1963AET-1.5#TRPBF LT1963AET-1.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-1.8#PBF LT1963AET-1.8#TRPBF LT1963AET-1.8 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-2.5#PBF LT1963AET-2.5#TRPBF LT1963AET-2.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-3.3#PBF LT1963AET-3.3#TRPBF LT1963AET-3.3 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AEFE#PBF LT1963AEFE#TRPBF 1963AEFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AIFE#PBF LT1963AIFE#TRPBF 1963AIFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.5#PBF LT1963AEFE-1.5#TRPBF 1963AEFE15 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.8#PBF LT1963AEFE-1.8#TRPBF 1963AEFE18 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-2.5#PBF LT1963AEFE-2.5#TRPBF 1963AEFE25 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-3.3#PBF LT1963AEFE-3.3#TRPBF 1963AEFE33 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEST-1.5#PBF LT1963AEST-1.5#TRPBF 963A15 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-1.8#PBF LT1963AEST-1.8#TRPBF 963A18 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-2.5#PBF LT1963AEST-2.5#TRPBF 963A25 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-3.3#PBF LT1963AEST-3.3#TRPBF 963A33 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AES8#PBF LT1963AES8#TRPBF 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AIS8#PBF LT1963AIS8#TRPBF 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AMPS8#PBF LT1963AMPS8#TRPBF 963AMP 8-Lead Plastic SO –55°C to 125°C
LT1963AES8-1.5#PBF LT1963AES8-1.5#TRPBF 963A15 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-1.8#PBF LT1963AES8-1.8#TRPBF 963A18 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-2.5#PBF LT1963AES8-2.5#TRPBF 963A25 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-3.3#PBF LT1963AES8-3.3#TRPBF 963A33 8-Lead Plastic SO –40°C to 125°C

LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT1963AEQ LT1963AEQ#TR LT1963AEQ 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AIQ LT1963AIQ#TR LT1963AIQ 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AMPQ LT1963AMPQ#TR LT1963AMPQ 5-Lead Plastic DD-PAK –55°C to 125°C
LT1963AEQ-1.5 LT1963AEQ-1.5#TR LT1963AEQ-1.5 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AEQ-1.8 LT1963AEQ-1.8#TR LT1963AEQ-1.8 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AEQ-2.5 LT1963AEQ-2.5#TR LT1963AEQ-2.5 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AEQ-3.3 LT1963AEQ-3.3#TR LT1963AEQ-3.3 5-Lead Plastic DD-PAK –40°C to 125°C
LT1963AET LT1963AET#TR LT1963AET 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AIT LT1963AIT#TR LT1963AIT 5-Lead Plastic TO-220 –40°C to 125°C

1963afd

3

LT1963A Series

ORDER INFORMATION

LEAD BASED FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT1963AET-1.5 LT1963AET-1.5#TR LT1963AET-1.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-1.8 LT1963AET-1.8#TR LT1963AET-1.8 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-2.5 LT1963AET-2.5#TR LT1963AET-2.5 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AET-3.3 LT1963AET-3.3#TR LT1963AET-3.3 5-Lead Plastic TO-220 –40°C to 125°C
LT1963AEFE LT1963AEFE#TR 1963AEFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AIFE LT1963AIFE#TR 1963AIFE 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.5 LT1963AEFE-1.5#TR 1963AEFE15 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-1.8 LT1963AEFE-1.8#TR 1963AEFE18 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-2.5 LT1963AEFE-2.5#TR 1963AEFE25 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEFE-3.3 LT1963AEFE-3.3#TR 1963AEFE33 16-Lead Plastic TSSOP –40°C to 125°C
LT1963AEST-1.5 LT1963AEST-1.5#TR 963A15 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-1.8 LT1963AEST-1.8#TR 963A18 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-2.5 LT1963AEST-2.5#TR 963A25 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AEST-3.3 LT1963AEST-3.3#TR 963A33 3-Lead Plastic SOT-223 –40°C to 125°C
LT1963AES8 LT1963AES8#TR 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AIS8 LT1963AIS8#TR 1963A 8-Lead Plastic SO –40°C to 125°C
LT1963AMPS8 LT1963AMPS8#TR 963AMP 8-Lead Plastic SO –55°C to 125°C
LT1963AES8-1.5 LT1963AES8-1.5#TR 963A15 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-1.8 LT1963AES8-1.8#TR 963A18 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-2.5 LT1963AES8-2.5#TR 963A25 8-Lead Plastic SO –40°C to 125°C
LT1963AES8-3.3 LT1963AES8-3.3#TR 963A33 8-Lead Plastic SO –40°C to 125°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges. *The temperature grade is identifi ed by a label on the shipping container.

For more information on lead free part marking, go to:
For more information on tape and reel specifi cations, go to:

http://www.linear.com/leadfree/

http://www.linear.com/tapeandreel/

4

1963afd

LT1963A Series

The l denotes specifi cations which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifi cations are at T

PARAMETER CONDITIONS MIN TYP MAX UNITS

Minimum Input Voltage (Notes 4,12) I

Regulated Output Voltage (Note 5) LT1963A-1.5 V

ADJ Pin Voltage (Notes 4, 5) LT1963A VIN = 2.21V, I

Line Regulation LT1963A-1.5 ΔVIN = 2.21V to 20V, I

Load Regulation LT1963A-1.5 V

Dropout Voltage
V

= V

IN

OUT(NOMINAL)

(Notes 6, 7, 12)

GND Pin Current
V

= V

IN

OUT(NOMINAL)

+ 1V

(Notes 6, 8)

Output Voltage Noise C
ADJ Pin Bias Current (Notes 4, 9) 3 10 μA
Shutdown Threshold V

SHDN Pin Current (Note 10) V

Quiescent Current in Shutdown V

= 0.5A

LOAD

I

= 1.5A

LOAD

2.5V < V
LT1963A-1.8 VIN = 2.3V, I

2.8V < V
LT1963A-2.5 VIN = 3V, I

3.5V < V
LT1963A-3.3 VIN = 3.8V, I

4.3V < V

2.5V < V

LT1963A-1.8 ΔV
LT1963A-2.5 ΔV
LT1963A-3.3 ΔV
LT1963A (Note 4) ΔV

V
LT1963A-1.8 VIN = 2.8V, ΔI

V
LT1963A-2.5 VIN = 3.5V, ΔI

V
LT1963A-3.3 V

V
LT1963A (Note 4) VIN = 2.5V, ΔI

V
I

= 1mA

LOAD

I

= 1mA

LOAD

I

= 100mA

LOAD

I

= 100mA

LOAD

I

= 500mA

LOAD

I

= 500mA

LOAD

I

= 1.5A

LOAD

I

= 1.5A

LOAD

= 0mA

I

LOAD

I

= 1mA

LOAD

I

= 100mA

LOAD

I

= 500mA

LOAD

I

= 1.5A

LOAD

= 10μF, I

OUT

= Off to On

OUT

V

= On to Off

OUT

= 0V

SHDN

V

= 20V

SHDN

= 6V, V

IN

= 25°C. (Note 3)

A

1.9

= 2.21V, I

IN

= 2.3V to 20V, I

IN

= 3V to 20V, I

IN

= 3.8V to 20V, I

IN

= 2.21V to 20V, I

IN

= 2.5V, ΔI

IN

= 2.5V, ΔI

IN

= 2.8V, ΔI

IN

= 3.5V, ΔI

IN

= 4.3V, ΔI

IN

= 4.3V, ΔI

IN

= 2.5V, ΔI

IN

LOAD

< 20V, 1mA < I

IN

LOAD

< 20V, 1mA < I

IN

= 1mA

LOAD

< 20V, 1mA < I

IN

LOAD

< 20V, 1mA < I

IN

LOAD

< 20V, 1mA < I

IN

LOAD
LOAD

LOAD
LOAD

LOAD
LOAD

LOAD
LOAD

LOAD
LOAD

= 1mA

LOAD

= 1mA

LOAD

LOAD

= 1mA

LOAD

= 1mA

LOAD

= 1mA

LOAD

= 1mA

LOAD

= 1mA

LOAD

= 1mA

LOAD

= 1mA

LOAD

= 1mA to 1.5A
= 1mA to 1.5A

= 1mA to 1.5A
= 1mA to 1.5A

= 1mA to 1.5A
= 1mA to 1.5A

= 1mA to 1.5A
= 1mA to 1.5A

= 1mA to 1.5A
= 1mA to 1.5A

< 1.5A

< 1.5A

< 1.5A

< 1.5A

< 1.5A

l

1.477

l

1.447

1.773

l

1.737

2.462

l

2.412

3.250

l

3.200

1.192

l

1.174

l
l
l
l
l

●

●

●

●

●

2.1 2.5

1.500

1.500

1.800

1.800

2.500

2.500

3.300

3.300

1.210

1.210

2.0

2.5

3.0

3.5

1.5

1.523

1.545

1.827

1.854

2.538

2.575

3.350

3.400

1.228

1.246
6

7

10
10

5

2918mV

21020mV

2.5 15
30

32035mV

2815mV

0.02 0.06

●

0.10

0.10 0.17

●

0.22

0.19 0.27

●

0.35

0.34 0.45

●

●

●

●

●

●

= 1.5A, BW = 10Hz to 100kHz 40 μV

LOAD

●

0.25

●

1.0

1.1

3.8

15
80

0.90

0.75

0.01
3

= 0V 0.01 1 μA

SHDN

0.55

1.5

1.6

5.5
25

120

2V

1

30

mV
mV
mV
mV
mV

mV

mV
mV

mV

mV

mV

mA
mA
mA
mA
mA

RMS

μA
μA

V
V

V
V

V
V

V
V

V
V

V
V

V
V

V
V

V
V

V
V

V

1963afd

5

LT1963A Series

The l denotes specifi cations which apply over the full operating

ELECTRICAL CHARACTERISTICS

temperature range, otherwise specifi cations are at T

PARAMETER CONDITIONS MIN TYP MAX UNITS

Ripple Rejection V

Current Limit V

Input Reverse Leakage Current (Note 13) Q, T, S8 Packages V

Reverse Output Current (Note 11) LT1963A-1.5 V

– V

IN

OUT

f

= 120Hz, I

RIPPLE

= 7V, V

IN

V

= V

IN

OUT(NOMINAL)

ST Package V

LT1963A-1.8 V
LT1963A-2.5 V
LT1963A-3.3 V
LT1963A (Note 4) V

= 25°C. (Note 3)

A

= 1.5V (Avg), V

= 0.75A

LOAD

= 0V

OUT

+ 1V, ΔV

= –20V, V

IN

= –20V, V

IN

OUT
OUT
OUT
OUT
OUT

RIPPLE

OUT

= 0.5V

= –0.1V

OUT
OUT

P-P

= 0
= 0

,

= 1.5V, VIN < 1.5V
= 1.8V, VIN < 1.8V
= 2.5V, VIN < 2.5V
= 3.3V, VIN < 3.3V
= 1.21V, VIN < 1.21V

55 63 dB

2A

●

1.6

●

●

600
600
600
600
300

1
2

1200
1200
1200
1200

600

mA
mA

μA
μA
μA
μA
μA

A

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: Absolute maximum input to output differential voltage can not
be achieved with all combinations of rated IN pin and OUT pin voltages.
With the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from IN to OUT can not exceed ±20V.

Note 3: The LT1963A regulators are tested and specifi ed under pulse load
conditions such that T

≈ TA. The LT1963AE is 100% tested at TA = 25°C.

J

Performance at –40°C and 125°C is assured by design, characterization and
correlation with statistical process controls. The LT1963AI is guaranteed
over the full –40°C to 125°C operating junction temperature range. The
LT1963AMP is 100% tested and guaranteed over the –55°C to 125°C
operating junction temperature range.

Note 4: The LT1963A (adjustable version) is tested and specifi ed for these
conditions with the ADJ pin connected to the OUT pin.

Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specifi cation will not apply
for all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.

Note 6: To satisfy requirements for minimum input voltage, the LT1963A
(adjustable version) is tested and specifi ed for these conditions with an
external resistor divider (two 4.12k resistors) for an output voltage of 2.4V.
The external resistor divider will add a 300μA DC load on the output.

Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specifi ed output current. In dropout, the
output voltage will be equal to: V

Note 8: GND pin current is tested with V

IN

– V

DROPOUT

= V

IN

.

OUT(NOMINAL)

+ 1V and a

current source load. The GND pin current will decrease at higher input
voltages.

Note 9: ADJ pin bias current fl ows into the ADJ pin.
Note 10: SHDN pin current fl ows into the SHDN pin.
Note 11: Reverse output current is tested with the IN pin grounded and the

OUT pin forced to the rated output voltage. This current fl ows into the OUT
pin and out the GND pin.

Note 12: For the LT1963A, LT1963A-1.5 and LT1963A-1.8 dropout voltage
will be limited by the minimum input voltage specifi cation under some
output voltage/load conditions.

Note 13: For the ST package, the input reverse leakage current increases
due to the additional reverse leakage current for the SHDN pin, which is
tied internally to the IN pin.

6

1963afd

TYPICAL PERFORMANCE CHARACTERISTICS

OUTPUT CURRENT (A)

0

DROPOUT VOLTAGE (mV)

500

450

400

350

300

250

200

150

100

50

0

0.4

0.8

1.0

1963A G01

0.2 0.6

1.2

1.4

1.6

TJ = 125°C

TJ = 25°C

OUTPUT CURRENT (A)

GUARANTEED DROPOUT VOLTAGE (mV)

600

500

400

300

200

100

0

0

0.4

0.8

1.0

1963A G02

0.2 0.6

1.2

1.4

1.6

TJ ≤ 125°C

TJ ≤ 25°C

= TEST POINTS

TEMPERATURE (°C)

–50

DROPOUT VOLTAGE (mV)

500

450

400

350

300

250

200

150

100

50

0

0

50

75

1963A G03

–25

25

100

125

IL = 100mA

IL = 1mA

IL = 0.5A

IL = 1.5A

LT1963A Series

Typical Dropout Voltage

Quiescent Current

1.4

1.2

LT1963A-1.5/1.8/-2.5/-3.3

1.0

0.8

0.6

0.4

QUIESCENT CURRENT (mA)

VIN = 6V

0.2

R

= ∞, IL = 0

L

= V

V

SHDN

0

–50

IN

–25 0

TEMPERATURE (°C)

LT1963A

50 100 125

25 75

1963A G04

Guaranteed Dropout Voltage

LT1963A-1.5 Output Voltage

1.54
IL = 1mA

1.53

1.52

1.51

1.50

1.49

OUTPUT VOLTAGE (V)

1.48

1.47

1.46

–25 0 50

–50

25

TEMPERATURE (°C)

75 100 125

1963A G40

Dropout Voltage

LT1963A-1.8 Output Voltage

1.84
IL = 1mA

1.83

1.82

1.81

1.80

1.79

OUTPUT VOLTAGE (V)

1.78

1.77

1.76

–25 25 75 125

–50

050

TEMPERATURE (°C)

100

1963A G05

LT1963A-2.5 Output Voltage

2.58

2.56

2.54

2.52

OUTPUT VOLTAGE (V)

2.50

2.48

2.46

2.44

2.42
–50

IL = 1mA

–25 25 75 125

050

TEMPERATURE (°C)

100

1963A G06

LT1963A-3.3 Output Voltage

3.38
IL = 1mA

3.36

3.34

3.32

3.30

3.28

OUTPUT VOLTAGE (V)

3.26

3.24

3.22

–25 25 75 125

–50

050

TEMPERATURE (°C)

100

1963A G07

LT1963A ADJ Pin Voltage

1.230
IL = 1mA

1.225

1.220

1.215

1.210

1.205

ADJ PIN VOLTAGE (V)

1.200

1.195

1.190

–25 25 75 125

–50

050

TEMPERATURE (°C)

100

1963A G08

1963afd

7

LT1963A Series

INPUT VOLTAGE (V)

0

QUIESCENT CURRENT (mA)

14

12

10

8

6

4

2

0

1963A G09

2

5678910

1

34

TJ = 25°C
R

L

= ∞

V

SHDN

= V

IN

INPUT VOLTAGE (V)

0

QUIESCENT CURRENT (mA)

14

12

10

8

6

4

2

0

1963A G10

2

1056789

1

34

TJ = 25°C
R

L

= ∞

V

SHDN

= V

IN

INPUT VOLTAGE (V)

0

0

QUIESCENT CURRENT (mA)

2

6

8

10

14

1

5

7

1963A G41

4

12

4

9

10

2

3

68

TJ = 25°C
R

L

= ∞

V

SHDN

= V

IN

INPUT VOLTAGE (V)

0

QUIESCENT CURRENT (mA)

14

12

10

8

6

4

2

0

1963A G11

2

1056789

1

34

TJ = 25°C
R

L

= ∞

V

SHDN

= V

IN

INPUT VOLTAGE (V)

0

QUIESCENT CURRENT (mA)

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

1963A G12

4

2010 12 14 16 18

2

68

TJ = 25°C
R

L

= 4.3k

V

SHDN

= V

IN

TYPICAL PERFORMANCE CHARACTERISTICS

LT1963A-1.5 Quiescent Current

LT1963A-3.3 Quiescent Current

LT1963A-1.8 Quiescent Current

LT1963A Quiescent Current

LT1963A-2.5 Quiescent Current

LT1963A-1.5 GND Pin Current

25

TJ = 25°C

= V

V

SHDN

IN

*FOR V

20

15

10

= 1.5V

OUT

RL = 150, IL = 10mA*

RL = 5, IL = 300mA*

LT1963A-1.8 GND Pin Current

25

TJ = 25°C
V

SHDN

*FOR V

20

15

10

GND PIN CURRENT (mA)

5

0

0

8

= V

IN

= 1.8V

OUT

RL = 6, IL = 300mA*

RL = 18, IL = 100mA*

RL = 180, IL = 10mA*

1

3

4

2

INPUT VOLTAGE (V)

GND PIN CURRENT (mA)

5

0

123

0

LT1963A-2.5 GND Pin Current

25

20

15

10

1098765

1963A G13

GND PIN CURRENT (mA)

5

0

0

RL = 8.33, IL = 300mA*

RL = 25, IL = 100mA*

RL = 250, IL = 10mA*

1

3

2

INPUT VOLTAGE (V)

TJ = 25°C

= V

V

SHDN

IN

*FOR V

4

OUT

= 2.5V

1098765

1963A G14

LT1963A-3.3 GND Pin Current

25

20

15

10

GND PIN CURRENT (mA)

5

0

1

0

2

RL = 15, IL = 100mA*

67 9

45

INPUT VOLTAGE (V)

TJ = 25°C
V

= V

SHDN

*FOR V

RL = 11, IL = 300mA*

RL = 33, IL = 100mA*

RL = 330, IL = 100mA*

3

4

INPUT VOLTAGE (V)

OUT

8

IN

= 3.3V

10

1963A G42

1098765

1963A G15

1963afd

TYPICAL PERFORMANCE CHARACTERISTICS

INPUT VOLTAGE (V)

100

90

80

70

60

50

40

30

20

10

0

GND PIN CURRENT (mA)

1963A G17

0123

4

5

678910

RL = 1.8, IL = 1A*

RL = 1.2, IL = 1.5A*

RL = 3.6, IL = 500mA*

TJ = 25°C
V

SHDN

= V

IN

*FOR V

OUT

= 1.8V

INPUT VOLTAGE (V)

100

90

80

70

60

50

40

30

20

10

0

GND PIN CURRENT (mA)

1963A G18

0123

4

5

678910

RL = 2.5, IL = 1A*

RL = 1.67, IL = 1.5A*

RL = 5, IL = 500mA*

TJ = 25°C
V

SHDN

= V

IN

*FOR V

OUT

= 2.5V

INPUT VOLTAGE (V)

100

90

80

70

60

50

40

30

20

10

0

GND PIN CURRENT (mA)

1963A G19

0123

4

5

678910

RL = 3.3, IL = 1A*

RL = 2.2, IL = 1.5A*

RL = 6.6, IL = 500mA*

TJ = 25°C
V

SHDN

= V

IN

*FOR V

OUT

= 3.3V

INPUT VOLTAGE (V)

100

90

80

70

60

50

40

30

20

10

0

GND PIN CURRENT (mA)

1963A G20

0123

4

5

678910

RL = 1.21, IL = 1A*

RL = 0.81, IL = 1.5A*

RL = 2.42, IL = 500mA*

TJ = 25°C
V

SHDN

= V

IN

*FOR V

OUT

= 1.21V

OUTPUT CURRENT (A)

100

90

80

70

60

50

40

30

20

10

0

GND PIN CURRENT (mA)

1963A G21

0 0.2 0.4 0.6

0.8

1.0

1.2 1.4 1.6

VIN=V

OUT (NOMINAL)

+1V

TEMPERATURE (°C)

–50

SHDN PIN THRESHOLD (V)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

0

50

75

1963A G23

–25

25

100

125

IL = 1mA

IL = 1.5A

TEMPERATURE (°C)

–50

SHDN PIN THRESHOLD (V)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

0

50

75

1963A G22

–25

25

100

125

IL = 1mA

LT1963A Series

LT1963A GND Pin Current

10

8

6

4

GND PIN CURRENT (mA)

2

0

0

RL = 4.33, IL = 300mA*

RL = 12.1, IL = 100mA*

RL = 121, IL = 10mA*

1

3

2

INPUT VOLTAGE (V)

TJ = 25°C
V

*FOR V

4

LT1963A-2.5 GND Pin Current

SHDN

= V

OUT

IN

= 1.21V

1963A G16

100

GND PIN CURRENT (mA)

1098765

90

80

70

60

50

40

30

20

10

0

0

RL = 1, IL = 1.5A*

21

INPUT VOLTAGE (V)

TJ = 25°C
V

SHDN

*FOR V

RL = 1.5, IL = 1A*

RL = 3, IL = 500mA*

67 9

43

5

LT1963A-3.3 GND Pin Current

= V

OUT

IN

= 1.5V

8

LT1963A-1.8 GND Pin CurrentLT1963A-1.5 GND Pin Current

10

1963A G43

LT1963A GND Pin Current

GND Pin Current vs I

LOAD

SHDN Pin Threshold (On-to-Off)

SHDN Pin Threshold (Off-to-On)

1963afd

9

LT1963A Series

TEMPERATURE (°C)

–50

7

6

5

4

3

2

1

0

25 75

1963A G25

–25 0

50 100 125

SHDN PIN INPUT CURRENT (μA)

V

SHDN

= 20V

TEMPERATURE (°C)

–50

ADJ PIN BIAS CURRENT (μA)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

0

50

75

1963A G26

–25

25

100

125

SHDN PIN VOLTAGE (V)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

SHDN PIN INPUT CURRENT (μA)

1963A G24

0246

8

10

12 14 16 18 20

INPUT/OUTPUT DIFFERENTIAL (V)

02 6 10 14 18

CURRENT LIMIT (A)

3.0

2.5

2.0

1.5

1.0

0.5

0

4 8 12 16

1963A G27

20

TJ = 125°C

TJ = 25°C

TJ = –50°C

ΔV

OUT

= 100mV

TEMPERATURE (°C)

–50

CURRENT LIMIT (A)

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

0

50

75

1963A G28

–25

25

100

125

VIN = 7V
V

OUT

= 0V

OUTPUT VOLTAGE (V)

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

REVERSE OUTPUT CURRENT (mA)

1963A G29

0123

4

5

678910

LT1963A

LT1963A-1.5

LT1963A-3.3

TJ = 25°C
V

IN

= 0V
CURRENT FLOWS INTO
OUTPUT PIN
V

OUT

= V

ADJ

(LT1963A)

V

OUT

= VFB(LT1963A-1.5/1.8/-2.5/-3.3)

LT1963A-2.5

LT1963A-1.8

TEMPERATURE (°C)

–50

REVERSE OUTPUT CURRENT (mA)

0

50

75

1963A G30

–25

25

100

125

LT1963A-1.8/-2.5/-3.3

LT1963A

VIN = 0V
V

OUT

= 1.21V (LT1963A)

V

OUT

= 1.5V (LT1963A-1.5)

V

OUT

= 1.8V (LT1963A-1.8)

V

OUT

= 2.5V (LT1963A-2.5)

V

OUT

= 3.3V (LT1963A-3.3)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

TYPICAL PERFORMANCE CHARACTERISTICS

SHDN Pin Input Current

Current Limit

SHDN Pin Input Current

ADJ Pin Bias Current

Current Limit

Reverse Output Current

10

Reverse Output Current

1963afd

TYPICAL PERFORMANCE CHARACTERISTICS

FREQUENCY (Hz)

RIPPLE REJECTION (dB)

80

70

60

50

40

30

20

10

0

10 1k 10k 1M

1963A G31

100 100k

C

OUT

= 10μF TANTALUM

C

OUT

= 100μF TANTALUM

+10 × 1μF CERAMIC

IL = 0.75A
V

IN

= V

OUT(NOMINAL)

+1V + 50mV

RMS

RIPPLE

TEMPERATURE (°C)

–50

76

74

72

70

68

66

64

62

25 75

1963A G32

–25 0

50 100 125

RIPPLE REJECTION (dB)

IL = 0.75A
V

IN

= V

OUT(NOMINAL)

+1V + 0.5V

P-P

RIPPLE AT f = 120Hz

TEMPERATURE (°C)

–50

MINIMUM INPUT VOLTAGE (V)

3.0

2.5

2.0

1.5

1.0

0.5

0

25 75

1963A G33

–25 0

50 100 125

IL = 1.5A

IL = 500mA

IL = 100mA

FREQUENCY (Hz)

0.01

OUTPUT NOISE SPECTRAL DENSITY (μV/√Hz)

0.1

10 100 1k 10k 100k

1.0

1963A G35

C

OUT

= 10μF

I

L

=1.5A

LT1963A-3.3

LT1963A-2.5

LT1963A-1.8

LT1963A

LT1963A-1.5

V

OUT

100μV/DIV

1ms/DIV

C

OUT

= 10μF

I

LOAD

= 1.5A

1963A G37

LT1963A Series

Ripple Rejection

Load Regulation

10

5

0

–5

–10

LOAD REGULATION (mV)

VIN = V

OUT(NOMINAL)

(LT1963A-1.8/-2.5/-3.3)

–15

= 2.7V (LT1963A/LT1963A-1.5)

V

IN

= 1mA TO 1.5A

ΔI

L

–20

–50

–25 0

LT1963A-1.8

LT1963A-2.5

+1V

50 100 125

25 75

TEMPERATURE (°C)

LT1963A-1.5

LT1963A

LT1963A-3.3

1963A G34

Ripple Rejection

LT1963A Minimum Input Voltage

Output Noise Spectral Density

RMS Output Noise vs Load
Current (10Hz to 100kHz)

50

C

OUT

45

)

40

RMS

35

30

25

20

15

10

OUTPUT NOISE VOLTAGE (μV

5

0

0.0001 0.01 0.1 10

= 10μF

LT1963A-3.3

LT1963A-2.5

LT1963A-1.8

LT1963A-1.5

0.001 1

LT1963A

LOAD CURRENT (A)

LT1963A-3.3 10Hz to 100kHz Output Noise

1963A G36

1963afd

11

LT1963A Series

TIME (μs)

150

100

50

0

–50

–100

–150

1.5

1.0

0.5

0

OUTPUT VOLTAGE

DEVIATION (mV)

LOAD

CURRENT (A)

1963A G39

0 50 100 150

250

300

350 400 450 500200

VIN = 4.3V
C

IN

= 33μF TANTALUM

C

OUT

= 100μF TANTALUM

+10 × 1μF CERAMIC

TYPICAL PERFORMANCE CHARACTERISTICS

LT1963A-3.3 Transient Response

200

VIN = 4.3V

= 3.3μF TANTALUM

C

150

IN

C

= 10μF TANTALUM

OUT

100

50

0

DEVIATION (mV)

OUTPUT VOLTAGE

–50

–100

0.6

0.4

LOAD

0.2

CURRENT (A)

0

0246

8

10

TIME (μs)

LT1963A-3.3 Transient Response

12 14 16 18 20

1963A G38

12

1963afd

PIN FUNCTIONS

LT1963A Series

OUT: Output. The output supplies power to the load.
A minimum output capacitor of 10μF is required to
prevent oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.

SENSE: Sense. For fi xed voltage versions of the LT1963A
(LT1963A-1.5/LT1963A-1.8/LT1963A-2.5/LT1963A-3.3),
the SENSE pin is the input to the error amplifi er. Optimum
regulation will be obtained at the point where the SENSE
pin is connected to the OUT pin of the regulator. In criti­cal applications, small voltage drops are caused by the
resistance (R

) of PC traces between the regulator and the

P

load. These may be eliminated by connecting the SENSE
pin to the output at the load as shown in Figure 1 (Kelvin
Sense Connection). Note that the voltage drop across
the external PC traces will add to the dropout voltage of
the regulator. The SENSE pin bias current is 600μA at
the nominal rated output voltage. The SENSE pin can be
pulled below ground (as in a dual supply system where
the regulator load is returned to a negative supply) and
still allow the device to start and operate.

be off when the SHDN pin is pulled low. The SHDN pin can
be driven either by 5V logic or open-collector logic with a
pull-up resistor. The pull-up resistor is required to supply
the pull-up current of the open-collector gate, normally
several microamperes, and the SHDN pin current, typically
3μA. If unused, the SHDN pin must be connected to V

IN

.
The device will be in the low power shutdown state if the
SHDN pin is not connected.

IN: Input. Power is supplied to the device through the IN
pin. A bypass capacitor is required on this pin if the device
is more than six inches away from the main input fi lter
capacitor. In general, the output impedance of a battery
rises with frequency, so it is advisable to include a bypass
capacitor in battery-powered circuits. A bypass capacitor
in the range of 1μF to 10μF is suffi cient. The LT1963A
regulators are designed to withstand reverse voltages
on the IN pin with respect to ground and the OUT pin. In
the case of a reverse input, which can happen if a battery
is plugged in backwards, the device will act as if there is
a diode in series with its input. There will be no reverse
current fl ow into the regulator and no reverse voltage
will appear at the load. The device will protect both itself
and the load.

ADJ: Adjust. For the adjustable LT1963A, this is the input
to the error amplifi er. This pin is internally clamped to ±7V.
It has a bias current of 3μA which fl ows into the pin. The
ADJ pin voltage is 1.21V referenced to ground and the
output voltage range is 1.21V to 20V.

SHDN: Shutdown. The SHDN pin is used to put the LT1963A
regulators into a low power shutdown state. The output will

IN

V

+

IN

Figure 1. Kelvin Sense Connection

SHDN

LT1963A

SENSE

GND

OUT

R

P

+

R

P

LOAD

1963A F01

1963afd

13

LT1963A Series

IN

1963A F02

R2

OUT

V

IN

V

OUT

ADJ

GND

LT1963A

R1

+

V

OUT

=1.21V 1+

R2
R

1











+ I

ADJ

()

R2

()

V

ADJ

=1.21V

I

ADJ

= 3μA AT 25°C

OUTPUT RANGE = 1.21V TO 20V

APPLICATIONS INFORMATION

The LT1963A series are 1.5A low dropout regulators opti­mized for fast transient response. The devices are capable
of supplying 1.5A at a dropout voltage of 350mV. The low
operating quiescent current (1mA) drops to less than 1μA
in shutdown. In addition to the low quiescent current, the
LT1963A regulators incorporate several protection features
which make them ideal for use in battery-powered systems.
The devices are protected against both reverse input and
reverse output voltages. In battery backup applications
where the output can be held up by a backup battery when
the input is pulled to ground, the LT1963A-X acts like it
has a diode in series with its output and prevents reverse
current fl ow. Additionally, in dual supply applications
where the regulator load is returned to a negative supply,
the output can be pulled below ground by as much as 20V
and still allow the device to start and operate.

Adjustable Operation

The adjustable version of the LT1963A has an output volt­age range of 1.21V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2.
The device servos the output to maintain the voltage at
the ADJ pin at 1.21V referenced to ground. The current
in R1 is then equal to 1.21V/R1 and the current in R2 is
the current in R1 plus the ADJ pin bias current. The ADJ
pin bias current, 3μA at 25°C, fl ows through R2 into the
ADJ pin. The output voltage can be calculated using the
formula in Figure 2. The value of R1 should be less than

4.17k to minimize errors in the output voltage caused by
the ADJ pin bias current. Note that in shutdown the output
is turned off and the divider current will be zero.

The adjustable device is tested and specifi ed with the ADJ
pin tied to the OUT pin for an output voltage of 1.21V.
Specifi cations for output voltages greater than 1.21V will
be proportional to the ratio of the desired output voltage
to 1.21V: V
output current change of 1mA to 1.5A is –3mV typical at
V

OUT

(5V/1.21V)(–3mV) = –12.4mV

Output Capacitors and Stability

The LT1963A regulator is a feedback circuit. Like any
feedback circuit, frequency compensation is needed to

14

OUT

= 1.21V. At V

/1.21V. For example, load regulation for an

= 5V, load regulation is:

OUT

Figure 2. Adjustable Operation

make it stable. For the LT1963A, the frequency compensa­tion is both internal and external—the output capacitor.
The size of the output capacitor, the type of the output
capacitor, and the ESR of the particular output capacitor
all affect the stability.

In addition to stability, the output capacitor also affects
the high frequency transient response. The regulator
loop has a fi nite band width. For high frequency transient
loads, recovery from a transient is a combination of the
output capacitor and the bandwidth of the regulator. The
LT1963A was designed to be easy to use and accept a
wide variety of output capacitors. However, the frequency
compensation is affected by the output capacitor and opti­mum frequency stability may require some ESR, especially
with ceramic capacitors.

For ease of use, low ESR polytantalum capacitors (POSCAP)
are a good choice for both the transient response and
stability of the regulator. These capacitors have intrinsic
ESR that improves the stability. Ceramic capacitors have
extremely low ESR, and while they are a good choice in
many cases, placing a small series resistance element
will sometimes achieve optimum stability and minimize
ringing. In all cases, a minimum of 10μF is required while
the maximum ESR allowable is 3Ω.

The place where ESR is most helpful with ceramics is
low output voltage. At low output voltages, below 2.5V,
some ESR helps the stability when ceramic output capaci­tors are used. Also, some ESR allows a smaller capacitor
value to be used. When small signal ringing occurs with
ceramics due to insuffi cient ESR, adding ESR or increas­ing the capacitor value improves the stability and reduces
the ringing. Table 1 gives some recommended values of
ESR to minimize ringing caused by fast, hard current
transitions.

1963afd

APPLICATIONS INFORMATION

LT1963A Series

Table 1. Capacitor Minimum ESR

V

OUT

1.2V 20mΩ 15mΩ 10mΩ 5mΩ

1.5V 20mΩ 15mΩ 10mΩ 5mΩ

1.8V 15mΩ 10mΩ 10mΩ 5mΩ

2.5V 5mΩ 5mΩ 5mΩ 5mΩ

3.3V 0mΩ 0mΩ 0mΩ 5mΩ
≥5V 0mΩ 0mΩ 0mΩ 0mΩ

10μF 22μF 47μF 100μF

Figures 3 through 8 show the effect of ESR on the transient
response of the regulator. These scope photos show the
transient response for the LT1963A at three different output
voltages with various capacitors and various values of ESR.
The output load conditions are the same for all traces. In
all cases there is a DC load of 500mA. The load steps up
to 1A at the fi rst transition and steps back to 500mA at
the second transition.

At the worst case point of 1.2V

OUT

with 10μF C

OUT

(Figure 3), a minimum amount of ESR is required. While
20mΩ is enough to eliminate most of the ringing, a value
closer to 50mΩ provides a more optimum response. At

2.5V output with 10μF C

(Figure 4) the output rings

OUT

at the transitions with 0Ω ESR but still settles to within
10mV in 20μs after the 0.5A load step. Once again a small
value of ESR will provide a more optimum response.

At 5V

with 10μF C

OUT

(Figure 5) the response is well

OUT

damped with 0Ω ESR.

POSCAP capacitors are used. The output voltage is at the
worst case value of 1.2V. Trace A, is with a 10μF ceramic
output capacitor and shows signifi cant ringing with a peak
amplitude of 25mV. For Trace B, a 22μF/45mΩ POSCAP is
added in parallel with the 10μF ceramic. The output is well
damped and settles to within 10mV in less than 20μs.

For Trace C, a 100μF/35mΩ POSCAP is connected in
parallel with the 10μF ceramic capacitor. In this case the
peak output deviation is less than 20mV and the output
settles in about 10μs. For improved transient response
the value of the bulk capacitor (tantalum or aluminum
electrolytic) should be greater than twice the value of the
ceramic capacitor.

Tantalum and Polytantalum Capacitors

There is a variety of tantalum capacitor types available,
with a wide range of ESR specifi cations. Older types have
ESR specifi cations in the hundreds of mΩ to several Ohms.
Some newer types of polytantalum with multi-electrodes
have maximum ESR specifi cations as low as 5mΩ. In gen­eral the lower the ESR specifi cation, the larger the size and
the higher the price. Polytantalum capacitors have better
surge capability than older types and generally lower ESR.
Some types such as the Sanyo TPE and TPB series have
ESR specifi cations in the 20mΩ to 50mΩ range, which
provide near optimum transient response.

Aluminum Electrolytic Capacitors

With a C

of 100μF at 0Ω ESR and an output of 1.2V

OUT

(Figure 6), the output rings although the amplitude is
only 20mV

. With C

p-p

of 100μF it takes only 5mΩ to

OUT

20mΩ of ESR to provide good damping at 1.2V output.
Performance at 2.5V and 5V output with 100μF C

OUT

shows
similar characteristics to the 10μF case (see Figures 7-8).
At 2.5V
At 5V

5mΩ to 20mΩ can improve transient response.

OUT

the response is well damped with 0Ω ESR.

OUT

Capacitor types with inherently higher ESR can be combined
with 0mΩ ESR ceramic capacitors to achieve both good
high frequency bypassing and fast settling time. Figure
9 illustrates the improvement in transient response that
can be seen when a parallel combination of ceramic and

Aluminum electrolytic capacitors can also be used with the
LT1963A. These capacitors can also be used in conjunction
with ceramic capacitors. These tend to be the cheapest and
lowest performance type of capacitors. Care must be used
in selecting these capacitors as some types can have ESR
which can easily exceed the 3Ω maximum value.

Ceramic Capacitors

Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior over
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and

1963afd

15

LT1963A Series

APPLICATIONS INFORMATION

20

(mΩ)

50

ESR

R

100

(mΩ)

ESR

R

100

10

(mΩ)

ESR

R

20

(mΩ)

ESR

R

0

5

50μs/DIV

1963A F06

V

= 1.2V

OUT

= 500mA WITH

I

OUT

500mA PULSE
C

= 100μF

OUT

50mV/DIV

Figure 6

0

5

10

20

50μs/DIV

1963A F07

V

= 2.5V

OUT

= 500mA WITH

I

OUT

500mA PULSE

= 100μF

C

OUT

50mV/DIV

Figure 7

0

20μs/DIV

1963A F03

V

= 1.2V

OUT

= 500mA WITH

I

OUT

500mA PULSE

= 10μF

C

OUT

50mV/DIV

Figure 3

0

20

50

20μs/DIV

1963A F04

V

= 2.5V

OUT

= 500mA WITH

I

OUT

500mA PULSE

= 10μF

C

OUT

50mV/DIV

Figure 4

20

(mΩ)

50

ESR

R

100

(mΩ)

ESR

R

1963A F09

0

5

10

20

50μs/DIV

Figure 8

V

= 1.2V

OUT

= 500mA WITH 500mA PULSE

I

OUT

=

C

OUT

A = 10μF CERAMIC
B = 10μF CERAMIC II 22μF/45mΩ POLY

50mV/DIV

C = 10μF CERAMIC II 100μF/35mΩ POLY

1963A F08

V

= 5V

OUT

= 500mA WITH

I

OUT

500mA PULSE

= 100μF

C

OUT

50mV/DIV

1963afd

0

20μs/DIV

1963A F05

V

= 5V

OUT

= 500mA WITH

I

OUT

500mA PULSE

= 10μF

C

OUT

50mV/DIV

Figure 5

A

B

(mΩ)

ESR

R

C

50μs/DIV

Figure 9

16

DC BIAS VOLTAGE (V)

CHANGE IN VALUE (%)

1963A F10

20

0

–20

–40

–60

–80

–100

0

4

8

10

26

12

14

X5R

Y5V

16

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF

APPLICATIONS INFORMATION

LT1963A Series

Y5V dielectrics are good for providing high capacitances in
a small package, but exhibit strong voltage and temperature
coeffi cients as shown in Figures 10 and 11. When used
with a 5V regulator, a 10μF Y5V capacitor can exhibit an
effective value as low as 1μF to 2μF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.

Voltage and temperature coeffi cients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress, simi­lar to the way a piezoelectric accelerometer or microphone
works. For a ceramic capacitor the stress can be induced
by vibrations in the system or thermal transients.

Table 2. PC Trace Resistors

10mΩ 20mΩ 30mΩ

0.5oz C

1.0oz C

2.0oz C

U

U

U

Width

Length

Width

Length

Width

Length

0.011" (0.28mm)

"

0.102

(2.6mm)

0.006" (0.15mm)

"

0.110

(2.8mm)

0.006" (0.15mm)

"

0.224

(5.7mm)

“FREE” Resistance with PC Traces

The resistance values shown in Table 2 can easily be made
using a small section of PC trace in series with the output
capacitor. The wide range of non-critical ESR makes it
easy to use PC trace. The trace width should be sized to
handle the RMS ripple current associated with the load.
The output capacitor only sources or sinks current for a few
microseconds during fast output current transitions. There
is no DC current in the output capacitor. Worst case ripple
current will occur if the output load is a high frequency
(>100kHz) square wave with a high peak value and fast
edges (< 1μs). Measured RMS value for this case is 0.5
times the peak-to-peak current change. Slower edges or
lower frequency will signifi cantly reduce the RMS ripple
current in the capacitor.

0.011

0.204

0.006

0.220

0.006

0.450

"

(0.28mm)

"

(5.2mm)

"

(0.15mm)

"

(5.6mm)

"

(0.15mm)

"

(11.4mm)

0.011

0.307

0.006

0.330

0.006

0.670

"

(0.28mm)

"

(7.8mm)

"

(0.15mm)

"

(8.4mm)

"

(0.15mm)

"

(17mm)

Figure 10. Ceramic Capacitor DC Bias Characteristics

40

20

0

–20

–40

–60

CHANGE IN VALUE (%)

–80

BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10μF

–100

–50

–25 0

TEMPERATURE (°C)

25 75

X5R

Y5V

50 100 125

1963A F11

Figure 11. Ceramic Capacitor Temperature Characteristics

1963afd

17

LT1963A Series

APPLICATIONS INFORMATION

This resistor should be made using one of the inner
layers of the PC board which are well defi ned. The resistiv­ity is determined primarily by the sheet resistance of the
copper laminate with no additional plating steps. Table
2 gives some sizes for 0.75A RMS current for various
copper thicknesses. More detailed information regarding
resistors made from PC traces can be found in Application
Note 69, Appendix A.

Overload Recovery

Like many IC power regulators, the LT1963A-X has safe op­erating area protection. The safe area protection decreases
the current limit as input-to-output voltage increases and
keeps the power transistor inside a safe operating region
for all values of input-to-output voltage. The protection is
designed to provide some output current at all values of
input-to-output voltage up to the device breakdown.

When power is fi rst turned on, as the input voltage rises,
the output follows the input, allowing the regulator to start
up into very heavy loads. During the start-up, as the input
voltage is rising, the input-to-output voltage differential
is small, allowing the regulator to supply large output
currents. With a high input voltage, a problem can occur
wherein removal of an output short will not allow the
output voltage to recover. Other regulators, such as the
LT1085, also exhibit this phenomenon, so it is not unique
to the LT1963A-X.

The problem occurs with a heavy output load when the
input voltage is high and the output voltage is low. Common
situations are immediately after the removal of a short­circuit or when the shutdown pin is pulled high after the
input voltage has already been turned on. The load line for
such a load may intersect the output current curve at two
points. If this happens, there are two stable output operating
points for the regulator. With this double intersection, the
input power supply may need to be cycled down to zero
and brought up again to make the output recover.

Output Voltage Noise

The LT1963A regulators have been designed to provide low
output voltage noise over the 10Hz to 100kHz bandwidth
while operating at full load. Output voltage noise is typically

40nV/√Hz over this frequency bandwidth for the LT1963A
(adjustable version). For higher output voltages (generated
by using a resistor divider), the output voltage noise will be
gained up accordingly. This results in RMS noise over the
10Hz to 100kHz bandwidth of 14μV
increasing to 38μV

Higher values of output voltage noise may be measured
when care is not exercised with regard to circuit layout
and testing. Crosstalk from nearby traces can induce
unwanted noise onto the output of the LT1963A-X.
Power supply ripple rejection must also be considered; the
LT1963A regulators do not have unlimited power supply
rejection and will pass a small portion of the input noise
through to the output.

Thermal Considerations

The power handling capability of the device is limited by the
maximum rated junction temperature (125°C). The power
dissipated by the device is made up of two components:

1. Output current multiplied by the input/output voltage
differential: (I

2. GND pin current multiplied by the input voltage:

)(VIN).

(I

GND

The GND pin current can be found using the GND Pin
Current curves in the Typical Performance Characteristics.
Power dissipation will be equal to the sum of the two
components listed above.

The LT1963A series regulators have internal thermal
limiting designed to protect the device during overload
conditions. For continuous normal conditions, the maxi­mum junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambi­ent. Additional heat sources mounted nearby must also
be considered.

For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat gener­ated by power devices.

for the LT1963A-3.3.

RMS

)(VIN – V

OUT

OUT

), and

for the LT1963A

RMS

18

1963afd

APPLICATIONS INFORMATION

LT1963A Series

The following tables list thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.

Table 3. Q Package, 5-Lead DD

COPPER AREA

TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2

2500mm
1000mm

125mm

*Device is mounted on topside

Table 4. S0-8 Package, 8-Lead SO

COPPER AREA

TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2500mm
1000mm

225mm
125mm

*Device is mounted on topside

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

THERMAL RESISTANCE

2

2

2

THERMAL RESISTANCE

2

2

2

2

23°C/W
25°C/W
33°C/W

55°C/W
55°C/W
63°C/W
69°C/W

The power dissipated by the device will be equal to:
I

OUT(MAX)(VIN(MAX)

– V

OUT

) + I

GND(VIN(MAX)

)
where,
I

OUT(MAX)

V

IN(MAX)

I

GND

= 500mA

= 6V

at (I

= 500mA, VIN = 6V) = 10mA

OUT

So,
P = 500mA(6V – 3.3V) + 10mA(6V) = 1.41W
Using a DD package, the thermal resistance will be in the

range of 23°C/W to 33°C/W depending on the copper
area. So the junction temperature rise above ambient will
be approximately equal to:

1.41W(28°C/W) = 39.5°C
The maximum junction temperature will then be equal to

the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:

T

= 50°C + 39.5°C = 89.5°C

JMAX

Table 5. SOT-223 Package, 3-Lead SOT-223

COPPER AREA

TOPSIDE* BACKSIDE BOARD AREA (JUNCTION-TO-AMBIENT)

2

2500mm
1000mm

225mm

100mm
1000mm
1000mm

*Device is mounted on topside

T Package, 5-Lead TO-220

Thermal Resistance (Junction-to-Case) = 4°C/W

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

2500mm22500mm

2

1000mm21000mm

2

0mm

2

1000mm

THERMAL RESISTANCE

2

2

2

2

2

2

42°C/W
42°C/W

50°C/W
56°C/W
49°C/W
52°C/W

Calculating Junction Temperature

Example: Given an output voltage of 3.3V, an input volt­age range of 4V to 6V, an output current range of 0mA
to 500mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?

Protection Features

The LT1963A regulators incorporate several protection
features which make them ideal for use in battery-pow­ered circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.

Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation,
the junction temperature should not exceed 125°C.

The input of the device will withstand reverse voltages
of 20V. Current fl ow into the device will be limited to less
than 1mA (typically less than 100μA) and no negative
voltage will appear at the output. The device will protect
both itself and the load. This provides protection against
batteries that can be plugged in backward.

1963afd

19

LT1963A Series

APPLICATIONS INFORMATION

The output of the LT1963A can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fi xed voltage versions, the output will act like a
large resistor, typically 5k or higher, limiting current fl ow
to typically less than 600μA. For adjustable versions, the
output will act like an open circuit; no current will fl ow out
of the pin. If the input is powered by a voltage source, the
output will source the short-circuit current of the device
and will protect itself by thermal limiting. In this case,
grounding the SHDN pin will turn off the device and stop
the output from sourcing the short-circuit current.

The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 5k) in series with a diode
when pulled above ground.

In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp volt­age if the output is pulled high, the ADJ pin input current
must be limited to less than 5mA. For example, a resistor
divider is used to provide a regulated 1.5V output from the

1.21V reference when the output is forced to 20V. The top
resistor of the resistor divider must be chosen to limit the
current into the ADJ pin to less than 5mA when the ADJ
pin is at 7V. The 13V difference between OUT and ADJ
pins divided by the 5mA maximum current into the ADJ
pin yields a minimum top resistor value of 2.6k.

In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled
to ground, pulled to some intermediate voltage, or is left
open circuit. Current fl ow back into the output will follow
the curve shown in Figure 12.

When the IN pin of the LT1963A is forced below the OUT
pin or the OUT pin is pulled above the IN pin, input cur­rent will typically drop to less than 2μA. This can happen
if the input of the device is connected to a discharged
(low voltage) battery and the output is held up by either
a backup battery or a second regulator circuit. The state
of the SHDN pin will have no effect on the reverse output
current when the output is pulled above the input.

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

REVERSE OUTPUT CURRENT (mA)

0.5

0

LT1963A

= V

V

OUT

ADJ

LT1963A-1.5

= V

V

OUT

= V

V

OUT

= V

V

OUT

FB

213

FB

FB

TJ = 25°C
V

IN

CURRENT FLOWS
INTO OUTPUT PIN

697

4

5

OUTPUT VOLTAGE (V)

LT1963A-3.3

= V

V

OUT

= 0V

8

FB

1963A F12

LT1963A-1.8

LT1963A-2.5

0

Figure 12. Reverse Output Current

10

20

1963afd

TYPICAL APPLICATIONS

10VAC AT

115V

IN

10VAC AT

115V

IN

–

+

–

+

–

+

750Ω

+V

+V

+V

+V

+V

1/2

LT1018

1/2

LT1018

LT1006

10k

10k

10k

200k

0.1μF

22μF

1μF

0.033μF

1N4148

1N4148

LT1004

1.2V

750Ω

A1

C1A

C1B

34k*

12.1k*

3.3V

OUT

1.5A

L1

500μH

10000μF

TO ALL “+V”

POINTS

22μF

1N4002

1N4002 1N4002

1N4148

“SYNC”

1k

L2

90-140

VAC

1963A TA03

LT1963A-3.3

IN

SHDN

OUT

FB

GND

2.4k

+

+

+

L1 = COILTRONICS CTX500-2-52
L2 = STANCOR P-8559
* = 1% FILM RESISTOR
= NTE5437

SCR Pre-Regulator Provides Effi ciency Over Line Variations

LT1963A Series

1963afd

21

LT1963A Series

TYPICAL APPLICATIONS

V

> 3.7V

IN

Paralleling of Regulators for Higher Output Current

R1

+

SHDN

C1
100μF

R2

0.01Ω

0.01Ω

LT1963A-3.3

IN

SHDN

GND

LT1963A

IN

SHDN

GND

OUT

OUT

+

FB

R6

FB

6.65k

R7

4.12k

3.3V
3A
C2
22μF

R3

2.2kR42.2k

R5

1/2

1k

8

1

4

C3

0.01μF

1963A TA05

3

+

LT1366

2

–

22

1963afd

PACKAGE DESCRIPTION

LT1963A Series

Q Package

5-Lead Plastic DD Pak

(Reference LTC DWG # 05-08-1461)

.256

(6.502)

.060

(1.524)

.300

(7.620)

BOTTOM VIEW OF DD PAK

HATCHED AREA IS SOLDER PLATED

COPPER HEAT SINK

.060

(1.524)

.075

(1.905)

.183

(4.648)

.060

(1.524)

TYP

.330 – .370

(8.382 – 9.398)

+.012

.143

–.020

+0.305

3.632

()

–0.508

.420

.350

.028 – .038

(0.711 – 0.965)

.565

.390 – .415

(9.906 – 10.541)

15° TYP

.067

(1.702)

BSC

TYP

.080

.205

.165 – .180

(4.191 – 4.572)

.420
.276

.059

(1.499)

TYP

.013 – .023

(0.330 – 0.584)

.325

.045 – .055

(1.143 – 1.397)

+.008

.004

–.004
+0.203

0.102

()

–0.102

.095 – .115

(2.413 – 2.921)

.050 ± .012

(1.270 ± 0.305)

Q(DD5) 0502

.565

.067

RECOMMENDED SOLDER PAD LAYOUT

NOTE:

1. DIMENSIONS IN INCH/(MILLIMETER)

2. DRAWING NOT TO SCALE

.042

.090

.320

.090

.067

RECOMMENDED SOLDER PAD LAYOUT

FOR THICKER SOLDER PASTE APPLICATIONS

.042

1963afd

23

LT1963A Series

PACKAGE DESCRIPTION

8-Lead Plastic Small Outline (Narrow .150 Inch)

.050 BSC

S8 Package

(Reference LTC DWG # 05-08-1610)

.045 ±.005

8

.189 – .197

(4.801 – 5.004)

NOTE 3

7

6

5

.245
MIN

.030

±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

× 45°

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

.160

±.005

.228 – .244

(5.791 – 6.197)

0°– 8° TYP

.053 – .069

(1.346 – 1.752)

.014 – .019

(0.355 – 0.483)

TYP

.150 – .157

(3.810 – 3.988)

NOTE 3

1

3

2

4

.004 – .010

(0.101 – 0.254)

.050

(1.270)

BSC

SO8 0303

24

1963afd

PACKAGE DESCRIPTION

LT1963A Series

ST Package

3-Lead Plastic SOT-223

(Reference LTC DWG # 05-08-1630)

.264 – .287

(6.70 – 7.30)

.130 – .146

(3.30 – 3.71)

.071

(1.80)

MAX

.0905
(2.30)

BSC

.248 – .264

(6.30 – 6.71)

.114 – .124

(2.90 – 3.15)

.024 – .033

(0.60 – 0.84)

.181

(4.60)

BSC

.033 – .041

(0.84 – 1.04)

.012

(0.31)

MIN

.059 MAX

10°

MAX

.129 MAX

.059 MAX

.181 MAX

RECOMMENDED SOLDER PAD LAYOUT

10° – 16°

.0008 – .0040

(0.0203 – 0.1016)

.248 BSC

.039 MAX

.090
BSC

.010 – .014

(0.25 – 0.36)

10° – 16°

ST3 (SOT-233) 0502

1963afd

25

LT1963A Series

T5 (TO-220) 0801

.028 – .038

(0.711 – 0.965)

.067

(1.70)

.135 – .165

(3.429 – 4.191)

.700 – .728

(17.78 – 18.491)

.045 – .055

(1.143 – 1.397)

.095 – .115

(2.413 – 2.921)

.013 – .023

(0.330 – 0.584)

.620

(15.75)

TYP

.155 – .195*

(3.937 – 4.953)

.152 – .202

(3.861 – 5.131)

.260 – .320

(6.60 – 8.13)

.165 – .180

(4.191 – 4.572)

.147 – .155

(3.734 – 3.937)

DIA

.390 – .415

(9.906 – 10.541)

.330 – .370

(8.382 – 9.398)

.460 – .500

(11.684 – 12.700)

.570 – .620

(14.478 – 15.748)

.230 – .270

(5.842 – 6.858)

BSC

SEATING PLANE

* MEASURED AT THE SEATING PLANE

PACKAGE DESCRIPTION

T Package

5-Lead Plastic TO-220 (Standard)

(Reference LTC DWG # 05-08-1421)

26

1963afd

PACKAGE DESCRIPTION

3.58

(.141)

FE Package

16-Lead Plastic TSSOP (4.4mm)

(Reference LTC DWG # 05-08-1663)

Exposed Pad Variation BB

16 1514 13 12 11

LT1963A Series

4.90 – 5.10*
(.193 – .201)

3.58

(.141)

10 9

6.60 ±0.10

4.50 ±0.10

RECOMMENDED SOLDER PAD LAYOUT

0.09 – 0.20

(.0035 – .0079)

NOTE:

1. CONTROLLING DIMENSION: MILLIMETERS

2. DIMENSIONS ARE IN

3. DRAWING NOT TO SCALE

SEE NOTE 4

0.45 ±0.05

0.65 BSC

4.30 – 4.50*
(.169 – .177)

0.50 – 0.75

(.020 – .030)

MILLIMETERS

(INCHES)

2.94

(.116)

1.05 ±0.10

1345678

2

0.25
REF

0° – 8°

0.65

(.0256)

BSC

0.195 – 0.30

(.0077 – .0118)

TYP

4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT

*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE

2.94

(.116)

1.10

(.0433)

MAX

0.05 – 0.15

(.002 – .006)

FE16 (BB) TSSOP 0204

6.40

(.252)

BSC

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa­tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

1963afd

27

LT1963A Series

TYPICAL APPLICATION

Adjustable Current Source

R5

0.01Ω

LT1004-1.2

80.6k

R3

2k

R1
1k

R2

3.3μF

R4

2.2k

C2

+

V

> 2.7V

IN

NOTE: ADJUST R1 FOR
0A TO 1.5A CONSTANT CURRENT

C1

10μF

RELATED PARTS

PART NUMBER DESCRIPTION COMMENTS

LT1175 500mA, Micropower, Negative LDO V

LT1185 3A, Negative LDO VIN: –35V to –4.2V, V

LT1761 100mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, V

LT1762 150mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, V
LT1763 500mA, Low Noise Micropower, LDO V
LT1764/

LT1764A

3A, Low Noise, Fast Transient Response,
LDO

LTC1844 150mA, Very Low Drop-Out LDO VIN: 6.5V to 1.6V, V

LT1962 300mA, Low Noise Micropower, LDO VIN: 1.8V to 20V, V

: –20V to –4.3V, V

IN

DD, SOT-223, PDIP8 Packages

TO220-5 Package

ThinSOT Package

OUT(MIN)

OUT(MIN)

: 1.8V to 20V, V

IN

: 2.7V to 20V, V

V

IN

OUT(MIN)

OUT(MIN)

DD, TO220 Packages

ThinSOTPackage

OUT(MIN)

OUT(MIN)

LT1963A-1.8

IN

SHDN

R6

2.2k

2

+

3

–

OUT(MIN)

OUT(MIN)

GND

C3

1μF

8

1/2

LT1366

4

= –3.8V, VDO = 0.50V, IQ = 45μA, ISD 10μA,

= –2.40V, VDO = 0.80V, IQ = 2.5mA, ISD <1μA,

OUT

1

LOAD

FB

R8
100k

R7
470Ω

1963A TA04

= 1.22V, VDO = 0.30V, IQ = 20μA, ISD <1μA

= 1.22V, VDO = 0.30V, IQ = 25μA, ISD <1μA, MS8 Package
= 1.22V, VDO = 0.30V, IQ = 30μA, ISD <1μA, S8 Package
= 1.21V, VDO = 0.34V, IQ = 1mA, ISD <1μA,

= 1.25V, VDO = 0.08V, IQ = 40μA, ISD < 1μA,

= 1.22V, VDO = 0.27V, IQ = 30μA, ISD <1μA, MS8 Package

LT1964 200mA, Low Noise Micropower,

Negative LDO

LT1965 1.1A, Low Noise, Low Dropout Linear

Regulator

LT3020 100mA, Low Voltage V

V

= 0.9V

IN(MIN)

LDO,

LT3023 Dual, 2x 100mA, Low Noise

Micropower, LDO

LT3024 Dual, 100mA/500mA, Low Noise

Micropower, LDO

LT3080/
LT3080-1

1.1A, Parallelable, Low Noise, Low
Dropout Linear Regulator

Linear Technology Corporation

28

1630 McCarthy Blvd., Milpitas, CA 95035-7417

[phone] ● FAX: [phone]

●

www.linear.com

VIN: –0.9V to –20V, V

= –1.21V, VDO = 0.34V, IQ = 30μA, ISD 3μA,

OUT(MIN)

ThinSOT Package
290mV Dropout Voltage, Low Noise: 40μVRMS, VIN: 1.8V to 20V, V

: 1.2V to 19.5V,

OUT

stable with ceramic caps, TO-220, DDPak, MSOP and 3mm × 3mm DFN Packages

: 0.9V to 10V, V

V

IN

= 0.20, VDO = 0.15V, IQ = 120μA, ISD <3μA,

OUT(MIN)

DFN, MS8 Packages
VIN: 1.8V to 20V, V

= 1.22V, VDO = 0.30V, IQ = 40μA, ISD <1μA,

OUT(MIN)

DFN, MS10 Packages
VIN: 1.8V to 20V, V

= 1.22V, VDO = 0.30V, IQ = 60μA, ISD <1μA,

OUT(MIN)

DFN, TSSOP Packages
300mV Dropout Voltage (2-Supply Operation), Low Noise: 40μVRMS, VIN: 1.2V to 36V,

V

: 0V to 35.7V, current-based reference with 1-Resistor V

OUT

set; directly parallelable

OUT

(no op amp required), stable with ceramic caps, TO-220, SOT-223, MSOP and 3mm × 3mm
DFN Packages; “–1” version has integrated internal ballast resistor

1963afd

LT 0708 REV D • PRINTED IN USA

© LINEAR TECHNOLOGY CORPORATION 2005