The LT®1962 series are micropower, low noise, low
dropout regulators. The devices are capable of supplying
300mA of output current with a dropout voltage of 270mV.
Designed for use in battery-powered systems, the low
30µA quiescent current makes them an ideal choice.
Quiescent current is well controlled; it does not rise in
dropout as it does with many other regulators.
A key feature of the LT1962 regulators is low output noise.
With the addition of an external 0.01µF bypass capacitor,
output noise drops to 20µV
bandwidth. The LT1962 regulators are stable with output
capacitors as low as 3.3µF. Small ceramic capacitors can
be used without the series resistance required by other
regulators.
Internal protection circuitry includes reverse battery protection, current limiting, thermal limiting and reverse current protection. The parts come in fixed output voltages of
1.5V, 1.8V, 2.5V, 3V, 3.3V and 5V, and as an adjustable
device with a 1.22V reference voltage. The LT1962 regulators are available in the 8-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
over a 10Hz to 100kHz
RMS
TYPICAL APPLICATIO
3.3V Low Noise Regulator
V
3.7V TO
20V
IN
1µF
IN
SHDN
OUT
SENSE
LT1962-3.3
BYP
GND
1962 TA01
U
0.01µF
+
3.3V AT 300mA
20µV
RMS
10µF
NOISE
Dropout Voltage
400
350
300
250
200
150
100
DROPOUT VOLTAGE (mV)
50
0
0
100
LOAD CURRENT (mA)
150
200
250
30050
1962 TA02
1
Page 2
LT1962 Series
WWWU
ABSOLUTE AXI U RATI GS
(Note 1)
IN Pin Voltage........................................................ ±20V
OUT Pin Voltage .................................................... ±20V
Input to Output Differential Voltage (Note 2) ......... ±20V
SENSE Pin Voltage ............................................... ±20V
ADJ Pin Voltage ...................................................... ±7V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Absolute maximum input to output differential voltage cannot be
achieved with all combinations of rated IN pin and OUT pin voltages. With
the IN pin at 20V, the OUT pin may not be pulled below 0V. The total
measured voltage from in to out can not exceed ±20V.
= 1mA to 300mA512mV
LOAD
= 1mA to 300mA●25mV
LOAD
= 1mA to 300mA715mV
LOAD
= 1mA to 300mA●30mV
LOAD
= 1mA to 300mA717mV
LOAD
= 1mA to 300mA●33mV
LOAD
= 1mA to 300mA1225mV
LOAD
= 1mA to 300mA●50mV
LOAD
= 1mA to 300mA26mV
LOAD
= 1mA to 300mA●12mV
LOAD
= 300mA, BW = 10Hz to 100kHz20µV
LOAD
= 0.5V
= –0.1V●320mA
OUT
P-P
, f
= 120Hz,5565dB
RIPPLE
Note 3: The LT1962 regulators are tested and specified under pulse load
conditions such that T
≈ TA. The LT1962 is 100% tested at TA = 25°C.
J
Performance at –40°C and 125°C is assured by design, characterization
and correlation with statistical process controls.
Note 4: The LT1962 (adjustable version) is tested and specified for these
conditions with the ADJ pin connected to the OUT pin.
RMS
3
Page 4
LT1962 Series
TEMPERATURE (°C)
–50
DROPOUT VOTLAGE (mV)
350
25
1962 G03
200
100
–25050
50
0
400
300
250
150
75 100 125
IL = 300mA
IL = 100mA
IL = 50mA
IL = 10mA
IL = 1mA
ELECTRICAL CHARACTERISTICS
Note 5: Operating conditions are limited by maximum junction
temperature. The regulated output voltage specification will not apply for
all possible combinations of input voltage and output current. When
operating at maximum input voltage, the output current range must be
limited. When operating at maximum output current, the input voltage
range must be limited.
Note 6: To satisfy requirements for minimum input voltage, the LT1962
(adjustable version) is tested and specified for these conditions with an
external resistor divider (two 250k resistors) for an output voltage of
2.44V. The external resistor divider will add a 5µA DC load on the output.Note 7: Dropout voltage is the minimum input to output voltage differential
needed to maintain regulation at a specified output current. In dropout, the
output voltage will be equal to: V
IN
– V
Note 8: GND pin current is tested with VIN = V
DROPOUT
.
OUT(NOMINAL)
or VIN = 2.3V
tested while operating in its dropout region. This is the worst-case GND
pin current. The GND pin current will decrease slightly at higher input
voltages.
Note 9: ADJ pin bias current flows into the ADJ pin.
Note 10: SHDN pin current flows into the SHDN pin. This current is
included in the specification for GND pin current.
Note 11: Reverse output current is tested with the IN pin grounded and the
OUT pin forced to the rated output voltage. This current flows into the OUT
pin and out the GND pin.
Note 12: For the LT1962, LT1962-1.5 and LT1962-1.8 dropout voltage will
be limited by the minimum input voltage specification under some output
voltage/load conditions. See the curve of Minimum Input Voltage in the
Typical Performance Characteristics. For other fixed voltage versions of
the LT1962, the minimum input voltage is limited by the dropout voltage.
(whichever is greater) and a current source load. This means the device is
UW
TYPICAL PERFOR A CE CHARACTERISTICS
Typical Dropout VoltageGuaranteed Dropout VoltageDropout Voltage
400
350
300
250
200
150
100
DROPOUT VOLTAGE (mV)
50
0
50100200
0
OUTPUT CURRENT (mA)
TJ = 125°C
TJ = 25°C
150
250
300
1962 G01
500
= TEST POINTS
450
400
350
300
250
200
150
100
50
GUARANTEED DROPOUT VOLTAGE (mV)
0
0
50
100
OUTPUT CURRENT (mA)
TJ ≤ 125°C
≤ 25°C
T
J
150200
250
300
1962 G02
Quiescent Current
50
45
40
35
30
25
20
15
VIN = 6V
V
QUIESCENT CURRENT (µA)
SHDN
10
RL = ∞, IL = 0 (LT1962-1.5/-1.8
/2.5/-3/-3.3/-5)
5
R
L
0
–50
4
= V
IN
= 250k, IL = 5µA (LT1962)
50
25
0
–25
TEMPERATURE (°C)
LT1962-1.5 Output Voltage
1.532
IL = 1mA
1.524
1.516
1.508
1.500
1.492
OUTPUT VOLTAGE (V)
1.484
1.476
100
125
1962 G04
75
1.468
–50
–25
0
TEMPERATURE (°C)
50
25
75
100
125
1962 G05
LT1962-1.8 Output Voltage
1.836
IL = 1mA
1.827
1.818
1.809
1.800
1.791
OUTPUT VOLTAGE (V)
1.782
1.773
1.764
–50
–25
0
25
TEMPERATURE (°C)
50
75
100
125
1962 G06
Page 5
UW
TEMPERATURE (°C)
–50
OUTPUT VOTLAGE (V)
3.345
25
1962 G09
3.300
3.270
–25050
3.255
3.240
3.360
3.330
3.315
3.285
75 100 125
IL = 1mA
TYPICAL PERFOR A CE CHARACTERISTICS
LT1962 Series
LT1962-2.5 Output Voltage
2.54
IL = 1mA
2.53
2.52
2.51
2.50
2.49
OUTPUT VOTLAGE (V)
2.48
2.47
2.46
–25050
–50
25
TEMPERATURE (°C)
75 100 125
1962 G07
LT1962-3 Output Voltage
3.060
IL = 1mA
3.045
3.030
3.015
3.000
2.985
OUTPUT VOTLAGE (V)
2.970
2.955
2.940
–25050
–50
TEMPERATURE (°C)
LT1962-5 Output VoltageLT1962 ADJ Pin Voltage
5.100
IL = 1mA
5.075
5.050
5.025
5.000
4.975
OUTPUT VOTLAGE (V)
4.950
4.925
4.900
–25050
–50
25
TEMPERATURE (°C)
75 100 125
1962 G10
1.240
IL = 1mA
1.235
1.230
1.225
1.220
1.215
ADJ PIN VOTLAGE (V)
1.210
1.205
1.200
–25050
–50
TEMPERATURE (°C)
LT1962-3.3 Output Voltage
25
75 100 125
1962 G08
LT1962-1.5 Quiescent Current
800
700
600
500
400
300
200
QUIESCENT CURRENT (µA)
100
25
75 100 125
1962 G11
0
0
V
= V
SHDN
246 1071359
INPUT VOLTAGE (V)
TJ = 25°C
=
∞
R
L
V
= 0V
SHDN
IN
8
1962 G12
800
700
600
500
400
300
200
QUIESCENT CURRENT (µA)
100
0
V
= V
SHDN
IN
246 1071359
0
INPUT VOLTAGE (V)
V
SHDN
TJ = 25°C
=
∞
R
L
= 0V
8
1962 G13
LT1962-2.5 Quiescent CurrentLT1962-1.8 Quiescent Current
800
700
600
500
400
300
200
QUIESCENT CURRENT (µA)
100
0
0
V
= V
SHDN
246 1071359
INPUT VOLTAGE (V)
TJ = 25°C
=
∞
R
L
V
= 0V
SHDN
IN
8
1962 G14
LT1962-3 Quiescent Current
800
700
600
500
400
300
200
QUIESCENT CURRENT (µA)
100
0
0
V
= V
SHDN
246 1071359
INPUT VOLTAGE (V)
TJ = 25°C
=
∞
R
L
V
= 0V
SHDN
IN
8
1962 G15
5
Page 6
LT1962 Series
INPUT VOLTAGE (V)
0
GND PIN CURRENT (µA)
500
1000
1500
250
750
1250
2468
1962 G21
10103579
TJ = 25°C
V
IN
= V
SHDN
*FOR V
OUT
= 2.5V
RL = 50Ω
I
L
= 50mA*
RL = 250Ω
I
L
= 10mA*
RL = 2.5k
I
L
= 1mA*
INPUT VOLTAGE (V)
0
GND PIN CURRENT (µA)
500
1000
1500
250
750
1250
2468
1962 G24
10103579
TJ = 25°C
V
IN
= V
SHDN
*FOR V
OUT
= 5V
RL = 100Ω
I
L
= 50mA*
RL = 500Ω
I
L
= 10mA*
RL = 5k
I
L
= 1mA*
UW
TYPICAL PERFOR A CE CHARACTERISTICS
LT1962-3.3 Quiescent CurrentLT1962-5 Quiescent CurrentLT1962 Quiescent Current
800
700
TJ = 25°C
=
∞
R
L
600
500
400
300
200
QUIESCENT CURRENT (µA)
100
0
0
V
246 1071359
SHDN
= V
V
= 0V
SHDN
IN
8
INPUT VOLTAGE (V)
1962 G16
800
700
TJ = 25°C
=
∞
R
L
600
500
400
300
200
QUIESCENT CURRENT (µA)
100
0
246 1071359
0
V
SHDN
V
= V
SHDN
IN
= 0V
8
INPUT VOLTAGE (V)
1962 G17
40
TJ = 25°C
= 250k
R
L
35
30
V
SHDN
25
20
15
10
QUIESCENT CURRENT (µA)
5
V
0
0
SHDN
48122014261018
INPUT VOLTAGE (V)
= V
= 0V
IN
16
1962 G18
LT1962-1.5 GND Pin CurrentLT1962-1.8 GND Pin Current
1500
1250
1000
GND PIN CURRENT (µA)
750
500
250
TJ = 25°C
= V
V
IN
SHDN
*FOR V
RL = 30Ω
= 50mA*
I
L
RL = 150Ω
= 10mA*
I
L
0
2468
INPUT VOLTAGE (V)
OUT
RL = 1.5k
= 1mA*
I
L
= 1.5V
10103579
1962 G19
1500
1250
1000
GND PIN CURRENT (µA)
750
500
250
RL = 36Ω
= 50mA*
I
L
RL = 180Ω
= 10mA*
I
L
0
2468
INPUT VOLTAGE (V)
LT1962-3 GND Pin CurrentLT1962-3.3 GND Pin Current
1500
1250
1000
750
500
GND PIN CURRENT (µA)
250
0
TJ = 25°C
= V
V
IN
SHDN
*FOR V
OUT
RL = 60Ω
= 50mA*
I
L
RL = 300Ω
= 10mA*
I
L
2468
INPUT VOLTAGE (V)
RL = 3k
= 1mA*
I
L
= 3V
10103579
1962 G22
1500
1250
1000
GND PIN CURRENT (µA)
750
500
250
RL = 66Ω
= 50mA*
I
L
RL = 330Ω
= 10mA*
I
L
0
2468
INPUT VOLTAGE (V)
TJ = 25°C
= V
V
IN
*FOR V
RL = 1.8k
= 1mA*
I
L
TJ = 25°C
= V
V
IN
*FOR V
RL = 3.3k
= 1mA*
I
L
SHDN
OUT
SHDN
OUT
LT1962-2.5 GND Pin Current
= 1.8V
10103579
1962 G20
LT1962-5 GND Pin Current
= 3.3V
10103579
1962 G23
6
Page 7
UW
OUTPUT CURRENT (mA)
0
GND PIN CURRENT (mA)
3
4
5
150
250
1962 G33
2
1
0
50100200
6
7
8
300
VIN = V
OUT(NOMINAL)
+ 1V
TYPICAL PERFOR A CE CHARACTERISTICS
LT1962 Series
LT1962 GND Pin Current
1500
1250
RL = 24.4Ω
I
= 50mA*
1000
750
500
GND PIN CURRENT (µA)
250
0
L
RL = 122Ω
= 10mA*
I
L
2468
INPUT VOLTAGE (V)
LT1962-2.5 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
RL = 8.33Ω
= 300mA*
I
L
RL = 25Ω
= 100mA*
I
L
246 1071359
INPUT VOLTAGE (V)
TJ = 25°C
= V
V
IN
*FOR V
TJ = 25°C
= V
V
IN
*FOR V
RL = 12.5Ω
I
= 200mA*
L
SHDN
= 1.22V
OUT
RL = 1.22k
= 1mA*
I
L
SHDN
= 2.5V
OUT
8
1962 G25
1962 G28
10103579
LT1962-1.5 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
RL = 5Ω
I
= 300mA*
L
RL = 15Ω
= 100mA*
I
L
246 1071359
INPUT VOLTAGE (V)
LT1962-3 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
RL = 10Ω
= 300mA*
I
L
I
RL = 30Ω
= 100mA*
I
L
246 1071359
INPUT VOLTAGE (V)
TJ = 25°C
V
= V
IN
*FOR V
RL = 7.5Ω
= 200mA*
I
L
TJ = 25°C
V
IN
*FOR V
RL = 15Ω
= 200mA*
L
= V
SHDN
OUT
8
SHDN
8
= 1.5V
OUT
1962 G26
= 3V
1962 G29
LT1962-1.8 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
RL = 6Ω
I
= 300mA*
L
RL = 9Ω
= 200mA*
I
L
RL = 18Ω
= 100mA*
I
L
246 1071359
INPUT VOLTAGE (V)
LT1962-3.3 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
RL = 11Ω
= 300mA*
I
L
RL = 33Ω
= 100mA*
I
L
246 1071359
INPUT VOLTAGE (V)
TJ = 25°C
V
= V
IN
*FOR V
TJ = 25°C
= V
V
IN
*FOR V
RL = 16.5Ω
= 200mA*
I
L
SHDN
OUT
8
SHDN
OUT
8
= 1.8V
1962 G27
= 3.3V
1962 G30
LT1962-5 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
0
0
TJ = 25°C
= V
V
IN
SHDN
*FOR V
= 5V
OUT
RL = 16.7Ω
= 300mA*
I
L
RL = 25Ω
= 200mA*
I
L
RL = 50Ω
= 100mA*
I
L
246 1071359
INPUT VOLTAGE (V)
LT1962 GND Pin Current
8
7
6
5
4
3
GND PIN CURRENT (mA)
2
1
8
1962 G31
0
0
RL = 4.07Ω
I
L
I
L
RL = 12.2Ω
I
L
246 1071359
INPUT VOLTAGE (V)
= 300mA*
RL = 6.1Ω
= 200mA*
= 100mA*
TJ = 25°C
= V
V
IN
*FOR V
SHDN
OUT
= 1.22V
8
1962 G32
GND Pin Current vs I
LOAD
7
Page 8
LT1962 Series
SHDN PIN VOLTAGE (V)
0
0
SHDN PIN INPUT CURRENT (µA)
0.2
0.6
0.8
1.0
1.4
1
5
7
1962 G36
0.4
1.2
4
9
10
2
3
68
INPUT VOLTAGE (V)
0
0
CURRENT LIMIT (A)
0.1
0.3
0.4
0.5
1.0
0.7
2
4
5
1962 G39
0.2
0.8
0.9
0.6
1
3
6
7
V
OUT
= 0V
TEMPERATURE (°C)
–50
REVERSE OUTPUT CURRENT (µA)
20
25
30
2575
1962 G42
15
10
–250
50100 125
5
0
VIN = 0V
V
OUT
= 1.22V (LT1962)
V
OUT
= 1.5V (LT1962-1.5)
V
OUT
= 1.8V (LT1962-1.8)
V
OUT
= 2.5V (LT1962-2.5)
V
OUT
= 3V (LT1962-3)
V
OUT
= 3.3V (LT1962-3.3)
V
OUT
= 5V (LT1962-5)
LT1962
LT1962-1.5/-1.8/-2.5/-3/-3.3/-5
UW
TYPICAL PERFOR A CE CHARACTERISTICS
SHDN Pin Threshold (On-to-Off)
1.0
IL = 1mA
0.9
0.8
0.7
0.6
0.5
0.4
0.3
SHDN PIN THRESHOLD (V)
0.2
0.1
0
–50
0
–25
TEMPERATURE (°C)
50
25
SHDN Pin Input Current
1.6
1.4
1.2
1.0
0.8
0.6
0.4
SHDN PIN INPUT CURRENT (µA)
0.2
0
–25050
–50
25
TEMPERATURE (°C)
100
= 20V
125
1962 G34
1962 G37
75
V
SHDN
75 100 125
SHDN Pin Threshold (Off-to-On)
1.0
0.9
0.8
0.7
0.6
IL = 1mA
0.5
0.4
0.3
SHDN PIN THRESHOLD (V)
0.2
0.1
0
–50
–25
0
IL = 300mA
50
25
TEMPERATURE (°C)
100
125
1962 G35
75
SHDN Pin Input Current
ADJ Pin Bias CurrentCurrent Limit
35
30
25
20
15
10
ADJ PIN BIAS CURRENT (nA)
5
0
–50
–250
TEMPERATURE (°C)
50100 125
2575
1962 G38
1.2
1.0
0.8
0.6
0.4
CURRENT LIMIT (A)
0.2
8
Current Limit
VIN = 7V
= 0V
V
OUT
0
–50
–250
TEMPERATURE (°C)
50100 125
2575
Reverse Output CurrentReverse Output Current
100
TJ = 25°C
90
= 0V
V
IN
CURRENT FLOWS
80
INTO OUTPUT PIN
= V
ADJ
LT1962-1.8
LT1962-2.5
LT1962-3
LT1962-3.3
23
OUTPUT VOLTAGE (V)
(LT1962)
LT1962-1.5
465
V
OUT
70
60
50
40
30
20
REVERSE OUTPUT CURRENT (µA)
10
0
01
1962 G40
LT1962
LT1962-5
897
10
1962 F07
Page 9
UW
TEMPERATURE (°C)
–50
RIPPLE REJECTION (dB)
66
25
1962 G45
60
56
–25050
54
52
68
64
62
58
75 100 125
IL = 300mA
V
IN
= V
OUT(NOMINAL)
+ 1V
+ 0.5V
P-P
RIPPLE AT f = 120Hz
LOAD CURRENT (mA)
40
OUTPUT NOISE (µV
RMS
)
60
100
140
160
0.011101000
1962 G51
20
0.1
100
120
80
0
C
OUT
= 10µF
C
BYP
= 0µF
C
BYP
= 0.01µF
LT1962-5
LT1962-5
LT1962
LT1962
TYPICAL PERFOR A CE CHARACTERISTICS
LT1962 Series
Input Ripple Rejection
80
70
60
50
40
30
RIPPLE REJECTION (dB)
20
10
0
100
101k10k1M
IL = 300mA
= V
V
IN
OUT(NOMINAL)
+ 50mV
RMS
= 0
C
BYP
C
OUT
C
= 3.3µF
OUT
FREQUENCY (Hz)
RIPPLE
= 10µF
LT1962 Minimum Input Voltage
2.50
V
= 1.22V
OUT
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
MINIMUM INPUT VOLTAGE (V)
0.25
0
–50
–25
0
IL = 300mA
IL = 1mA
50
25
TEMPERATURE (°C)
75
100k
100
+ 1V
1962 G43
1962 G46
125
Input Ripple Rejection
80
C
= 0.01µF
BYP
70
60
50
C
= 100pF
BYP
40
30
RIPPLE REJECTION (dB)
20
IL = 300mA
= V
V
IN
10
0
OUT(NOMINAL)
+ 50mV
RMS
= 10µF
C
OUT
100
101k10k1M
C
BYP
+ 1V
RIPPLE
FREQUENCY (Hz)
= 1000pF
Load Regulation
5
LT1962
0
–5
LT1962-3.3
–10
–15
LOAD REGULATION (mV)
–20
VIN = V
∆I
= 1mA TO 300mA
L
–25
–50
–250
LT1962-1.8
LT1962-3
LT1962-2.5
OUT(NOMINAL)
2575
TEMPERATURE (°C)
LT1962-1.5
LT1962-5
+ 1V
50100 125
100k
1962 G44
1962 G47
Ripple Rejection
Output Noise Spectral Density
10
IL = 300mA
= 10µF
C
OUT
= 0
C
BYP
LT1962-5
1
LT1962
0.1
OUTPUT NOISE SPECTRIAL DENSITY (µV/√Hz)
0.01
101k10k100k
LT1962-3.3
LT1962-2.5
LT1962-1.8
100
FREQUENCY (Hz)
LT1962-3
LT1962-1.5
1962 G48
Output Noise Spectral Density
10
IL = 300mA
= 10µF
C
OUT
LT1962-5
1
LT1962
C
= 0.01µF
BYP
0.1
OUTPUT NOISE SPECTRAL DENSITY (µV/√Hz)
0.01
101k10k100k
100
FREQUENCY (Hz)
C
BYP
= 1000pF
C
BYP
= 100pF
1962 G49
RMS Output Noise
vs Bypass Capacitor
160
IL = 300mA
= 10µF
C
OUT
140
f = 10Hz to 100kHz
)
120
LT1962-5
RMS
100
80
60
OUTPUT NOISE (µV
40
LT1962
20
0
10
LT1962-3
LT1962-3.3
LT1962-2.5
LT1962-1.8
LT1962-1.5
1001k10k
C
(pF)
BYP
1962 G50
RMS Output Noise
vs Load Current (10Hz to 100kHz)
9
Page 10
LT1962 Series
UW
TYPICAL PERFOR A CE CHARACTERISTICS
V
OUT
100µV/DIV
V
OUT
100µV/DIV
LT1962-5 10Hz to 100kHz
Output Noise (C
= 10µF1ms/DIV1962 G52
C
OUT
IL = 300mA
BYP
= 0)
LT1962-5 10Hz to 100kHz
Output Noise (C
C
= 10µF1ms/DIV1962 G55
OUT
IL = 300mA
= 0.01µF)
BYP
LT1962-5 10Hz to 100kHz
Output Noise (C
V
OUT
100µV/DIV
= 10µF1ms/DIV1962 G53
C
OUT
IL = 300mA
LT1962-5 Transient Response
VIN = 6V
0.4
= 10µF
C
IN
= 10µF
C
OUT
0.2
= 0
C
BYP
0
–0.2
DEVIATION (V)LOAD CURRENT (mA)
OUTPUT VOLTAGE
–0.4
300
200
100
0
0.4
0.6
0.2
0
0.8
TIME (ms)
BYP
1.0
= 100pF)
1.2
1.4
1.6
1.8
1962 G56
100µV/DIV
OUTPUT VOLTAGE
2.0
LT1962-5 10Hz to 100kHz
Output Noise (C
V
OUT
= 10µF1ms/DIV1962 G54
C
OUT
IL = 300mA
BYP
LT1962-5 Transient Response
0.10
0.05
0
–0.05
DEVIATION (mV)LOAD CURRENT (mA)
–0.10
300
200
100
0
10050150
0
200
250
TIME (µs)
= 1000pF)
VIN = 6V
= 10µF
C
IN
= 10µF
C
OUT
= 0.01µF
C
BYP
300
350
400
450
1962 G57
500
U
UU
PI FU CTIO S
OUT (Pin 1): Output. The output supplies power to the
load. A minimum output capacitor of 3.3µF is required to
prevent oscillations. Larger output capacitors will be
required for applications with large transient loads to limit
peak voltage transients. See the Applications Information
section for more information on output capacitance and
reverse output characteristics.
SENSE (Pin 2): Sense. For fixed voltage versions of the
LT1962 (LT1962-1.5/LT1962-1.8/LT1962-2.5/LT1962-3/
LT1962-3.3/LT1962-5), the SENSE pin is the input to the
error amplifier. Optimum regulation will be obtained at the
point where the SENSE pin is connected to the OUT pin of
the regulator. In critical applications, small voltage drops
10
are caused by the resistance (RP) of PC traces between the
regulator and the load. These may be eliminated by connecting the SENSE pin to the output at the load as shown
in Figure 1 (Kelvin Sense Connection). Note that the
voltage drop across the external PC traces will add to the
dropout voltage of the regulator. The SENSE pin bias
current is 10µA at the nominal rated output voltage. The
SENSE pin can be pulled below ground (as in a dual supply
system where the regulator load is returned to a negative
supply) and still allow the device to start and operate.
ADJ (Pin 2): Adjust. For the adjustable LT1962, this is the
input to the error amplifier. This pin is internally clamped
to ±7V. It has a bias current of 30nA which flows into the
Page 11
LT1962 Series
U
UU
PI FU CTIO S
R
P
SENSE
4
OUT
1
2
+
R
P
1962 F01
LOAD
RMS
over a
8
IN
LT1962
V
+
IN
5
SHDN
GND
Figure 1. Kelvin Sense Connection
pin. The ADJ pin voltage is 1.22V referenced to ground and
the output voltage range is 1.22V to 20V.
BYP (Pin 3): Bypass. The BYP pin is used to bypass the
reference of the LT1962 to achieve low noise performance
from the regulator. The BYP pin is clamped internally to
±0.6V (one VBE). A small capacitor from the output to this
pin will bypass the reference to lower the output voltage
noise. A maximum value of 0.01µF can be used for
reducing output voltage noise to a typical 20µV
10Hz to 100kHz bandwidth. If not used, this pin must be
left unconnected.
GND (Pin 4): Ground.
SHDN (Pin 5): Shutdown. The SHDN pin is used to put the
LT1962 regulators into a low power shutdown state. The
output will be off when the SHDN pin is pulled low. The
SHDN pin can be driven either by 5V logic or opencollector logic with a pull-up resistor. The pull-up resistor
is required to supply the pull-up current of the opencollector gate, normally several microamperes, and the
SHDN pin current, typically 1µA. If unused, the SHDN pin
must be connected to VIN. The device will not function if
the SHDN pin is not connected.
NC (Pins 6, 7): No Connect. These pins are not internally
connected. For improved power handling capabilities,
these pins can be connected to the PC board.
IN (Pin 8): Input. Power is supplied to the device through
the IN pin. A bypass capacitor is required on this pin if the
device is more than six inches away from the main input
filter capacitor. In general, the output impedance of a
battery rises with frequency, so it is advisable to include a
bypass capacitor in battery-powered circuits. A bypass
capacitor in the range of 1µF to 10µF is sufficient. The
LT1962 regulators are designed to withstand reverse
voltages on the IN pin with respect to ground and the OUT
pin. In the case of a reverse input, which can happen if a
battery is plugged in backwards, the device will act as if
there is a diode in series with its input. There will be no
reverse current flow into the regulator and no reverse
voltage will appear at the load. The device will protect both
itself and the load.
WUUU
APPLICATIO S I FOR ATIO
The LT1962 series are 300mA low dropout regulators with
micropower quiescent current and shutdown. The devices
are capable of supplying 300mA at a dropout voltage of
300mV. Output voltage noise can be lowered to 20µV
over a 10Hz to 100kHz bandwidth with the addition of a
0.01µF reference bypass capacitor. Additionally, the refer-
ence bypass capacitor will improve transient response of
the regulator, lowering the settling time for transient load
conditions. The low operating quiescent current (30µA)
drops to less than 1µA in shutdown. In addition to the low
quiescent current, the LT1962 regulators incorporate several protection features which make them ideal for use in
battery-powered systems. The devices are protected
against both reverse input and reverse output voltages. In
battery backup applications where the output can be held
RMS
up by a backup battery when the input is pulled to ground,
the LT1962-X acts like it has a diode in series with its
output and prevents reverse current flow. Additionally, in
dual supply applications where the regulator load is returned to a negative supply, the output can be pulled below
ground by as much as 20V and still allow the device to start
and operate.
Adjustable Operation
The adjustable version of the LT1962 has an output
voltage range of 1.22V to 20V. The output voltage is set by
the ratio of two external resistors as shown in Figure 2. The
device servos the output to maintain the ADJ pin voltage
at 1.22V referenced to ground. The current in R1 is then
equal to 1.22V/R1 and the current in R2 is the current in R1
11
Page 12
LT1962 Series
WUUU
APPLICATIO S I FOR ATIO
IN
V
IN
VV
VV
InA
ADJ
OUTPUT RANGE = 1.22V TO 20V
OUT
LT1962
ADJ
GND
122 1
.
=+
OUTADJ
=
122
.
ADJ
=°
30
AT 25 C
R2
R1
2
R
IR
+
()()
1
R
V
OUT
+
1962 F02
2
Figure 2. Adjustable Operation
plus the ADJ pin bias current. The ADJ pin bias current,
30nA at 25°C, flows through R2 into the ADJ pin. The
output voltage can be calculated using the formula in
Figure 2. The value of R1 should be no greater than 250k
to minimize errors in the output voltage caused by the ADJ
pin bias current. Note that in shutdown the output is turned
off and the divider current will be zero.
The adjustable device is tested and specified with the ADJ
pin tied to the OUT pin for an output voltage of 1.22V.
Specifications for output voltages greater than 1.22V will
be proportional to the ratio of the desired output voltage to
1.22V: V
/1.22V. For example, load regulation for an
OUT
output current change of 1mA to 300mA is –2mV typical
at V
= 1.22V. At V
OUT
= 12V, load regulation is:
OUT
(12V/1.22V)(–2mV) = –19.7mV
Bypass Capacitance and Low Noise Performance
The LT1962 regulators may be used with the addition of a
bypass capacitor from V
to the BYP pin to lower output
OUT
voltage noise. A good quality low leakage capacitor is
recommended. This capacitor will bypass the reference of
the regulator, providing a low frequency noise pole. The
noise pole provided by this bypass capacitor will lower the
output voltage noise to as low as 20µV
with the
RMS
addition of a 0.01µF bypass capacitor. Using a bypass
capacitor has the added benefit of improving transient
response. With no bypass capacitor and a 10µF output
capacitor, a 10mA to 300mA load step will settle to within
1% of its final value in less than 100µs. With the addition
of a 0.01µF bypass capacitor, the output will settle to
within 1% for a 10mA to 300mA load step in less than
10µs, with total output voltage deviation of less than 2%
(see LT1962-5 Transient Response in the Typical Performance Characteristics). However, regulator start-up time
is inversely proportional to the size of the bypass capacitor, slowing to 15ms with a 0.01µF bypass capacitor and
10µF output capacitor.
Output Capacitance and Transient Response
The LT1962 regulators are designed to be stable with a
wide range of output capacitors. The ESR of the output
capacitor affects stability, most notably with small capacitors. A minimum output capacitor of 3.3µF with an ESR of
3Ω or less is recommended to prevent oscillations. The
LT1962-X is a micropower device and output transient
response will be a function of output capacitance. Larger
values of output capacitance decrease the peak deviations
and provide improved transient response for larger load
current changes. Bypass capacitors, used to decouple
individual components powered by the LT1962, will increase the effective output capacitor value. With larger
capacitors used to bypass the reference (for low noise
operation), larger values of output capacitance are needed.
For 100pF of bypass capacitance, 4.7µF of output capaci-
tor is recommended. With a 1000pF bypass capacitor or
larger, a 6.8µF output capacitor is recommended.
The shaded region of Figure 3 defines the range over which
the LT1962 regulators are stable. The minimum ESR
needed is defined by the amount of bypass capacitance
used, while the maximum ESR is 3Ω.
Extra consideration must be given to the use of ceramic
capacitors. Ceramic capacitors are manufactured with a
variety of dielectrics, each with different behavior across
4.0
3.5
3.0
2.5
2.0
ESR (Ω)
C
BYP
1.5
1.0
0.5
0
1
STABLE REGION
= 0
C
= 100pF
BYP
OUTPUT CAPACITANCE (µF)
C
= 330pF
BYP
C
310
245678
Figure 3. Stability
≥ 1000pF
BYP
9
1962 F03
12
Page 13
WUUU
APPLICATIO S I FOR ATIO
LT1962 Series
temperature and applied voltage. The most common
dielectrics used are Z5U, Y5V, X5R and X7R. The Z5U and
Y5V dielectrics are good for providing high capacitance in
a small package, but exhibit strong voltage and temperature coefficients as shown in Figures 4 and 5. When used
with a 5V regulator, a 10µF Y5V capacitor can exhibit an
effective value as low as 1µF to 2µF over the operating
temperature range. The X5R and X7R dielectrics result in
more stable characteristics and are more suitable for use
as the output capacitor. The X7R type has better stability
across temperature, while the X5R is less expensive and
is available in higher values.
Voltage and temperature coefficients are not the only
sources of problems. Some ceramic capacitors have a
piezoelectric response. A piezoelectric device generates
voltage across its terminals due to mechanical stress,
similar to the way a piezoelectric accelerometer or micro-
20
0
–20
–40
–60
CHANGE IN VALUE (%)
–80
–100
0
Figure 4. Ceramic Capacitor DC Bias Characteristics
40
20
0
–20
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
X5R
Y5V
26
4
8
DC BIAS VOLTAGE (V)
14
12
10
16
1962 F04
X5R
phone works. For a ceramic capacitor the stress can be
induced by vibrations in the system or thermal transients.
The resulting voltages produced can cause appreciable
amounts of noise, especially when a ceramic capacitor is
used for noise bypassing. A ceramic capacitor produced
Figure 6’s trace in response to light tapping from a pencil.
Similar vibration induced behavior can masquerade as
increased output voltage noise.
LT1962-5
= 10µF
C
OUT
= 0.01µf
C
BYP
I
= 100mA
LOAD
V
OUT
500µV/DIV
100ms/DIV
1962 F06
Figure 6. Noise Resulting from Tapping on a Ceramic Capacitor
Thermal Considerations
The power handling capability of the device will be limited
by the maximum rated junction temperature (125°C). The
power dissipated by the device will be made up of two
components:
1. Output current multiplied by the input/output voltage
differential: (I
)(VIN – V
OUT
OUT
), and
2. GND pin current multiplied by the input voltage:
(I
)(VIN).
GND
The GND pin current can be found by examining the GND
Pin Current curves in the Typical Performance Characteristics. Power dissipation will be equal to the sum of the two
components listed above.
–40
–60
CHANGE IN VALUE (%)
–80
BOTH CAPACITORS ARE 16V,
1210 CASE SIZE, 10µF
–100
–50
–250
TEMPERATURE (°C)
Y5V
50100 125
2575
1962 F05
Figure 5. Ceramic Capacitor Temperature Characteristics
The LT1962 series regulators have internal thermal limiting designed to protect the device during overload conditions. For continuous normal conditions, the maximum
junction temperature rating of 125°C must not be
exceeded. It is important to give careful consideration to
all sources of thermal resistance from junction to ambient.
Additional heat sources mounted nearby must also be
considered.
13
Page 14
LT1962 Series
WUUU
APPLICATIO S I FOR ATIO
For surface mount devices, heat sinking is accomplished
by using the heat spreading capabilities of the PC board
and its copper traces. Copper board stiffeners and plated
through-holes can also be used to spread the heat generated by power devices.
The following table lists thermal resistance for several
different board sizes and copper areas. All measurements
were taken in still air on 1/16" FR-4 board with one ounce
copper.
Table 1. Measured Thermal Resistance
COPPER AREATHERMAL RESISTANCE
TOPSIDE*BACKSIDEBOARD AREA (JUNCTION-TO-AMBIENT)
2500mm22500mm
1000mm22500mm
225mm22500mm
100mm22500mm
50mm22500mm
*Device is mounted on topside.
2
2500mm
2
2500mm
2
2500mm
2
2500mm
2
2500mm
Calculating Junction Temperature
Example: Given an output voltage of 3.3V, an input voltage
range of 4V to 6V, an output current range of 0mA to
100mA and a maximum ambient temperature of 50°C,
what will the maximum junction temperature be?
The power dissipated by the device will be equal to:
I
OUT(MAX)(VIN(MAX)
– V
where,
I
OUT(MAX)
V
IN(MAX)
I
GND
at (I
= 100mA
= 6V
= 100mA, VIN = 6V) = 2mA
OUT
So,
P = 100mA(6V – 3.3V) + 2mA(6V) = 0.28W
The thermal resistance will be in the range of 110°C/W to
140°C/W depending on the copper area. So the junction
temperature rise above ambient will be approximately
equal to:
0.28W(125°C/W) = 35.3°C
The maximum junction temperature will then be equal to
the maximum junction temperature rise above ambient
plus the maximum ambient temperature or:
OUT
2
2
2
2
2
) + I
GND(VIN(MAX)
110°C/W
115°C/W
120°C/W
130°C/W
140°C/W
)
T
= 50°C + 35.3°C = 85.3°C
JMAX
Protection Features
The LT1962 regulators incorporate several protection
features which make them ideal for use in battery-powered
circuits. In addition to the normal protection features
associated with monolithic regulators, such as current
limiting and thermal limiting, the devices are protected
against reverse input voltages, reverse output voltages
and reverse voltages from output to input.
Current limit protection and thermal overload protection
are intended to protect the device against current overload
conditions at the output of the device. For normal operation, the junction temperature should not exceed 125°C.
The input of the device will withstand reverse voltages of
20V. Current flow into the device will be limited to less than
1mA (typically less than 100µA) and no negative voltage
will appear at the output. The device will protect both itself
and the load. This provides protection against batteries
which can be plugged in backward.
The output of the LT1962 can be pulled below ground
without damaging the device. If the input is left open circuit
or grounded, the output can be pulled below ground by
20V. For fixed voltage versions, the output will act like a
large resistor, typically 500k or higher, limiting current
flow to less than 40µA. For adjustable versions, the output
will act like an open circuit; no current will flow out of the
pin. If the input is powered by a voltage source, the output
will source the short-circuit current of the device and will
protect itself by thermal limiting. In this case, grounding
the SHDN pin will turn off the device and stop the output
from sourcing the short-circuit current.
The ADJ pin of the adjustable device can be pulled above
or below ground by as much as 7V without damaging the
device. If the input is left open circuit or grounded, the ADJ
pin will act like an open circuit when pulled below ground
and like a large resistor (typically 100k) in series with a
diode when pulled above ground.
In situations where the ADJ pin is connected to a resistor
divider that would pull the ADJ pin above its 7V clamp
voltage if the output is pulled high, the ADJ pin input
current must be limited to less than 5mA. For example, a
resistor divider is used to provide a regulated 1.5V output
14
Page 15
WUUU
APPLICATIO S I FOR ATIO
LT1962 Series
from the 1.22V reference when the output is forced to 20V.
The top resistor of the resistor divider must be chosen to
limit the current into the ADJ pin to less than 5mA when the
ADJ pin is at 7V. The 13V difference between OUT and ADJ
pin divided by the 5mA maximum current into the ADJ pin
yields a minimum top resistor value of 2.6k.
In circuits where a backup battery is required, several
different input/output conditions can occur. The output
voltage may be held up while the input is either pulled to
ground, pulled to some intermediate voltage or is left open
circuit. Current flow back into the output will follow the
curve shown in Figure 7.
When the IN pin of the LT1962 is forced below the OUT pin
or the OUT pin is pulled above the IN pin, input current will
typically drop to less than 2µA. This can happen if the input
of the device is connected to a discharged (low voltage)
battery and the output is held up by either a backup battery
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
or a second regulator circuit. The state of the SHDN pin will
have no effect on the reverse output current when the
output is pulled above the input.
100
TJ = 25°C
90
= 0V
V
IN
CURRENT FLOWS
80
INTO OUTPUT PIN
= V
ADJ
LT1962-1.8
LT1962-2.5
LT1962-3
LT1962-3.3
23
(LT1962)
LT1962-1.5
465
OUTPUT VOLTAGE (V)
V
OUT
70
60
50
40
30
20
REVERSE OUTPUT CURRENT (µA)
10
0
01
Figure 7. Reverse Output Current
LT1962
LT1962-5
897
10
1962 F07
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
0.007
(0.18)
0.021
± 0.006
(0.53 ± 0.015)
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
° – 6° TYP
0
SEATING
PLANE
0.009 – 0.015
(0.22 – 0.38)
0.043
(1.10)
MAX
8
12
0.0256
(0.65)
BSC
7
6
5
4
3
0.118 ± 0.004**
(3.00 ± 0.102)
0.034
(0.86)
REF
0.005
± 0.002
(0.13 ± 0.05)
MSOP (MS8) 1100
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
Page 16
LT1962 Series
TYPICAL APPLICATIO S
U
Adjustable Current Source
+
V
IN
>2.7V
*ADJUST R1 FOR 0mA TO 300mA
CONSTANT CURRENT
LT1004-1.2
C1
10µF
R3
2k
R1*
40.2k
Paralleling of Regulators for Higher Output Current