The LT1361/LT1362 are dual and quad low power high
speed operational amplifiers with outstanding AC and DC
performance. The amplifiers feature much lower supply
current and higher slew rate than devices with comparable
bandwidth. The circuit topology is a voltage feedback
amplifier with matched high impedance inputs and the
slewing performance of a current feedback amplifier. The
high slew rate and single stage design provide excellent
settling characteristics which make the circuit an ideal
choice for data acquisition systems. Each output drives a
500Ω load to ±13V with ±15V supplies and a 150Ω load to±3.2V on ±5V supplies. The amplifiers are stable with any
capacitive load making them useful in buffer or cable
driving applications.
The LT1361/LT1362 are members of a family of fast, high
performance amplifiers using this unique topology and
employing Linear Technology Corporation’s advanced
bipolar complementary processing. For a single amplifier
version of the LT1361/LT1362 see the LT1360 data sheet.
For higher bandwidth devices with higher supply currents
see the LT1363 through LT1365 data sheets. For lower
supply current amplifiers see the LT1354 to LT1359 data
sheets. Singles, duals, and quads of each amplifier are
available.
, LTC and LT are registered trademarks of Linear Technology Corporation.
C-Load is a trademark of Linear Technology Corporation
TYPICAL APPLICATIO
Cable Driver Frequency Response
2
0
+
LT1361
–
510Ω
1/2
510Ω
VS = ±2.5V
75Ω
75Ω
10
FREQUENCY (MHz)
–2
GAIN (dB)
–4
–6
–8
1
IN
U
VS = ±15V
VS = ±10V
OUT
VS = ±5V
1361/1362 TA01
100
AV = –1 Large-Signal Response
1361/1362 TA02
1
Page 2
LT1361/LT1362
V
+
D
14
13
12
11
10
9
87
6
5
4
3
2
1
OUT A
–IN A
+IN A
+IN B
–IN B
OUT BOUT C
V
–
–IN D
OUT D
TOP VIEW
A
+IN D
+IN C
–IN C
C
B
N PACKAGE
14-LEAD PDIP
8
7
6
54
3
2
1
–IN A
+IN A
V
+
TOP VIEW
N8 PACKAGE
8-LEAD PDIP
OUT A
OUT B
V
–
–IN B
+IN B
A
B
WW
W
ABSOLUTE MAXIMUM RATINGS
U
(Note 1)
Total Supply Voltage (V+ to V–)............................... 36V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Differential inputs of ±10V are appropriate for transient operation
only, such as during slewing. Large, sustained differential inputs will cause
excessive power dissipation and may damage the part. See Input
Considerations in the Applications Information section of this data sheet
for more details.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up drift.
Note 6: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πV
Note 7: This parameter is not 100% tested.
Note 8: The LT1361C/LT1362C are guaranteed functional over the
operating temperature range of –40°C to 85°C.
Note 9: The LT1361C/LT1362C are guaranteed to meet specified
performance from 0°C to 70°C. The LT1361C/LT1362C are designed,
characterized and expected to meet specified performance from –40°C to
85°C, but are not tested or QA sampled at these temperatures. For
guaranteed I-grade parts, consult the factory.
Note 5: Slew rate is measured between ±10V on the output with ±6V input
for ±15V supplies and ±1V on the output with ±1.75V input for ±5V supplies.
MINTYPMAXUNITS
●175V/µs
●20MHz
.
P
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage
and Temperature
6
5
4
3
SUPPLY CURRENT (mA)
2
1
10501520
SUPPLY VOLTAGE (±V)
125°C
25°C
–55°C
1361/1362 G01
Input Common Mode Range vs
Supply Voltage
+
V
TA = 25°C
–0.5
∆V
< 1mV
2.0
1.5
1.0
0.5
OS
–
V
10501520
SUPPLY VOLTAGE (±V)
–1.0
–1.5
–2.0
COMMON MODE RANGE (V)
1361/1362 G02
Input Bias Current vs
Input Common Mode Voltage
0.6
VS = ±15V
= 25°C
T
A
+
0.5
I
B
0.4
0.3
0.2
INPUT BIAS CURRENT (µA)
0.1
0
–15–10010155–5
=
INPUT COMMON MODE VOLTAGE (V)
–
I
+ I
B
B
————
2
1361/1362 G03
5
Page 6
LT1361/LT1362
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE SWING (V)
1.0
1.5
0.5
V
+
V
–
–0.5
–1.0
–1.5
2.0
–2.0
–50 –40–1030 40 5001020–20–30
1361/1362 G09
VS = ±5V
V
IN
= 100mV
85°C
85°C
25°C
25°C
–40°C
–40°C
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current vs
Temperature
0.7
0.6
0.5
0.4
0.3
0.2
INPUT BIAS CURRENT (µA)
0.1
0
–50 –2525100 12550750
TEMPERATURE (°C)
VS = ±15V
=
I
B
Open-Loop Gain vs Temperature
81
VS = ±15V
80
V
= ±12V
O
= 1k
R
L
79
78
77
76
75
OPEN-LOOP GAIN (dB)
74
73
72
–50 –2525100 12550750
TEMPERATURE (°C)
+
–
I
+ I
B
B
————
2
1361/1362 G04
1361/1362 G07
Input Noise Spectral Density
100
e
n
i
n
10
INPUT VOLTAGE NOISE (nV/√Hz)
1
10
1k100100k10k
FREQUENCY (Hz)
Output Voltage Swing vs
Supply Voltage
+
V
= 25°C
T
A
–1
–2
–3
3
2
OUTPUT VOLTAGE SWING (V)
1
–
V
10501520
SUPPLY VOLTAGE (±V)
VS = ±15V
= 25°C
T
A
= 101
A
V
= 100k
R
S
RL = 1k
R
= 500Ω
L
R
= 500Ω
L
R
1361/1362 G05
= 1k
L
1361/1362 G08
10
1
0.1
Open-Loop Gain vs
Resistive Load
85
INPUT CURRENT NOISE (pA/√Hz)
80
75
70
OPEN-LOOP GAIN (dB)
65
60
10
Output Voltage Swing vs
Load Current
T
= 25°C
A
10010k
LOAD RESISTANCE (Ω)
VS = ±15V
VS = ±5V
1k
1361/1362 G06
Output Short-Circuit Current vs
Temperature
70
65
60
55
50
45
40
OUTPUT SHORT-CIRCUIT CURRENT (mA)
35
–50 –2525100 12550750
6
SOURCE
SINK
TEMPERATURE (°C)
VS = ±5V
1361/1362 G10
Settling Time vs Output Step
(Noninverting)
10
VS = ±15V
8
= 1
A
V
= 1k
R
L
6
4
2
0
–2
OUTPUT STEP (V)
–4
–6
–8
–10
040801006020
10mV
10mV
SETTLING TIME (ns)
1mV
1mV
1361/1362 G11
Settling Time vs Output Step
(Inverting)
10
VS = ±15V
8
= –1
A
V
= 1k
R
F
6
= 3pF
C
F
4
2
0
–2
OUTPUT STEP (V)
–4
–6
–8
–10
040801006020
SETTLING TIME (ns)
10mV
10mV
1mV
1mV
1361/1362 G12
Page 7
W
FREQUENCY (Hz)
100k
–120
CROSSTALK (dB)
–100
–110
–20
1M100M
1361/1362 G21
–60
–80
10M
–40
–90
–50
–70
–30
TA = 25°C
A
V
= 1
V
IN
= 0dBm
VS = ±15V
R
L
= 1k
VS = ±5V
R
L
= 500Ω
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1361/LT1362
Output Impedance vs Frequency
100
AV = 10
AV = 1
1M
FREQUENCY (Hz)
OUTPUT IMPEDANCE (Ω)
0.1
0.01
10
1
10k
AV = 100
100k100M
Gain Bandwidth and Phase
Margin vs Temperature
80
PHASE MARGIN
= ±5V
V
S
70
60
50
GAIN BANDWIDTH
GAIN BANDWIDTH (MHz)
= ±5V
V
40
S
30
–50 –2525100 12550750
TEMPERATURE (°C)
PHASE MARGIN
V
= ±15V
S
GAIN BANDWIDTH
= ±15V
V
S
VS = ±15V
= 25°C
T
A
10M
1361/1362 G13
1361/1362 G16
Gain and Phase vs Frequency
70
60
50
40
30
GAIN (dB)
20
10
T
0
A
R
–10
10k
50
45
40
PHASE MARGIN (DEG)
35
30
25
20
15
10
5
0
GAIN (dB)
PHASE
GAIN
= 25°C
A
= –1
V
= RG = 1k
F
VS = ±15V
VS = ±5V
100k100M
1M
FREQUENCY (Hz)
VS = ±15V
VS = ±5V
10M
Frequency Response vs
Supply Voltage (AV = 1)
5
T
= 25°C
A
4
= 1
A
V
R
= 1k
3
L
2
1
0
–1
–2
–3
–4
–5
100k
1M100M
FREQUENCY (Hz)
±5V
10M
1361/1362 G14
±2.5V
120
100
80
60
40
20
0
±15V
1361/1362 G17
Crosstalk vs Frequency
PHASE (DEG)
Frequency Response vs
Capacitive Load
12
10
8
6
4
2
0
–2
VOLTAGE MAGNITUDE (dB)
–4
–6
–8
1M
VS = ±15V
= 25°C
T
A
A
= –1
V
C = 1000pF
C = 500pF
10M
FREQUENCY (Hz)
C = 100pF
C = 50pF
C = 0
100M
1361/1362 G18
GAIN BANDWIDTH (MHz)
Gain Bandwidth and Phase
Margin vs Supply Voltage
80
70
60
50
40
30
PHASE MARGIN
GAIN BANDWIDTH
10501520
SUPPLY VOLTAGE (±V)
TA = 25°C
1361/1362 G15
50
100
48
46
PHASE MARGIN (DEG)
80
44
42
60
40
38
40
36
34
32
20
POWER SUPPLY REJECTION RATIO (dB)
30
Power Supply Rejection Ratio
vs Frequency
+PSRR
–PSRR
0
100k1M1k10k10010M 100M
FREQUENCY (Hz)
VS = ±15V
T
= 25°C
A
1361/1362 G19
Common Mode Rejection Ratio
vs Frequency
120
100
80
60
40
20
COMMON-MODE REJECTION RATIO (dB)
0
1k100M10M1M100k10k
FREQUENCY (Hz)
VS = ±15V
T
= 25°C
A
1361/1362 G20
7
Page 8
LT1361/LT1362
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate vs Supply Voltage
2000
TA = 25°C
1800
1600
1400
1200
1000
SLEW RATE (V/µs)
A
V
R
F
SR =
800
600
400
200
0
015105
= –1
= RG = 1k
+
–
SR
+ SR
—————
2
SUPPLY VOLTAGE (±V)
Total Harmonic Distortion
vs Frequency
0.01
TA = 25°C
V
= 3V
O
RMS
RL = 500Ω
0.001
TOTAL HARMONIC DISTORTION (%)
0.0001
10
AV = –1
AV = 1
100100k
1k
FREQUENCY (Hz)
10k
1361/1362 G22
1361/1362 G25
Slew Rate vs Temperature
1000
900
800
s)
µ
700
600
500
SLEW RATE (V/
400
300
200
–50 –2525100 12550750
TEMPERATURE (°C)
Undistorted Output Swing vs
Frequency (±15V)
30
25
)
P-P
20
15
10
VS = ±15V
OUTPUT VOLTAGE (V
= 1k
R
L
5
= 1, 1% MAX DISTORTION
A
V
A
= –1, 2% MAX DISTORTION
V
0
100k1M
FREQUENCY (Hz)
A
= –2
V
SR = —————
V
= ±15V
S
= ±5V
V
S
AV = 1
SR+ + SR
2
1361/1362 G23
AV = –1
1361/1362 G26
–
10M
Slew Rate vs Input Level
2000
TA = 25°C
SLEW RATE (V/µs)
1800
1600
1400
1200
1000
800
600
400
200
= ±15V
V
S
= –1
A
V
= RG = 1k
R
F
SR =
0
08162012421018146
+
+ SR
SR
—————
2
INPUT LEVEL (V
–
Undistorted Output Swing vs
Frequency (±5V)
10
8
)
P-P
6
4
OUTPUT VOLTAGE (V
2
VS = ±5V
= 1k
R
L
2% MAX DISTORTION
0
100k1M
FREQUENCY (Hz)
AV = –1
AV = 1
P-P
)
1361/1362 G24
10M
1361/1362 G27
2nd and 3rd Harmonic Distortion
vs Frequency
–30
VS = ±15V
= 2V
V
O
RL = 500Ω
= 2
A
V
P-P
3RD HARMONIC
2ND HARMONIC
1M2M4M
FREQUENCY (Hz)
–40
–50
–60
–70
HARMONIC DISTORTION (dB)
–80
–90
100k 200k 400k
8
1361/1362 G28
10M
Differential Gain and Phase
vs Supply Voltage
DIFFERENTIAL GAIN
0.40
0.36
0.32
DIFFERENTIAL PHASE (DEG)
0.28
DIFFERENTIAL PHASE
SUPPLY VOLTAGE (V)
AV = 2
= 150Ω
R
L
= 25°C
T
A
±10±5±15
1361/1362 G29
DIFFERENTIAL GAIN (%)
0.50
0.25
0
Capacitive Load Handling
100
50
OVERSHOOT (%)
0
10p
TA = 25°C
V
= ±15V
S
1000p 0.01µ
100p0.1µ
CAPACITIVE LOAD (F)
AV = –1
AV = 1
1µ
1361/1362 G30
Page 9
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1361/LT1362
Small-Signal Transient
(AV = 1)
Large-Signal Transient
(AV = 1)
1361/1362 TA31
Small-Signal Transient
(AV = –1)
Large-Signal Transient
(AV = –1)
1361/1362 TA32
Small-Signal Transient
(AV = –1, CL = 500pF)
1361/1362 TA33
Large-Signal Transient
(AV = 1, CL = 10,000pF)
1361/1362 TA34
U
WUU
APPLICATIONS INFORMATION
Layout and Passive Components
The LT1361/LT1362 amplifiers are easy to use and tolerant of less than ideal layouts. For maximum performance
(for example, fast 0.01% settling) use a ground plane,
short lead lengths, and RF-quality bypass capacitors
(0.01µF to 0.1µF). For high drive current applications use
low ESR bypass capacitors (1µF to 10µF tantalum). The
parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole which can cause peaking
or oscillations. If feedback resistors greater than 5kΩ are
used, a parallel capacitor of value
CF > RG x CIN/R
should be used to cancel the input pole and optimize
dynamic performance. For unity-gain applications where
a large feedback resistor is used, CF should be greater
than or equal to CIN.
F
1361/1362 TA35
1361/1362 TA36
Input Considerations
Each of the LT1361/LT1362 inputs is the base of an NPN
and a PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP beta,
the polarity of the input bias current can be positive or
negative. The offset current does not depend on NPN/PNP
beta matching and is well controlled. The use of balanced
source resistance at each input is recommended for
applications where DC accuracy must be maximized.
The inputs can withstand transient differential input voltages up to 10V without damage and need no clamping or
source resistance for protection. Differential inputs, however, generate large supply currents (tens of mA) as
required for high slew rates. If the device is used with
sustained differential inputs, the average supply current
will increase, excessive power dissipation will result and
the part may be damaged. The part should not be used as
a comparator, peak detector or other open-loop applica-
9
Page 10
LT1361/LT1362
U
WUU
APPLICATIONS INFORMATION
tion with large, sustained differential inputs. Under
normal, closed-loop operation, an increase of power dissipation is only noticeable in applications with large slewing
outputs and is proportional to the magnitude of the
differential input voltage and the percent of the time that
the inputs are apart. Measure the average supply current
for the application in order to calculate the power dissipation.
Capacitive Loading
The LT1361/LT1362 are stable with any capacitive load.
This is accomplished by sensing the load induced output
pole and adding compensation at the amplifier gain node.
As the capacitive load increases, both the bandwidth and
phase margin decrease so there will be peaking in the
frequency domain and in the transient response as shown
in the typical performance curves. The photo of the small
signal response with 500pF load shows 60% peaking. The
large signal response shows the output slew rate being
limited to 5V/µs by the short-circuit current. Coaxial cable
can be driven directly, but for best pulse fidelity a resistor
of value equal to the characteristic impedance of the cable
(i.e., 75Ω) should be placed in series with the output. The
other end of the cable should be terminated with the same
value resistor to ground.
Circuit Operation
The LT1361/LT1362 circuit topology is a true voltage
feedback amplifier that has the slewing behavior of a
current feedback amplifier. The operation of the circuit can
be understood by referring to the simplified schematic.
The inputs are buffered by complementary NPN and PNP
emitter followers which drive a 500Ω resistor. The input
voltage appears across the resistor generating currents
which are mirrored into the high impedance node. Complementary followers form an output stage which buffers the
gain node from the load. The bandwidth is set by the input
resistor and the capacitance on the high impedance node.
The slew rate is determined by the current available to
charge the gain node capacitance. This current is the
differential input voltage divided by R1, so the slew rate is
proportional to the input. Highest slew rates are therefore
seen in the lowest gain configurations. For example, a 10V
output step in a gain of 10 has only a 1V input step,
whereas the same output step in unity gain has a 10 times
greater input step. The curve of Slew Rate vs Input Level
illustrates this relationship. The LT1361/LT1362 are tested
for slew rate in a gain of –2 so higher slew rates can be
expected in gains of 1 and –1, and lower slew rates in
higher gain configurations.
The RC network across the output stage is bootstrapped
when the amplifier is driving a light or moderate load and
has no effect under normal operation. When driving a
capacitive load (or a low value resistive load) the network
is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance
slows down the amplifier which improves the phase
margin by moving the unity-gain frequency away from the
pole formed by the output impedance and the capacitive
load. The zero created by the RC combination adds phase
to ensure that even for very large load capacitances, the
total phase lag can never exceed 180 degrees (zero phase
margin) and the amplifier remains stable.
Power Dissipation
The LT1361/LT1362 combine high speed and large output
drive in small packages. Because of the wide supply
voltage range, it is possible to exceed the maximum
junction temperature under certain conditions. Maximum
junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) as follows:
LT1361CN8: TJ = TA + (PD x 130°C/W)
LT1361CS8: TJ = TA + (PD x 190°C/W)
LT1362CN: TJ = TA + (PD x 110°C/W)
LT1362CS:TJ = TA + (PD x 150°C/W)
Worst case power dissipation occurs at the maximum
supply current and when the output voltage is at 1/2 of
either supply voltage (or the maximum swing if less than
1/2 supply voltage). For each amplifier P
P
= (V+ – V–)(I
DMAX
Example: LT1362 in S16 at 70°C, VS = ±5V, RL = 100Ω
P
= (10V)(5.6mA) + (2.5V)2/100Ω = 119mW
DMAX
T
= 70°C + (4 x 119mW)(150°C/W) = 141°C
JMAX
) + (V+/2)2/R
SMAX
DMAX
L
is:
10
Page 11
SI PLIFIED
+
V
LT1361/LT1362
WW
SCHE ATIC
–IN
–
V
500Ω
PACKAGE DESCRIPTION
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
TYP
R1
+IN
R
C
C
U
Dimension in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.045 – 0.065
(1.143 – 1.651)
0.100
(2.54)
BSC
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.020
(0.508)
MIN
0.255 ± 0.015*
(6.477 ± 0.381)
C
C
0.400*
(10.160)
MAX
876
1234
OUT
1361/1362 SS01
5
N8 1098
0.300 – 0.325
(7.620 – 8.255)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
0.020
(0.508)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.005
(0.125)
MIN
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
N Package
14-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.018 ± 0.003
0.100
(2.54)
BSC
(0.457 ± 0.076)
0.255 ± 0.015*
(6.477 ± 0.381)
0.770*
(19.558)
MAX
14
2
11
1213
31
5
4
8910
7
6
N14 1098
11
Page 12
LT1361/LT1362
1361/1362 TA04
V
IN
1.1k
2.21k
22pF
909Ω
47pF
470pF
V
OUT
–
+
–
+
1.1k
2.67k909Ω
220pF
1/2
LT1361
1/2
LT1361
U
TYPICAL APPLICATIONS
Two Op Amp Instrumentation Amplifier1MHz, 4th Order Butterworth Filter
R5
220Ω
10k
R1
R2
1k
10k
R4
–
1/2
LT1361
+
–
V
IN
R3
1k
–
1/2
LT1361
+
+
R
4
GAIN
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON-MODE REJECTION
BW = 500kHz
=
+
1
R
3
RRR
12213
+
R
4
RR
+
23
()
+
=
102
R
5
PACKAGE DESCRIPTION
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
0.016 – 0.050
(0.406 – 1.270)
0°– 8° TYP
V
OUT
1361/1362 TA03
U
Dimension in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
(LTC DWG # 05-08-1610)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
0.228 – 0.244
(5.791 – 6.197)
0.189 – 0.197*
(4.801 – 5.004)
8
1
7
2
6
3
5
0.150 – 0.157**
(3.810 – 3.988)
4
SO8 1298
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
×
°
45
0.016 – 0.050
(0.406 – 1.270)
0° – 8° TYP
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
(LTC DWG # 05-08-1610)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
0.228 – 0.244
(5.791 – 6.197)
16
15
1
2
0.386 – 0.394*
(9.804 – 10.008)
14
3
13
12
11
10
9
0.150 – 0.157**
(3.810 – 3.988)
5
4
7
6
8
S16 1098
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LT136050MHz, 800V/µs Op AmpSingle Version of LT1361/LT1362
LT1364/LT1365Dual and Quad 70MHz, 1000V/µs Op AmpsFaster Version of LT1361/LT1362, VOS = 1.5mV, IS = 6.3mA/Amplifier
LT1358/LT1359Dual and Quad 25MHz, 600Vµs Op AmpsLower Power Version of LT1361/LT1362, VOS = 0.6mV, IS = 2mA/Amplifier
LT1813Dual 100MHz, 700V/µs Op AmpsLow Voltage, Low Power LT1361, IS = 3mA/Amplifier
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
13612fa LT/TP 0400 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1994
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.