The LT
operational amplifier with outstanding AC and DC performance. The LT1354 has much lower supply current, lower
input offset voltage, lower input bias current, and higher
DC gain than devices with comparable bandwidth. The
circuit topology is a voltage feedback amplifier with the
slewing characteristics of a current feedback amplifier.
The amplifier is a single gain stage with outstanding
settling characteristics which makes the circuit an ideal
choice for data acquisition systems. The output drives a
500Ω load to ±12V with ±15V supplies and a 150Ω load
to ±2.5V on ±5V supplies. The amplifier is also stable with
any capacitive load which makes it useful in buffer or cable
driver applications.
The LT1354 is a member of a family of fast, high performance amplifiers using this unique topology and employing Linear Technology Corporation’s advanced bipolar
complementary processing. For dual and quad amplifier
versions of the LT1354 see the LT1355/LT1356 data
sheet. For higher bandwidth devices with higher supply
current see the LT1357 through LT1365 data sheets.
Singles, duals, and quads of each amplifier are available.
C-Load is a trademark of Linear Technology Corporation
1354 is a low power, high speed, high slew rate
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
100kHz, 4th Order Butterworth Filter
6.81k
100pF
V
IN
11.3k6.81k
330pF
–
LT1354
+
5.23k
U
10.2k
1000pF
5.23k
–
LT1354
+
47pF
V
1354 TA01
AV = –1 Large-Signal Response
OUT
1354 TA02
1
Page 2
LT1354
WW
W
U
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V–) ............................... 36V
Differential Input Voltage (Transient Only, Note 1)...
±10V
Input Voltage ............................................................±V
Input Offset Current±2.5V to ±15V
Input Bias Current±2.5V to ±15V
= ±12V±15V
CM
V
= ±2.5V±5V
CM
V
= ±0.5V±2.5V
CM
PSRRPower Supply Rejection RatioVS = ±2.5V to ±15V
A
V
I
I
VOL
OUT
OUT
SC
Large-Signal Voltage GainV
= ±12V, RL = 1k±15V
OUT
V
= ±10V, RL = 500Ω±15V
OUT
V
= ±2.5V, RL = 1k±5V
OUT
V
= ±2.5V, RL = 500Ω±5V
OUT
V
= ±2.5V, RL = 150Ω±5V
OUT
V
= ±1V, RL = 500Ω±2.5V
OUT
Output SwingRL = 1k, V
R
= 500Ω, V
L
R
= 500Ω, V
L
R
= 150Ω, V
L
R
= 500Ω, V
L
Output CurrentV
Short-Circuit CurrentV
= ±11V±15V
OUT
V
= ±2.1V±5V
OUT
= 0V, V
OUT
= ±40mV±15V
IN
= ±40mV±15V
IN
= ±40mV±5V
IN
= ±40mV±5V
IN
= ±40mV±2.5V
IN
= ±3V±15V
IN
SRSlew Rate AV = –2, (Note 3)±15V
GBWGain Bandwithf = 200kHz, R
I
S
Supply Current±15V
= 2k±15V
L
SUPPLY
±5V
±2.5V
±5V
±5V
±5V
MINTYPMAXUNITS
●
13.2±V
●
11.5±V
●
3.4±V
●
2.3±V
●
1.2±V
●
23.0mA
●
15.3mA
●
24mA
●
150V/µs
●
60V/µs
●
7.5MHz
●
6.0MHz
●
●
1.45mA
1.40mA
MINTYPMAXUNITS
●
●
●
●
●
●
●
78dB
●
76dB
●
66dB
●
90dB
●
7.0V/mV
●
1.7V/mV
●
7.0V/mV
●
1.7V/mV
●
0.4V/mV
●
1.7V/mV
●
13.0±V
●
11.0±V
●
3.4±V
●
2.1±V
●
1.2±V
●
22mA
●
14mA
●
23mA
●
120V/µs
●
50V/µs
●
7.0MHz
●
5.5MHz
●
●
1.5mV
1.5mV
1.7mV
58 µV/°C
200nA
550nA
1.50mA
1.45mA
4
Page 5
ELECTRICAL CHARACTERISTICS
LOAD RESISTANCE (Ω)
10
50
OPEN-LOOP GAIN (dB)
60
100
10010k
1354 G06
80
70
1k
90
VS = ±5V
VS = ±15V
T
A
= 25°C
The ● denotes specifications that apply over the full specified temperature
range.
Note 1: Differential inputs of ±10V are appropriate for transient operation
only, such as during slewing. Large, sustained differential inputs will
cause excessive power dissipation and may damage the part. See Input
Considerations in the Applications Information section of this data sheet
for more dutails.
Note 2: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 3: Slew rate is measured between ±10V on the output with ±6V input
for ±15V supplies and ± 1V on the output with ±1.75V input for ±5V supplies.
Note 4: Full power bandwidth is calculated from the slew rate
measurement: FPBW = SR/2πV
Note 5: This parameter is not 100% tested.
Note 6: The LT1354 is designed, characterized and expected to meet these
extended temperature limits, but is not tested at –40°C and at 85°C.
Guaranteed I grade parts are available; consult factory.
UW
TYPICAL PERFORMANCE CHARACTERISTICS
LT1354
.
P
Supply Current vs Supply Voltage
and Temperature
1.4
1.2
1.0
0.8
SUPPLY CURRENT (mA)
0.6
0.4
10501520
SUPPLY VOLTAGE (±V)
125°C
25°C
–55°C
1354 G01
Input Common-Mode Range vs
Supply Voltage
+
V
TA = 25°C
–0.5
–1.0
–1.5
–2.0
2.0
1.5
COMMON-MODE RANGE (V)
1.0
0.5
–
V
< 1mV
∆V
OS
SUPPLY VOLTAGE (±V)
10501520
1354 G02
Input Bias Current vs
Temperature
200
175
150
125
100
75
50
INPUT BIAS CURRENT (nA)
25
0
–50 –2525100 12550750
TEMPERATURE (°C)
VS = ±15V
+
I
B
I
=
————
B
+ I
–
B
2
1354 G04
Input Noise Spectral Density
100
e
n
i
n
10
INPUT VOLTAGE NOISE (nV/√Hz)
1
10
1k100100k10k
FREQUENCY (Hz)
VS = ±15V
= 25°C
T
A
= 101
A
V
= 100k
R
S
10
INPUT CURRENT NOISE (pA/√Hz)
1
0.1
1354 G05
Input Bias Current vs
Input Common-Mode Voltage
200
VS = ±15V
= 25°C
T
A
+
–
I
+ I
150
I
=
B
100
50
INPUT BIAS CURRENT (nA)
0
–50
–15–10010155–5
INPUT COMMON-MODE VOLTAGE (V)
B
B
————
2
Open-Loop Gain vs
Resistive Load
1354 G03
5
Page 6
LT1354
SUPPLY VOLTAGE (±V)
8
GAIN-BANDWIDTH (MHz)
12
10
18
16
14
11
9
17
15
13
30
PHASE MARGIN (DEG)
38
34
50
48
44
40
36
32
46
42
10501520
1354 G15
TA = 25°C
PHASE MARGIN
GAIN-BANDWIDTH
SETTLING TIME (ns)
–10
OUTPUT SWING (V)
–6
–4
–8
10
8
6
4
–2
2
0
50200300350250100150
1355/1356 G12
VS = ±15V
A
V
= –1
10mV
10mV
1mV
1mV
UW
TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain vs Temperature
97
RL = 1k
96
= ±12V
V
O
= ±15V
V
S
95
94
93
92
91
OPEN-LOOP GAIN (dB)
90
89
88
–50 –2525100 12550750
TEMPERATURE (°C)
Output Short-Circuit Current vs
Temperature
65
60
55
50
45
40
35
30
25
OUTPUT SHORT-CIRCUIT CURRENT (mA)
20
–50 –2525100 12550750
SOURCE
TEMPERATURE (°C)
SINK
VS = ±5V
1354 G07
1354 G10
Output Voltage Swing vs
Supply Voltage
+
V
TA = 25°C
–1
–2
–3
3
2
OUTPUT VOLTAGE SWING (V)
1
–
V
R
= 500Ω
L
R
= 500Ω
L
10501520
SUPPLY VOLTAGE (±V)
Settling Time vs Output Step
(Noninverting)
10
VS = ±15V
8
= 1
A
V
6
10mV
4
2
0
–2
OUTPUT SWING (V)
–4
–6
–8
–10
10mV
50200300350250100150
SETTLING TIME (ns)
1mV
1mV
RL = 1k
= 1k
R
L
1354 G08
1354 G11
Output Voltage Swing vs
Load Current
+
V
–0.5
VS = ±5V
–1.0
–1.5
–2.0
–2.5
2.5
2.0
OUTPUT VOLTAGE SWING (V)
1.5
1.0
–
+0.5
V
= 100mV
V
IN
–40°C
–50 –40–1030 40 5001020–20–30
–40°C
85°C
25°C
OUTPUT CURRENT (mA)
Settling Time vs Output Step
(Inverting)
85°C
25°C
1354 G09
Output Impedance vs Frequency
1k
100
10
1
OUTPUT IMPEDANCE (Ω)
0.1
0.01
10k
6
VS = ±15V
= 25°C
T
AV = 100
AV = 1
100k100M
1M
FREQUENCY (Hz)
A
AV = 10
10M
1354 G13
70
60
50
40
30
GAIN (dB)
20
10
0
–10
10k
Gain and Phase vs Frequency
PHASE
VS = ±15V
VS = ±15V
GAIN
VS = ±5V
= 25°C
T
A
= –1
A
V
= RG = 2k
R
F
100k100M
VS = ±5V
1M
FREQUENCY (Hz)
10M
1354 G14
120
100
PHASE (DEG)
80
60
40
20
0
Gain-Bandwidth and Phase
Margin vs Supply Voltage
Page 7
UW
FREQUENCY (Hz)
100k
–5
GAIN (dB)
–3
–4
5
1M100M
1354 G18
1
–1
10M
3
–2
2
0
4
±15V
±2.5V
T
A
= 25°C
A
V
= –1
R
F
= RG = 2k
±5V
FREQUENCY (Hz)
0
COMMON-MODE REJECTION RATIO (dB)
40
20
120
100
80
60
1k100M10M1M100k10k
1354 G21
VS = ±15V
T
A
= 25°C
INPUT LEVEL (V
P-P
)
0
SLEW RATE (V/µs)
100
500
400
200
300
08162012421018146
1354 G24
VS = ±15V
A
V
= –1
R
F
= RG = 2k
SR =
TA = 25°C
SR
+
+ SR–
—————
2
TYPICAL PERFORMANCE CHARACTERISTICS
LT1354
Gain-Bandwidth and Phase
Margin vs Temperature
18
17
16
15
14
13
12
11
GAIN-BANDWIDTH (MHz)
10
GAIN-BANDWIDTH
V
S
9
8
–50 –2525100 12550750
= ±5V
PHASE MARGIN
= ±15V
V
S
TEMPERATURE (°C)
Frequency Response vs
Capacitive Load
10
VS = ±15V
8
= 25°C
T
A
= –1
A
6
V
4
2
0
–2
–4
VOLTAGE MAGNITUDE (dB)
–6
–8
–10
100k
1M100M10M
FREQUENCY (Hz)
PHASE MARGIN
= ±5V
V
S
GAIN-BANDWIDTH
= ±15V
V
S
C = 1000pF
C = 500pF
C = 100pF
C = 50pF
C = 0
1354 G16
1354 G19
Frequency Response vs
Supply Voltage (A
52
50
48
46
44
42
40
38
36
34
32
5
T
= 25°C
A
4
= 1
A
V
= 2k
R
3
–4
–1
–2
–3
–5
L
2
1
0
100k
PHASE MARGIN (DEG)
GAIN (dB)
Power Supply Rejection Ratio
vs Frequency
100
80
60
40
20
POWER SUPPLY REJECTION RATIO (dB)
+PSRR
0
= 1)
V
±15V
±5V
±2.5V
1M100M
FREQUENCY (Hz)
FREQUENCY (Hz)
10M
1354 G17
VS = ±15V
= 25°C
T
A
–PSRR
100k1M1k10k10010M 100M
1354 G20
Frequency Response vs
Supply Voltage (A
= –1)
V
Common-Mode Rejection Ratio
vs Frequency
Slew Rate vs Supply Voltage
600
AV = –1
= RG = 2k
R
F
500
400
300
200
SLEW RATE (V/µs)
100
0
015105
+
SR
+ SR–
SR =
—————
TA = 25°C
2
SUPPLY VOLTAGE (±V)
1354 G22
Slew Rate vs Temperature
350
AV = –2
300
250
SR+ + SR–
SR = —————
200
150
SLEW RATE (V/µs)
100
50
–50 –2525100 12550750
2
TEMPERATURE (°C)
= ±15V
V
S
V
S
Slew Rate vs Input Level
= ±5V
1354 G23
7
Page 8
LT1354
FREQUENCY (Hz)
100k1M
0
OUTPUT VOLTAGE (V
P-P
)
10
10M
1354 G27
6
2
4
8
AV = –1
AV = 1
VS = ±5V
R
L
= 5k
A
V
= 1,
2% MAX DISTORTION
A
V
= –1,
3% MAX DISTORTION
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
Total Harmonic Distortion
vs Frequency
0.1
TA = 25°C
= 3V
V
R
0.01
0.001
TOTAL HARMONIC DISTORTION (%)
0.0001
10
O
RMS
= 2k
L
AV = –1
AV = 1
100100k
1k
FREQUENCY (Hz)
2nd and 3rd Harmonic Distortion
vs Frequency
–20
VS = ±15V
= 2V
V
–30
R
A
–40
–50
–60
HARMONIC DISTORTION (dB)
–70
O
P-P
= 2k
L
= 2
V
3RD HARMONIC
2ND HARMONIC
10k
1354 G25
Undistorted Output Swing vs
Frequency (±15V)
30
25
)
P-P
20
15
VS = ±15V
10
= 5k
R
L
= 1,
A
OUTPUT VOLTAGE (V
V
1% MAX DISTORTION
5
= –1,
A
V
4% MAX DISTORTION
0
100k1M
FREQUENCY (Hz)
Differential Gain and Phase
vs Supply Voltage
DIFFERENTIAL GAIN
AV = 2
= 1k
R
3.4
3.3
3.2
DIFFERENTIAL PHASE (DEGREES)
L
= 25°C
T
A
DIFFERENTIAL PHASE
AV = 1
AV = –1
10M
1355/1356 G26
Undistorted Output Swing vs
Frequency (±5V)
Capacitive Load Handling
2.5
2.0
1.5
100
DIFFERENTIAL PHASE (PERCENT)
TA = 25°C
= ±15V
V
S
50
OVERSHOOT (%)
AV = 1
AV = –1
–80
8
100k 200k 400k
1M2M4M
FREQUENCY (Hz)
Small-Signal Transient
= 1)
(A
V
1354 G28
1354 TA31
10M
3.1
±5±10±15
SUPPLY VOLTAGE (V)
Small-Signal Transient
= –1)
(A
V
1354 G29
1354 TA32
0
10p
1000p 0.01µ
100p0.1µ
CAPACITIVE LOAD (F)
Small-Signal Transient
= –1, CL = 1000pF)
(A
V
1µ
1354 G30
1354 TA33
Page 9
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1354
Large-Signal Transient
= 1)
(A
V
1354 TA341354 TA351354 TA36
U
WUU
Large-Signal Transient
(A
= –1)
V
APPLICATIONS INFORMATION
The LT1354 may be inserted directly into many high
speed amplifier applications improving both DC and AC
performance, provided that the nulling circuitry is
removed. The suggested nulling circuit for the LT1354 is
shown below.
Offset Nulling
+
V
3
2
Layout and Passive Components
The LT1354 amplifier is easy to apply and tolerant of less
than ideal layouts. For maximum performance (for
example fast settling time) use a ground plane, short lead
lengths, and RF-quality bypass capacitors (0.01µF to
0.1µF). For high drive current applications use low ESR
bypass capacitors (1µF to 10µF tantalum). Sockets should
be avoided when maximum frequency performance is
required, although low profile sockets can provide
reasonable performance up to 50MHz. For more details
see Design Note 50.
+
–
1
LT1354
10k
7
6
4
8
–
V
1354 AI01
Large-Signal Transient
= 1, CL = 10,000pF)
(A
V
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input can combine with
the input capacitance to form a pole which can cause
peaking or oscillations. For feedback resistors greater
than 5kΩ, a parallel capacitor of value
> (RG • CIN)/R
C
F
F
should be used to cancel the input pole and optimize
dynamic performance. For unity-gain applications where
a large feedback resistor is used, C
than or equal to C
IN
.
should be greater
F
Capacitive Loading
The LT1354 is stable with any capacitive load. This is
accomplished by sensing the load induced output pole and
adding compensation at the amplifier gain node. As the
capacitive load increases, both the bandwidth and phase
margin decrease so there will be peaking in the frequency
domain and in the transient response as shown in the
typical performance curves.The photo of the small-signal
response with 1000pF load shows 43% peaking. The large
signal response with a 10,000pF load shows the output
slew rate being limited to 5V/µs by the short-circuit
current. Coaxial cable can be driven directly, but for best
pulse fidelity a resistor of value equal to the characteristic
impedance of the cable (i.e., 75Ω) should be placed in
series with the output. The other end of the cable should
be terminated with the same value resistor to ground.
9
Page 10
LT1354
U
WUU
APPLICATIONS INFORMATION
Input Considerations
Each of the LT1354 inputs is the base of an NPN and
a PNP transistor whose base currents are of opposite
polarity and provide first-order bias current cancellation.
Because of variation in the matching of NPN and PNP
beta, the polarity of the input bias current can be positive
or negative. The offset current does not depend on
NPN/PNP beta matching and is well controlled. The use of
balanced source resistance at each input is recommended
for applications where DC accuracy must be maximized.
The inputs can withstand transient differential input voltages up to 10V without damage and need no clamping or
source resistance for protection. Differential inputs, however, generate large supply currents (tens of mA) as
required for high slew rates. If the device is used with
sustained differential inputs, the average supply current
will increase, excessive power dissipation will result and
the part may be damaged.
a comparator, peak detector or other open-loop application with large, sustained differential inputs
normal, closed-loop operation, an increase of power
dissipation is only noticeable in applications with large
slewing outputs and is proportional to the magnitude of
the differential input voltage and the percent of the time
that the inputs are apart. Measure the average supply
current for the application in order to calculate the power
dissipation.
Power Dissipation
The LT1354 combines high speed and large output drive
in a small package. Because of the wide supply voltage
range, it is possible to exceed the maximum junction
temperature under certain conditions. Maximum junction
temperature (T
ture (T
) and power dissipation (PD) as follows:
A
) is calculated from the ambient tempera-
J
The part should not be used as
. Under
either supply voltage (or the maximum swing if less than
1/2 supply voltage). Therefore P
P
Example: LT1354CS8 at 70°C, VS = ±15V, RL = 100Ω
(Note: the minimum short-circuit current at 70°C is
24mA, so the output swing is guaranteed only to 2.4V with
100Ω.)
P
T
Circuit Operation
The LT1354 circuit topology is a true voltage feedback
amplifier that has the slewing behavior of a current feedback amplifier. The operation of the circuit can be understood by referring to the simplified schematic. The inputs
are buffered by complementary NPN and PNP emitter
followers which drive an 800Ω resistor. The input voltage
appears across the resistor generating currents which are
mirrored into the high impedance node. Complementary
followers form an output stage which buffers the gain
node from the load. The bandwidth is set by the input
resistor and the capacitance on the high impedance node.
The slew rate is determined by the current available to
charge the gain node capacitance. This current is the
differential input voltage divided by R1, so the slew rate
is proportional to the input. Highest slew rates are therefore seen in the lowest gain configurations. For example,
a 10V output step in a gain of 10 has only a 1V input step,
whereas the same output step in unity gain has a 10 times
greater input step. The curve of Slew Rate vs Input Level
illustrates this relationship. The LT1354 is tested for slew
rate in a gain of –2 so higher slew rates can be expected
in gains of 1 and –1, and lower slew rates in higher gain
configurations.
= (V+ – V–)(I
DMAX
= (30V • 1.45mA) + (15V–2.4V)(24mA) = 346mW
DMAX
= 70°C + (346mW • 190°C/W) = 136°C
JMAX
) + (V+/2)2/R
SMAX
DMAX
is:
L
LT1354CN8: T
LT1354CS8: T
Worst case power dissipation occurs at the maximum
supply current and when the output voltage is at 1/2 of
= TA + (PD • 130°C/W)
J
= TA + (PD • 190°C/W)
J
10
The RC network across the output stage is bootstrapped
when the amplifier is driving a light or moderate load and
has no effect under normal operation. When driving a
capacitive load (or a low value resistive load) the network
is incompletely bootstrapped and adds to the compensation at the high impedance node. The added capacitance
Page 11
LT1354
U
WUU
APPLICATIONS INFORMATION
slows down the amplifier which improves the phase
margin by moving the unity gain frequency away from the
pole formed by the output impedance and the capacitive
load. The zero created by the RC combination adds phase
E
W
A
TI
C
R1
800Ω
W
SPL
I
IIFED S
–IN
CH
+
V
to ensure that even for very large load capacitances, the
total phase lag can never exceed 180 degrees (zero phase
margin) and the amplifier remains stable.
+IN
C
R
C
C
C
OUT
–
V
U
PACKAGE DESCRIPTION
0.300 – 0.325
(7.620 – 8.255)
0.065
(1.651)
0.009 – 0.015
(0.229 – 0.381)
+0.035
0.325
–0.015
+0.889
8.255
()
–0.381
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
TYP
(2.540 ± 0.254)
0.045 – 0.065
(1.143 – 1.651)
0.100 ± 0.010
Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead PDIP (Narrow 0.300)
(LTC DWG # 05-08-1510)
0.130 ± 0.005
(3.302 ± 0.127)
0.125
(3.175)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.020
(0.508)
MIN
0.255 ± 0.015*
(6.477 ± 0.381)
876
12
0.400*
(10.160)
MAX
1354 SS01
3
5
4
N8 1197
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
Page 12
LT1354
PACKAGE DESCRIPTION
0.010 – 0.020
(0.254 – 0.508)
0.008 – 0.010
(0.203 – 0.254)
*
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
× 45°
(1.346 – 1.752)
0°– 8° TYP
0.016 – 0.050
0.406 – 1.270
U
TYPICAL APPLICATIONS
Instrumentation Amplifier
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.053 – 0.069
0.004 – 0.010
(0.101 – 0.254)
0.228 – 0.244
0.014 – 0.019
(0.355 – 0.483)
0.050
(1.270)
TYP
(5.791 – 6.197)
100kHz, 4th Order Butterworth Filter
(Sallen-Key)
0.189 – 0.197*
(4.801 – 5.004)
7
8
1
2
5
6
0.150 – 0.157**
(3.810 – 3.988)
3
4
SO8 0996
R5
432Ω
R1
20k
–
V
IN
–
LT1354
+
R2
2k
R3
2k
–
LT1354
+
R4
20k
C4
R3
2.43k
1000pF
R4
15.4k
–
LT1354
+
C3
68pF
C2
330pF
–
LT1354
V
IN
R1
V
OUT
2.87k
R2
26.7k
+
C1
100pF
+
R
4
1
A
=+ +
1
V
R
3
2
TRIM R5 FOR GAIN
TRIM R1 FOR COMMON MODE REJECTION
BW = 120kHz
RRRRRR
2
3
1
4
+
23
+
R
5
=
104
1354 TA03
RELATED PARTS
PART NUMBERDESCRIPTIONCOMMENTS
LT1355/LT1356Dual/Quad 1mA, 12MHz, 400V/µs Op AmpGood DC Precision, Stable with All Capacitive Loads
LT13572mA, 25MHz, 600V/µs Op AmpGood DC Precision, Stable with All Capacitive Loads
LT1358/LT1359Dual/Quad 2mA, 25MHz, 600V/µs Op AmpGood DC Precision, Stable with All Capacitive Loads
V
OUT
1354 TA04
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear-tech.com
1354fa LT/TP 0598 REV A 2K • PRINTED IN USA
LINEAR TECHNOLOGY CORP ORA TION 1994
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.