ANALOG DEVICES LT 1074 CT Datasheet

LT1074/LT1076
Step-Down Switching
Regulator
EATU
F
5A On-Board Switch (LT1074)
100kHz Switching Frequency
Greatly Improved Dynamic Behavior
Available in Low Cost 5 and 7-Lead Packages
Only 8.5mA Quiescent Current
Programmable Current Limit
Operates Up to 60V Input
Micropower Shutdown Mode
PPLICATI
A
Buck Converter with Output Voltage Range of 2.5V
RE
S
O
U S
to 50V
Tapped-Inductor Buck Converter with 10A Output at 5V
Positive-to-Negative Converter
Negative Boost Converter
Multiple Output Buck Converter
DUESCRIPTIO
The LT1074 is a 5A (LT1076 is rated at 2A) monolithic bipolar switching regulator which requires only a few external parts for normal operation. The power switch, all oscillator and control circuitry, and all current limit com­ponents, are included on the chip. The topology is a classic positive “buck” configuration but several design innova-
tions allow this device to be used as a positive-to-negative converter, a negative boost converter, and as a flyback converter. The switch output is specified to swing 40V below ground, allowing the LT1074 to drive a tapped­inductor in the buck mode with output currents up to 10A.
The LT1074 uses a true analog multiplier in the feedback loop. This makes the device respond nearly instanta­neously to input voltage fluctuations and makes loop gain independent of input voltage. As a result, dynamic behav­ior of the regulator is significantly improved over previous designs.
On-chip pulse by pulse current limiting makes the LT1074 nearly bust-proof for output overloads or shorts. The input voltage range as a buck converter is 8V to 60V, but a self­boot feature allows input voltages as low as 5V in the inverting and boost configurations.
A fixed 5V output, 2A version is also available. See LT1076-5.
10V TO 40V
U
O
A
PPLICATITYPICAL
Basic Positive Buck Converter
L1**
50 H (LT1074)
µ
100 H (LT1076)
µ
MBR745*
R1
2.8k 1%
R2
2.21k 1%
LT1074
V
SW
FB
V
C
R3
2.7k
C2
0.01 F
V
IN
GND
+
C3 200 F
µµ µ
5V 5A
+
C1 500 F
25V
*USE MBR340 FOR LT1076 **COILTRONICS #50-2-52 (LT1074) #100-1-52 (LT1076)
PULSE ENGINEERING, INC. #PE-92114 (LT1074) #PE-92102 (LT1076)
HURRICANE #HL-AK147QQ (LT1074) #HL-AG210LL (LT1076)
RIPPLE CURRENT RATING I / 2
OUT
LT1074 • TA01
Buck Converter Efficiency
100
90
80
EFFICIENCY (%)
70
60
50
0
LT1074
V = 12V, V = 20V
OUT IN
V = 5V, V = 15V
OUT IN
L = 50 H TYPE 52 CORE
µ
DIODE = MBR735
1234
OUTPUT LOAD CURRENT (A)
5
LT1074 • TPC27
1
6
LT1074/LT1076
5 4 3 2 1
V
GND FB
V V
C
FRONT VIEW
T PACKAGE, 5-LEAD T0-220
LEADS ARE FORMED STANDARD FOR STRAIGHT LEADS, ORDER FLOW 06
IN
SW
LT1074: θJC = 2.5°C/W, θJA = 50°C/W LT1076: θ
JC
= 4°C/W, θJA = 50°C/W
A
W
O
LUTEXI T
S
A
WUW
ARB
U G
I
S
Input Voltage
LT1074/ LT1076 .................................................. 45V
LT1074HV/76HV.................................................. 64V
Switch Voltage with Respect to Input Voltage
LT1074/ 76 .......................................................... 64V
LT1074HV/76HV.................................................. 75V
Switch Voltage with Respect to Ground Pin (V
Negative)
SW
LT1074/76 (Note 6) ............................................. 35V
LT1074HV/76HV (Note 6).................................... 45V
Feedback Pin Voltage..................................... –2V, +10V
Shutdown Pin Voltage (Not to Exceed VIN).............. 40V
WU
/
PACKAGE
LT1076: θ
LT1076: θ
Y PACKAGE, 7-LEAD TO-220
LT1074: θ LT1076: θ
* Assumes package is soldered to 0.5 IN2 of 1 oz. copper over internal ground
plane or over back side plane.
O
RDER I FOR ATIO
FRONT VIEW
5 4 3 2 1
Q PACKAGE
5-LEAD PLASTIC DD
= 4°C/W, θJA = 30°C/W*
JC
FRONT VIEW
7 6 5 4 3 2 1
R PACKAGE
7-LEAD PLASTIC DD
= 4°C/W, θJA = 30°C/W*
JC
FRONT VIEW
7
6
5
4
3
2
1
= 2.5°C/W, θ
JC
= 4°C/W, θ
JC
JA
= 50°C/W
JA
VIN V
SW
GND V
C
FB/SENSE
SHDN
V
C
FB/SENSE GND I
LIM
V
SW
V
IN
V
C
GND V
SW
= 50°C/W
SHUTDOWN FB I
LIM
V
IN
ORDER PART
NUMBER
LT1076CQ
LT1076CR LT1076HVCR
LT1074CY LT1074HVCY LT1074IY LT1074HVIY LT1076CY LT1076HVCY
U
I
Pin Voltage (Forced) ............................................ 5.5V
LIM
Maximum Operating Ambient Temperature Range
LT1074C/76C, LT1074HVC/76HVC ............ 0°C to 70°C
LT1074I/76I, LT1074HVI/76HVI ............. –40°C to 85°C
LT1074M/76M, LT1074HVM/76HVM ... –55°C to 125°C
Maximum Operating Junction Temperature Range
LT1074C/76C, LT1074HVC/76HVC .......... 0°C to 125°C
LT1074I/76I, LT1074HVI/76HVI ........... –40°C to 125°C
LT1074M/76M, LT1074HVM/76HVM ... –55°C to 150°C
Maximum Storage Temperature................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ..................... 300°C
ORDER PART
NUMBER
BOTTOM VIEW
V
C
1
2 3
4
FB
K PACKAGE, 4-LEAD TO-3 METAL CAN LT1074: θJC = 2.5°C/W, θ
LT1076: θ
= 4°C/W, θJA = 35°C/W
JC
V
V
= 35°C/W
JA
IN
SW
CASE IS GND
LT1074CK LT1074HVCK LT1074MK LT1074HVMK LT1076CK LT1076HVCK LT1076MK LT1076HVMK
LT1074CT LT1074HVCT LT1074IT LT1074HVIT LT1076CT LT1076HVCT LT1076IT
LECTRICAL C CHARA TERIST
E
PARAMETER CONDITIONS MIN TYP MAX UNITS
Switch “On” Voltage (Note 1) LT1074 I
2
ICS
SW
I
SW
I
SW
I
SW
LT1076 I
I
SW SW
Tj = 25°C, VIN = 25V, unless otherwise noted.
= 1A, Tj ≥ 0°C 1.85 V = 1A, Tj < 0°C 2.1 V = 5A, Tj ≥ 0°C 2.3 V = 5A, Tj < 0°C 2.5 V
= 0.5A 1.2 V = 2A 1.7 V
LT1074/LT1076
LECTRICAL C CHARA TERIST
E
PARAMETER CONDITIONS MIN TYP MAX UNITS
Switch “Off” Leakage LT1074 V
LT1076 V
Supply Current (Note 2) V
Minimum Supply Voltage Normal Mode 7.3 8 V
Switch Current Limit (Note 4) LT1074 I
Maximum Duty Cycle 85 90 % Switching Frequency 90 100 110 kHz
Switching Frequency Line Regulation 8V V Error Amplifier Voltage Gain (Note 6) 1V VC 4V 2000 V/V Error Amplifier Transconductance 3700 5000 8000 µmho Error Amplifier Source and Sink Current Source (V
Feedback Pin Bias Current V Reference Voltage VC = 2V 2.155 2.21 2.265 V Reference Voltage Tolerance V
Reference Voltage Line Regulation 8V VIN V VC Voltage at 0% Duty Cycle 1.5 V
Multiplier Reference Voltage 24 V Shutdown Pin Current V
Shutdown Thresholds Switch Duty Cycle = 0 2.2 2.45 2.7 V
Thermal Resistance Junction to Case LT1074 2.5 °C/W
FB
40V < VIN < 60V 912 mA V
SHUT
Startup Mode (Note 3) 3.5 4.8 V
LT1076 I
Tj ≤ 125°C 85 120 kHz Tj > 125°C 85 125 kHz V
FB
Sink (V
FB
REF
All Conditions of Input Voltage, Output ±1 ± 2.5 % Voltage, Temperature and Load Current
Over Temperature – 4 mV/°C
SH
V
SH
Fully Shut Down 0.1 0.3 0.5 V
LT1076 4.0 °C/W
ICS
V
V
= 2.5V, V
= 0.1V (Device Shutdown) (Note 8) 140 300 µA
LIM
R R
LIM
R R
= 0V through 2k(Note 4) 20 kHz
V
IN
FB
= 2.5V) 0.7 1 1.6 mA
FB
= V
REF
(Nominal) = 2.21V ±0.5 ± 1.5 %
= 5V 51020 µA
V
THRESHOLD
Tj = 25°C, VIN = 25V, unless otherwise noted.
25V, V
IN
= V
IN
= 25V, V
IN
= V
IN
40V 8.5 11 mA
IN
Open 5.5 6.5 8.5 A
= 10k (Note 5) 4.5 A
LIM
= 7k (Note 5) 3 A
LIM
Open 2 2.6 3.2 A
= 10k (Note 5) 1.8 A
LIM
= 7k (Note 5) 1.2 A
LIM
(Note 7) 0.03 0.1 %/V
MAX
= 2V) 100 140 225 µA
(Note 7) 0.005 0.02 %/V
MAX
= 0 5 300 µA
SW
= 0 (Note 7) 10 500 µA
MAX, VSW
= 0 150 µA
SW
= 0 (Note 7) 250 µA
MAX, VSW
0.5 2 µA
(2.5V) 50 µA
The denotes the specifications which apply over the full operating temperature range.
Note 1: To calculate maximum switch “on” voltage at currents between low and high conditions, a linear interpolation may be used.
Note 2: A feedback pin voltage (VFB) of 2.5V forces the VC pin to its low clamp level and the switch duty cycle to zero. This approximates the zero load condition where duty cycle approaches zero.
Note 3: Total voltage from VIN pin to ground pin must be 8V after startup for proper regulation.
Note 4: Switch frequency is internally scaled down when the feedback pin voltage is less than 1.3V to avoid extremely short switch on times. During testing, VFB is adjusted to give a minimum switch on time of 1µs.
R
– 1k
Note 5: I
Note 6: Switch to input voltage limitation must also be observed. Note 7: V Note 8: Does not include switch leakage.
LIM
(LT1074), I
LIM
2k
= 40V for the LT1074/76 and 60V for the LT1074HV/76HV.
MAX
R
– 1k
LIM
(LT1076).
LIM
5.5k
3
LT1074/LT1076
BLOCK
IDAGRA
W
INPUT SUPPLY
10 Aµ
SHUTDOWN*
2.21V
0.3V +
-POWER
µ
SHUTDOWN –
2.35V +
+
ERROR
FB V
CURRENT
LIMIT
SHUTDOWN
A1
AMP
6V
REGULATOR
AND BIAS
I *
LIM
MULTIPLIER
X
24V (EQUIVALENT)
C
FREQ SHIFT
SYNC
V
IN
Z
ANALOG
XY
Z Y
320 Aµ
6V TO ALL CIRCUITRY
100kHz
OSCILLATOR
3V(p-p)
+
C1
4.5V
10k
PULSE WIDTH
COMPARATOR
S
R
R/S
LATCH
R
CURRENT
LIMIT COMP
Q
LT1076
LT1074
500
15
SWITCH 
OUTPUT
(V )
SW
0.04
+
C2
G1
250
400
4
*AVAILABLE ON PACKAGES WITH PIN COUNTS GREATER THAN 5.
0.1
100
SWITCH
OUTPUT (V )
SW
LT1074 • BD01
LT1074/LT1076
W
BLOCK
A switch cycle in the LT1074 is initiated by the oscillator setting the R/S latch. The pulse that sets the latch also locks out the switch via gate G1. The effective width of this pulse is approximately 700ns, which sets the maximum switch duty cycle to approximately 93% at 100kHz switch­ing frequency. The switch is turned off by comparator C1, which resets the latch. C1 has a sawtooth waveform as one input and the output of an analog multiplier as the other input. The multiplier output is the product of an internal reference voltage, and the output of the error amplifier, A1, divided by the regulator input voltage. In standard buck regulators, this means that the output voltage of A1 required to keep a constant regulated output is indepen­dent of regulator input voltage. This greatly improves line transient response, and makes loop gain independent of input voltage. The error amplifier is a transconductance type with a GM at null of approximately 5000µmho. Slew current going positive is 140µA, while negative slew current is about 1.1mA. This asymmetry helps prevent overshoot on start-up. Overall loop frequency compensa­tion is accomplished with a series RC network from VC to ground.
Switch current is continuously monitored by C2, which resets the R/S latch to turn the switch off if an overcurrent condition occurs. The time required for detection and switch turn off is approximately 600ns. So minimum switch “on” time in current limit is 600ns. Under dead shorted output conditions, switch duty cycle may have to be as low as 2% to maintain control of output current. This would require switch on time of 200ns at 100kHz switch­ing frequency, so frequency is reduced at very low output
IDAGRA
ESCRIPTIO
D
U
voltages by feeding the FB signal into the oscillator and creating a linear frequency downshift when the FB signal drops below 1.3V. Current trip level is set by the voltage on the I source. When this pin is left open, it self-clamps at about
4.5V and sets current limit at 6.5A for the LT1074 and 2.6A for the LT1076. In the 7-pin package an external resistor can be connected from the I current limit. A capacitor in parallel with this resistor will soft start the current limit. A slight offset in C2 guarantees that when the I C2 output will stay high and force switch duty cycle to zero.
The “Shutdown” pin is used to force switch duty cycle to zero by pulling the I the regulator. Threshold for the former is approximately
The switch used in the LT1074 is a Darlington NPN (single NPN for LT1076) driven by a saturated PNP. Special patented circuitry is used to drive the PNP on and off very quickly even from the saturation state. This particular switch arrangement has no “isolation tubs” connected to the switch output, which can therefore swing to 40V below ground.
pin which is driven by an internal 320µA current
LIM
pin to ground to set a lower
LIM
pin is pulled to within 200mV of ground,
LIM
pin low, or to completely shut down
LIM
5
LT1074/LT1076
0
–400
CURRENT ( A)
–200
0
1
234
LT1074 • TPC03
–500
–300
5
6
78 109
–100
100
200
300
400
500
VOLTAGE (V)
µ
START OF FREQUENCY SHIFTING
Y
PICA
LPER
F
O
R
AT
UW
CCHARA TERIST
E
C
ICS
VC Pin Characteristics VC Pin Characteristics Feedback Pin Characteristics
200
150
100
50
–50
CURRENT (mA)
–100
–150
–200
V ADJUSTED FOR
FB
I = 0 AT V = 2V
0
1234
0
CC
SLOPE 400k
V 2V
FB
VOLTAGE (V)
5
789
6
LT1074 • TPC01
Shutdown Pin Characteristics Shutdown Pin Characteristics I
40
30
20
V
= 50V
WITH V
DETAILS OF THIS AREA SHOWN IN OTHER GRAPH
20 40
10
IN
IN
30
VOLTAGE (V)
50 60 70 80
LT1074 • TPC04
10
µ
THIS POINT MOVES
0
–10
CURRENT ( A)
–20
–30
–40
0
2.0
1.5
1.0
0.5
0
–0.5
CURRENT (mA)
–1.0
–1.5
–2.0
1234
0
0
–5
–10
–15
µ
–20
–25
CURRENT ( A)
–30
–35
–40
0.5
0
V 2.5V
FB
5
VOLTAGE (V)
°
= 25 CT
j
CURRENT FLOWS OUT
OF SHUTDOWN PIN
SHUTDOWN THRESHOLD
1.0 2.0
1.5
VOLTAGE (V)
789
6
LT1074 • TPC02
2.5 3.0 3.5 4.0
LT1074 • TPC05
Pin Characteristics
LIM
100
50
0
–50
–100
µ
–150 –200
CURRENT ( A)
–250 –300 –350 –400
–1
–2
T = 25 C
j
0
°
12
VOLTAGE (V)
3
4
56
5
LT1074 • TPC06
7
8
6
Supply Current
20 18 16 14 12 10
8 6
INPUT CURRENT (mA)
4 2 0
DEVICE NOT SWITCHING
10 40 50
0
V
= 1V
C
20 30 60
INPUT VOLTAGE (V)
LT1074 • TPC11
LT1074/LT1076
JUNCTION TEMPERATURE ( C)
–50
80
FREQUENCY (kHz)
95
100
105
110
115
120
–25 0 25 50
LT1074 • TPC18
°
90
85
75
100
125
150
0
"ON" VOLTAGE (V)
3.0
2.5
2.0
1.5
1.0
0.5 123
LT1074 • TPC28
4 56
SWITCH CURRENT (A)
T = 25 C
j
°
LT1074
LT1076
UW
Y
PICA
300
250
µ
200
150
100
INPUT CURRENT ( A)
50
0
20 10
0 –10 –20 –30 –40
–50 –60
–70
CHANGE IN REFERENCE VOLTAGE (mV)
–80
LPER
F
O
R
AT
CCHARA TERIST
E
C
ICS
Reference Voltage vs
Supply Current (Shutdown) Temperature Switch “On” Voltage
2.25
2.24
2.23
2.22
2.21
2.20
VOLTAGE (V)
2.19
2.18
10 20 40
0
INPUT VOLTAGE (V)
30 50 60
LT1074 • TPC13
2.17 –25 0 25 50
–50
75 100 125 150
JUNCTION TEMPERATURE (°C)
LT1074 • TPC14
Reference Shift with Ripple Switching Frequency vs Voltage Error Amplifier Phase and G
8k
7k
6k
µ
TRI WAVE
SQUARE
WAVE
100 120
0
20 40 60 80
PEAK-TO-PEAK RIPPLE AT FB PIN (mV)
140
160 180 200
LT1074 • TPC16
( mho)
5k
4k
3k
2k
TRANSCONDUCTANCE
1k
0
1k 100k 1M 10M
10k
FREQUENCY (Hz)
G
M
LT1074 • TPC17
M
200
150
θ
100
PHASE ( )
50
0
°
–50
–100
–150
–200
Temperature
SWITCHING FREQUENCY (kHz)
Feedback Pin Frequency Shift Current Limit vs Temperature*
160
140
120
100
80
60
–55°C
40
20
0
0.5 2.0 2.5
0
FEEDBACK PIN VOLTAGE (V)
150°C
25°C
1.0 1.5 3.0
LT1074 • TPC19
8
7
I PIN OPEN
LIM
6
5
4
3
R = 5k
2
OUTPUT CURRENT LIMIT (A)
1
*MULTIPLY CURRENTS BY 0.4 FOR LT1076
0
–50 –25 0 25 50
LIM
JUNCTION TEMPERATURE ( C)
R = 10k
LIM
75
100
°
LT1074 • TPC22
125
150
7
LT1074/LT1076
U
PI
DUESCRIPTIO
VIN PIN
S
The VIN pin is both the supply voltage for internal control circuitry and one end of the high current switch. It is important,
especially at low input voltages
, that this pin be bypassed with a low ESR, and low inductance capacitor to prevent transient steps or spikes from causing erratic operation. At full switch current of 5A, the switching transients at the regulator input can get very large as shown in Figure 1. Place the input capacitor very close to the regulator and connect it with wide traces to avoid extra inductance. Use radial lead capacitors.
dI
L
( )( )
P
dt
STEP =
I
( )( )
ESR
SW
Figure 1. Input Capacitor Ripple
RAMP =
TI
( )( )
ON
SW
C
LT1074 • PD01
VV
()()
∆∆V
OUT
=
GND OUT
221.
To ensure good load regulation, the ground pin must be connected directly to the proper output node, so that no high currents flow in this path. The output divider resistor should also be connected to this low current connection line as shown in Figure 2.
LT1074
FB
GND
R2
HIGH CURRENT RETURN PATH
Figure 2. Proper Ground Pin Connection
NEGATIVE OUTPUT NODE WHERE LOAD REGULATION WILL BE MEASURED
LT1074 • PD02
LP = Total inductance in input bypass connections and capacitor.
“Spike” height (dI/dt • LP) is approximately 2V
inch
of lead length for LT1074 and 0.8V
per
per inch
for
LT1076. “Step” for ESR = 0.05and I “Ramp” for C = 200µF, T
ON
= 5A is 0.25V.
SW
= 5µs, and I
SW
= 5A,
is 0.12V.
Input current on the VIN Pin in shutdown mode is the sum of actual supply current (140µA, with a maximum of 300µA), and switch leakage current. Consult factory for special testing if shutdown mode input current is critical.
GROUND PIN
It might seem unusual to describe a ground pin, but in the case of regulators, the ground pin must be connected properly to ensure good load regulation. The internal reference voltage is referenced to the ground pin; so any error in ground pin voltage will be multiplied at the output;
FEEDBACK PIN
The feedback pin is the inverting input of an error amplifier which controls the regulator output by adjusting duty cycle. The non-inverting input is internally connected to a trimmed 2.21V reference. Input bias current is typically
0.5µA when the error amplifier is balanced (I
OUT
= 0). The error amplifier has asymmetrical GM for large input sig­nals to reduce startup overshoot. This makes the amplifier more sensitive to large ripple voltages at the feedback pin. 100mVp-p ripple at the feedback pin will create a 14mV offset in the amplifier, equivalent to a 0.7% output voltage shift. To avoid output errors, output ripple (P-P) should be less than 4% of DC output voltage at the point where the output divider is connected.
See the “Error Amplifier” section for more details.
Frequency Shifting at the Feedback Pin
The error amplifier feedback pin (FB) is used to downshift the oscillator frequency when the regulator output voltage
8
U
VOLTAGE (V)
0
–40
CURRENT ( A)
1.0 2.0
LT1074 • TPC05
1.5
2.5 3.0 3.5 4.0
–35
–30
–25
–20
–15
–10
–5
0
SHUTDOWN THRESHOLD
CURRENT FLOWS OUT
OF SHUTDOWN PIN
µ
= 25 CT
°
j
0.5
PI
DUESCRIPTIO
LT1074/LT1076
S
is low. This is done to guarantee that output short circuit current is well controlled even when switch duty cycle must be extremely low. Theoretical switch “on” time for a buck converter in continuous mode is;
VV
+
t
ON
OUT D
=
Vf
IN
VD = Catch diode forward voltage ( 0.5V) f = Switching frequency
At f = 100kHz, tON must drop to 0.2µs when V and the output is shorted (V
= 0V). In current limit,
OUT
IN
= 25V
the LT1074 can reduce tON to a minimum value of
0.6µs, much too long to control current correctly for V
= 0. To correct this problem, switching frequency
OUT
is lowered from 100kHz to 20kHz as the FB pin drops from 1.3V to 0.5V. This is accomplished by the circuitry shown in Figure 3.
+
ERROR
V
AMPLIFIER
C
+2V
2.21V
TO OSCILLATOR
Q1
R3 3k
FB
R1
R2
2.21k
V
OUT
EXTERNAL DIVIDER
SHUTDOWN PIN
The shutdown pin is used for undervoltage lockout, mi­cropower shutdown, soft start, delayed start, or as a general purpose on/off control of the regulator output. It controls switching action by pulling the I
pin low, which
LIM
forces the switch to a continuous “off” state. Full micropower shutdown is initiated when the shutdown pin drops below 0.3V.
The V/I characteristics of the shutdown pin are shown in Figure 4. For voltages between 2.5V and VIN, a current of 10µA flows
out
of the shutdown pin. This current
increases to 25µA as the shutdown pin moves through the 2.35V threshold. The current increases further to 30µA at the 0.3V threshold, then drops to 15µA as the shutdown voltage falls below 0.3V. The 10µA current source is included to pull the shutdown pin to its high or default state when left open. It also provides a convenient pullup for delayed start applications with a capacitor on the shutdown pin.
When activated, the typical collector current of Q1 in Figure 5, is 2mA. A soft start capacitor on the I
LIM
pin
will delay regulator shutdown in response to C1, by (5V)(C
)/2mA. Soft start after full micropower shut-
LIM
down is ensured by coupling C2 to Q1.
LT1074 • PD03
Figure 3. Frequency Shifting
Q1 is off when the output is regulating (VFB = 2.21V). As the output is pulled down by an overload, VFB will eventu­ally reach 1.3V, turning on Q1. As the output continues to drop, Q1 current increases proportionately and lowers the frequency of the oscillator. Frequency shifting starts when the output is 60% of normal value, and is down to its minimum value of 20kHz when the output is 20% of normal value. The rate at which frequency is shifted is determined by both the internal 3k resistor R3 and the external divider resistors. For this reason, R2 should not be increased to more than 4kΩ, if the LT1074 will be subjected to the simultaneous conditions of high input voltage and output short circuit.
Figure 4. Shutdown Pin Characteristics
9
LT1074/LT1076
Trip Po V V
R
R
TP
int .== +
 
 
235 1
1 2
R
VVR
VV
R R
SH
UTP SH
3
08 1
1
1
2
=
()()
+
 
 
–.
Rk
VV
V
k
Rk
1232
15 2 35
235
12 5
3
235 08 125
20 2 35 1
12 5 232
39
=
()
()
=
=
()()
+
 
 
=
.
–. .
.
.–. .
–.
.
.
.
U
PI
DUESCRIPTIO
10 Aµ
SHUTDOWN
PIN
2.3V
+
0.3V
+
Figure 5. Shutdown Circuitry
S
V
IN
300 Aµ
I
LIM
Q1
TO TOTAL REGULATOR SHUTDOWN
PIN
6V
LT1074 • PD07
EXTERNAL C
LIM
C1
C2
Undervoltage Lockout
Undervoltage lockout point is set by R1 and R2 in Figure
6. To avoid errors due to the 10µA shutdown pin current, R2 is usually set at 5k, and R1 is found from:
VV
()
RR
12=
TP SH
V
SH
Hysteresis in undervoltage lockout may be accomplished by connecting a resistor (R3) from the I
pin to the
LIM
shutdown pin as shown in Figure 7. D1 prevents the shutdown divider from altering current limit.
V
R1
D1*
R3
R2
*1N4148
Figure 7. Adding Hysteresis
IN
SHUT
LT1074
I
LIM
OPTIONAL CURRENT LIMIT RESISTOR
LT1074 • PD09
If R3 is added, the lower trip point (VIN descending) will be the same. The upper trip point (V
R
R
1
VV
=++
UTP SH
1
R
1
R
2
3
) will be;
UTP
08
–.
R
1
V
R
3
 
If R1 and R2 are chosen, R3 is given by
V
= Desired undervoltage lockout voltage.
TP
V
= Threshold for lockout on the shutdown
SH
pin = 2.45V.
If quiescent supply current is critical, R2 may be increased up to 15k, but the denominator in the formula for R2 should replace VSH with VSH – (10µA)(R2).
R1
R2
5k
Figure 6. Undervoltage Lockout
10
V
SHUT
LT1074
GND
IN
LT1074 • PD08
Example: An undervoltage lockout is required such that the output will not start until VIN = 20V, but will continue to operate until VIN drops to 15V. Let R2 = 2.32k.
U
R
15 0 44 9k
05 9k 1k 15
FB
=
()
()
()
..
..
PI
DUESCRIPTIO
LT1074/LT1076
S
I
PIN
LIM
The I
pin is used to reduce current limit below the
LIM
preset value of 6.5A. The equivalent circuit for this pin is shown in Figure 8.
When I
TO LIMIT CIRCUIT
R1 8K
is left open, the voltage at Q1 base clamps at 5V
LIM
V
Q1
I
LIM
Figure 8. I
IN
320 Aµ
D1
LIM
D2
4.3V
D3 6V
LT1047 • PD12
Pin Circuit
through D2. Internal current limit is determined by the current through Q1. If an external resistor is connected between I
and ground, the voltage at Q1 base can be
LIM
reduced for lower current limit. The resistor will have a voltage across it equal to (320µA) (R), limited to 5V when clamped by D2. Resistance required for a given current limit is
R
= I
(2k) + 1k (LT1074)
LIM
= I
(5.5k) + 1k (LT1076)
LIM
R
LIM
LIM
As an example, a 3A current limit would require 3A (2k) + 1k = 7kfor the LT1074. The accuracy of these formulas is ±25% for 2A I (LT1076), so I
peak
switch current required.
≤ 5A (LT1074) and 0.7A I
LIM
should be set at least 25% above the
LIM
LIM
1.8A
Foldback current limiting can be easily implemented by adding a resistor from the output to the I
pin as shown
LIM
in Figure 9. This allows full desired current limit (with or without R
) when the output is regulating, but reduces
LIM
current limit under short circuit conditions. A typical value for RFB is 5k, but this may be adjusted up or down to set the amount of foldback. D2 prevents the output voltage
from forcing current back into the I value for RFB, first calculate R
I 0.44* R
()()
R
FB
SC L
=
05.*
R1
LSC
()
LIM
kI
pin. To calculate a
LIM
, then R
FB;
Rink
()
L
*Change 0.44 to 0.16, and 0.5 to 0.18 for LT1076.
Example: I
= 4A, ISC = 1.5A, R
LIM
= (4)(2k) + 1k = 9k
LIM
V
OUT
LT1074
I
LIM
R
LIM
Figure 9. Foldback Current Limit
FB
R
D2
FB
1N4148
LT1074 • PD13
ERROR AMPLIFIER
11
LT1074/LT1076
U
PI
DUESCRIPTIO
S
5.8V
Q4
90 Aµ
Q3
50 Aµ
FB
50 Aµ
D2
300
Figure 10. Error Amplifier
A
=
V
AG
=•
Vm
G
2fC
••
π
R at high frequencies
m
C
C
Q2
Q1
X1.8
2.21V
140 Aµ
ALL CURRENTS SHOWN ARE AT NULL CONDITION
at midfrequencies
Phase shift from the FB pin to the VC pin is 90° at mid­frequencies where the external CC is controlling gain, then drops back to 0° (actually 180° since FB is an inverting input) when the reactance of CC is small compared to RC. The low frequency “pole” where the reactance of CC is equal to the output impedance of Q4 and Q6 (rO), is
f
POLE
Although f
=≈
POLE
1 rC
2
π
••
0
rk
400
0
varies as much as 3:1 due to rO variations, mid-frequency gain is dependent only on GM, which is specified much tighter on the data sheet. The higher frequency “zero” is determined solely by RC and CC.
µ
90 A
D1
The error amplifier has
V
C
90 Aµ
Q6
EXTERNAL FREQUENCY COMPENSATION
R
C
C
C
LT1074 • PD11
asymmetrical
peak output current. Q3 and Q4 current mirrors are unity gain, but the Q6 mirror has a gain of 1.8 at output null and a gain of 8 when the FB pin is high (Q1 current = 0). This results in a maximum positive output current of 140µA and a maximum negative (sink) output current of 1.1mA. The asymmetry is deliberate —it results in much less regulator output over­shoot during rapid start-up or following the release of an output overload. Amplifier offset is kept low by area scaling Q1 and Q2 at 1.8:1.
Amplifier swing is limited by the internal 5.8V supply for positive outputs and by D1 and D2 when the output goes low. Low clamp voltage is approximately one diode drop ( 0.7V – 2mV/°C).
Note that both the FB pin and the VC pin have other internal connections. Refer to the frequency shifting and sychronizing discussions.
f
ZERO
12
=
••
RC
2π
1
CC
LT1074/LT1076
U
O
PPLICATITYPICAL
SA
Tapped-Inductor Buck Converter
V
IN
20V - 35V
+
* = 1% FILM RESISTORS D1 = MOTOROLA-MBR745 C1 = NICHICON-UPL1C221MRH6 C2 = NICHICON-UPL1A102MRH6 L1 = COILTRONICS-CTX25-5-52
L2
µ
5 H
+
C1 4400 F
µ
(2 EA 2200 F,
µ
16V)
+
C4 390 F 16V
LT1074 • TA02
V
IN
LT1074HV
GND
C3 200 F
µ
50V
*PULSE ENGINEERING #PE–65282
**MOTOROLA MBR2030CTL
IF INPUT VOLTAGE IS BELOW 20V, MAXIMUM OUTPUT CURRENT WILL BE REDUCED. SEE AN44
V
SW
FB
V
C
R3 1k
C2
0.2 F
µ
31
D2 35V 5W
D3 1N5819
L1*
D1**
0.01 F
R1
2.8k
R2
2.21k
µ
Positive-to-Negative Converter with 5V Output
V
IN
4.5V to 40V
+
LT1074
GND
LOWER REVERSE VOLTAGE RATING MAY BE USED FOR LOWER INPUT VOLTAGES. LOWER CURRENT RATING IS ALLOWED FOR LOWER OUTPUT CURRENT. SEE AN44.
✝✝
LOWER CURRENT RATING MAY BE USED FOR LOWER OUTPUT CURRENT. SEE AN44. R1, R2, AND C4 ARE USED FOR LOOP FREQUENCY COMPENSATION WITH LOW INPUT VOLTAGE,
BUT R1 AND R2 MUST BE INCLUDED IN THE CALCULATION FOR OUTPUT VOLTAGE DIVIDER VALUES. FOR HIGHER OUTPUT VOLTAGES, INCREASE R1, R2, AND R3 PROPORTIONATELY. FOR INPUT VOLTAGE > 10V, R1, R2, AND C4 CAN BE ELIMINATED, AND COMPENSATION IS DONE TOTALLY ON THE V PIN. R3 = –2.37 (K )
V R1 = (R3) (1.86) R2 = (R3) (3.65)
*****
MAXIMUM OUTPUT CURRENT OF 1A IS DETERMINED BY MINIMUM INPUT VOLTAGE OF 4.5V. HIGHER MINIMUM INPUT VOLTAGE WILL ALLOW MUCH HIGHER OUTPUT CURRENTS. SEE AN44.
V
OUT
+
C1
µ
220 F 50V
L1 25 H
µ
✝✝
5A
IN
V
SW
V
FB
V
C
C3
0.1 Fµ
C
R1**
5.1k
R2** 10k
D1 MBR745
C4**
0.01 Fµ
R3*
2.74k
R4
1.82k*
+
C2
µ
1000 F 10V
OPTIONAL FILTER
5 H
–5V,1A***
LT1074 • TA03
V
OUT
5V, 10A
µ
µ
200 F
µ
10V
+
13
LT1074/LT1076
DD7 0693
0.022 ± 0.005
(0.559 ± 0.127)
0.105 ± 0.008
(2.667 ± 0.203)
0.004
+0.008 –0.004
()
0.102
+0.203 –0.102
0.050 ± 0.012
(1.270 ± 0.305)
0.059
(1.499)
TYP
0.050 ± 0.008
(1.270 ± 0.203)
0.175 ± 0.008
(4.445 ± 0.203)
0.060
(1.524)
0.401 ± 0.015
(10.185 ± 0.381)
15° TYP
0.030 ± 0.008
(0.762 ± 0.203)
0.331
+0.012 –0.020
()
8.407
+0.305 –0.508
0.143
+0.012 –0.020
()
3.632
+0.305 –0.508
0.050 ± 0.010
(1.270 ± 0.254)
PPLICATITYPICAL
O
U SA
Negative Boost Converter
200 F
µ
15V
–V
IN
–5 TO –15V
*MBR735
** I (MAX) = 1A-3A DEPENDING ON INPUT VOLTAGE.
OUT
SEE AN44
PACKAGEDESCRIPTI
+
R3 750
C2 1nF
100pF
L1
µ
25 H
V
IN
FB
LT1074
V
SW
GND
+
C3
V
C
0.01 F
µ
D1*
R1
12.7k
R2
2.21k
+
5 Hµ
OPTIONAL OUTPUT FILTER
U
O
Dimensions in inches (milimeters) unless otherwise noted.
+
100 F
µ
C1 1000 F 25V
LT1074 • TA04
µ
V **
OUT
–15V
Q Package, 5-Lead PLASTIC DD
(1.702 ± 0.254)
0.032 ± 0.008
0.401 ± 0.015
(10.185 ± 0.381)
15° TYP
0.067 ± 0.010
0.060
(1.524)
+0.012
0.331 –0.020
+0.305
8.407
()
–0.508
+0.012
0.143 –0.020
+0.305
3.632
()
–0.508
(0.813 ± 0.203)
14
(4.445 ± 0.203)
0.175 ± 0.008
0.059
(1.499)
TYP
0.022 ± 0.005
(0.559 ± 0.127)
R Package, 7-Lead PLASTIC DD
0.050 ± 0.008
(1.270 ± 0.203)
+0.008
0.004 –0.004
+0.203
0.102
()
–0.102
0.105 ± 0.008
(2.667 ± 0.203)
0.050 ± 0.012
(1.270 ± 0.305)
DD5 0693
PACKAGEDESCRIPTI
0.320 – 0.350 (8.13 – 8.89)
0.420 – 0.480
(10.67 – 12.19)
0.380 – 0.420
(9.652 – 10.668)
0.139 – 0.153
(3.531 – 3.886)
U
O
Dimensions in inches (milimeters) unless otherwise noted.
K Package, 4-Lead TO-3 Metal Can
0.169 – 0.185
(4.293 – 4.699)
1.177 – 1.197
(29.90 – 30.40)
72°
18°
0.470 TP P.C.D.
0.760 – 0.775
(19.30 – 19.69)
DIA
0.060 – 0.135
(1.524 – 3.429)
0.038 – 0.043
(0.965 – 1.09)
T Package, 5-Lead TO-220
0.079 – 0.135
(2.007 – 3.429)
0.655 – 0.675
(16.64 – 19.05)
0.151 – 0.161
0.167 – 0.177 (4.24 – 4.49)
R TYP
0.495 – 0.525
(12.57 – 13.34)
R
0.035 – 0.055
(0.889 – 1.397)
LT1074/LT1076
(3.84 – 4.09)
DIA 2 PLC
K4 0592
0.560 – 0.650
(14.224 – 16.510)
0.057 – 0.077
(1.448 – 1.956)
0.390 – 0.410 (9.91 – 10.41)
0.103 – 0.113 (2.62 – 2.87)
0.460 – 0.500
0.866 – 0.913
(21.996 – 23.190)
0.028 – 0.035
(0.711 – 0.889)
0.970 – 1.050
(24.64 – 26.67)
(11.68 – 12.70)
0.015 – 0.025
(0.381 – 0.635)
0.210 – 0.240
(5.334 – 6.096)
0.304 – 0.380
(7.722 – 9.652)
Y Package, 7-Lead Molded TO-220
0.147 – 0.155 (3.73 – 3.94)
0.235 – 0.258 (5.97 – 6.55)
DIA
0.169 – 0.185 (4.29 – 4.70)
0.560 – 0.590
(14.22 – 14.99)
0.152 – 0.202 (3.86 – 5.13)
0.620 ± 0.020
(15.75 ± 0.508)
0.700 – 0.728
(17.780 – 18.491)
0.055 – 0.090
(1.397 – 2.286)
0.079 – 0.115 
(2.007 – 2.921)
0.149 – 0.230
(3.785 – 5.842)
0.045 – 0.055 (1.14 – 1.40)
0.620
(15.75)
TYP
0.700 – 0.728
(17.78 – 18.49)
T5 (FORMED) 0993
0.260 – 0.320 (6.60 – 8.13)
0.026 – 0.036 (0.66 – 0.91)
0.045 – 0.055 (1.14 – 1.40)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
0.016 – 0.022 (0.41 – 0.56)
0.135 – 0.165 (3.43 – 4.19)
0.095 – 0.115  (2.41 – 2.92)
0.155 – 0.195 (3.94 – 4.95)
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
Y7 0893
15
LT1074/LT1076
U.S. Area Sales Offices
NORTHEAST REGION Linear Technology Corporation
One Oxford Valley 2300 E. Lincoln Hwy.,Suite 306 Langhorne, PA 19047 Phone: (215) 757-8578 FAX: (215) 757-5631
Linear Technology Corporation
266 Lowell St., Suite B-8 Wilmington, MA 01887 Phone: (508) 658-3881 FAX: (508) 658-2701
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Immeuble "Le Quartz" 58 Chemin de la Justice 92290 Chatenay Malabry France Phone: 33-1-41079555 FAX: 33-1-46314613
SOUTHEAST REGION Linear Technology Corporation
17060 Dallas Parkway Suite 208 Dallas, TX 75248 Phone: (214) 733-3071 FAX: (214) 380-5138
CENTRAL REGION Linear Technology Corporation
Chesapeake Square 229 Mitchell Court, Suite A-25 Addison, IL 60101 Phone: (708) 620-6910 FAX: (708) 620-6977
International Sales Offices
KOREA Linear Technology Korea Branch
Namsong Building, #505 Itaewon-Dong 260-199 Yongsan-Ku, Seoul Korea Phone: 82-2-792-1617 FAX: 82-2-792-1619
SOUTHWEST REGION Linear Technology Corporation
22141 Ventura Blvd. Suite 206 Woodland Hills, CA 91364 Phone: (818) 703-0835 FAX: (818) 703-0517
NORTHWEST REGION Linear Technology Corporation
782 Sycamore Dr. Milpitas, CA 95035 Phone: (408) 428-2050 FAX: (408) 432-6331
TAIWAN Linear Technology Corporation
Rm. 801, No. 46, Sec. 2 Chung Shan N. Rd. Taipei, Taiwan, R.O.C. Phone: 886-2-521-7575 FAX: 886-2-562-2285
GERMANY Linear Techonolgy GmbH
Untere Hauptstr. 9 D-85386 Eching Germany Phone: 49-89-3197410 FAX: 49-89-3194821
JAPAN Linear Technology KK
5F YZ Bldg. 4-4-12 Iidabashi, Chiyoda-Ku Tokyo, 102 Japan Phone: 81-3-3237-7891 FAX: 81-3-3237-8010
SINGAPORE Linear Technology Pte. Ltd.
101 Boon Keng Road #02-15 Kallang Ind. Estates Singapore 1233 Phone: 65-293-5322 FAX: 65-292-0398
World Headquarters
Linear Technology Corporation
1630 McCarthy Blvd. Milpitas, CA 95035-7487 Phone: (408) 432-1900 FAX: (408) 434-0507
UNITED KINGDOM Linear Technology (UK) Ltd.
The Coliseum, Riverside Way Camberley, Surrey GU15 3YL United Kingdom Phone: 44-276-677676 FAX: 44-276-64851
0294
16
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
(408) 432-1900
FAX
: (408) 434-0507
TELEX
: 499-3977
BA/GP 0494 2K REV B • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1994
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