ANALOG DEVICES LT 1011 CN8 Datasheet

LT1011/LT1011A

3.9k

Voltage Comparator

FeaTures

n

Pin Compatible with LM111 Series Devices

n

Guaranteed Max 0.5mV Input Offset Voltage

n

Guaranteed Max 25nA Input Bias Current

n

Guaranteed Max 3nA Input Offset Current

n

Guaranteed Max 250ns Response Time

n

Guaranteed Min 200,000 Voltage Gain

n

50mA Output Current Source or Sink

n

±30V Differential Input Voltage

n

Fully Specified for Single 5V Operation

n

Available in 8-Lead PDIP and SO Packages

applicaTions

n

SAR A/D Converters

n

Voltage-to-Frequency Converters

n

Precision RC Oscillator

n

Peak Detector

n

Motor Speed Control

n

Pulse Generator

n

Relay/Lamp Driver

DescripTion

The LT®1011 is a general purpose comparator with sig- nificantly better input characteristics than the LM111. Although pin compatible with the LM111, it offers four times lower bias current, six times lower offset voltage and five times higher voltage gain. Offset voltage drift, a previously unspecified parameter, is guaranteed at 15µV/°C. Additionally, the supply current is lower by a factor of two with no loss in speed. The LT1011 is several times faster than the LM111 when subjected to large overdrive conditions. It is also fully specified for DC parameters and response time when operating on a single 5V supply. The LT1011 retains all the versatile features of the LM111, including single 3V to ±18V supply operation, and a floating transistor output with 50mA source/sink capability. It can drive loads referenced to ground, negative supply or positive supply, and is specified up to 50V between V voltage up to the full supply voltage is allowed, even with ±18V supplies, enabling the inputs to be clamped to the supplies with simple diode clamps.

L, LT , LTC , LTM , Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.

–

and the collector output. A differential input

Typical applicaTion

10µs 12-Bit A/D Converter

R1

15V

PARALLEL

OUTPUTS

5V

FULL-SCALE

TRIM

R2*

6.49k

1k

E

LM329 7V

R3

6.98k

0.001µF

6012

12-BIT

D/A CONVERTER

AM2504

SAR REGISTER

S CP

START CLOCK f = 1.4MHz

D

CC

S

15V

*R2 AND R4

–15V

SHOULD TC TRACK

INPUT

0V TO 10V 5V

R4*

2.49k

R5

1k

+

R6

7475

LATCH

LT1011A

–

1011 TA01

820Ω

PARALLEL OUTPUTS

SERIAL OUTPUT

For more information www.linear.com/LT1011

Response Time vs Overdrive

500

450

400

350

300

250

200

150

RESPONSE TIME (ns)

100

50

0

0.1

FALLING OUTPUT

RISING

OUTPUT

1 10 100

OVERDRIVE (mV)

1011 TA02

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1

LT1011/LT1011A

absoluTe MaxiMuM raTings

(Note 1)

Supply Voltage (Pin 8 to Pin 4) .................................36V

Output to Negative Supply (Pin 7 to Pin 4)

LT1011AC, LT1011C ............................................... 40V

LT1011AI, LT1011I .................................................40V

LT1011AM, LT1011M (OBSOLETE)........................50V

Ground to Negative Supply (Pin 1 to Pin 4) ..............30V

Differential Input Voltage ........................................±36V

Voltage at STROBE Pin (Pin 6 to Pin 8) .......................5V

pin conFiguraTion

TOP VIEW

+

V 8

OUTPUT

GND

1

+

INPUT

2

–

3

INPUT

H PACKAGE

8-LEAD TO-5 METAL CAN

T

= 150°C, θJA = 150°C/W, θJC = 45°C/W

JMAX

OBSOLETE PACKAGE

Consider the N8 or S8 Packages for Alternate Source

7

6

5

BALANCE

BALANCE/ STROBE

+ –

4

–

V

Input Voltage (Note 2) ..........................Equal to Supplies

Output Short-Circuit Duration ............................... 10 sec

Operating Temperature Range (Note 3)

LT1011AC, LT1011C .................................. 0°C to 70°C

LT1011AI, LT1011I ................................ –40°C to 85°C

LT1011AM, LT1011M (OBSOLETE)..... –55°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec) ................... 300°C

TOP VIEW

+

GND

1

+

INPUT

2

–

INPUT

3

–

V

4

N8 PACKAGE 8-LEAD PDIP

= 150°C, θJA = 130°C/W(N8)

T

JMAX

= 150°C, θJA = 150°C/W(S8)

T

JMAX

+ –

8-LEAD PLASTIC SO

V

8

OUTPUT

7

BALANCE/

6

STROBE BALANCE

5

S8 PACKAGE

2

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For more information www.linear.com/LT1011

LT1011/LT1011A

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT1011ACN8#PBF N/A LT1011 8-Lead Plastic DIP 0°C to 70°C

LT1011CN8#PBF N/A LT1011 8-Lead Plastic DIP 0°C to 70°C

LT1011AIS8#PBF LT1011AIS8#TRPBF 1011AI 8-Lead Plastic SO –40°C to 85°C

LT1011CS8#PBF LT1011CS8#TRPBF 1011 8-Lead Plastic SO 0°C to 70°C

LT1011IS8#PBF LT1011IS8#TRPBF 1011I 8-Lead Plastic SO –40°C to 85°C

OBSOLETE PACKAGES

LT1011ACH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C

LT1011CH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C

LT1011AMH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C

LT1011MH#PBF N/A 8-Lead TO-5 Metal Can –55°C to 125°C

LT1011ACJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C

LT1011CJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C

LT1011AMJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C

LT1011MJ8#PBF N/A 8-Lead CERDIP –55°C to 125°C

Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LT C Marketing for information on nonstandard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

For more information www.linear.com/LT1011

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3

LT1011/LT1011A

elecTrical characTerisTics

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VS = ±15V, VCM = 0V, RS = 0Ω, V otherwise noted.

LT1011AC/AI/AM LT1011C/I/M

SYMBOL PARAMETER CONDITIONS

V

OS

I

OS

I

B

∆V ∆T

A

VOL

CMRR Common Mode Rejection Ratio 94 115 90 115 dB

t

D

V

OL

*Indicates parameters which are guaranteed for all supply voltages, including a single 5V supply. See Note 5.

Input Offset Voltage (Note 4)

●

*Input Offset Voltage R

≤ 50k (Note 5)

S

●

*Input Offset Current (Note 5)

●

Input Bias Current (Note 4) 15 25 20 50 nA

*Input Bias Current (Note 5)

●

Input Offset Voltage Drift

OS

T

MIN

≤ T ≤ T

MAX

●

(Note 6)

*Large-Signal Voltage Gain RL = 1k Connected to 15V,

*Input Voltage Range (Note 9) V

–10V ≤ V

= 500Ω Connected to 5V,

R

L

V

= Single 5V, V

S

0.5V ≤ V

= ±15V

S

V

= Single 5V

S

OUT

≤ 14.5V

GND

≤ 4.5V

= 0V,

200 500 200 500 V/mV

50 300 50 300 V/mV

●

–14.5

●

0.5

*Response Time (Note 7) 150 250 150 250 ns

*Output Saturation Voltage, V

= 0

GND

*Output Leakage Current V

*Positive Supply Current V

*Negative Supply Current V

*Strobe Current (Note 8) Minimum to Ensure Output Transistor is Off,

= –5mV, I

V

IN

V

= –5mV, I

IN

V

= –5mV, I

IN

= 5mV, V

IN

V

= 20V

OUT

= 0 3.2 4 3.2 4 mA

GND

= 0 1.7 2.5 1.7 2.5 mA

GND

= 8mA, TJ ≤ 100°C

SINK

= 8mA

SINK

= 50mA

SINK

= –15V,

GND

●

500 500 µA

V

= 0

GND

Input Capacitance 6 6 pF

= –15V, output at pin 7 unless

GND

UNITSMIN TYP MAX MIN TYP MAX

0.3 0.5 1

0.75

1.5

0.2 3 5

20 35

50

0.6 1.5 3

2 3

0.2 4 6

25 65

80

4 15 4 25 µV/°C

13 3–14.5

0.25

0.4

0.25

0.45

0.7

1.5

0.2 10 500

0.5

0.25

13

3

0.4

0.45

0.7

1.5

0.2 10 500

mV mV

nA nA

V V

V V V

nA nA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.

Note 2: Inputs may be clamped to supplies with diodes so that maximum input voltage actually exceeds supply voltage by one diode drop. See Input Protection in the Applications Information section.

Note 3: T Note 4: Output is sinking 1.5mA with V

JMAX

= 150°C.

OUT

= 0V.

Note 5: These specifications apply for all supply voltages from a single 5V to ±15V, the entire input voltage range, and for both high and low output states. The high state is I the low state is I

SINK

= 8mA, V

4

= 100µA, V

SINK

= 0.8V. Therefore, this specification

OUT

= (V+ – 1V) and

OUT

For more information www.linear.com/LT1011

defines a worst-case error band that includes effects due to common mode signals, voltage gain and output load.

Note 6: Drift is calculated by dividing the offset voltage difference measured at min and max temperatures by the temperature difference.

Note 7: Response time is measured with a 100mV step and 5mV overdrive. The output load is a 500Ω resistor tied to 5V. Time measurement is taken when the output crosses 1.4V.

Note 8: Do not short the STROBE pin to ground. It should be current driven at 3mA to 5mA for the shortest strobe time. Currents as low as 500µA will strobe the LT1011A if speed is not important. External leakage on the STROBE pin in excess of 0.2µA when the strobe is “off” can cause offset voltage shifts.

Note 9: See graph “Input Offset Voltage vs Common Mode Voltage.”

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LT1011/LT1011A

0.9

EQUIVALENT OFFSET VOLTAGE (mV)

100

5

COMMON MODE VOLTAGE (V)

50

OUTPUT VOLTAGE (V)

6

SATURATION VOLTAGE (V)

1.0

Typical perForMance characTerisTics

Input Bias Current Input Offset Current Worst-Case Offset Error

45

IB FLOWS OUT

40

OF INPUTS

35

30

25

20

CURRENT (nA)

15

10

5

0

–50

–25

0

50 75 100 125

25

TEMPERATURE (°C)

150

1011 G01

0.8

0.7

0.6

0.5

0.4

CURRENT (nA)

0.3

0.2

0.1

0

–50

–25

0

50 75 100 125

25

TEMPERATURE (°C)

1011 G02

150

(FOR COMPARISON)

10

LT1011M

LT1011C

LT1011AM

1

LT1011AC

0.1 1k

LM311

10k 100k 1M

SOURCE RESISTANCE (Ω)

1011 G03

Input Characteristics* Common Mode Limits Transfer Function (Gain)

*EITHER INPUT.

0

REMAINING INPUT GROUNDED. CURRENT FLOWS OUT OF INPUT.

–5

= ±15V

V

S

–10

–15

–20

–25

INPUT CURRENT (nA)

–30

–35

–40

–20

–15

Response Time—Collector Output Response Time—Collector Output

VS = ±15V

5

OVERDRIVE

4

3

2

1

0

100mV

0

5mV 2mV

50 100

–10

20mV

0 5 10 15

–5

INPUT VOLTAGE (V)

V

–

IN

+

INPUT = 100mV STEP

250 300 400

150

200

TIME (ns)

15V 5V

500Ω

–15V

350

1011 G04

1011 G07

450

+

V

–0.5

–1.0

–1.5

–2.0

0.4

0.3

0.2

0.1

–

20

V

–50

–25

POSITIVE LIMIT

REFERRED TO SUPPLIES

NEGATIVE LIMIT

0

50 75 100 125

25

TEMPERATURE (°C)

150

1011 G05

TA = 25°C

40

30

20

10

0

–0.3

– 0.5

DIFFERENTIAL INPUT VOLTAGE (mV)

–0.1

COLLECTOR OUTPUT

= 1k

R

L

EMITTER OUTPUT

= 600Ω

R

L

0.1

0.3

0.5

1011 G06

Collector Output Saturation Voltage

–100mV

VS = ±15V

5

4

3

2

1

0

OVERDRIVE

20mV

5mV

2mV

INPUT = 100mV STEP

50 100

0

150

V

IN

200

TIME (ns)

15V 5V

500Ω

–

+

–15V

250 300 400

350

1011 G08

450

PIN 1 GROUNDED

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

50

TA = 25°C

10 15

20

SINK CURRENT (mA)

TA = 125°C

TA = –55°C

30 35 45

25

40

50

1011 G09

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For more information www.linear.com/LT1011

5

LT1011/LT1011A

INPUT VOLTAGE (mV)

OUTPUT VOLTAGE (V)

INPUT VOLTAGE (mV) OUTPUT VOLTAGE (V)

140

0.7

SHORT-CIRCUIT CURRENT (mA)

POWER DISSIPATION (W)

CURRENT (mA)

5

CURRENT (mA)

6

5

SATURATION VOLTAGE (V)

0.6

PROPAGATION DELAY (ns)

1000

Typical perForMance characTerisTics

Response Time Using GND Pin as Output

15

20mV 5mV 2mV

–10

–15

10

5

0

V

IN

–5

0

+

V

–

+

–

V

OUT

2k

–50

= ±15V

V

–100

0

2

1

TIME (µs)

S

T

A

3

= 25°C

4

1011 G10

Supply Current vs Supply Voltage Supply Current vs Temperature Output Leakage Current

4

POSITIVE SUPPLY

3

2

1

COLLECTOR OUTPUT “LO”

POSITIVE AND NEGATIVE SUPPLY

COLLECTOR OUTPUT “HI”

Response Time Using GND Pin as Output Output Limiting Characteristics*

–10

–15

–100

–50

15

10

5

0

–5

20mV

5mV 2mV

0

1

TIME (µs)

5

4

COLLECTOR OUTPUT “LO”

3

2

1

POSITIVE AND NEGATIVE SUPPLY

+

V

–

V

IN

+

–

V

V T

2

POSITIVE SUPPLY

= ±15V

S

= 25°C

A

3

2k

V

OUT

1011 G11

4

TA = 25°C

120

100

80

60

40

20

0

LEAKAGE CURRENT (A)

10

*MEASURED 3 MINUTES

–7

10

VS = ±15V

–8

10

–9

10

–10

POWER

DISSIPATION

AFTER SHORT

5

OUTPUT VOLTAGE (V)

COLLECTOR OUTPUT “HI”

0

10 15 20

5

SUPPLY VOLTAGE (V)

25 30

1011 G13

0

–50

–25 0

50 100 125

25 75

TEMPERATURE (˚C)

1011 G14

–11

10

25 65 85 105

45 125

TEMPERATURE (°C)

SHORT-CIRCUIT

CURRENT

10 15

V

= 35V

OUT

= –15V

V

GND

0.6

0.5

0.4

0.3

0.2

0.1

0

1011 G12

1011 G15

Output Saturation— Ground Output Output Saturation Voltage Response Time vs Input Step Size

REFERRED TO V

4

3

TJ = –55°C

2

TO GROUND PIN VOLTAGE (V)

1

+

V

0

6

+

2

+

–

3

V

TJ = 25°C

TJ = 125°C

10

20

OUTPUT CURRENT (mA)

8

LT1011

–

7

1

R

L

4

V

OUT

30

40

V

1011 G16

I

+

SINK

= 8mA

0.5 T

= 125°C

J

0.4

= 25°C

0.3

0.2

T

J

TJ = –55°C

0.1

50

0

1 3

2 4

5

6

7

8

INPUT OVERDRIVE (mV)

1011 G17

VS = ±15V

= 500Ω TO 5V

R

L

OVERDRIVE = 5mV

800

–

3

INPUT

600

2

+

1

400

200

0

2

0

3

1 9

4

INPUT STEP (V)

5V

500Ω

7

RISING INPUT

FALLING INPUT

6

5

7

8

10

1011 G18

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For more information www.linear.com/LT1011

INPUT OFFSET VOLTAGE (mV)

2.5

Typical perForMance characTerisTics

Input Offset Voltage vs Common Mode Voltage Offset Pin Characteristics

TJ = 25°C

2.0

1.5

1.0

0.5

0

–0.5

–1.0

–1.5

–2.0

–2.5

V– (OR GND WITH SINGLE SUPPLY)

–

0.1 0.2 0.3 0.4 0.5 0.6 0.7

V

COMMON MODE VOLTAGE (V)

COMMON MODE

+

– (1.5V)

LIMIT = V

UPPER

1011 G19

+

V

(mV/µA)

OS

CHANGE IN V

–150mV

–100mV

–50mV

0.8

0.6

0.4

0.2

0

–50 –25

LT1011/LT1011A

CHANGE IN VOS FOR CURRENT

INTO PINS 5 OR 6

VOLTAGE ON PINS 5 AND 6

WITH RESPECT TO V

25

0

50

TEMPERATURE (°C)

+

75 100 125

150

1011 G20

pin FuncTions

GND (PIN 1): Ground.

+

INPUT

V

OUT (PIN 7): Open-Collector Output of Comparator

BALANCE (PIN 5): Balance Input. This input can be used

to adjust the input voltage offset or to add hysteresis. If offset balancing or hysteresis is not used, the BALANCE pins should be connected together with a 0.1µF capacitor.

(PIN 2): Non-Inverting Input of Comparator

–

(PIN 3): Inverting Input of Comparator

–

(PIN 4): Negative Supply Voltage

BALANCE/STROBE (PIN 6): Strobe Input Pin. Using this

pin, the output transistor can be forced to an “off” state, giving a “hi” output at the collector (Pin 7). This input can be used to adjust the input voltage offset or used to add hysteresis. If offset balancing or hysteresis is not used, the BALANCE pins should be connected together with a

0.1µF capacitor.

+

(PIN 8): Positive Supply Voltage

V

For more information www.linear.com/LT1011

1011afe

7

LT1011/LT1011A

15V

applicaTions inForMaTion

Preventing Oscillation Problems

Oscillation problems in comparators are nearly always caused by stray capacitance between the output and inputs or between the output and other sensitive pins on the comparator. This is especially true with high gain bandwidth comparators like the LT1011, which are designed for fast switching with millivolt input signals. The gain bandwidth product of the LT1011 is over 10GHz. Oscillation problems tend to occur at frequencies around 5MHz, where the LT1011 has a gain of ≈2000. This implies that attenuation of output signals must be at least 2000:1 at 5MHz as measured at the inputs. If the source impedance is 1kΩ, the effective stray capacitance between output and input must have a reactance of more than (2000)(1kΩ) = 2MΩ, or less than 0.02pF. The actual interlead capacitance between input and output pins on the LT1011 is less than

0.002pF when cut to printed circuit mount length. Additional stray capacitance due to printed circuit traces must be minimized by routing the output trace directly away from input lines and, if possible, running ground traces next to input traces to provide shielding. Additional steps to ensure oscillation-free operation are:

a 0.01µF capaci-

1. Bypass the STROBE/BALANCE pins

with tor connected from Pin 5 to Pin 6. This eliminates stray capacitive feedback from the output to the BALANCE pins, which are nearly as sensitive as the inputs.

2. Bypass the negative supply (Pin 4) with a 0.1µF ceramic capacitor close to the comparator. 0.1µF can also be used for the positive supply (Pin 8) if the pull-up load is tied to a separate supply. When the pull-up load is tied directly to Pin 8, use a 2µF solid tantalum bypass capacitor.

3. Bypass any slow moving or DC input with a capacitor (≥0.01µF) close to the comparator to reduce high frequency source impedance.

4. Keep resistive source impedance as low as possible. If a resistor is added in series with one input to balance source impedances for DC accuracy, bypass it with a capacitor. The low input bias current of the LT1011 usually eliminates any need for source resistance balancing. A 5kΩ imbalance, for instance, will create only

0.25mV DC offset.

5. Use hysteresis. This consists of shifting the input offset voltage of the comparator when the output changes state. Hysteresis forces the comparator to move quickly through its linear region, eliminating oscillations by “overdriving” the

comparator under all

input conditions. Hysteresis may be either AC or DC. AC techniques do not shift the apparent offset voltage of the comparator, but require a minimum input signal slew rate to be effective. DC hysteresis works for all input slew rates, but creates a shift in offset voltage dependent on the previous condition of the input signal. The circuit shown in Figure 1 is an excellent compromise between AC and DC hysteresis.

+

2µF

TANT

–15V

–

3

+

2

C1

0.003µF

8

6

5

LT1011INPUTS

4

0.1µF

7

1

R2

15M

R

L

OUTPUT

1011 F01

8

Figure 1. Comparator with Hysteresis

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For more information www.linear.com/LT1011

applicaTions inForMaTion

INPUT OFFSET VOLTAGE (mV)

8

LT1011/LT1011A

This circuit is especially useful for general purpose

comparator applications because it does not force any signals directly back onto the input signal source. Instead, it takes advantage of the unique properties of the BALANCE pins to provide extremely fast, clean output switching even with low frequency input signals in the millivolt range. The 0.003µF capacitor from Pin 6 to Pin 8 generates AC hysteresis because the voltage on the BALANCE pins shifts slightly, depending on the state of the output. Both pins move about 4mV. If one pin (6) is bypassed, AC hysteresis is created. It is only a few millivolts referred to the inputs, but is sufficient to switch the output at nearly the maximum speed of which the comparator is capable. To prevent problems from low values of input slew rate, a slight amount of DC hysteresis is also used. The sensitivity of the BALANCE pins to current is about 0.5mV input referred offset for each microampere of BALANCE pin current. The 15M resistor tied from OUTPUT to Pin 5 generates 0.5mV DC hysteresis. The combination of AC and DC hysteresis creates clean oscillation-

free switching

with very small input errors. Figure 2 plots input referred error versus switching frequency for the circuit as shown.

Note that at low frequencies, the error is simply the

DC hysteresis, while at high frequencies, an additional error is created by the AC hysteresis. The high frequency error can be reduced by reducing C

, but

H

lower values may not provide clean switching with very low slew rate input signals.

Input Protection

The inputs to the LT1011 are particularly suited to general purpose comparator applications because large differential and/or common mode voltages can be tolerated without damage to the comparator. Either or both inputs can be raised 40V above the negative supply, independent of the positive supply voltage. Internal forward biased diodes will conduct when the inputs are taken below the negative supply. In this condition, input current must be limited to 1mA. If very large (fault) input voltages must be accommodated, series resistors and clamp diodes should be used (see Figure 3).

C8 TO C6 = 0.003µF

7

6

5

4

3

2

1

0

–1

–2

1

Figure 2. Input Offset Voltage vs Time to Last Transition

OUTPUT “LO” TO “HI”

OUTPUT “HI” TO “LO”

(50kHz) (5kHz)

10 100 1000

TIME/FREQUENCY (µs)

1011 F02

V

+

INPUTS

D1 TO D4: 1N4148

*

MAY BE ELIMINATED FOR I

**

SELECT ACCORDING TO ALLOWABLE FAULT CURRENT AND POWER DISSIPATION

Figure 3. Limiting Fault Input Currents

For more information www.linear.com/LT1011

R1**

R2**

D1

D3

D4

FAULT

300Ω

R4* 300Ω

≤ 1mA

3

2

–

LT1011

+

8

4

–

V

1011 F03

1011afe

R3*

D2

9

LT1011/LT1011A

15V 5V

applicaTions inForMaTion

The input resistors should limit fault current to a reasonable value (0.1mA to 20mA). Power dissipation in the resistors must be considered for continuous faults, especially when the LT1011 supplies are off. One final caution: lightly loaded supplies may be forced to higher voltages by large fault currents flowing through D1-D4.

R3 and R4 limit input current to the LT1011 to less than 1mA when the input signals are held below V be eliminated if R1 and R2 are large enough to limit fault current to less than 1mA.

–

. They may

3

2

Figure 4. Typical Strobe Circuit

–

LT1011

+

–15

8

6

4

3k

7

1

TTL OR CMOS DRIVE (5V SUPPLY)

R

L

OUTPUT

1011 F04

Input Slew Rate Limitations

The response time of a comparator is typically measured with a 100mV step and a 5mV to 10mV overdrive. Unfortunately, this does not simulate many real world situations where the step size is typically much larger and overdrive can be significantly less. In the case of the LT1011, step size is important because the slew rate of internal nodes will limit response time for input step sizes larger than 1V. At 5V step size, for instance, response time increases from 150ns to 360ns. See the curve “Response Time vs Input Step Size for more detail.

response time

If

is critical and large input signals are expected, clamp diodes across the inputs are recommended. The slew rate limitation can also affect performance when differential input voltage is low, but both inputs must slew quickly. Maximum suggested common mode slew rate is 10V/µs.

Strobing

The LT1011 can be strobed by pulling current out of the STROBE pin. The output transistor is forced to an “off” state, giving a “hi” output at the collector (Pin 7). Currents as low as 250µA will cause strobing, but at low strobe currents, strobe delay will be 200ns to 300ns. If strobe current is increased to 3mA, strobe delay drops to about 60ns. The voltage at the STROBE pin is about 150mV below

+

at zero strobe current and about 2V below V+ for 3mA

V strobe current. Do not ground the STROBE pin. It must be current driven. Figure 4 shows a typical strobe circuit.

Note that there is no bypass capacitor between Pins 5 and

6. This maximizes strobe speed, but leaves the comparator more sensitive to oscillation problems for slow, low

level inputs. A 1pF capacitor between the output and Pin 5 will greatly reduce

oscillation problems without reduc-

ing strobe speed.

DC hysteresis can also be added by placing a resistor from the output to Pin 5. See step 5 under “Preventing Oscillation Problems.”

The pin (6) used for strobing is also one of the offset adjust pins. Current flow into or out of Pin 6 must be kept very low (<0.2µA) when not strobing to prevent input offset voltage shifts.

Output Transistor

The LT1011 output transistor is truly floating in the sense that no current flows into or out of either the collector or emitter when the transistor is in the “off” state. The equivalent circuit is shown in Figure 5.

+

V

I

1

0.5mA

D2

D1

Q1

R1 170Ω

–

V

R2 470Ω

Figure 5. Output Transistor Circuitry

COLLECTOR (OUTPUT)

OUTPUT

Q2

TRANSISTOR

EMITTER (GND PIN)

1011 F05

1011afe

10

For more information www.linear.com/LT1011

applicaTions inForMaTion

R2

LT1011/LT1011A

In the “off” state, I1 is switched off and both Q1 and Q2 turn off. The collector of Q2 can be now held at any voltage

–

above V

without conducting current, including voltages

above the positive supply level. Maximum voltage above

–

is 50V for the LT1011M and 40V for the LT1011C/I.

V The emitter can be held at any voltage between V

–

as long as it is negative with respect to the collector.

V

In the “on” state, I

is connected, turning on Q1 and Q2.

1

+

and

Diodes D1 and D2 prevent deep saturation of Q2 to improve speed and also limit the drive current of Q1. The R1/R2 divider sets the saturation voltage of Q2 and provides turnoff drive. Either the collector or emitter pin can be held at

+

a voltage between V

and V–. This allows the remaining

pin to drive the load. In typical applications, the emitter is

–

connected to V tied to V

+

or ground and the collector drives a load

or a separate positive supply.

When the emitter is used as the output, the collector is

+

typically tied to V

–

. Note that the emitter output is phase reversed with

or V

and the load is connected to ground

respect to the collector output so that the “+” and “–” input designations must be reversed. When the collector

is tied to V+, the voltage at the emitter in the “on” state is

+

about 2V below V

(see curves).

Input Signal Range

The common mode input voltage range of the LT1011 is about 300mV above the negative supply and 1.5V below the positive supply, independent of the actual supply voltages (see curve in the Typical Performance Characteristics). This is the voltage range over which the output will respond correctly when the common mode voltage is applied to one input and a higher or lower signal is applied to the remaining input. If one input is inside the common mode

range and one is outside, the output will be correct. If the inputs are outside the common mode range in opposite directions, the output will still be correct. If both inputs are outside the common mode range in the same direction, the output will not respond to the differential input; for temperatures of 25°C and above, the output will remain unconditionally high (collector output), for temperatures below 25°C, the output becomes undefined.

Typical applicaTions

Offset Balancing Driving Load Referenced

3k

R1

20k

5

2

3

+

LT1011

–

6

+

V

8

7

1011 TA03

to Positive Supply

+

V

3

2

++

V

CAN BE GREATER OR LESS THAN V

–

+

LT1011

8

4

V

GROUND

7

1

V

OR

++

V

1011 TA05

R

LOAD

Driving Load Referenced

to Negative Supply

+

V

2

3

+

*INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT

8

–

LT1011INPUTS*

+

4

V

7

1

R

LOAD

V

1011 TA06

1011afe

For more information www.linear.com/LT1011

11

LT1011/LT1011A

LIMIT

Typical applicaTions

Strobing Driving Ground Referred Load Window Detector

2

+

LT1011

3

–

NOTE: DO NOT GROUND STROBE PIN

7

6

TTL STROBE

1k

1011 TA04

*

INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT

++

**

MAY BE ANY VOLTAGE ABOVE V–.

V PIN 1 SWINGS TO WITHIN ≈2V OF V

Using Clamp Diodes to Improve Frequency Response*

CURRENT MODE

INPUT

(DAC, ETC)

D1

VOLTAGE

INPUT

*SEE CURVE, “RESPONSE TIME vs INPUT STEP SIZE”

2

+

D2

LT1011

3

–

R1

GROUND OR LOW IMPEDANCE REFERENCE

2

3

7

–

LT1011INPUTS*

+

4

–

V

OUTPUT

1011 TA09

1

7

L1

1011 TA07

++**

V

HIGH

V

LOW

++

2

+

LT1011

3

–

1

IN

2

+

LT1011

3

–

1

+

V

8

7

1011 TA08

+

V

R

L

OUTPUT HIGH INSIDE “WINDOW” AND LOW ABOVE HIGH LIMIT OR BELOW LOW LIMIT

Crystal Oscillator

10k

2

100pF85kHz

3

+

LT1011

–

8

1

5V

50k

1k

7

4

OUT

10k

60Hz

INPUT

2V

25V

Noise Immune 60Hz Line Sync** High Efficiency** Motor Speed Controller

RMS

TO

RMS

R1*

330k

0.22µF

5V

R2

75k

5V

3

C1

2

R6

27k

R5 10k

8

–

LT1011

+

4

***INCREASE R1 FOR LARGER INPUT VOLTAGES

LT1011 SELF OSCILLATES AT ≈60Hz CAUSING IT TO “LOCK” ONTO INCOMING LINE SIGNAL

R3 1k

7

1

OUTPUT 60Hz

R4 27k

1011 TA11

50µF

+

C1

R1 1k

R2 470Ω

7

15V

LT1011

1

1N4002

8

4

–5V TO

–15V

R3*

10k

2

+

3

–

0V TO 10V

INPUT

R4 1k

15V

Q1 2N6667

C2*

0.1µF

*

**

10k

1011 TA10

MOTOR-TACH

GLOBE 397A120-2

MOTOR

TACH

R6

R5

2k

100k

C3

R7

0.1µF

1k

1011 TA12

R3/C2 DETERMINES OSCILLATION FREQUENCY OF CONTROLLER Q1 OPERATES IN SWITCH MODE

1011afe

12

For more information www.linear.com/LT1011

Typical applicaTions

OUTPUT

15V

LT1011/LT1011A

Combining Offset Adjust and Strobe

+

V

10k

20k

5

–

3

LT1011

+

2

6

TTL OR CMOS 5V

1k

1011 TA13

Direct Strobe Drive When CMOS* Logic

Uses Same V+ Supply as LT1011

+

V

8

–

3

LT1011

+

2

6

1011 TA14

*NOT APPLICABLE FOR TTL LOGIC

Combining Offset Adjustment and Hystersis

+

5k

2R

**

H

20k

6

–

3

LT1011

+

2

R

5

7

1

V

*

H

HYSTERESIS IS ≈0.45mV/µA OF

*

CURRENT CHANGE IN R THIS RESISTOR CAUSES HYSTERESIS

**

R

L

TO BE CENTERED AROUND V

1011 TA15

Low Drift R/C Oscillator

**

C1

0.015µF

2

3

+

LT1011

–

1

15V

8

1k

7

4

H

OS

†

74HC04

×6

BUFFERED OUTPUT

INPUT

***

Positive Peak Detector

2k

3

2

MYLAR

*

SELECT FOR REQUIRED RESET TIME CONSTANT

**

INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT

***

+

LT1011

–

–15V

8

7

1

4

1M**

+

C1* 2µF

INPUT

10k

100pF

1M**

2

–

LT1008

3

+

3

2k

2

–

LT1011

+

–15V

8

1011 TA17

15V

4

6

Negative Peak Detector

8

7

1

+

C1* 2µF

MYLAR

*

SELECT FOR REQUIRED RESET TIME CONSTANT

**

*

1% METAL FILM

**

TRW TYPE MTR-5/120ppm/°C, 25k ≤ R C1: 0.015µF = POLYSTYRENE, –120ppm/°C, ±30ppm WESCO TYPE 32-P NOTE: COMPARATOR CONTRIBUTES ≤10ppm/°C DRIFT FOR FREQUENCIES BELOW 10kHz

†

LOW DRIFT AND ACCURATE FREQUENCY ARE OBTAINED BECAUSE THIS CONFIGURATION REJECTS EFFECTS DUE TO INPUT OFFSET VOLTAGE AND BIAS CURRENT OF THE COMPARATOR

2

10k

100pF

–

LT1008

3

+

6

8

1011 TA18

S

OUTPUT

≤ 200k

10k*

1011 TA16

10k*

15V

1011afe

For more information www.linear.com/LT1011

13

LT1011/LT1011A

15V

Typical applicaTions

ZERO

R1

TRIM

1k

R2

18k

1

3

LF398

5V

R3

3.9k

R4

5.6k

8

–15V

2

5

6

7

4

D1

C1*

0.1µF

C4

0.01µF

D2

C2** 15pF

4-Digit (10,000 Count) A/D Converter

INPUT

0V TO 10V

R5

4.7k

R7 22Ω

2

3

C3

0.1µF

15V

+

–

–15V

8

LT1011

4

6

1

15V

C5

0.01µF

7

R11

6.8K

5V

R6

4.7K

CLOCK

1MHz

OUTPUT = 1 COUNT PER mV, f = 1MHz

TTL OR CMOS

(OPERATING

ON 5V)

START

T

H

T

L

15V

≥ [C

MAX

≥ 10 • C

+

R8 3k

≥12ms

(pF)][1µs/pF]

• (1µs/pF)

MAX

D1

†

10µF

D3

D4

LM329

R9

3.65k

R10

1k

FULL-SCALE

TRIM

2N3904

R12

6.8k

C6

50pF

ALL DIODES: 1N4148

*

POLYSTYRENE

**

NPO

1011 TA19

Capacitance to Pulse Width Converter

GAIN ADJ

R2

100k

R1 5k

R3

86.6k

C**

5V

8

2

+

LT1011

3

–

4

6

1

0.01µF

7

R5

4.7k OUTPUT

1µs/pF

*PW = (R2 + R3)(C)

LT1011 IS ≈6pF. THIS IS AN OFFSET TERM.

** TYPICAL 2 SECTIONS OF 365pF VARIABLE CAPACITOR WHEN USED AS SHAFT ANGLE INDICATION

†

THESE COMPONENTS MAY BE ELIMINATED IF

NEGATIVE SUPPLY IS AVAILABLE (–1V TO –15V)

R1 + R4

, INPUT CAPACITANCE OF

( )

R1

14

†

D3

†

D2

10µF

+

1011 TA20

†

1011afe

For more information www.linear.com/LT1011

Typical applicaTions

V

IN

4.7k

–15V 15V

0.1µF

INPUT*

100k

10k

2

–

3

+

3

+

2

–

–15V 15V

LT1011

LT1011/LT1011A

Fast Settling Filter

100pF

1M

15V

1M

4.7k

OFM-1A

4

8

7

1

5

6

15V

6

4

15V

5

1

7

5k THRESHOLD

5k

8

1.5k

COMPARATORS DRIVE OPTO-COUPLED FET “ON” WHEN DIFFERENCE BETWEEN OUTPUT AND INPUT EXCEEDS THRESHOLD. WHEN OUTPUT APPROACHES INPUT, THE GATE TURNS “OFF” AND LOW PASS FILTERING OCCURS.

*INPUT POLARITY IS REVERSED WHEN USING PIN 1 AS OUTPUT

1011 TA21

2

3

1µF

LT1008C

4

7

6

8

1

100pF–15V

OUTPUT

AC INPUT

0.033µF

100Ω

ZERO

CROSS

TRIM

100kHz Precision Rectifier

5V 5V

2

5k

3

+

LT1011

–

–5V

8

1

4

5V

1k

7

74C04

–5V

820Ω

5V

820Ω

74C04

–5V

For more information www.linear.com/LT1011

5V

–5V

12k

HP5082-2800 ×4

RECTIFIED OUTPUT

1k

12k

1011 TA23

1011afe

15

LT1011/LT1011A

OUTPUT

scheMaTic DiagraM

INPUT

(+)

2

INPUT

(–)

3

Q31

Q29

R27 3k

Q27

R10 4k

V

8

+

Q12

R11 170Ω

R12 470Ω

GND

1

Q15

R13 4Ω

7

OFFSET

5

Q6

R5 160Ω

Q30

D4

D6

Q25

R25

1.6k

D5

Q26

D7

R4

300Ω

Q28

R26

1.6k

Q5

Q1

R1

1.3k

D1 D2

R2

1.3k

Q2

OFFSET/STROBE

R3

300Ω

R6

3.2kR73.2k

Q3

Q4

Q23

R19 500Ω

6

Q21

Q8

R8 800Ω

R23

R18 275Ω

4k

Q22

R9 800Ω

Q10

Q11

Q13

Q7

Q14

Q20

R22

Q24

Q18

200Ω

Q16

R24 400Ω

Q9 Q19

R17

200Ω

R21 960Ω

R20

940Ω

R16 800Ω

R15 700Ω

R14

4.8k

D3

Q17

4

1011 SD

–

V

16

1011afe

For more information www.linear.com/LT1011

LT1011/LT1011A

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

H Package

8-Lead TO-5 Metal Can (.230 Inch PCD)

(Reference LTC DWG # 05-08-1321)

0.335 – 0.370

(8.509 – 9.398)

DIA

0.305 – 0.335

0.040

(1.016)

MAX

SEATING

PLANE

0.010 – 0.045* (0.254 – 1.143)

*

LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE AND 0.045" BELOW THE REFERENCE PLANE

**

FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS

(7.747 – 8.509)

0.016 – 0.021** (0.406 – 0.533)

OBSOLETE PACKAGE

45°TYP

0.050

(1.270)

MAX

GAUGE PLANE

0.016 – 0.024

(0.406 – 0.610)

0.165 – 0.185

(4.191 – 4.699)

0.500 – 0.750

(12.700 – 19.050)

REFERENCE PLANE

0.028 – 0.034

(0.711 – 0.864)

J8 Package

8-Lead CERDIP (Narrow .300 Inch, Hermetic)

(Reference LTC DWG # 05-08-1110)

OBSOLETE PACKAGE

0.110 – 0.160

(2.794 – 4.064)

INSULATING

STANDOFF

0.027 – 0.045

(0.686 – 1.143)

PIN 1

H8 (TO-5) 0.230 PCD 1197

0.230

(5.842)

TYP

CORNER LEADS OPTION

(4 PLCS)

0.023 – 0.045

(0.584 – 1.143)

HALF LEAD

0.045 – 0.068

(1.143 – 1.727)

FULL LEAD

OPTION

0.300 BSC

(0.762 BSC)

0.008 – 0.018

(0.203 – 0.457)

NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS

0° – 15°

OPTION

0.005

(0.127)

MIN

0.025

(0.635)

RAD TYP

0.045 – 0.065

(1.143 – 1.651)

0.014 – 0.026

(0.360 – 0.660)

8 7

1 2

0.405

(10.287)

MAX

6 5

3

4

0.220 – 0.310

(5.588 – 7.874)

0.015 – 0.060

(0.381 – 1.524)

0.100 (2.54)

BSC

0.200

(5.080)

MAX

0.125

3.175 MIN

J8 1298

1011afe

For more information www.linear.com/LT1011

17

LT1011/LT1011A

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

N8 Package

8-Lead PDIP (Narrow .300 Inch)

(Reference LTC DWG # 05-08-1510)

.300 – .325

(7.620 – 8.255)

.045 – .065

(1.143 – 1.651)

.130 ± .005

(3.302 ± 0.127)

8 7 6

.400*

(10.160)

MAX

5

.050 BSC

.245 MIN

.030 ±.005

TYP

RECOMMENDED SOLDER PAD LAYOUT

.065

(1.651)

.008 – .015

(0.203 – 0.381)

+.035

.325

–.015 +0.889

8.255

( )

–0.381

NOTE:

1. DIMENSIONS ARE

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)

INCHES

MILLIMETERS

TYP

.100

(2.54)

BSC

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610)

.010 – .020

.045 ±.005

.160 ±.005

(0.254 – 0.508)

.008 – .010

(0.203 – 0.254)

NOTE:

1. DIMENSIONS IN

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

× 45°

.016 – .050

(0.406 – 1.270)

INCHES

(MILLIMETERS)

0°– 8° TYP

.018 ± .003

(0.457 ± 0.076)

.053 – .069

(1.346 – 1.752)

.014 – .019

(0.355 – 0.483)

TYP

.120

(3.048)

MIN

.020

(0.508)

MIN

.255 ± .015*

(6.477 ± 0.381)

.004 – .010

(0.101 – 0.254)

.050

(1.270)

BSC

1 2

.228 – .244

(5.791 – 6.197)

3

8

1

4

N8 1002

.189 – .197

(4.801 – 5.004)

NOTE 3

7

6

3

2

5

4

SO8 0303

.150 – .157

(3.810 – 3.988)

NOTE 3

18

1011afe

For more information www.linear.com/LT1011

LT1011/LT1011A

revision hisTory

REV DATE DESCRIPTION PAGE NUMBER

D 10/12 Update to Product Description

Addition of Order Information Addition of Pin Function Information Correction to Positive Peak Detector Circuit

E 4/13 Correction to Pin Function descriptions

Correction to Order Information and Obsolete Packages Correction to Graphs:

Response Time—Collector Output – high to low Response Time Using GND Pin as Output – low to high Response Time Using GND Pin as Output – high to low Output Saturation—Ground Output

Correction to input pin polarity

(Revision history begins at Rev D)

1

2, 3

7

13

2, 7

3

5, 6

10, 13, 15

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

For more information www.linear.com/LT1011

1011afe

19

LT1011/LT1011A

R7

Typical applicaTion

10Hz to 100kHz Voltage to Frequency Converter

INPUT

0V TO 10V

15V

R2

5k

FULL-SCALE

TRIM

R16

50k

10Hz TRIM

ALL DIODES 1N4148 TRANSISTORS 2N3904

*

USED ONLY TO GUARANTEE START-UP

†

MAY BE INCREASED FOR BETTER 10Hz TRIM RESOLUTION

15V

–15V

R3

8.06k

R17

22M

†

R1

4.7k

C2

0.68µF

POLYSTYRENE

3

–

LT1011

2

+

6

R15 22k

Q1*

R4

1M

C1

0.002µF

15V

0.002µF

10pF

R14 1k

+

4.7k 15V

LT1009

–15V

15V

Q2

R8

4.7k

R9 5k

2.5V

LINEARITY ≈0.01%

TTL OUTPUT 10HZ TO 100kHz

R10

2.7k

1011 TA22

1.5µs

15V

R5

R6

2k

8

7

1

4

–15V

15V

2µF

–15V

1.5µs

4.4V

–15V

R11 20k

R12

100k

R13 620k

relaTeD parTs

PART NUMBER DESCRIPTION COMMENTS

LT1016 UltraFast™ Precision Comparator Industry Standard 10ns Comparator

LT1116 12ns Single Supply Ground-Sensing Comparator Single Supply Version of the LT1016

LT1394 UltraFast Single Supply Comparator 7ns, 6mA Single Supply Comparator

LT1671 60ns, Low Power Comparator 450µA Single Supply Comparator

UltraFast is a trademark of Linear Technology Corporation.

Linear Technology Corporation

20

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507

For more information www.linear.com/LT1011

●

www.linear.com/LT1011

1011afe

LT 0413 REV E • PRINTED IN USA

 LINEAR TECHNOLOGY CORPORATION 1991

ANALOG DEVICES LT 1011 CN8 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual

FeaTures

applicaTions

DescripTion

Typical applicaTion

absoluTe MaxiMuM raTings

pin conFiguraTion

orDer inForMaTion

elecTrical characTerisTics

Typical perForMance characTerisTics

pin FuncTions

applicaTions inForMaTion

Typical applicaTions

scheMaTic DiagraM

package DescripTion

revision hisTory

Typical applicaTion

relaTeD parTs