ANALOG DEVICES ICE-100B Service Manual

Features

Integrated Development and
Debugging Environment

• Multiple project management

• Profiling and tracing of

instruction execution

• Automation API and automation aware

scripting engine

• Multiple processor (MP) support

• Background telemetry channel (BTC)

support with data streaming capability

• Statistical profiling

• Graphical plotting capabilities

• Cache visualization

• Execution pipeline viewer

• Compiled simulation

Efficient Application
Code Generation

• Native C/C++ compiler and enhanced

assembler

• Profile-guided optimization (PGO)

• Expert linker with profiling capability

• Integrated source code control

• TCP/IP and USB support for Blackfin

Processors

• Processor configuration/start-up code

wizard for Blackfin Processors

• VisualDSP++ kernel (VDK) with

multiprocessor messaging capability

• System services and device driver

support for Blackfin Processors

• File system support for Blackfin

Processors

VisualDSP++ Development

and Debugging Environment

Overview

VisualDSP++® 5.0 is a state-of-the-art software development environment targeting the
Analog Devices embedded processor portfolio. With the embedded software engineer and
signal processing-intensive applications specifically in mind, VisualDSP++, coupled with
Analog Devices in-circuit emulator (ICE) and EZ-KIT Lite® evaluation products, provides best­in-class capabilities for developing demanding real-time applications.

Platforms and Processor Support

VisualDSP++ supports Analog Devices’ Blackfin® Processors, SHARC® Processors, and
TigerSHARC® Processors. Windows XP,® Windows 2000,® and Windows Vista®
are supported.

Develop High Performance Applications Quickly

At the heart of VisualDSP++ is a robust and powerful C/C++ compiler. The compiler
consistently delivers industry-leading performance on standard benchmarks, ensuring
that all but the most performance-demanding applications can be written entirely in the
C language, accelerating development time while maintaining a portable code base. The
compiler is backed by a rich library of signal-processing routines, allowing easy access
to hand-coded, optimized implementations of FFTs, FIRs, etc. The Blackfin and SHARC
compilers support MISRA-C:2004 for safety-critical embedded systems (www.misra-c.com).

The ANSI-C compiler is also augmented with popular language extensions and
enhancements to make it more amiable to existing code bases. Examples include
GNU GCC extensions, ETSI fractional libraries, and multiple heap support.

www.analog.com/processors/tools

A compiler’s overriding mission is to produce correct code, so there
are occasions when the compiler must take a conservative approach
to a code sequence when a more aggressive approach could have
been taken if certain constraints could be guaranteed by the
programmer. The VisualDSP++ compiler supports a broad range of
pragma that allow the programmer to better exploit the compiler
while maintaining C language neutrality. Just as important, the
compiler has the ability to feed back advisory information to the
programmer, offering further improvements to a code sequence should
the programmer be able to make certain guarantees about it. This
information is displayed seamlessly in the VisualDSP++ main editor
window. This “lifts the veil” off the “black box” that compilers are often,
and accurately, accused of being.

Backing the compiler is a powerful assembler and linker technology.
Analog Devices’ processors are noted for their intuitive algebraic
assembly language syntax, and the VisualDSP++ assembler extends that
ease of use with the ability to import C header files, allowing for symbolic
references into arbitrarily complex C data structures. Binary data can
be “included” directly into assembly source files, creating an easy way
to add blocks of static data (such as audio samples and bitmaps) to an
application. The VisualDSP++ linker is fully multicore and multiprocessor
(MP) aware, allowing for the creation of cross-linked, multiexecutable
applications in a single pass. Other powerful capabilities of the linker
include dead code and data elimination, code and data overlays, section
spilling (i.e., automatic overflow from internal to external memory), and
automatic short-to-long call expansion.

Built upon the system service library, the file system service (FSS)
provides a portable and extensible means of accessing mass
storage media from the Blackfin Processor. Support for the
ADSP-BF548 EZ-KIT Lite development board is provided with
VisualDSP++ 5.0 for FAT file systems on the attached hard disk
drive, supplied SD card, and USB flash.

As embedded applications become increasingly part of the connected
world, the ability to rapidly add reliable Ethernet or USB connectivity
to an application can often make or break a development schedule.
For Blackfin Processors, VisualDSP++ includes a tuned port of the
open source LwIP TCP/IP stack. An example application showcasing
an embedded Web server is among the highlights of this support. For
Blackfin Processors and SHARC Processors, USB 2.0 device connectivity
is provided. Bulk and asynchronous transfer modes are supported out
of the box, with USB-IF logo certified embedded and host applications
provided with full source code.

Leverage Proven Application Infrastructure

VisualDSP++ goes beyond robust code generation tools, providing
considerable application infrastructure and middleware out of the box
to speed application development. The VisualDSP++ kernel (VDK) is a
robust, royalty-free, real-time operating system (RTOS) kernel. It provides
essential kernel features in a minimal footprint. Features include a fully
preemptive scheduler (time slicing and cooperative scheduling are also
supported), thread creation, semaphores, interrupt management, inter­thread messaging, events, and memory management (memory pools
and multiple heaps). In MP environments, MP messaging is also
provided. Configuration of these elements is done graphically with code
wizards to speed the creation of new threads and interrupt handlers.
VDK has been available for multiple releases of VisualDSP++ and is now
a key component of products shipping from a number of high volume
vendors. Several commercial RTOSs are also available from select Analog
Devices third parties.

Blackfin Processors can take advantage of the system service library
(SSL), which provides consistent, easy C language access to Blackfin
features such as the interrupt manager, direct memory access (DMA),
and power management units. Clock frequency and voltage can be
changed easily at run time through a set of simple APIs. Interrupt
handling can be live, fired at the time of the event, or deferred to a later
time of the application’s choosing. A device manager integrates device
drivers for on- and off-chip peripherals. VisualDSP++ includes ever
expanding device driver support for all on-chip peripherals and off-chip
devices found on Analog Devices EZ-KIT Lite and EZ-Extender® products.
The SSL is OS-neutral and can be run as a standalone or in conjunction
with an RTOS.

Source code generation.

Wrapping all of these powerful tools and libraries together is the
VisualDSP++ state-of-the-art integrated development and debugging
environment (IDDE). The IDDE includes full-featured editing and project
manage-ment tools with incremental builds, multiple build configurations
(“Debug” and “Release,” for example), syntax-coloring editor, and many
other code editing features. Makefiles can be imported and exported
freely. For Blackfin Processors, many application attributes can be
configured graphically, enabling point-and-click access to SDRAM setup,
stack and heap placement, power management, clock speed, cache
setup, and more.

Debug and Tune Your Application with Ease

The ability to develop a high performance application is often gated
by the visibility into your running system that your debugger provides.
VisualDSP++ excels in this regard, with best-in-class debugging and
inspection support. Robust fundamental C language source debugging
(source-level stepping and breakpoints, stack unwinds, local variable
and C expression support, memory and register windows) serves as a
foundation upon which multiple innovative and unique tools rest.

VisualDSP++ supports a variety of debugging targets. Most common is
a JTAG connection to an EZ-KIT Lite board or to a custom target board
by means of Analog Devices emulator products. However, there will be

occasions where closer inspection in a simulated environment may be
required. VisualDSP++ provides core cycle-accurate simulators, allowing
inspection of every nuance of activity within the processor, including
visualization of the processor’s pipeline and cache. These simulators are
robust and highly accurate, so much so that they are used by Analog
Devices’ own silicon designers for validation. A second simulator is
available to Blackfin Processor users—a high speed functional simulator.
Using proprietary just-in-time (JIT) technology, the simulators have the
ability to simulate millions of cycles per second on the most modest of
host PCs. Effectively, this means that what used to be an overnight run is
now a 10-minute coffee break, and what was once
a coffee break is now a near-instantaneous simulation.

As many of the most performance-demanding applications process a
signal of some sort, comprehensive memory plotting is a cornerstone
of VisualDSP++ debugger support. VisualDSP++ provides multiple
views, from basic (line plots) to sophisticated (eye diagrams and
waterfalls) to pinpoint anomalous data sequences in your application.
Image viewing in a number of data formats is also available.

Users of the VDK get unparalleled visibility into the internals of
the kernel. Status on a per-thread basis is available, as is a compre­hensive pictorial history of kernel events and CPU loading. Thread
changes, posted and pended semaphores, and other kernel events are
captured in this display.

For Blackfin Processors and SHARC Processors, inspection, or even

so their contents do not follow the debugger’s focus. To further aid MP
debug, synchronous run, step, halt, and reset are also provided.

The Analog Devices patented statistical profiler offers unprecedented
and unique visibility into a running application. Operating completely
nonintrusively to the application, the application is polled thousands
of times per second and a statistical view of where an application is
spending the majority of its time is quickly assembled. This tool can be
used to easily inspect an application for unexpected hotspots (suggesting
the need to move a key routine from external to internal memory, for
example). Simulator targets provide a completely linear profiling view. For
Blackfin Processors, traditional instrumented profiling is also available.

Going even further, the VisualDSP++ compiler is able to act upon
profiling information. Profile-guided optimization (PGO) is a technique
that allows the compiler to instrument an application, run the application,
and then make a second pass compilation, exploiting the information
that was gathered during the run of the application. This gives the
compiler unique insight on a block-by-block basis, allowing it to optimize
with a level of granularity that is not possible with a tool that operates
only on a file-by-file basis.

Integrate into Your Existing Environment

A development tool suite is always a part of an organization’s larger
software engineering environment. VisualDSP++ has been designed to
operate in a larger environment.

Since an embedded engineer is often developing on a new platform
while maintaining existing products that were likely developed with
earlier versions of the tools, VisualDSP++ can be installed discretely
an arbitrary number of times at a variety of release levels, allowing
engineering to easily switch between current and legacy versions of
VisualDSP++.

Kernel event history.

application stimulation, from the debugger at run time is possible
through the use of the processor’s background telemetry channel (BTC).
BTC allows for an arbitrary number of communication channels to be
established between the host debugger and the application. Channels
may go in either direction, so BTC can be used to read and write data as
the processor runs. Scalar values or entire arrays may be serviced by a
channel. Arrays read from the target can even be plotted in real time.

MP users get the same compelling set of debugging features across all
processors, unified into a single debugging interface. Individual windows
can be made to “float” their focus to whichever processor currently is
the debugger’s focus, or they can be “pinned” to a specific processor

To better integrate to source code control (SCC) systems, VisualDSP++
is able to connect to any SCC provider that supports the Microsoft®
common source code control (MCSCC) interface. This interface is
supported by all leading SCC vendors. VisualDSP++ goes one step
further by supporting the control of VisualDSP++ itself within a source
code control system.

The ability to robustly test an embedded application is enabled through
a comprehensive automation application programmers interface (API).
Using Microsoft’s language-neutral automation technology, nearly every
feature of the graphical environment is available to script authors.
Applications can be rebuilt, downloaded, and run from a simple script
executed from the command line or from within a custom test harness
framework. The automation API is supported by C++ and VBScript
examples for all API calls, though any automation-aware language
can be used.

For prototype runs and/or small volume deployment, an Analog Devices
emulator can be used to flash a program onto your custom system.
Accessible through the Automation API, the flash programmer can be
scripted, making it possible to develop a turnkey user interface for use
by a production floor technician or other individual not familiar with
VisualDSP++. Device drivers are provided for all flash devices found on
EZ-KIT Lite products, and these drivers can be easily adjusted to support
an arbitrary flash device. The Stand-Alone Flash Programmer enables the
development engineer to script or automate this process with a license-

free tool, allowing the manufacturing technician to repeatedly
program any number of boards prior to major production.

Getting Help and Staying Up to Date

Analog Devices is aware that best-in-class customer support
is ultimately in the interests of both customers and Analog
Devices in the long run. Analog Devices is committed to best­in-class customer support for VisualDSP++.

VisualDSP++ includes a comprehensive, indexed, searchable
online help system. In addition to information concerning
VisualDSP++, manuals for Analog Devices processors,
application notes, and more are included in the help system.
PDF versions of these documents are also available on the
installation CD or online at www.analog.com/processors.

Licensed users of VisualDSP++ are entitled to free technical
support. The support staff is dedicated to VisualDSP++ and has
specific expertise regarding it. There is never a per-incident or
maintenance fee; support remains free regardless of how long
you own your software.

Major and minor upgrades to VisualDSP++ are also free and
are released through the Analog Devices website.

The Collaborative

The VisualDSP++ environment enables independent third-party
companies to add value using Analog Devices’ published
set of application programming interfaces (APIs). The
Collaborative™ is an independent network of third-party
developers. The Collaborative’s product offerings—real-time
operating systems, emulators, high level language compilers,
and multiprocessor hardware—can interface seamlessly with
VisualDSP++, thereby simplifying development across all
platforms and targets.

Take a VisualDSP++ Test Drive!

Take a free 90-day test drive of VisualDSP++. To take a
test drive, you can download a test drive or request a
CD from the Analog Devices DSP Tools website at
www.analog.com/processors/tools/testdrive or contact
your local Analog Devices sales representative/distributor.

Analog Devices Tools Product Line

Analog Devices’ CROSSCORE® development tools product
line provides easier and more robust methods for engineers
to develop and optimize systems by shortening product
development cycles for faster time to market. The CROSSCORE
components include the VisualDSP++ software development
environment, EZ-KIT Lite evaluation systems, EZ-Extender
daughter boards, and emulators for rapid on-chip debugging.
For more information on development tools, visit the Analog
Devices website, www.analog.com/processors/tools.

Embedded Processors and DSPs

Analog Devices is a leading supplier of embedded and
digital signal processing solutions, from the high performance
Blackfin and TigerSHARC Processors to the low cost SHARC
Processors and integrated mixed-signal DSPs that are ideal for
an ever increasing spectrum of applications. Analog Devices’
advances in design provide faster processing, more memory,
lower power consump-tion, and simplified system integration.
Analog Devices’ products and technology provide a competitive
edge complete with expert technical support, comprehensive
development tools, and The Collaborative.

CROSSCORE Tools Support

Tel: 1-800-ANALOGD

Email: [e-mail]

Analog Devices is committed to providing high quality, timely,
accurate, and free technical support and
software upgrades.

Ordering Information

VisualDSP++ 5.0 for Blackfin
Part number: VDSP-BLKFN-PC-FULL

VisualDSP++ 5.0 for SHARC
Part number: VDSP-SHARC-PC-FULL

VisualDSP++ 5.0 for TigerSHARC
Part number: VDSP-TS-PC-FULL

Floating licenses and volume discounts are also available.

Analog Devices, Inc.
Worldwide Headquarters

Analog Devices, Inc.
One Technology Way
P.O. Box 9106
Norwood, MA 02062-9106
U.S.A.
Tel: [phone]
(800.262.5643,
U.S.A. only)
Fax: [phone]

Analog Devices, Inc.
Europe Headquarters

Analog Devices, Inc.
Wilhelm-Wagenfeld-Str. 6
80807 Munich
Germany
Tel: [phone]
Fax: [phone]

Analog Devices, Inc.
Japan Headquarters

Analog Devices, KK
New Pier Takeshiba
South Tower Building
1-16-1 Kaigan, Minato-ku,
Tokyo, 105-6891
Japan
Tel: [phone]
Fax: [phone]

Analog Devices, Inc.
Southeast Asia
Headquarters

Analog Devices
22/F One Corporate Avenue
222 Hu Bin Road
Shanghai, 200021
China
Tel: [phone]
Fax: [phone]

Embedded Processing and
DSP Support

U.S.A.:

[e-mail]

Fax: [phone]
Europe:
[e-mail]
Fax: [phone]

www.analog.com/processors

©200 7 Analog De vices, Inc. All r ights res erved.
Trademarks and registered trademarks are the property
of their respective owners.
Printed in the U.S.A. PH02330-5-10/07(J)

www.analog.com/processors/tools

ICE-100B Emulator

User Guide

Analog Devices, Inc.
One Technology Way
Norwood, Mass. 02062-9106

Revision 1.0, September 2009

Part Number

82-000225-01

a

Copyright Information

©2009 Analog Devices, Inc., ALL RIGHTS RESERVED. This document
may not be reproduced in any form without prior, express written consent
from Analog Devices, Inc.

Notice

Analog Devices, Inc. reserves the right to make changes to or to discon­tinue any product or service identified in this publication without notice.

Analog Devices assumes no liability for Analog Devices applications assis­tance, customer product design, customer software performance, or
infringement of patents or services described herein. In addition, Analog
Devices shall not be held liable for special, collateral, incidental or conse­quential damages in connection with or arising out of the furnishing,
performance, or use of this product.

Analog Devices products are not intended for use in life-support
applications, devices, or systems. Use of an Analog Devices product in
such applications without the written consent of the appropriate Analog
Devices officer is prohibited.

Users are restricted from copying, modifying, distributing, reverse
engineering and reverse assembling or reverse compiling the Analog
Devices emulator operational software (one copy may be made for
back-up purposes only).

Trademark and Service Mark Notice

The Analog Devices logo, VisualDSP++, Blackfin, TigerSHARC,
SHARC, the CROSSCORE logo, EZ-KIT Lite, and EZ-ICE are regis­tered trademarks are registered trademarks of Analog Devices, Inc.

All other brand and product names are trademarks or service marks of
their respective owners.

Regulatory Compliance

ICE-100B emulators are designed to be used solely in a laboratory envi­ronment. The emulator is not intended to be used in any end products or
as a portion of an end product. The emulators may cause interference to
other electronic devices operating at close proximity. The emulators
should not be used in or near any medical equipment or RF devices.

The ICE-100B emulators have been certified to comply with the essential
requirements of the European EMC directive 89/336/EEC (inclusive
93/68/EEC) and, therefore, carries the “CE” mark.

The ICE-100B emulators have been appended to
Analog Devices Development Tools Technical
Construction File referenced “DSPTOOLS1” dated
December 21, 1997 and was awarded CE Certifica­tion by an appointed European Competent Body
and is on file.

The ICE-100B emulator contains ESD (electrostatic discharge) sensitive
devices. Electrostatic charges readily accumulate on the human body and
equipment and can discharge without detection. Permanent damage may
occur on devices subjected to high-energy discharges. Proper ESD precau­tions are recommended to avoid performance degradation or loss of func­tionality. Store unused ICE-100B emulators in the protective shipping
package.

CONTENTS

PREFACE

Purpose of This Manual ................................................................ viii

Intended Audience ........................................................................ viii

Manual Contents .......................................................................... viii

Technical and Customer Support ..................................................... ix

GETTING STAR T ED

Contents of Emulator Package ....................................................... 1-2

PC Configuration ......................................................................... 1-2

USB Installation Tasks .................................................................. 1-2

Verifying Driver Installation .................................................... 1-4

Attaching to the Emulation Target ................................................. 1-6

VisualDSP++ Configurator ............................................................ 1-8

JTAG Frequency ........................................................................... 1-8

Troubleshooting and Warranty Information ................................... 1-9

HARD W A RE D E S C R I P T I O N

LEDs ............................................................................................ 2-1

Resetting the Target ...................................................................... 2-2

To Reset the Target ................................................................. 2-3

ICE-100B Emulator User Guide v

Designing Custom Processor Boards .............................................. 2-4

Mechanical Specifications ............................................................. 2-4

SUPPORT

Technical Support ......................................................................... 3-1

Quality Assurance ......................................................................... 3-2

REFERENCES
INDEX

vi ICE-100B Emulator User Guide

PREFACE

Thank you for purchasing the ICE-100B Emulator. The ICE-100B
emulator is used in conjunction with the VisualDSP++® development
environment to create, test, and debug advanced processor application
software on Analog Devices Blackfin® processors.

The ICE-100B emulator provides state-of-the-art support for
JTAG-compliant Analog Devices processors. Key features of the
ICE-100B emulator include:

• Plug-n-Play, USB 2.0 compliant

• High-speed USB device

• USB bus-powered device

•Windows® XP or Windows Vista operation

• Multiple processor I/O voltage support

 1.8V, 2.5V, and 3.3V compliance

• Multiprocessor support

• JTAG clock operation of 5 MHz

Analog Devices carries a wide range of in-circuit emulation products.
To learn more about Analog Devices emulators, go to:

http://www.analog.com/processors/

ICE-100B Emulator User Guide vii 