ANALOG DEVICES EE-246 Service Manual

Engineer-to-Engineer Note EE-246

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Technical notes on using Analog Devices DSPs, processors and development tools

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Interfacing AD7276 High-Speed Data Converters to ADSP-21262
SHARC® Processors

Contributed by Aseem Vasudev Prabhugaonkar and Jagadeesh Rayala Rev 1 – October 5, 2004

Introduction

This application note explains how to interface
AD7276 high-speed data converters to ADSP­21262 SHARC® processors. This application
note also provides example code to demonstrate
how the SHARC processor's serial ports (SPI and
SPORTs) can be programmed to receive data
from AD7276 devices in core and DMA modes.
The power-down scheme for AD7276 ADCs
between conversions in DMA mode is also
described.

About AD7276/7277/7278 ADCs

The AD7276/AD7277/AD7278 devices are 12-,
10-, and 8-bit, high-speed, low-power,
successive-approximation ADCs, respectively.
The parts operate from a single 2.35 V to 3.6 V
power supply and feature throughput rates up to
3 million samples per second (MSPS).

The conversion process and data acquisition are
controlled using the
clock, allowing the devices to interface with
variety of microprocessors or DSPs. The input
signal is sampled on the falling edge of
the conversion is also initiated at this point.
There are no pipeline delays associated with the
part.

The AD7276/AD7277/AD7278 ADCs use
advanced design techniques to achieve very low
power dissipation at high throughput rates.

/CS signal and the serial

/CS, and

The reference for the part is taken internally from
VDD. This allows the widest dynamic input
range to the ADC. Thus, the analog input range
for the part is from 0 V to VDD. The conversion
rate is determined by the serial clock SCLK.

AD7276/7277/7278 Product Highlights

 3 MSPS ADCs in a 6-lead TSOT package
 Pin compatible to AD7476/7477/7478 and

AD7476A/7477A/7478A parts

 High throughput with low power

consumption

 Flexible power / serial clock speed

management
The conversion rate is determined by the

serial clock. Increasing the serial clock speed
reduces the conversion time. This reduces
average power consumption while in power­down mode (i.e., while not converting). The
part also features a power-down mode to
maximize power efficiency at lower
throughput rates. Current consumption is
1 µA max in power-down mode.

 Reference derived from the power supply
 No pipeline delay

The parts feature a standard successive­approximation ADC with accurate control of
the sampling instant via a /CS input and once­off conversion control.

Copyright 2004, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product design or the use or application of
customers’ products or for any infringements of patents or rights of others which may result from Analog Devices assistance. All trademarks and logos are property
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no responsibility is assumed by Analog Devices regarding technical accuracy and topicality of the content provided in Analog Devices’ Engineer-to-Engineer Notes.

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AD7276/7277/7278 A/D Applications

AD7276/7277/7278 applications include:

 Battery-Powered Systems
 Personal Digital Assistants
 Medical Instruments
 Mobile Communications
 Instrumentation and Control Systems
 Data Acquisition Systems
 High-Speed Modems
 Optical Sensors

About ADSP-21262 Processors

The ADSP-21262 is the first member of the
third-generation of SHARC programmable
processors. A range of applications such as high­quality audio and automotive entertainment
systems, voice recognition, medical appliances
and measurement devices benefit from the
ADSP-21262 processor’s integration of large on­chip memory with a wide variety of
peripherals—thereby speeding time to market
and keeping costs low.

The ADSP-21262 derivative, which is based on
the SHARC processor core, supports execution
of 32-bit fixed-point and 32/40-bit floating-point
arithmetic formats. With its core running at
200 MHz (5-ns instruction cycle time), the
ADSP-21262 processors are capable of executing
complex Fast Fourier Transform (FFT)
operations—a 1024-point complex FFT in 46 µs,
more than 2.6 times faster than comparatively
priced processors. In audio applications, the
single-instruction, multiple-data (SIMD) mode
effectively doubles the processor's performance.

The ADSP-21262 processor is designed with the
highest level of integration, including 2 Mbits of
on-chip dual-ported SRAM and 4 Mbits of mask­programmable ROM memory. This large amount
of on-chip dual-ported memory enables sustained
processor and I/O performance without the need

for external memory. System I/O is achieved
through six full-duplex serial ports, four timers, a
16-bit parallel port, a serial peripheral interface
(SPI), 22 zero-overhead Direct Memory Access
(DMA) channels delivering fast data transfers
without processor intervention, and an innovative
Digital Applications Interface (DAI) offering
complete software control through its Signal
Routing Unit (SRU).

AD7276-to-ADSP-21262 Interface

This application note uses an AD7276 high­speed data converter for the interface. The other
converters in this family (AD7277 and AD7278)
are functionally identical. The ADC has a serial
interface for DSPs and micro-controllers to
transfer the 12-bit digitized data. The ADC
supports SPI (Serial Peripheral Interface) and
SPORT (DSP Serial Port interface) protocols.
ADSP-21262 processors can connect to AD7276
ADCs over their SPI or SPORT interfaces.

The serial interface of AD7276 comprises three
signals:

 /CS Chip Select is an active low input. This

signal initiates A-to-D conversion and frames
the serial data transfer.

 SDATA The AD7276 drives conversion results

onto this pin. The data bits are clocked out on
the falling edge of the serial clock.

 SCLK Serial clock is an input to the ADC.

The converter clocks the data bits out on the
falling serial clock edges.

The falling edge on
hold mode and also initiates conversion. For
compatibility with a 16-bit word length
supported by SPI, the ADC outputs 16 bits. The
first two bits (zeros) are followed by 12 valid
data bits and two zero bits in the end of the serial
data stream. Though the ADC data is 12 bits
wide, every word is transferred as a 16-bit word.
This helps since the SPI word length in ADSP­21262 processor is configurable as 8, 16, or
32 bits only. When interfaced to a serial port, the

/CS puts track-and-hold in to

Interfacing AD7276 High-Speed Data Converters to ADSP-21262 SHARC® Processors (EE-246) Page 2 of 5