Analog Devices EE185 Application Notes

Engineer To Engineer Note EE-185
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Technical Notes on using Analog Devices' DSP components and development tools
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Fast Floating-Point Arithmetic Emulation on the Blackfin® Processor Platform
Contributed by DSP Apps May 26, 2003

Introduction

Processors optimized for digital signal processing are divided into two broad categories: fixed-point and floating-point. In general, the cutting-edge fixed-point families tend to be fast, low power, and low cost, while floating-point processors offer high precision and wide dynamic range in hardware.
While the Blackfin® Processor architecture was designed for native fixed-point computations, it can achieve clock speeds that are high enough to emulate floating-point operations in software. This gives the system designer a choice between hardware efficiency of floating-point processors and the low cost and power of Blackfin Processor fixed-point devices. Depending on whether full standard conformance or speed is the goal, floating-point emulation on a fixed­point processor might use the IEEE-754 standard or a fast floating-point (non-IEEE-compliant) format.
On the Blackfin Processor platform, IEEE-754 floating-point functions are available as library calls from both C/C++ and assembly language. These libraries emulate floating-point processing using fixed-point logic.
To reduce computational complexity, it is sometimes advantageous to use a more relaxed and faster floating-point format. A significant cycle savings can often be achieved in this way.
This document shows how to emulate fast floating-point arithmetic on the Blackfin
Processor platform. A two-word format is
employed for representing short and long fast floating-point data types. C-callable assembly source code is included for the following operations: addition, subtraction, multiplication and conversion between fixed-point, IEEE-754 floating-point, and the fast floating-point formats.

Overview

In fixed-point number representation, the radix point is always at the same location. While this convention simplifies numeric operations and conserves memory, it places a limit the magnitude and precision. In situations that require a large range of numbers or high resolution, a changeable radix point is desirable.
Very large and very small numbers can be represented in floating-point format. Floating­point format is basically scientific notation; a floating-point number consists of a mantissa (or fraction) and an exponent. In the IEEE-754 standard, a floating-point number is stored in a 32-bit word, with a 23-bit mantissa, an 8-bit exponent, and a 1-bit sign. In the fast floating-
point two-word format described in this
document, the exponent is a 16-bit signed integer, while the mantissa is either a 16- or a 32­bit signed fraction (depending on whether the
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short of the long fast floating-point data type is used).
Normalization is an important feature of floating­point representation. A floating-point number is
normalized if it contains no redundant sign bits
in the mantissa; that is, all bits are significant. Normalization provides the highest precision for the number of bits available. It also simplifies the comparison of magnitudes, because the number with the greater exponent has the greater magnitude; only if the exponents are equal is it necessary to compare the mantissas. All routines presented in this document assume normalized input and produce normalized results.
The are some differences in arithmetic
L
flags between the ADSP-BF535 Blackfin Processor and the ADSP­BF531/2/3 Blackfin Processor platforms. All of the assembly code in this document was written for the ADSP­BF531/2/3 Blackfin Processor devices.
Short and Long Fast Floating­Point Data Types
The code routines in this document use the two­word format for two different data types. The
short data type (fastfloat16) provides one 16-bit
word for the exponent and one 16-bit word for
the fraction. The long data type (fastfloat32)
provides one 16-bit word for the exponent and
one 32-bit word for the fraction. The fastfloat32
data type is more computationally intensive, but
provides greater precision than the fastfloat16
data type. Signed twos-complement notation is assumed for both the fraction and the exponent.
Listing 1 Format of the fastfloat16 data type
typedef struct { short exp; fract16 frac; } fastfloat16;
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Listing 2 Format of the fastfloat32 data type
typedef struct { short exp; fract32 frac; } fastfloat32;

Converting Between Fixed-Point and Fast Floating-Point Formats

There are two Blackfin Processor instructions used in fixed-point to fast floating-point conversion. The first instruction, returns the number of sign bits in a number (i.e. the exponent). The second,
ashift, is used to
normalize the mantissa.
Assembly code for both the short version
(fastfloat16) and the long version (fastfloat32) is
shown below.
Listing 3 Fixed-point to short fast floating-point (fastfloat16) conversion
/******************************************* fastfloat16 fract16_to_ff16(fract16);
-----------------­Input parameters (compiler convention): R0.L = fract16 Output parameters (compiler convention): R0.L = ff16.exp R0.H = ff16.frac
-----------------­*******************************************/ _fract16_to_ff16: .global _fract16_to_ff16; r1.l = signbits r0.l; // get the number of
sign bits r2 = -r1 (v); r2.h = ashift r0.l by r1.l; // normalize
the mantissa r0 = r2; rts; _fract16_to_ff16.end:
signbits,
Fast Floating-Point Arithmetic Emulation on the Blackfin® Processor Platform (EE-185) Page 2 of 9
Listing 4 Fixed-point to long fast floating-point (fastfloat32) conversion
/******************************************* fastfloat32 fract32_to_ff32(fract32);
-----------------­Input parameters (compiler convention): R0 = fract32 Output parameters (compiler convention): R0.L = ff32.exp R1 = ff32.frac
-----------------­*******************************************/ _fract32_to_ff32: .global _fract32_to_ff32; r1.l = signbits r0; // get the number of
// sign bits r2 = -r1 (v); r1 = ashift r0 by r1.l; // normalize the
// mantissa r0 = r2; rts; _fract32_to_ff32.end:
Converting two-word fast floating-point numbers
to fixed-point format is made simple by using the
ashift instruction.
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------------------
*******************************************/
_ff16_to_fract16:
.global _ff16_to_fract16;
r0.h = ashift r0.h by r0.l; // shift the // binary point
r0 >>= 16;
rts;
_ff16_to_fract16.end:
Listing 6 Long fast floating-point (fastfloat32) to fixed­point conversion
/******************************************* fract32 ff32_to_fract32(fastfloat32);
------------------
Input parameters (compiler convention):
R0.L = ff32.exp
R1 = ff32.frac
Output parameters (compiler convention):
R0 = fract32
------------------
Assembly code for both the short version
*******************************************/
(fastfloat16) and the long version (fastfloat32) is
shown below.
Listing 5 Short fast floating-point (fastfloat16) to fixed­point conversion
/******************************************* fract16 ff16_to_fract16(fastfloat16);
------------------
Input parameters (compiler convention):
R0.L = ff16.exp
R0.H = ff16.frac
_ff32_to_fract32:
.global _ff32_to_fract32;
r0 = ashift r1 by r0.l; // shift the // binary point
rts;
_ff32_to_fract32.end:
Converting Between Fast Floating-Point and IEEE
Output parameters (compiler convention):
R0.L = fract16
Fast Floating-Point Arithmetic Emulation on the Blackfin® Processor Platform (EE-185) Page 3 of 9
Floating-Point Formats
The basic approach to converting from the IEEE floating-point format to the fast floating-point
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