executable so that it integrates the end-application.
In-circuit programming a boot-image into the
FLASH on the ADDS-21161N-EZLITE
Submitted by Matthew Walsh Jan 2002
The final step is to download this flash-programming
executable to the DSP and run it!
1. Build the End Application
Overview
The ADSP-21161N, like most re-programmable
processors, requires internal program-code and data
to be boot-loaded upon power-up. This code&data
can either be supplied by a host system (i.e. hostboot, link-port boot, JTAG connection, etc.) or it can
be stored in an on-board non-volatile memory device
such as a ROM or FLASH. The 21161N EZ-Kit Lite
evaluation board enables the DSP to boot in any of
these ways, but the only one that allows standalone
operation (without connection to a PC) is PROM
Using the USB Debug-Agent, a JTAG Emulator,
and/or the VisualDSP++ Simulator, one can write
and test the end-application. As previously
mentioned, the end application in
blink.asm
toggles LED2-LED7 on the board. To verify that this
routine and one’s board is functional, activate an EZKit Lite debug-target in the IDDE and then open
blink.dpj. Next load the executable blink.dxe
(in the /
executable is loaded, simply hit run (
FLASH/debug directory). Once this
<F5> ) and
watch the LEDs.
booting. This is supported by a 512KB FLASH
memory device from ST Microdevices
(M29W040B).
This example shows how the ADSP-21161N can be
used to program an application into the FLASH. This
“in-circuit programming” (as opposed to burning the
flash before it is placed on the board) is most
frequently used to perform software or firmware
updates to systems already deployed in the field.
2. Create the PROM Boot-Image
With the end-application verified, we then use
VisualDSP++’s Loader to generate a boot-image
from our source code. To do this, we simply go to
the Project Options page of
blink.dpj and select
“Loader file” as the output file type (Figure-1.)
Doing this requires two separate sets of code: First, it
requires a software routine to program data into the
FLASH, and second, the end application that will
ultimately be boot-loaded and run by the DSP.
In this example, a generic FLASH programming
algorithm is contained in
prog-flash.asm, and the
dummy end-application is a simple LED toggling
routine in
as the data payload that
blink.asm. (This blink routine will serve
prog-flash.asm will
program into the FLASH.)
From start to finish, the attached code example
demonstrates the four general steps involved with
this in-circuit FLASH programming. First, the endapplication is written and debugged (here,
blink.dpj). The second step is to generate a
PROM boot-image (
The third step is to re-build the flash-programming
Copyright 2000, Analog Devices, Inc. All rights reserved. Analog Devices assumes no responsibility for customer product d esign or the use or ap plication of customers ’ products or
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blink.ldr) from that code.
Figure 1. Loader file as the output file Type
The .LDR file that we are about to generate is
ultimately going to be included into the flashprogramming routine as an array. To this end, the
.LDR file should be in the “Include” format
(essentially comma-delimited ASCII) with each word
being 16-bits, as can be seen in Figure-2.
Figure 2. Configure the .LDR file under the Load tab
Also, if you have any code that executes directly
from external memory, be sure to enter the width of
the external memory. Otherwise, just hit OK and
then Rebuild All. This will rebuild the project
according to the new Project Options and will
generate
input.ldr.
Additional information on generating Loader files for
the ADSP-21161 can be found in our online EZAnswers database:
http://www.analog.com/dsp/EZAnswers
and in EE-137: Executing Code Directly from 8, 16,
32 or 48 Bit External Memory Devices using the
ADSP21161.
3. Rebuild the Flash-Programming app.
The last step is to modify the flash-programming
application to include the recently generated
input.ldr. To do this, close input.dpj and open
programmer.dpjwhere one will find prog-
flash.asm.
In this file, we simply declare an array
in a section mapped to external memory and initialize
it with the payload LDR file. To use the example
end-application (blink), this is done as follows:
Now, with the correct payload file specified, we
simply Rebuild the project to generate the flashprogramming executable (
prog-flash.dxe).
4. Programming the FLASH
The six LED’s are used to provide feedback on the
progress of the FLASH programming. Once we
download and run
prog-flash.dxe, all six LED’s
will blink simultaneously to indicate “I’m alive and
running.” Next, as each of the five steps to program
the FLASH complete, an LED either illuminates to
indicate that it was successful or blinks rapidly if it
has failed.
The five stages are as follows:
1) Verify the payload file size < 512KB.
2) Reset the flash and verify the device ID
3) Erase the Flash
4) Write the payload LDR file into the FLASH
5) Verify the data
If all five stages are successful, FLAG9 (LED2) is
then illuminated to indicate that the in-circuit FLASH
programming was successful.
Additional Notes:
1) EZ-Kit boards before revision 2.0 require a minor
modification to access the flash with the DSP.
Resistors R186 and R154 must be removed. (In these
alpha revisions of the board, the Cypress USB
controller is also connected to the FLASH device.
These two resistors connect the /RD and /WR lines of
the FLASH to the Cypress, and unless removed, will
prevent these signals from being driven low by the
DSP.)
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Technical Notes on using Analog Devices’ DSP components and development tools
2) The PROM boot kernels that ship with VisualDSP++
2.0 improperly program the ROM Boot Waitstates in
the WAIT register to have zero waitstates. Using one
of these original kernels will cause the PROM boot to
fail if the external port is run at more than 25MHz. To
avoid this, either use an updated boot-kernel or
configure the Clock Mode Jumpers (JP21) to operate
the external port no faster than 25MHz. The incorrect
WAIT initialization at the top of the kernel (part of the
SDRAM intialization) can be replaced with the
following instructions if a fixed kernel is unavailable:
USTAT1 = 0x01C00000;
dm(wait) = USTAT1;
3) In this example, we initialize the payload buffer,
input[] at build time, however in a real system, this
buffer would be initialized sometime during execution.
The new FLASH data could be imported from a serialport, link-port or SPI port, or it could be placed into
memory by an onboard host processor.
4) In VisualDSP++ 2.0, the only way to view the contents of
the FLASH is to open a two-column memory window and
then go to ( <CTRL-G> ) the starting address, which for the
EZ-Kit Lite is 0x400 0000. Then the contents of the flash
will be displayed as the eight (8) least significant bits at each
address.
5) To automate the debug process, programmer.tcl
contains TCL commands to build blink.dpj, then open
programmer.dpj, and then build programmer.dpj.
To use this TCL script, make any changes required to the
end application (in this case blink.asm) and then from
the File menu select Load TCL Script. VisualDSP++ 2.0
provides TCL help including a syntax guide and extensive
examples.
References:
M29W040 FLASH Datasheet:
http://eu.st.com/stonline/books/pdf/docs/6583.pdf
Appendix A: Source Code:
/************************ Blink.asm ********************************************/
// Toggles LED's up and down
/*******************************************************************************/
#include <def21161.h>
#define JINX 0x1FF000 // wait between each LED
#define PAUSE 0xfffFFF// wait between consecutive sweeps
.section/pm code_sec;
start:
wayback:
up:r2=r2+1;
down:nop;
pause: nop;
ustat1=dm(IOFLAG);
bit set ustat1 FLG4O|FLG5O|FLG6O|FLG7O|FLG8O|FLG9O;
dm(IOFLAG)=ustat1;
r2=-3;
// count up
lcntr = 9; do up until lce;
r0 = DM(IOFLAG);
r0 = btgl r0 by r1;/* toggle flag r1*/
r0 = btgl r0 by r2;/* toggle flag r1*/
DM(IOFLAG) = r0;
lcntr=JINX; do delay until lce;/*wait*/
delay: nop;
r1 = r1 + 1;/* increment which flag is toggled*/
// count down
lcntr = 9; do down until lce;
r1 = r1 - 1;/* increment which flag is toggled*/
r2=r2-1;
r0 = DM(IOFLAG);
r0 = btgl r0 by r1;/* toggle flag r1*/
r0 = btgl r0 by r2;/* toggle flag r1*/
DM(IOFLAG) = r0;
lcntr=JINX; do delay2 until lce;/*wait*/
delay2:nop;
lcntr = PAUSE; do pause until lce;
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Technical Notes on using Analog Devices’ DSP components and development tools