ANALOG DEVICES DAC8412 Service Manual

Quad, 12-Bit DAC

A

V

VDDV

FEATURES

+5 V to ±15 V operation Unipolar or bipolar operation True voltage output Double-buffered inputs Reset to minimum (DAC8413) or center scale (DAC8412) Fast bus access time Readback

APPLICATIONS

Automatic test equipment Digitally controlled calibration Servo controls Process control equipment

GENERAL DESCRIPTION

The DAC8412/DAC8413 are quad, 12-bit voltage output DACs with readback capability. Built using a complementary BiCMOS process, these monolithic DACs offer the user very high package density.

Output voltage swing is set by the two reference inputs V and V

. By setting the V

REFL

input to 0 V and V

REFL

REFH

positive voltage, the DAC provides a unipolar positive output range. A similar configuration with V

at 0 V and V

REFH

negative voltage provides a unipolar negative output range. Bipolar outputs are configured by connecting both V

to nonzero voltages. This method of setting output voltage

V

REFL

range has advantages over other bipolar offsetting methods because it is not dependent on internal and external resistors with different temperature coefficients.

Digital controls allow the user to load or read back data from any DAC, load any DAC, and transfer data to all DACs at one time.

An active low

RESET

loads all DAC output registers to midscale

for the DAC8412 and zero scale for the DAC8413.

The DAC8412/DAC8413 are available in 28-lead plastic DIP, 28-lead ceramic DIP, 28-lead PLCC, and 28-lead LCC packages.

to a

REFL

REFH

at a

and

Voltage Output with Readback

DAC8412/DAC8413

FUNCTIONAL BLOCK DIAGRAM

LOGIC

12

DAT

RESET

I/O

DGND

R/W

LDAC

A0

A1

CS

I/O

PORT

CONTROL

LOGIC

INPUT REG A

INPUT REG B

INPUT REG C

INPUT REG D

OUTPUT

REG A

OUTPUT

REG B

OUTPUT

REG C

OUTPUT

REG D

Figure 1.

They can be operated from a wide variety of supply and reference voltages with supplies ranging from single +5 V to ±15 V, and references from +2.5 V to ±10 V. Power dissipation is less than 330 mW with ±15 V supplies and only 60 mW with a +5 V supply.

For MIL-STD-883 applications, contact your local Analog Devices, Inc. sales office for the DAC8412/DAC8413/883 data sheet, which specifies operation over the −55°C to +125°C temperature range. All 883 parts are also available on Standard Military Drawings 5962-91 76401MXA through 76404M3A.

0.500

0.375

0.250

0.125

–0.125

LINEAR ITY E RROR (LSB)

–0.250

–0.375

–0.500

+25°C

0

VDD = +15V V

= –15V

SS

V

= +10V

REFH

V

= –10V

REFL

T

= –55°C, +25° C, +125°C

A

1024 1536 2046 2548 25 60 3072 40960

512

DIGITAL INPUT CODE (Decimal)

Figure 2. INL vs. Code Over Temperature

+125°C

–55°C

DAC A

DAC B

DAC C

DAC D

V

REFL

REFH

V

OUTA

V

OUTB

V

OUTC

V

OUTD

V

SS

00274-002

00274-001

Rev. F

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

DAC8412/DAC8413

REVISION HISTORY

9/09—Rev. E to Rev. F

Updated Figure Numbering .............................................. Universal

Removed Figure 7 ............................................................................. 6

Changes to Ordering Guide .......................................................... 20

6/07—Rev. D to Rev. E

Updated Format .................................................................. Universal

Added CERDIP Package .................................................... Universal

Changes to Specifications Section .................................................. 3

Changes to Absolute Maximum Ratings Section ......................... 7

Updated Outline Dimensions ....................................................... 18

Changes to Ordering Guide .......................................................... 20

3/00—Rev. C to Rev. D

Introduction ................................................................................ 14

DACs ............................................................................................ 14

Glitch ............................................................................................ 14

Reference Inputs ......................................................................... 14

Digital I/O ................................................................................... 14

Coding ......................................................................................... 14

Supplies ........................................................................................ 15

Amplifiers .................................................................................... 15

Reference Configurations .......................................................... 16

Single +5 V Supply Operation .................................................. 17

Outline Dimensions ....................................................................... 18

Ordering Guide .......................................................................... 20

Rev. F | Page 2 of 20

DAC8412/DAC8413

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VDD = +15.0 V, VSS = −15.0 V, V

Table 1.

Parameter Symbol Conditions Min Typ Max Unit

ACCURACY

Integral Nonlinearity Error INL E grade ±0.25 ±0.5 LSB F grade ±1 LSB Differential Nonlinearity Error DNL Monotonic over temperature −1 LSB Min-Scale Error V Full-Scale Error V Min-Scale Temperature Coefficient TCV Full-Scale Temperature Coefficient TCV Linearity Matching Adjacent DAC Matching ±1 LSB

REFERENCE

Positive Reference Input Voltage Range2 V Negative Reference Input Voltage Range Reference High Input Current I Reference Low Input Current I Large Signal Bandwidth BW −3 dB, V

AMPLIFIER CHARACTERISTICS

Output Current I Settling Time tS To 0.01%, 10 V step, RL = 1 kΩ 10 μs Slew Rate SR 10% to 90% 2.2 V/μs Analog Crosstalk 72 dB

LOGIC CHARACTERISTICS

Logic Input High Voltage V Logic Input Low Voltage V Logic Output High Voltage VOH IOH = 0.4 mA 2.4 V Logic Output Low Voltage VOL IOL = −1.6 mA 0.4 V Logic Input Current IIN 1 μA Input Capacitance C Digital Feedthrough

3

LOGIC TIMING CHARACTERISTICS

Chip Select Write Pulse Width t Write Setup t Write Hold tWH t Address Setup t Address Hold tAH 0 ns Load Setup tLS 70 ns Load Hold tLH 30 ns Write Data Setup t Write Data Hold t Load Data Pulse Width t Reset Pulse Width t Chip Select Read Pulse Width t Read Data Hold t Read Data Setup t Data to High-Z t Chip Select to Data t

= +5.0 V, V

LOGIC

3, 4

= +10.0 V, V

REFH

R

ZSE

R

FSE

RL = 2 kΩ 15 ppm/°C

ZSE

RL = 2 kΩ 20 ppm/°C

FSE

2

−10 V

−2.75 +1.5 +2.75 mA

REFH

0 2 2.75 mA

REFL

RL = 2 kΩ, CL = 100 pF –5 +5 mA

OUT

TA = 25°C 2.4 V

INH

T

INL

8 pF

IN

V

= −10.0 V,−40°C ≤ TA ≤ +85°C, unless otherwise noted.1

REFL

= 2 kΩ ±2 LSB

L

= 2 kΩ ±2 LSB

L

+ 2.5 VDD − 2.5 V

REFL

− 2.5 V

REFH

= 0 V to 10 V p-p 160 kHz

REFH

= 25°C 0.8 V

A

= 2.5 V, V

REFH

= 0 V 5 nV-sec

REFL

80 ns

WCS

t

WS

0 ns

AS

t

WDS

t

WDH

170 ns

LDW

140 ns

RESET

130 ns

RCS

t

RDH

t

RDS

C

DZ

CL = 100 pF 160 ns

CSD

= 80 ns 0 ns

WCS

= 80 ns 0 ns

WCS

= 80 ns 20 ns

WCS

= 80 ns 0 ns

WCS

= 130 ns 0 ns

RCS

= 130 ns 0 ns

RCS

= 10 pF 200 ns

L

Rev. F | Page 3 of 20

DAC8412/DAC8413

Parameter Symbol Conditions Min Typ Max Unit

SUPPLY CHARACTERISTICS

Power Supply Sensitivity PSS 14.25 V ≤ VDD ≤ 15.75 V 150 ppm/V Positive Supply Current I Negative Supply Current I Power Dissipation P

1

All supplies can be varied ±5%, and operation is guaranteed. Device is tested with nominal supplies.

2

Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.

3

All parameters are guaranteed by design.

4

All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.

V

DD

−10 −6.5 mA

SS

330 mW

DISS

= 2.5 V 8.5 12 mA

REFH

VDD = V unless otherwise noted.

= +5.0 V ± 5%, VSS = 0.0 V, V

LOGIC

1

= +2.5 V, V

REFH

= 0.0 V, VSS = –5.0 V ± 5%, V

REFL

= −2.5 V, −40°C ≤ TA ≤ +85°C,

REFL

Table 2.

Parameter Symbol Conditions Min Typ Max Units

ACCURACY

Integral Nonlinearity Error INL E grade ±0.5 ±1 LSB F grade ±2 LSB V V

= 0.0 V, E grade2 ±2 LSB

SS

= 0.0 V, F grade

SS

2

±4 LSB

Differential Nonlinearity Error DNL Monotonic over temperature –1 LSB Min-Scale Error V Full-Scale Error V Min-Scale Error V Full-Scale Error V Min-Scale Temperature Coefficient TCV Full-Scale Temperature Coefficient TCV

VSS = −5.0 V ±4 LSB

ZSE

VSS = −5.0 V ±4 LSB

FSE

VSS = 0.0 V ±8 LSB

ZSE

V

FSE

100 ppm/°C

ZSE

100 ppm/°C

FSE

= 0.0 V ±8 LSB

SS

Linearity Matching Adjacent DAC matching ±1 LSB

REFERENCE

Positive Reference Input Voltage Range3 V Negative Reference Input Voltage Range VSS = 0.0 V 0 V V Reference High Input Current I

Code 0x000 –1.0 +1.0 mA

REFH

Large Signal Bandwidth BW −3 dB, V

= −5.0 V –2.5 V

SS

= 0 V to 2.5 V p-p 450 kHz

REFH

+ 2.5 VDD − 2.5 V

REFL

− 2.5 V

REFH

− 2.5 V

REFH

AMPLIFIER CHARACTERISTICS

Output Current I

RL = 2 kΩ, CL = 100 pF –1.25 +1.25 mA

OUT

Settling Time tS To 0.01%, 2.5 V step, RL = 1 kΩ 7 μs Slew Rate SR 10% to 90% 2.2 V/μs

LOGIC CHARACTERISTICS

Logic Input High Voltage V Logic Input Low Voltage V

TA = 25°C 2.4 V

INH

TA = 25°C 0.8 V

INL

Logic Output High Voltage VOH IOH = 0.4 mA 2.4 V Logic Output Low Voltage VOL IOL = −1.6 mA 0.45 V Logic Input Current I Input Capacitance C

4, 5

LOGIC TIMING CHARACTERISTICS

Chip Select Write Pulse Width t Write Setup tWS t Write Hold tWH t

1 μA

IN

8 pF

IN

150 ns

WCS

= 150 ns 0 ns

WCS

= 150 ns 0 ns

WCS

Address Setup tAS 0 ns Address Hold t

0 ns

AH

Load Setup tLS 70 ns Load Hold tLH 50 ns

Rev. F | Page 4 of 20

DAC8412/DAC8413

A

Parameter Symbol Conditions Min Typ Max Units

Write Data Setup t Write Data Hold t Load Data Pulse Width t Reset Pulse Width t Chip Select Read Pulse Width t Read Data Hold t Read Data Setup t Data to High-Z t Chip Select to Data t

SUPPLY CHARACTERISTICS

Power Supply Sensitivity PSS 100 ppm/V Positive Supply Current I Negative Supply Current I Power Dissipation P

V

1

All supplies can be varied ±5%, and operation is guaranteed. Device is tested with V

2

For single-supply operation only (V

3

Operation is guaranteed over this reference range, but linearity is neither tested nor guaranteed.

4

All parameters are guaranteed by design.

5

All input control signals are specified with tr = tf = 5 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.

= 0.0 V, VSS = 0.0 V). Due to internal offset errors, INL and DNL are measured beginning at 0x005.

REFL

t

AS

RDS

DATA VALID

t

RDH

t

AH

t

CS

R/W

0/A1

DATA

OUT

t

RCS

HIGH-Z HIGH-Z

t

CSD

Figure 3. Data Output (Read Timing)

t

WDS

t

WDH

180 ns

LDW

150 ns

RESET

170 ns

RCS

t

RDH

t

RDS

C

DZ

CL = 100 pF 320 ns

CSD

7 12 mA

DD

VSS = −5.0 V −10 mA

SS

VSS = 0 V 60 mW

DISS

DZ

= 150 ns 20 ns

WCS

= 150 ns 0 ns

WCS

= 170 ns 20 ns

RCS

= 170 ns 0 ns

RCS

= 10 pF 200 ns

L

= −5.0 V 110 mW

SS

= 4.75 V.

DD

t

CS

t

WS

R/W

t

AS

A0/A1

t

LS

LDAC

t

WDS

DATA IN

t

00274-003

RESET

WCS

t

WH

t

AH

t

LH

t

WDH

Figure 4. Data Write (Input and Output Registers) Timing

t

LDW

00274-004

Rev. F | Page 5 of 20

DAC8412/DAC8413

A

DDRESS

LDAC

DATA IN

CS

R/W

80ns

t

WS

t

AS

ADDRESS

ONE

DATA1

VALID

ADDRESS

TWO

t

LS

t

WDS

DATA2

VALID

Figure 5. Single-Buffer Mode

ADDRESS

THREE

DATA3

VALID

ADDRESS

FOUR

DATA4

VALID

80ns

CS

t

WH

R/W

DDRESS

t

LH

LDAC

t

WDH

00274-005

DATA IN

t

WS

t

AS

ADDRESS

ONE

t

WDS

DATA1 VALID

ADDRESS

TWO

DATA2

VALID

ADDRESS

THREE

DATA3

VALID

ADDRESS

FOUR

tLSt

DATA4

VALID

t

LH

LDW

t

WH

WDH

00274-006

Figure 6. Double-Buffer Mode

Rev. F | Page 6 of 20

ANALOG DEVICES DAC8412 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

FEATURES

APPLICATIONS

GENERAL DESCRIPTION

FUNCTIONAL BLOCK DIAGRAM

TABLE OF CONTENTS

REVISION HISTORY

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS