Analog Devices DAC8408GP, DAC8408FT, DAC8408FS, DAC8408FPC, DAC8408FP Datasheet

...
Quad 8-Bit Multiplying CMOS
a
FEATURES Four DACs in a 28 Pin, 0.6 Inch Wide DIP or 28-Pin JEDEC
Plastic Chip Carrier 61/4 LSB Endpoint Linearity Guaranteed Monotonic DACs Matched to Within 1% Microprocessor Compatible Read/Write Capability (with Memory) TTL/CMOS Compatible Four-Quadrant Multiplication Single-Supply Operation (+5 V) Low Power Consumption Latch-Up Resistant Available In Die Form
APPLICATIONS Voltage Set Points in Automatic Test Equipment Systems Requiring Data Access for Self-Diagnostics Industrial Automation Multichannel Microprocessor-Controlled Systems Digitally Controlled Op Amp Offset Adjustment Process Control Digital Attenuators
GENERAL DESCRIPTION
The DAC8408 is a monolithic quad 8-bit multiplying digital-to­analog CMOS converter. Each DAC has its own reference input, feedback resistor, and onboard data latches that feature read/write capability. The readback function serves as memory for those systems requiring self-diagnostics.
DAC8408
A common 8-bit TTL/CMOS compatible input port is used to load data into any of the four DAC data-latches. Control lines DS1, DS2, and A/B determine which DAC will accept data. Data loading is similar to that of a RAMs write cycle. Data can be read back onto the same data bus with control line R/ DAC8408 is bus compatible with most 8-bit microprocessors, including the 6800, 8080, 8085, and Z80. The DAC8408 oper­ates on a single +5 volt supply and dissipates less than 20 mW. The DAC8408 is manufactured using PMI’s highly stable, thin-film resistors on an advanced oxide-isolated, silicon-gate, CMOS process. PMI’s improved latch-up resistant design elimi­nates the need for external protective Schottky diodes.
ORDERING INFORMATION
Temperature Package
Model INL DNL Range Description
DAC8408GP ±1/4 LSB ±1/2 LSB 0°C to +70°C 28-Pin Plastic DIP DAC8408ET ±1/4 LSB ±1/2 LSB –40°C to +85°C 28-Pin Cerdip DAC8408AT2±1/4 LSB ±1/2 LSB –55°C to +125°C 28-Pin Cerdip DAC8408FT ±1/2 LSB ±1 LSB –40°C to +85°C 28-Pin Cerdip DAC8408BT2±1/2 LSB ±1 LSB –55°C to +125°C 28-Pin Cerdip DAC8408FPC3±1/2 LSB ±1 LSB –40°C to +85°C 28-Contact PLCC DAC8408FS ±1/2 LSB ±1 LSB –40°C to +85°C 28-Pin SOL DAC8408FP ±1/2 LSB ± 1 LSB –40°C to +85°C 28-Pin Plastic DIP
NOTES
1
Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages. For outline information see Pack­age Information section.
2
For devices processed in total compliance to MIL-STD-883, add /883 after part number. Consult factory for 883 data sheet.
3
For availability and burn-in information on SO and PLCC packages, contact your local sales office.
1
W. The

FUNCTIONAL BLOCK DIAGRAM

DAC8408
REV. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
DAC8408
ELECTRICAL CHARACTERISTICS
(@ VDD = +5 V; V
= 610 V; V
REF
A, B, C, D = 0 V; TA = –558C to +1258C apply for
OUT
DAC8408AT/BT, TA = –408C to +858C apply for DAC8408ET/FT/FP/FPC/FS; TA = 08C to +708C apply for DAC8408GP, unless otherwise noted. Specifications apply for DAC A, B, C, & D.)
DAC8408
Parameter Symbol Conditions Min Typ Max Units
STATIC ACCURACY
Resolution N 8 Bits Nonlinearity
1, 2
INL DAC8408A/E/G ±1/4 LSB
DAC8408B/F/H ±1/2 LSB
Differential DNL DAC8408A/E/G ±1/2 LSB
Nonlinearity DAC8408B/F/H ±1 LSB Gain Error G Gain Tempco
3, 6
TC
FSE
GFS
(Using Internal RFB) ±1 LSB
±2 ±40 ppm/°C
Power Supply Rejection
(V
= ±10%) PSR 0.001 %FSR/%
DD
I
OUT 1A, B, C, D
Leakage Current
13
I
LKG
TA =+25°C ±30 nA TA = Full Temperature Range ±100 nA
REFERENCE INPUT
Input Voltage Range ±20 V Input Resistance Match Input Resistance R
4
IN
R
A, B, C, D
±1%
6 1014k
DIGITAL INPUTS
Digital Input Low V Digital Input High V Input Current
Input Capacitance
5
6
IL IH
2.4 V
TA = +25°C ±0.01 ±1.0 µA
I
IN
C
IN
TA = Full Temperature Range ±10.0 µA
0.8 V
8pF
DATA BUS OUTPUTS
Digital Output Low V Digital Output High V Output Leakage Current I
OL OH
LKG
16 mA Sink 0.4 V 400 µA Source 4 V TA = +25°C ±0.005 ± 1.0 µA TA = Full Temperature Range ±0.075 ± 10.0 µA
DAC OUTPUTS
Propagation Delay Settling Time Output Capacitance C
6
11,12
7
t t
PD S
OUT
150 180 ns
190 250 ns DAC Latches All “0s” 30 pF DAC Latches All “1s” 50 pF
AC Feedthrough FT (20 V
SWITCHING CHARACTERISTICS
Write to Data Strobe Time t Data Valid to Strobe Set-Up Time t Data Valid to Strobe Hold Time t
DAC Select to Strobe Set-Up Time t DAC Select to Strobe Hold Time t Write Select to Strobe Set-Up Time t Write Select to Strobe Hold Time t Read to Data Strobe Width t
Data Strobe to Output Valid Time t Output Data to Deselect Time t Read Select to Strobe Set-Up Time t
Read Select to Strobe Hold Time t
Specifications subject to change without notice.
6, 10
or TA = +25°C90 ns
DS1
t
DS2 DSU
DH AS AH WSU WH RDS
CO
OTD
RSU RH
TA = Full Temperature Range 145 ns TA = +25°C 150 ns T
TA = +25°C 220 ns T TA = +25°C 320 ns T TA = +25°C 200 ns T
@ F = 100 kHz) 54 dB
p-p
= Full Temperature Range 175 ns
A
10 ns 0ns 0ns 0ns 0ns
= Full Temperature Range 350 ns
A
= Full Temperature Range 430 ns
A
= Full Temperature Range 270 ns
A
0ns 0ns
–2–
REV. A
DAC8408
ELECTRICAL CHARACTERISTICS
@ VDD = +5 V; V
= 610 V; V
REF
A, B, C, D = 0 V; TA = –558C to +1258C apply for
OUT
DAC8408AT/BT, TA = –408C to +858C apply for DAC8408ET/FT/FP/FPC/FS; TA = 08C to +708C apply for DAC8408GP, unless otherwise noted. Specifications apply for DAC A, B, C, & D.
Continued
DAC8408
Parameter Symbol Conditions Min Typ Max Units
POWER SUPPLY
Voltage Range V Supply Current Supply Current
8 9
DD
I
DD
I
DD
TA = +25°C 1.0 mA
4.5 5.5 V 50 µA
TA = Full Temperature Range 1.5 mA
NOTES
1
This is an end-point linearity specification.
2
Guaranteed to be monotonic over the full operating temperature range.
3
ppm/°C of FSR (FSR = Full Scale Range = V
4
Input Resistance Temperature Coefficient = +300ppm/ °C.
5
Logic Inputs are MOS gates. Typical input current at +25 °C Is less than 10 nA.
6
Guaranteed by design.
-1 LSB.)
REF
7
From Digital Input to 90% of final analog output current.
8
All Digital Inputs “0” or VDD.
9
All Digital Inputs VIH or VIL.
10
See Timing Diagram.
11
Digital Inputs = 0 V to VDD or VDD to 0 V.
12
Extrapolated: tS (1/2 LSB) = tPD + 6.2τ where τ = the measured first time con-
stant of the final RC decay.
13
All Digital Inputs = 0 V; V
Specifications subject to change without notice.
= +10 V.
REF
PIN CONNECTIONS
DAC8408
TOP VIEW
(Not to Scale)

ABSOLUTE MAXIMUM RATINGS

(TA = +25°C, unless otherwise noted.)
VDD to I V
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V, +7 V
DD
I
OUT 1A
I
OUT 1C
R
A, RFBB, RFBC, RFBD to I
FB
I
, I
OUT 2A
I
OUT 2C
DB0 through DB7 to DGND . . . . . . . . –0.3 V to V
OUT 2A
, I
OUT 1B
, I
OUT 2B
, I
, I
OUT 2B
, I
OUT 2C
, I
OUT 2D
. . . . . . . . . .0 V, +7 V
,
to DGND . . . . . . . . . –0.3 V to VDD +0.3 V
OUT 1D
. . . . . . . . . . . . . . . . . ±25 V
OUT
,
to DGND . . . . . . . . . –0.3 V to VDD + 0.3 V
OUT 2D
+ 0.3 V
DD
Control Logic
Input Voltage to DGND . . . . . . . . . . –0.3 V + V
V
REF
I
OUT 2A
A, V
REF
, I
B, V
OUT 2B
REF
, I
C, V
OUT 2C
REF
, I
D to
OUT 2D
. . . . . . . . . . . . . . . . ±25 V
+ 0.3 V
DD
Operating Temperature Range
Commercial Grade (GP) . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial Grade (ET, FT, FP, FPC, FS) . –40°C to +85°C
Military Grade (AT, BT) . . . . . . . . . . . . . .–55°C to +125°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Package Type uJA* u
JC
Units
28-Pin Hermetic DIP (T) 55 10 °C/W 28-Pin Plastic DIP (P) 53 27 °C/W 28-Pin SOL (S) 68 23 °C/W 28-Contact PLCC (PC) 66 29 °C/W
*θJA is specified for worst case mounting conditions, i.e., θJA is specified for
device in socket for cerdip and P-DIP packages; θJA is specified for device soldered to printed circuit board for SOL and PLCC packages.
CAUTION
1. Do not apply voltages higher than V –0.3 V potential on any terminal except V
+0.3 V or less than
DD
and RFB.
REF
2. The digital control inputs are diode-protected; however, permanent damage may occur on unconnected inputs from high energy electrostatic fields. Keep in conductive foam at all times until ready to use.
3. Use proper antistatic handling procedures.
4. Absolute Maximum Ratings apply to both packaged devices and DICE. Stresses above those listed under Absolute Maxi­mum Ratings may cause permanent damage to the device.
REV. A
–3–
DAC8408

Burn-in Circuit

CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the DAC8408 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE

DICE CHARACTERISTICS

DIE SIZE 0.130 × 0.124 inch, 16,120 sq. mils
(3.30
×
3.15 mm, 10.4 sq. mm)
1. V
2. V
DD
A 16. DB7 (MSB)
REF
15. DB6
3. RFBA 17. A/B
4. I
OUT 1A
5. I
OUT 2A/IOUT 2B
6. I
OUT 1B
B 21. V
7. R
FB
8. V
B 22. RFBD
REF
9. DB0 (LSB) 23. I
10. DB1 24. I
11. DB2 25. I
18. R/W
19. DS1
20. DS2
REF
OUT 1D OUT 2C/IOUT 2D OUT 1C
D
12. DB3 26. RFBC
13. DB4 27. V
REF
C
14. DB5 28. DGND
–4–
REV. A
DAC8408

WAFER TEST LIMITS

at VDD = +5 V; V
= 610 V; V
REF
A, B, C, D = 0 V; TA = +258C, unless otherwise noted. Specifications apply for
OUT
DAC A, B, C, & D.
DAC8408G
Parameter Symbol Conditions Limits Units
STATIC ACCURACY
Resolution N 8 Bits min Nonlinearity
1
INL ±1/2 LSB max Differential Nonlinearity DNL ±1 LSB max Gain Error G Power Supply Rejection PSR Using Internal R
(V
= ±10%)
DD
I
OUT 1A, B, C, D
2
Leakage Current I
V
FSE
LKG
REF
= +10 V
Using Internal R
FB FB
±1 LSB max
0.001 %FSR/% max
All Digital Inputs = 0 V ±30 nA max
REFERENCE INPUT
Reference Input R
Resistance
3
Input Resistance Match R
IN
IN
6/14 k min/max ±1 % max
DIGITAL INPUTS
Digital Input Low V Digital Input High V Input Current
4
IL IH
I
IN
0.8 V max
2.4 V min ±1.0 µA max
DATA BUS OUTPUTS
Digital Output Low V Digital Output High V Output Leakage Current I
POWER SUPPLY
Supply Current Supply Current
NOTES
1
This is an endpoint linearity specification.
2
FSR is Full Scale Range = V
3
Input Resistance Temperature Coefficient approximately equals +300 ppm/ °C.
4
Logic inputs are MOS gates.Typical input current at +25°C is less than 10 nA.
5
All Digital Inputs are either “0” or VDD.
6
All Digital Inputs are either VIH or VIL.
5 6
–1 LSB.
REF
I
I
OL OH
LKG
DD DD
1.6 mA Sink 0.4 V max 400 µA Source 4 V min
±1.0 µA max
50 µA max
1.0 mA max
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. A
–5–
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