FEATURES
12-Bit Accuracy in an 8-Lead PDIP Package
Fast Serial Data Input
Double Data Buffers
±
1/2 LSB Max INL and DNL
Low
Max Gain Error: ±1 LSB
°
Low 5 ppm/
ESD Resistant
Low Cost
Available in Die Form
APPLICATIONS
Autocalibration Systems
Process Control and Industrial Automation
Programmable Amplifiers and Attenuators
Digitally Controlled Filters
GENERAL DESCRIPTION
The DAC8043 is a high accuracy 12-bit CMOS multiplying DAC
in a space-saving 8-lead PDIP package. Featuring serial data
input, double buffering, and excellent analog performance, the
DAC8043 is ideal for applications where PC board space is at a
premium. In addition, improved linearity and gain error performance permit reduced parts count through the elimination of
trimming components. Separate input clock and load DAC
control lines allow full user control of data loading and analog
output.
The circuit consists of a 12-bit serial-in, parallel-out shift register,
a 12-bit DAC register, a 12-bit CMOS DAC, and control logic.
Serial data is clocked into the input register on the rising edge of
the CLOCK pulse. When the new data word has been clocked
in, it is loaded into the DAC register with the LD input pin.
Data in the DAC register is converted to an output current by
the D/A converter.
The DAC8043’s fast interface timing may reduce timing design
considerations while minimizing microprocessor wait states. For
applications requiring an asynchronous CLEAR function or more
versatile microprocessor interface logic, refer to the PM-7543.
Operating from a single 5 V power supply, the DAC8043 is the
ideal low power, small size, high performance solution to many
application problems. It is available in a PDIP package that is
compatible with auto-insertion equipment.
C Max Tempco
FUNCTIONAL BLOCK DIAGRAM
PIN CONNECTIONS
8-Lead PDIP
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
under Absolute Maximum Ratings, unless otherwise noted.)
ParameterSymbolConditionsMinTypMaxUnit
STATIC ACCURACY
ResolutionN12Bits
Nonlinearity
Differential Nonlinearity
Gain Error
Gain Tempco
(∆ Gain/∆ Temp)
Power Supply
Rejection RatioPSRR∆V
(∆ Gain/∆ V
Output Leakage Current
Zero Scale Error
Input Resistance
AC PERFORMANCE
Output Current
Settling Time
Digital to AnalogI
Glitch Energy
Feedthrough ErrorV
(V
Total Harmonic Distortion
Output Noise Voltage Density
DIGITAL INPUTS
Digital Input
HIGHV
Digital Input
LOWV
Input Leakage Current
Input Capacitance
ANALOG OUTPUTS
Output Capacitance
REF
to I
3
1
OUT
DD
6, 7
8
4, 9
4, 10
)
)
4, 11
4, 11
INLDAC8043G±1/2LSB
2
DNLDAC8043F/G±1LSB
G
FSE
DAC8043F1LSB
TA = 25°C
DAC8043F/G2LSB
= Full Temperature Range
T
A
All Grades2LSB
4
5
TC
I
LKG
GFS
= ±5%±0.0006 ±0.002%/%
DD
TA = 25°C±5nA
= Full Temperature Range
T
A
DAC8043F/G±25nA
I
ZSE
TA = 25°C0.03LSB
= Full Temperature Range
T
A
DAC8043F/G0.15LSB
R
IN
t
S
QC
TA = 25°C0.251µs
= 0 V
V
REF
Load = 100 Ω
OUT
= 13 pF220nVs
EXT
DAC Register Loaded Alternately with
All 0s and All 1s
= 20 V p-p @ f = 10 kHz
REF
FTDigital Input = 0000 0000 00000.71mV p-p
T
= 25°C
4
13
4
4, 12
THDV
e
n
IN
IL
I
IL
C
IN
C
OUT
A
= 6 V rms @ 1 kHz–85dB
REF
DAC Register Loaded with All 1s
10 Hz to 100 kHz between RFB and I
VIN = 0 V to +5 V±1µA
VIN = 0 V8pF
Digital Inputs = V
Digital Inputs = V
= +10 V; I
REF
IH
IL
= GND = 0 V; TA = Full Temperature Range specified
OUT
DAC8043
±5ppm/°C
71115kΩ
OUT
2.4V
17nV/√Hz
0.8V
110pF
80pF
REV. D–2–
DAC8043
ELECTRICAL CHARACTERISTICS
(continued)
DAC8043
ParameterSymbolConditionsMinTypMaxUnit
TIMING CHARACTERISTICS
Data Setup Timet
Data Hold Timet
Clock Pulsewidth Hight
Clock Pulsewidth Lowt
Load Pulsewidtht
LSB Clock Into Input Register
to Load DAC Register Timet
POWER SUPPLY
Supply VoltageV
Supply CurrentI
NOTES
1 1
±1/2 LSB = ±0.012% of full scale.
1 2
All grades are monotonic to 12 bits over temperature.
1 3
Using internal feedback resistor.
1 4
Guaranteed by design and not tested.
1 5
Applies to I
1 6
V
= 10 V; all digital inputs = 0 V.
REF
1 7
Calculated from worst-case R
1 8
Absolute temperature coefficient is less than 300 ppm/°C.
1 9
I
load = 100 Ω, C
OUT
constant of the final RC decay.
10
V
= 0 V, all digital inputs = 0 V to VDD or VDD to 0 V.
REF
11
All digit inputs = 0 V.
12
Calculations from en = √4K TRB where: K = Boltzmann constant, J/°K, R = resistance, Ω, T = resistor temperature, °K, B = bandwidth, Hz.
13
Digital inputs are CMOS gates; IIN is typically 1 nA at 25°C.
14
Tested at VIN = 0 V or VDD.
Specifications subject to change without notice.
; all digital inputs = 0 V.
OUT
EXT
4, 14
DS
DH
CH
CL
LD
ASB
DD
DD
: I
(in LSBs) = (R
REF
ZSE
= 13 pF, digital input = 0 V to VDD or VDD to 0 V. Extrapolated to 1/2 LSB; tS = propagation delay (tPD) + 9τ where τ = measured time
TA = Full Temperature Range40ns
TA = Full Temperature Range80ns
TA = Full Temperature Range90ns
TA = Full Temperature Range120ns
TA = Full Temperature Range120ns
TA = Full Temperature Range0ns
4.7555.25V
Digital Inputs = VIH or V
Digital Inputs = 0 V or V
× I
REF
× 4096)/V
LKG
REF
IL
DD
.
500µA max
100µA max
WAFER TEST LIMITS
(@ VDD = 5 V, V
= 10 V; I
REF
= GND = 0 V, TA = 25ⴗC.)
OUT
DAC8043GBC
ParameterSymbolConditionsLimitUnit
STATIC ACCURACY
ResolutionN12Bits min
Integral NonlinearityINL±1LSB max
Differential NonlinearityDNL±1LSB max
Gain ErrorG
FSE
Power Supply Rejection RatioPSRR∆V
Output Leakage Current (I
)I
OUT
LKG
Using Internal Feedback Resistor±2LSB max
= ±5%±0.002%/% max
DD
Digital Inputs = V
IL
±5nA max
REFERENCE INPUT
Input ResistanceR
IN
7/15kΩ min/max
DIGITAL INPUTS
Digital Input HIGHV
Digital Input LOWV
Input Leakage CurrentI
IH
IL
IL
VIN = 0 V to V
DD
2.4V min
0.8V max
±1µA max
POWER SUPPLY
Supply CurrentI
NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
DD
Digital Inputs = VIN or V
Digital Inputs = 0 V or V
IL
DD
500µA max
100µA max
REV. D
–3–
DAC8043
ABSOLUTE MAXIMUM RATINGS
(TA = 25°C, unless otherwise noted.)
1
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +8 V
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300°C
Package Type
2
JA
JC
Unit
8-Lead PDIP9637°C/W
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
2
JA is specified for worst-case mounting conditions, i. e., JA is specified for device
in socket for PDIP package.
CAUTION
1. Do not apply voltages higher than VDD or less than GND
potential on any terminal except V
(Pin 1) and RFB (Pin 2).
REF
2. The digital control inputs are Zener-protected; however,
permanent damage may occur on unprotected units from
high energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.
3. Use proper antistatic handling procedures.
4. Absolute Maximum Ratings apply to both packaged devices
and DICE. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
ORDERING GUIDE*
ModelAccuracyRangeOption
RelativeTemperaturePackage
DAC8043FP ±1 LSB–40°C to +85°C 8-Lead PDIP
DAC8043GP ±1/2 LSB 0°C to +70°C8-Lead PDIP
*All commercial and industrial temperature range parts are available with burn-in.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
DAC8043 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
REV. D–4–
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