ANALOG DEVICES CMP04 Service Manual

Quad Low Power,

14

13

12

11

10

9

8

1

2

3

4

5

6

7

CMP04

1

4

3

2

OUT 2

OUT 3

OUT 1

V+

IN 1–

IN 1+

IN 2–

IN 2+

OUT 4

GND

IN 4+

IN 4–

IN 3+

IN 3–

a

FEATURES
High Gain: 200 V/mV Typ
Single- or Dual-Supply Operation
Input Voltage Range Includes Ground
Low Power Consumption (1.5 mW/Comparator)
Low Input Bias Current: 100 nA Max
Low Input Offset Current: 10 nA Max
Low Offset Voltage: 1 mV Max
Low Output Saturation Voltage: 250 mV @ 4 mA
Logic Output Compatible with TTL, DTL, ECL, MOS,

and CMOS

Directly Replaces LM139/LM239/LM339 Comparators

GENERAL DESCRIPTION

Four precision independent comparators comprise the CMP04.
Performance highlights include a very low offset voltage, low
output saturation voltage, and high gain in a single-supply
design. The input voltage range includes ground for single­supply operation and V– for split supplies. A low power
supply current of 2 mA, which is independent of supply voltage,
makes this the preferred comparator for precision applications
requiring minimal power consumption. Maximum logic inter­face flexibility is offered by the open-collector TTL output.

Precision Comparator

PIN CONNECTIONS

14-Lead SOIC

TYPICAL INTERFACE

3

1/4

CMP04

12

Figure 2a. Driving CMOS

100k⍀

5.0

CMP04

1/4
CD4011

5.0

3

1/4

12

10k⍀

Figure 2b. Driving TTL

1/4 SN7400

+INPUT

*

*SUBSTRATE DIODES

Q1

V+

100␮A 3.5␮A3.5␮A 100␮A

Q2

Q3

Q6Q5

Q4

Q7

Q8

*

OUTPUT

–INPUT

CMP04

Figure 1. Simplified Schematic (1/4 CMP04)

REV. D

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © 2003 Analog Devices, Inc. All rights reserved.

CMP04–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(@ V+ = 5 V, TA = 25ⴗC, unless otherwise noted.)

Parameter Symbol Conditions Min Typ Max Unit

Input Offset Voltage V
Input Offset Current I
Input Bias Current I
Voltage Gain A
Large Signal Response Time t

r

OS

B

OS

V

RS = 0 Ω, RL = 5.1 kΩ, VO = 1.4 V
IIN(+) – IIN(–), RL = 5.1 kΩ, VO = 1.4 V 2 10 nA
IIN(+) or IIN(–) 25 100 nA
RL ≥ 15 kΩ, V+ = 15 V
VIN = TTL Logic Swing, V

2

REF

1

= 1.4 V

0.4 1 mV

80 200 V/mV

3

VRL = 5 V, RL = 5.1 kΩ 300 ns

Small Signal Response Time t

r

VIN = 100 mV Step3, 5 mV Overdrive

VRL = 5 V, RL = 5.1 kΩ 1.3 µs
Input Voltage Range CMVR Note 4 0 V+ – 1.5 V
Common-Mode Rejection Ratio CMRR Notes 2, 5 80 100 dB
Power Supply Rejection Ratio PSRR V+ = 5 V to 18 V
Saturation Voltage V
Output Sink Current I
Output Leakage Current I

OL

SINK

LEAK

VIN(–) ≥ 1 V, VIN(+) = 0, I

VIN(–) ≥ 1 V, VIN(+) = 0, VO ≤ 1.5 V 6 16 mA

VIN(+) ≥ 1 V, VIN(–) = 0, VO = 30 V 0.1 100 nA

2

≤ 4 mA 250 400 mV

SINK

80 100 dB

Supply Current I+ RL = ∞, All Comps V+ = 30 V 0.8 2.0 mA

NOTES

1

At output switch point, VO = 1.4 V, RS = 0 Ω with V+ from 5 V, and over the full input common-mode range (0 V to V+ – 1.5 V).

2

Guaranteed by design.

3

Sample tested.

4

The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode voltage range
is V+ – 1.5 V, but either or both inputs can go to 30 V without damage.

5

RL ≥ 15 kΩ, V+ = 15 V, VCM = 1.5 V to 13.5 V.

Specifications subject to change without notice.

ABSOLUTE MAXIMUM RATINGS

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . +36 V or ± 18 V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . 36 V dc

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +36 V

Operating Temperature Range

CMP04FS . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C

Junction Temperature (T

) . . . . . . . . . . . . . –65°C to +150°C

J

Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C

Input Current (V

< –3.0 V) . . . . . . . . . . . . . . . . . . . 50 mA

IN

Output Short Circuit to GND . . . . . . . . . . . . . . . .Continuous

Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . 300°C

1

Package Type ␪

14-Lead SOIC 120 36 °C/W

NOTES

1

Absolute maximum ratings apply to both DICE and packaged parts, unless

otherwise noted. Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress rating only; functional
operation of the device at these or any other conditions above those listed in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.

2

θJA is specified for worst-case mounting conditions, i.e., θJA is specified for device

soldered to printed circuit board for SOIC package.

ORDERING GUIDE

TA = 25ⴗC Temperature Package Package

Model V

OS

Ranges Descriptions Options

CMP04FS 1 mV –40°C to +85°C 14-Lead SOIC R-14

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the CMP04 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

2

JA

WARNING!

ESD SENSITIVE DEVICE

␪

JC

Unit

–2–

REV. D

CMP04

ELECTRICAL CHARACTERISTICS

(@ V+ = 5 V, –40ⴗC ≤ TA ≤ +85ⴗC for CMP04FS, unless otherwise noted.)

CMP04F

1

Parameter Symbol Conditions Min Typ Max Unit

Input Offset Voltage V

Input Offset Current I

Input Bias Current I
Voltage Gain A
Large Signal Response Time t

Small Signal Response Time t

OS

OS

B

V

r

r

RS = 0 Ω, RL = 5.1 kΩ 12 mV

= 1.4 V

V

O

2

12 mV

IIN(+) – IIN(–) 4 20 nA

= 5.1 kΩ 420nA

R

L

= 1.4 V 4 20 nA

V

O

IIN(+) or IIN(–) 40 200 nA
RL ≥ 15 kΩ, V+ = 15 V
VIN = TTL Logic Swing 300 ns
V

= 1.4 V

REF

= 5 V, RL = 5.1 kΩ 300 ns

V

RL

4

VIN = 100 mV Step

3

70 125 V/mV

300 ns

4

1.3 µs

5 mV Overdrive 1.3 µs

= 5 V, RL = 5.1 kΩ 1.3 µs

V

RL

Input Voltage Range CMVR Note 5 0 V+ – 1.5 V
Common-Mode Rejection Ratio CMRR Notes 1, 3 60 100 dB
Power Supply Rejection Ratio PSRR V+ = 5 V to 18 V 80 100 dB
Saturation Voltage V

Output Sink Current I

Output Leakage Current I

OL

SINK

LEAK

Supply Current I+ R

VIN(–) ≥ 1 V, VIN(+) = 0, 250 700 mV
I

≤ 4 mA 250 700 mV

SINK

VIN(–) ≥ 1 V, 5 16 mA

(+) = 0, VO ≤ 1.5 V 5 16 mA

V

IN

VIN(+) ≥ 1 V, 0.1 200 nA

(–) = 0, VO = 30 V 0.1 200 nA

V

IN

= ∞, All Comps 1.2 3.0 mA

L

V+ = 30 V 1.2 3.0 mA

NOTES

1

RL ≥ 15 kΩ, V+ = 15 V, VCM = 1.5 V to 13.5 V.

2

At output switch point, VO = 1.4 V, RS = 0 Ω with V+ from 5 V; and over the full input common-mode range (0 V to V+ –1.5 V).

3

Guaranteed by design.

4

Sample tested.

5

The input common-mode voltage or input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common-mode
voltage range is V+ – 1.5 V, but either or both inputs can go to +30 V without damage.

Specifications subject to change without notice.

–18V

100k⍀

+18V

ONE EACH

PER BOARD

3.6k⍀

3.6k⍀

ZENER

5.8V TO 6.2V
1 WATT

TO ADJACENT SOCKETS

3.6k⍀

13 12 11

4

CMP04

3

2345617

3.6k⍀

470k⍀

30V

Figure 3. Burn-In Circuit

–18V

914 8

10

1

2

+18V

MIL-STD-883, METHOD 1015, CONDITION B

REV. D

–3–

CMP04–Typical Performance Characteristics

0.3

0.2

0.1

0

–0.1

– OFFSET VOLTAGE (mV)

OS

–0.2

V

–0.3

–60

–20 20 40 60 80 100 120 140

–40 0

TEMPERATURE (ⴗC)

TPC 1. Offset Voltage vs.
Temperature

160

150

140

130

120

110

100

90

– VOLTAGE GAIN (V/mV)

V

80

A

70

60

–60

–20 20 40 60 80 100 120 140

–40 0

TEMPERATURE (ⴗC)

80

60

TA = 0ⴗC

40

TA = +25ⴗ C/70ⴗC

20

– INPUT BIAS CURRENT (nA)

B

I

0

10 20 25 30 35 400

515

V+ – SUPPLY VOLTAGE (VDC)

TPC 2. Input Bias Current vs. V+
and Temperature

1.1

= 0ⴗC

T

0.9

0.7

0.5

SUPPLY CURRENT (mA)

0.3

0.1

A

= +25ⴗ C

T

A

10 20 25 30 35 400

515

SUPPLY VOLTAGE (VDC)

T

A

= +70ⴗ C

3.0

2.0

1.0

0

–1.0

– INPUT OFFSET CURRENT (nA)

–2.0

OS

I

–3.0

–60

–20 20 40 60 80 100 120 140

–40 0

TEMPERATURE (ⴗC)

TPC 3. Input Offset Current vs.
Temperature

10

)

DC

1.0

0.1

0.01

– SATURATION VOLTAGE (V

OL

V

0.001

OUT OF SATURATION

= +25ⴗ C

T

0.1 1.0 10 1000.01

IO – OUTPUT SINK CURRENT (mA)

A

TPC 4. Voltage Gain vs.
Temperature

6.0

5.0

4.0
20mV

(V)

3.0

O

V

2.0

100mV

OUTPUT VOLTAGE

1.0

0

0

–50

(mV)

IN

V

–100

INPUT VOLTAGE

0.5 1.0 1.5 2.00

TPC 7. Response Time for Various Input
Overdrives—Negative Transition

INPUT OVERDRIVE =

5.0mV

TIME (␮s)

V

IN

5V

DC

TA = 25ⴗ C

TPC 5. Supply Current vs. Supply
Voltage

(V)

3.0

5.1k⍀

V

OUT

O

V

2.0

OUTPUT VOLTAGE

1.0

–50

(mV)

IN

V

–100

INPUT VOLTAGE

TPC 8. Response Time for Various Input
Overdrives—Positive Transition

6.0
INPUT OVERDRIVE =
100mV

5.0

4.0

0

0

TPC 6. Output Voltage vs. Output
Current and Temperature

TA = 25ⴗ C

20mV

5mV

5V

DC

5.1k⍀

V

OUT

0.5 1.0 1.5 2.00

V

IN

TIME (␮s)

–4–

REV. D

TYPICAL APPLICATIONS

CMP04

V+

6.2k⍀

1/4

CMP04

OR LOGIC WITHOUT

*

PULLUP RESISTOR

Figure 4. Output Strobing

2R

+V

HIGH

REF

+V

+V

LOW

REF

S

R

S

IN

2R

S

Figure 5. Limit Comparator

*

CMP04

CMP04

1/4

1/4

V

O

STROBE
INPUT

V+

+VIN

V+

1M⍀

1M⍀

1/4

CMP04

1M⍀

3k⍀

V

O

Figure 7. Inverting Comparator with Hysteresis

V+

4.3k⍀

V+

0

f = 186kHz

V

O

V+

100k⍀

75pF

100k⍀

100k⍀

1/4

CMP04

100k⍀

Figure 8. Square Wave Oscillator

V+

+V

REF

+VIN

10k⍀

1/4

CMP04

10M⍀

3k⍀

V

O

Figure 6. Noninverting Comparator with Hysteresis

100k⍀

V

IN1

100k⍀

V

IN2

1N914

1/4

CMP04

V+

5.1k⍀

V

O

Figure 9. Comparing Input Voltages of Opposite Polarity

REV. D

–5–

CMP04

V+

0

t

0

100pF

+VIN

1N914

1M⍀

1M⍀

1M⍀

V+

1/4

CMP04

1N914

0.01␮F

10k⍀

1ms

V+

D1

R1

1N914

1M⍀

R2

1N914

80pF

1M⍀

1M⍀

100k⍀

CMP04

1/4

1M⍀

PW

t0t

V

O

V+

0

1

V+

15k⍀

D2

t0t1t

FOR LARGE RATIOS OF R1/R2,
D1 CAN BE OMITTED.

V+

0

2

V+

0

Figure 10. One-Shot Multivibrator

V+

39k⍀

01

100k⍀

A

100k⍀

B

100k⍀

C

1k⍀

0.375V

1k⍀

Figure 11. AND Gate

1S

4V

0

+VIN

100k⍀

1/4

CMP04

100k⍀

1 = A • B • C

1M⍀

1M⍀

3k⍀

1/4

CMP04

f

V+

62k⍀

10M⍀

100pF

V+

0

560k⍀

240k⍀

01

1/4

CMP04

Figure 12. Pulse Generator

V+

200k⍀

100k⍀

A

100k⍀

B

100k⍀

C

1k⍀

0.075V

1k⍀

Figure 13. OR Gate

15k⍀

10M⍀

V

T

O

t0t

T = 0.3ms

1

1/4

CMP04

V+

0

3k⍀

f

1 = A + B + C

Figure 14. One-Shot Multivibrator with Input Lockout

–6–

REV. D

CMP04

V+

V+

V3

V2

V

C1

V1

0

t

0

V+

0

INPUT GATING SIGNAL

t1t2t

t

0

V+

V+

3.0k⍀

3.0k⍀

3.0k⍀

V+

0

t

t

0

t0t

t0t

3

2

1

V

O3

V+

0

V

O2

V+

0

V

O1

10k⍀

t

4

3

10k⍀

+VIN

t

4

1/4

CMP04

15k⍀

C1

0.001␮F

200k⍀

10k⍀

V3

51k⍀

10k⍀

V2

51k⍀

10k⍀

V1

51k⍀

10M⍀

1/4

CMP04

10M⍀

1/4

CMP04

10M⍀

1/4

CMP04

Figure 15. Time Delay Generator

REV. D

–7–

CMP04

OUTLINE DIMENSIONS

14-Lead Standard Small Outline Package [SOIC]

Narrow Body

(R-14)

Dimensions shown in millimeters and (inches)

8.75 (0.3445)

8.55 (0.3366)

4.00 (0.1575)

3.80 (0.1496)

0.25 (0.0098)

0.10 (0.0039)

COPLANARITY

CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN

14

1

1.27 (0.0500)
BSC

0.51 (0.0201)

0.10

0.33 (0.0130)

COMPLIANT TO JEDEC STANDARDS MS-012AB

8

6.20 (0.2441)

7

5.80 (0.2283)

SEATING
PLANE

1.75 (0.0689)

1.35 (0.0531)

0.25 (0.0098)

0.19 (0.0075)

0.50 (0.0197)

0.25 (0.0098)

8ⴗ
0ⴗ

1.27 (0.0500)

0.40 (0.0157)

–3/03(D)

C00266–0

ⴛ 45ⴗ

Revision History

Location Page

3/03—Data Sheet changed from REV. C to REV. D.

Renumbered TPCs and Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Global

Deletion of 14-Lead CERDIP and 14-Lead PDIP information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global

Changes to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Changes to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Changes to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

Removal of DICE CHARACTERISTICS, WAFER TEST LIMITS, and TYPICAL ELECTRICAL

CHARACTERISTICS sections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Changes to TPCs 2, 5, and 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

–8–

REV. D