ANALOG DEVICES AN-911 Service Manual

AN-911

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APPLICATION NOTE

A Detailed Guide to Powering the TigerSHARC Processors

by Mark Malaeb

INTRODUCTION

As technology constantly evolves and silicon geometry shrinks,
different supply requirements for powering these processors
emerge. Typically the core is powered with a lower voltage than
the I/Os. The I/Os are generally at a higher voltage to maintain
a compatible interface with other system devices. Also, as clock
speeds of 600 MHz are reached, these processors become more
power hungry. Thus, an efficient power management scheme
becomes critical.

This application note, in conjunction with the technical note
EE-170, (available from Analog Devices, Inc.), provides a guide

that can be used as a reference design for powering those
processors. EE-170 provides the detailed equations and
derivations for the power needs of the processors. This
application note discusses the voltage regulators/switchers
that are suitable for those processors running at 600 MHz.

The Tiger SHARC® processor requires three different supply
voltages, the core voltage of 1.2 V, the internal DRAM voltage
at 1.6 V, and the I/O voltage of 2.5 V. These three voltages are
discussed in details in the following sections.

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AN-911

TABLE OF CONTENTS

Introduction ...................................................................................... 1

Core Voltage (VDD = 1.2 V) ............................................................. 3

Component Value Derivations and ADP1821 Analysis .......... 3

Internal DRAM Voltage (V

Component Value Derivations and the ADP2105 Analysis ... 8

= 1.6 V) ................................. 7

DD_DRAM

I/O Voltage (V

The External Port Current ...........................................................9

The Link Port Current ..................................................................9

Component Value Derivations ....................................................9

Bill of Materials ............................................................................... 10

= 2.5 V) ............................................................9

DD_I/O

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AN-911

CORE VOLTAGE (VDD = 1.2 V)

The current requirement (IDD), on this voltage, consists of three
components: dynamic current, static current, and analog current.
These currents are defined in Equation 1.

I

DD

= I

DD_DYNAMIC

+ I

DD_STATIC

+ I

DD_ANALOG

(1)

where:

I

is the static portion of the current that is operating-

DD_STATIC

temperature dependent.

I

DD_ANALOG

is the current needed to power the on-board PLL and

its circuitry.

I

DD_DYNAMIC

I

DD_IDLE

= I

DD_CLU

+ I

DD_FFT

+ I

DD_COMPUTE

+ I

DD_CTRL

+ I

DD_DMA

+

(2)

where:

I

is the communications logic unit current.

DD_CLU

I

is the current consumption related to high activity

DD_FFT

floating-point operations.

I

DD_COMPUTE

is the current consumed by the activity operations of

the computational units.

I

is the current consumption due to continuous decision-

DD_CTRL

making sequence of instructions and predicted branches.

I

is the current consumed by a single DMA channel

DD_DMA

moving data from external to internal memory.

I

is the current consumption due to idle instructions with

DD_IDLE

no DMA or interrupts.

Using Equation 1 and assuming the worst-case maximum
dynamic current consumption; I

DD_DYNAMIC

The static current consumption at 55
characteristic curve, is I

DD_STATIC

= 0.32 A.

The maximum analog current consumption is I

= 4.99 A.

o

C, from the static current

DD_ANALOG

= 0.055 A.

Summing up all these currents using Equation 1 results in

I

= 4.99 A+ 0.32 A+ 0.055 A = 5.365 A (3)

DD

This is the total current needed at 1.2 V for each individual
Tiger SHARC processor. So a switching regulator, capable of
supplying 6 A at 1.2 V does the job. However, since the majority
of Tig erSHARC applications implement two Tige rSHARC proces­sors, a circuit to power such applications, using the ADP1821, is
discussed. This means that the current requirements doubled to
12 A at 1.2 V. The circuit is shown in Figure 1. This circuit has
been implemented and prototypes built and tested. This circuit
is usable with single Tige rSHARC processor applications as well.

COMPONENT VALUE DERIVATIONS AND ADP1821 ANALYSIS

The ADP1821 is a versatile, synchronous, step-down PWM
controller and is designed to drive all N-type channel power
FETs. Its output can be set as low as 0.6 V. It can also supply
currents as high as 20 A with the appropriate FET. The IC
input voltage range is from 3 V to 5.5 V and the power stage
voltage range is from 1 V to 24 V. The IC supply range can be
extended to 20 V with a simple Zener network to power the
device (as shown in Figure 2). This device can be synchronized
at any frequency between 300 kHz and 1.2 MHz by the external
frequency or by working at 300 kHz or 600 kHz by setting the
FREQ pin to either low or high, respectively. The high frequency
operation allows for smaller magnetic components. For this
application, the 600 kHz switching frequency is selected. The
soft start function allows quick startup while limiting the
inrush current. Soft start time can be adjusted by selecting the
appropriate C
(depending on input/output voltages). The component values
for this design were derived using Analog Devices power
spreadsheets (contact your local Analog Devices sales
representative to access the spreadsheets). The spreadsheet
employs more accurate equations that produce better results.
However, the data sheet equations put the user within the range
of results and provide a better understanding of the results.

capacitor. Its efficiency can be as high as 96%

SS

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AN-911

V

V

IN

1

2

3

4

5

6

7

8

U1

BST

DH

SW

SYNC

FREQ

SHDN

PWGD

GND

D1 BAT54

2

3

DH

SW

POK 1.2V

10kΩ

R3

0Ω

C5

R2

0.1µF

ADP1821

IN

GND

J1

4

V

IN

3

2

1

++

E4

330µF

J2

330µF

4

3

2

1

C1

E1

1µF

DH

SW

M2 IRF7834

4

DL

G

3

S

2

S

1

S

1

PVCC

DL

PGND

CSL

VCC

COMP

FB

SS

M1 IRF7821

4

G

3

S

2

S

1

S

D

D

D

D

16

15

14

13

12

11

10

C4
1µF

9

R1
10Ω

C6
1µF

R4

DL

0Ω

R5

SW

2.2kΩ

C7

2.2pF

VO 1.2V

C8
22nF

C10
39pF

5

D

6

D

7

D

8

D

L1

0.7µH

5

6

7

8

++

E2

470µF

470µF

R8

33kΩ

E3

C9

3.3nF

10µF

R6

2kΩ

R7

10kΩ,

1%

R9

10kΩ,

1%

V

O

C2

C3

10µF

1.2V

C11

2.2nF

1

2

3

4

J3

1

2

3

4

V

1.2V

O

J4

GND

VIN = 5V
V

= 1.2V AT IO = 12A

O

06716-001

Figure 1. Core Supply Voltage Circuit

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