Parts List ............................................................................ 5
OVERVIEW
The ADuC 7024 evaluation board ha s the following
features:
•
2-layer PCB (4” 5” form factor)
• 9 V power supply regulated to 3.3 V on board
• 4-pin UART header to connect to RS232 interface
cable
• 20-pin standard JTAG connector to connect to ULINK
emulator
• Demonstration circuit
• 32.768 kHz watch crystal to drive the PLL clock
• ADR291 2.5 V external reference chip
• Reset/ Download / IRQ0 push - buttons
• Power indicator/general - purpose LEDs
• Access to all ADC inputs and DAC outputs from
external header. All device ports are brought out to
external header pins.
• Surface - mount and through-hole general-purpose
prototype area
Notes
1. This document refers to the MicroConverter ADuC7024
Evaluation Board Rev. A.
2. All references in this document to physical orientation
of components on the board are made with respect to a
component side view of the board, with the prototype
area appearing in the bottom of the board.
3. The board is laid out to minimize coupling between
the analog and digital sections of the board. The ground
plane is split with the analog section on the left-hand
side and a digital plane on the right-hand side of the
board. The regulated 3.3 V power supply is routed
directly to the digital section, and is ltered before being
routed into the analog section of the board.
REV. 0
FEATURES
Power Supply
The user should connect the 9 V power supply via the
2.1 mm input power socket (J5). The input connector is
congured as CENTER NEGATIVE, i.e., GND on the center pin and 9 V on the outer shield.
This 9 V supply is regulated via a linear voltage regulator (U5). The 3.3 V regulator output is used to drive
the digital side of the board directly. The 3.3 V supply
is also ltered, and is then used to supply the analog
side of the board.
When on, the red LED (D3) indicates that a valid 3.3 V
supply is being driven from the regulator circuit. All
active components are decoupled with 0.1 F at device
supply pins to ground.
RS232 Interface
The ADuC7024 (U1) P1.1 and P1.0 lines are connected
to the RS232 interface cable via connector (J1). The
interface cable generates the required level shifting to
allow direct connection to a PC serial port. Ensure that
the cable supplied is connected to the board correctly,
i.e., DVDD is connected to DVDD and DGND is connected
to DGND.
Emulation Interface
Nonintrusive emulation and download are possible on
the ADuC7024 via JTAG by connecting the ULINK emulator to the J4 connector.
Crystal Circuit
The board is tted with a 32.768 kHz crystal from which
the on- chip PLL circuit can generate a 45 MHz clock.
External Reference (ADR291)
The external 2.5 V reference chip (U2) has two functions.
It is provided on the evaluation board to demonstrate the
external reference option of the ADuC7024, but its main
purpose is to generate the V
tial amplier, if required.
Reset/Download/IRQ0 Push-Buttons
A RESET push-button is provided to allow the user to
manually reset the part. When inserted, the RESET pin of
the ADuC7024 is pulled to DGND. Because the RESET pin
on the ADuC7024 is Schmitt-triggered internally, there is
no need to use an external Schmitt trigger on this pin.
voltage of the differen -
OCM
AN-719
–3–
AN-719
S3
(RESET = 1)
(A) S3 AND S2 RELEASED
S2
(BM = 1)
S3
(RESET = 1)
(B) PUSH S2
S2
(BM = 0)
S3
(RESET = 0)
(C) PUSH S3
S2
(BM = 0)
S3
(RESET = 1)
(D) RELEASE S3
S2
(BM = 0)
S3
(RESET = 1)
(E) RELEASE S2
S2
(BM = 1)
REV. 0
When inserted, the IRQ0 push - button switch drives
P0.4/IRQ0 high. This can be used to initiate an external
interrupt 0.
To enter serial download mode, the user must pull the
P0.0/BM pin low while reset is toggled. On the evaluation board, serial download mode can be easily initiated
by holding down the serial download push-button (S2)
while inserting and releasing the reset button (S3), as
illustrated in Figure 1.
Power Indicator/General-Purpose LEDs
A red power LED (D3) is used to indicate that a sufcient
supply is available on the board. A general-purpose LED
(D2) is connected directly to P4.2 of the ADuC7024. When
P4.2 is cleared, the LED is turned on; when P4.2 is set,
the LED is turned off.
Analog I/O Connections
All analog I/O connections are brought out on header J3.
ADC0 and ADC1 are buffered using an AD8606 to
evaluate single - ended and pseudo differential mode.
A potentiometer can be connected to ADC0 buffered.
ADC3 and ADC4 can be buf fered with a single -ended to-differential op amp on board, with the AD8132 used
to evaluate the ADC in fully differential mode.
ADC2 and ADC5 to ADC9 are not buffered. Be sure to follow the data sheet recommendations when connecting
signals to these inputs.
DAC1 can be used to control the brightness of the green
LED, D1, when connected via the S1 switch.
General-Purpose Prototype Area
A general - purpose prototype area is provided at the
bottom of the evaluation board for adding external
components as required in the user’s application. As can
be seen from the layout, AVDD, AGND, V
, and DGND
DDIO
tracks are provided in this prototype area.
DIP SWITCH LINK OPTIONS
S1-1 V
REF
Function: Connects the output of the 2.5 V external
reference (ADR291) to the V
pin (Pin 55)
REF
of the ADuC7024.
Use: Slide S1-1 to the ON position to connect the
external reference to the ADuC7024.
Slide S1-1 to the OFF position to use the in-
ternal 2.5 V reference or a different external
reference on the V
S1-2 V
OCM
Function: Connects 1.67 V to the V
pin of the J3 header.
REF
pin of the
OC M
AD8132. No extra dc voltage is required
on the board to use the ADC in differential
mode.
Use: Slide S1-2 to the ON position to connect
V
of the differential amplier to the 1.67 V,
OCM
divided output of the ADR291 reference.
Slide S1-2 to the OFF position to use a dif-
ferent voltage for V
voltage to the V
Note that the V
OCM
by connecting a dc
OCM
pin of the J3 header.
OCM
value is dependent on
the reference value, as shown in Table I.
V
V
REF
Table I. V
min V
OCM
OCM
Range
OCM
max
2.5 V 1.25 V 2.05 V
2.048 V 1.024 V 2.276 V
1.25 V 0.75 V 2.55 V
Figure 1. Entering Serial Download Mode on the Evaluation Board
–2–
REV. 0
AN-719
V
REF
S1-3 POT
Function: Connects the potentiometer output to ADC0.
This input is buffered by an AD8606. This is
for demonstration purposes.
Use: Slide S1-3 to the ON position to connect
the potentiometer to the op amp of the ADC0
input channel.
Slide S1-3 to the OFF position to use the
ADC0 input on the J3 header.
S1- 4 ADC3
Function: Brings out ADC3 (Pin 64) on J3 header.
Use: Slide S1-6 to the ON position to directly
connect ADC3 of the J3 header to the ADC3
pin (Pin 64) of the ADuC7024.
Slide S1-6 to the OFF position to discon-
nect ADC3 of the J3 header from the ADC3
pin (Pin 64) of the ADuC7024.
S1-5 VIN–
Function: Connec ts –OUT of the single -ended -to -
differential op amp (AD 8132) to ADC3.
S1-5 and S1- 6 must be used together, when
VIN– is in the ON position; VIN + must also
be in the ON position to use the differential
op amp on channels ADC3 and ADC4.
Use:Slide S1-5 to the ON position to connect
–OUT of the AD8132 to ADC3.
Slide S1-5 to the OFF position to use ADC3
without the AD8132.
S1-6 VIN+
Function: Connects +OUT of the single - ended to dif -
ferential op amp (AD8132) to ADC4. When
VIN+ is in the ON position, VIN– must also
be in the ON position to use the differential
op amp on channels ADC3 and ADC4.
Use:Slide S1-6 to the ON position to connect
+OUT of AD8132 to ADC4.
Slide S1-6 to the OFF position to use ADC4
without the AD8132.
S1-7 ADC4
Use: Slide S1-6 to the ON position to connect
directly ADC4 of the J3 header to the ADC4
pin (Pin 1) of the ADuC7024.
Slide S1-6 to the OFF position to discon-
nect ADC4 of the J3 header from the ADC4
pin (Pin 1) of the ADuC7024.
S1-8 LED
Function: Connects the DAC1 output to the green LED
of the demo circuit, D1.
Use:Slide S1-7 to the ON position to connect
the DAC1 output to D1.
Slide S1-7 to the OFF position to use the
DAC1 output on the J3 header.
EXTERNAL CONNECTORS
J3 Analog I/O Connector
The analog I/O connector J3 provides external con nec tions for all ADC inputs, reference inp uts, and
DAC outputs. The pinout of the connector is shown
in Table II.
Table II. Pin Functions for Analog I/O Connector J3