Analog Devices AN-677 Application Notes

AN-677

*

USER DEFINED VALUE

R5

*

R8

*

IN+

R4

*

R3

*

R1

*

IN–

R2

*

DIS

1

RB2

3

4

+VS

8

VOUT 7

CC

6

–VS

5

+

–

DIS

CF

C3

RF

*

*

*

R7*

R6

*

C1

10F

+

C5

10F

+

OUT

–VS

+VS

*

C2

*

C4

TPI

*

C6

GND1 GND2 GND3 GND4

APPLICATION NOTE

One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel: [phone] • Fax: [phone] • www.analog.com

Universal Evaluation Board for High Speed Op Amps in CSP Packages

By John Ardizzoni

Analog Devices’ high speed universal evaluation board
(EVAL-ADOPAMP-1CP) is designed to help customers
quickly prototype new op amp circuits and reduce design
time. The evaluation board can be used with almost any
Analog Devices’ op amp in various congurations and
applications. Figure 1 shows the universal evaluation
board schematic.

The evaluation board is a 2- layer PCB that accepts SMA
connectors on the input and output for efcient connec­tion to test equipment. The evaluation board can also
accommodate an SMA connector for the disable pin.

The ground plane, component placement, and supply
bypassing have been laid out to minimize parasitic
inductances and capacitances. The evaluation board’s
components are primarily SMT 0805 case size, with the
exception of the electrolytic bypass capacitors (C1, C5),
which are 3528 case size. The board can also be used

with op amps that use external frequency compensation
capacitors.

There are two options for supply bypassing. The rst
is connecting additional shunt capacitors (C2, C6) in
parallel with the electrolytic capacitors (C1, C5) from
each supply to ground. This technique of power supply
bypassing provides wideband rejection of unwanted
noise on the supply lines.

The second approach connects one capacitor between
the supply rails. This method uses fewer components
and can improve the PSRR at higher frequencies. It
is implemented by inserting the bypass capacitor in the
C4 position.

Figure 2 shows the evaluation board assembly drawings.
The recommended layout patterns for making connec ­tions to the op amp and supporting circuitry is shown
in Figure 3.

REV. 0

Figure 1. Universal Evaluation Board Schematic

AN-677

COM PONEN T SID E CIR CUIT SIDE

*SMA EDGE CONNECTOR JOHNSON COMPONENTS, INC. P/N 142-0701-831

*

*

*

*















C OM PO N EN T S ID E C IR CU I T SI D E

E04396–0–8/03(0)

Figure 2. Board Assembly Drawings

© 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies.

Figure 3. Board Layout Patterns

–2–

REV. 0