Analog Devices AN591 Application Notes

AN-591

a

APPLICATION NOTE

One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • Tel: [phone] • Fax: [phone] • www.analog.com

ADM1070 Hot Swap Controller

by Alan Moloney

The ADM1070 is a negative voltage (–48 V) hot swap
controller. The device provides robust current limiting,
protects against transient and nontransient short circuits,
and offers single-pin undervoltage and overvoltage
protection. The ADM1070 has many applications, such
as central office switching, –48 V distributed systems,
and negative power supply control. This application
note describes the operation of the ADM1070 under
various hot swap insertion and removal conditions. This
document should be consulted in conjunction with the
ADM1070 data sheet and evaluation board documenta­tion. All of the tests described in this document can be
recreated with the ADM1070 evaluation board.

LONG

CONNECTOR

R

0V

LIVE

BACKPLANE

–48V

*OPTIONAL TIMER CAPACITOR

SHORT

CONNECTOR

R2

R1

LONG

CONNECTOR

*

ADM1070

UV/OV

TIMER

DROP

C

16k⍀

V

IN

GATE

SENSE

V

LOAD

EE

Q1

R

SENSE

V

OUT

Figure 1. Circuit Diagram (ADM1070 Residing on a
Plug-In Module)

The ADM1070 is designed to reside on a plug-in board
or a live backplane and uses a FET in the power path to
control the load current. It requires a few other external
components to operate, such as a shunt resistor, two
divider resistors, and a SENSE resistor. A 16 kΩ shunt
resistor is required between the 0 V line and the V

IN

pin

to power the part.

Resistors R1 and R2 form a resistor divider that scales
down the supply voltage to a range that the device can
measure. The divider output is used for undervoltage/
overvoltage detection at the UV/OV pin. By choosing the
values of R1 and R2 carefully, the part can be
programmed to apply the supply voltage to the load
only when the supply is in the desired range. The default
evaluation board resistor values give an operating
range of around –36 V to –77 V. Please refer to Table IV
of the ADM1070 data sheet for a full description of how
the operating voltage window can be programmed.

The SENSE resistor, R

, is used for current limiting.

SENSE

The ADM1070 continually senses the voltage across
R

and can detect whether the load current is above

SENSE

the maximum permitted load current value. If it is, the
ADM1070 reduces the voltage on the GATE of the FET to
reduce the load current to an acceptable level. The load
current limit is set by the choice of R

. Table I of the

SENSE

ADM1070 data sheet shows the value of the load current
permitted to flow during inrush and quiescent condi­tions for the different choices of R

SENSE

.

REV. A

© Analog Devices, Inc., 2002

AN-591

Powering Up

The timing waveforms associated with the live insertion
of a plug-in board using the ADM1070 are shown below.
In a system that has been mechanically designed such
that the power rails connect first, the GND–V
climbs to 48 V. As this voltage is applied, the voltage
at the V
(V

LKO

pin ramps above the undervoltage lockout

IN

) of 8.5 V (internal to device) to a constant 12.3 V
and is held at this level by the internal Zener diode.
Because of the staggered configuration of the connection
pins, the R1/R2 resistor divider is the last to connect to
the backplane.

potential

EE

GATE

SENSE

V

UV/OV

T

T

CH210.00VCH1

1.00VCH3

100mV M 200␮s CH3 1.96V

SENSE

GATE

V

OUT

10.00VCH3

T

T

CH25.00VCH1

100mV M 500␮s CH1 2.8V

Figure 2. Timing Waveforms Associated with a
Power-Up Sequence

When the voltage at UV/OV crosses the undervoltage
rising threshold of 0.91 V, it is now inside the operating
voltage window and the –48 V supply must be applied to
the load. After a time delay, t

, the ADM1070 begins to

POR

ramp up the GATE drive. Initially, the load capacitance
may attempt to draw a large current. When the voltage
on the SENSE pin reaches 100 mV (the analog current
limit), the GATE drive is held constant. When the board's
capacitance is fully charged, the SENSE voltage begins
to drop below the analog current limit voltage and the
GATE voltage is free to ramp up further. The GATE volt­age eventually reaches its maximum value of 12.3 V (as
set by V

).

IN

Note: Long/short connector configuration is not a
requirement.

Overvoltage Condition

The waveforms for an overvoltage glitch are shown in
Figure 3. When UV/OV rises above the overvoltage
rising threshold of 1.97 V, an overvoltage condition is
detected and the GATE voltage is pulled low. UV/OV
begins to drop back toward the operating voltage
window and the GATE drive is restored when the over­voltage falling threshold of 1.93 V is reached.

Figure 3. Timing Waveforms Associated with an
Overvoltage Glitch

Undervoltage Condition

An undervoltage glitch is dealt with in a similar way.
When

UV/OV falls below the undervoltage falling
threshold of 0.86 V, the GATE voltage is pulled low.
If UV/OV subsequently rises back above the undervoltage
rising threshold of 0.91 V, the GATE voltage is restored.
Figure 4 illustrates the ADM1070's operation in an
undervoltage situation.

GATE

SENSE

V

UV/OV

CH210.0VCH1

1.00VCH3

100mV M 200ms

Figure 4. Timing Waveforms Associated with an
Undervoltage Glitch

Current Fault Plots

Some timing waveforms associated with over current
faults are shown below. Figure 5 shows how a current
glitch (of approximately 500 µs) is dealt with when the
output is shorted after power-up. The GATE voltage is at
a constant 12.3 V before the glitch occurs. When the
SENSE voltage reaches 100 mV (V

), the ADM1070

ACL

reduces the GATE voltage to stop the load current from
increasing any further. When V
V

, the GATE voltage is increased again.

ACL

drops back below

SENSE

–2–

REV. A