Analog Devices AN581 Application Notes

AN-581

0.1F

1F

V

S

R2

R1

C1

*STAR GROUND

C

OUT

V

OUT

R

LOAD

VS/2

V

S

/2

R

A

100k

R

B

100k

*

*

V

S

C

IN

V

IN

π ( )

BW1

=

1

2

π 1/2R

ACIN

BW2 =

1

2

π R1 C1

BW3 =

1

2

π R

LOAD COUT

FOR RA = R

B

FOR AC SIGNALS, V

OUT

= VIN (1 + (R2/R1))

WHERE X

C1

<<

R1

*

*

a

APPLICATION NOTE

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Biasing and Decoupling Op Amps

in Single Supply Applications

by Charles Kitchin

SINGLE OR DUAL SUPPLY?

Battery-powered op amp applications such as those
found in automotive and marine equipment have only a
single available power source. Other applications, such
as computers, may operate from the ac power lines but
still have only a single polarity power source, such as
5 V or 12 V dc. Therefore, it is often a practical necessity
to power op amp circuits from a single polarity supply.
But single supply operation does have its drawbacks: it
requires additional passive components in each stage
and, if not properly executed, can lead to serious insta­bility problems.

Since a one volt change on the supply line causes a
one-half volt change at the output of the divider, the
circuit’s PSR is only 6 dB. So, the normally high power
supply rejection provided by any modern op amp,
which greatly reduces any ac signals (and power sup­ply hum) from feeding into the op amp via its supply
line, is now gone.

COMMON PROBLEMS WITH RESISTOR BIASING

Single supply applications have inherent problems that
are not usually found in dual supply op amp circuits. The
fundamental problem is that an op amp is a dual supply
device and so some type of biasing, using external com­ponents, must be used to center the op amp’s output
voltage at midsupply. This allows the maximum input
and output voltage swing for a given supply voltage.

In some low gain applications, where input signals are
very small, the op amp’s output can be lifted above
ground by only 2 V or 3 V. But in most cases, all clipping
needs to be avoided and so the output needs to be cen­tered around midsupply.

The circuit of Figure 1 shows a simple single supply
biasing method. This noninverting, ac-coupled, ampli­fier circuit uses a resistor divider with two biasing
resistors, R
ing equal to V
capacitively coupled to the noninverting input terminal.

and RB, to set the voltage on the noninvert-

A

S

/2. As shown, the input signal, VIN, is

This simple circuit has some serious limitations. One is
that the op amp’s power supply rejection is almost entirely
gone, as any change in supply voltage will directly
change the V
Power Supply Rejection (PSR) is a very important (and
frequently overlooked) op amp characteristic.

REV. 0

/2 biasing voltage set by the resistor divider.

S

Figure 1. A Potentially Unstable Single Supply Op
Amp Circuit

© Analog Devices, Inc., 2002

AN-581

π

π

π

π

Even worse, instability often occurs in circuits where the
op amp must supply large output currents into a load.
Unless the power supply is well regulated (and well
bypassed), large signal voltages will appear on the sup­ply line. With the op amp’s noninverting input
referenced directly off the supply line, these signals
will be fed directly back into the op amp often initiating
“motor boating” or other forms of instability.

While the use of extremely careful layout, multicapacitor
power supply bypassing, star grounds, and a printed cir­cuit board “power plane,”

may

provide circuit stability,
it is far easier to reintroduce some reasonable amount of
power supply rejection into the design.

DECOUPLING THE BIASING NETWORK FROM THE SUPPLY

The solution is to modify the circuit, as shown in Figure 2.
The tap point on the voltage divider is now bypassed for
ac signals by capacitor C2, restoring some ac PSR.
Resistor R

provides a dc return path for the VS/2 reference

IN

voltage and also sets the circuit’s (ac) input impedance.

V

0.1F

/2

S

1F

R2

150k

*

*STAR GROUND

*

C

OUT

V

S

R

A

100k

R

IN

100k

+

*

BW1 =

BW2 =

BW3 =

BW4 =

FOR RA = RB AND BW1 = 1/10TH BW2,
BW3, AND BW4

FOR AC SIGNALS, V
WHERE X

TO MINIMIZE INPUT BIAS CURRENT ERRORS,
R2 SHOULD EQUAL R

Figure 2. A Decoupled Single Supply Op Amp Biasing
Circuit

C2

V

2

2

2

2

IN

(1/2RA) C2

1

RIN C

1

R1 C1

R

LOAD COUT

<<R1

C1

1

1

R

B

100k

IN

C

IN

= VIN (1 + (R2/R1))

OUT

(1/2 R

+

IN

*

V

S

VS/2

R1

C1

*

)

A

Many published applications circuits show a 100 kΩ/100 kΩ
voltage divider for R

and RB with a 0.1 µF or similar

A

capacitance value for C2. However, the –3 dB bandwidth
of this network is set by the parallel combination of R

A

and RB and Capacitor C2 and is equal to:

–

3

dB BW

(, )(. )

250000 0 1 10

π

1

–

6

Farads

×

30

Hz=

=

Motor boating or other forms of instability can still occur,
as the circuit has essentially no power supply rejection
for frequencies below 30 Hz. So any signals below 30 Hz
that are present on the supply line, can very easily find
their way back to the + input of the op amp.

A practical solution to this problem is to increase the
value of capacitor C2. It needs to be large enough to
effectively bypass the voltage divider at all frequencies
within the circuit’s passband. A good rule of thumb is to
set this pole at one-tenth the –3 dB input bandwidth, set
by R

IN/CIN

and R1/C1.

Note that the dc circuit gain is unity. Even so, the op
amp’s input bias currents need to be considered. The
R

voltage divider adds considerable resistance in

A/RB

series with the op amp’s positive input terminal, equal
to the parallel combination of the two resistors. Main­taining the op amp’s output close to midsupply requires
“balancing” this resistance by increasing the resistance
in the minus input terminal by an equal amount. Current

V

OUT

R

AD

LO

feedback op amps often have unequal input bias cur­rents, which further complicates the design.

Therefore, designing a single supply op amp circuit
design that considers input bias current errors as well as
power supply rejection, gain, input and output circuit
bandwidth, etc., can become quite involved. However, the
design can be greatly simplified by using a “cookbook”
approach. For a common voltage feedback op amp
operating from a 15 V or 12 V single supply, a resistor
divider using two 100 kΩ resistors is a reasonable com­promise between supply current consumption and input
bias current errors. For a 5 V supply, the resistors can be
reduced to a lower value such as 42 kΩ. Finally, some
applications need to operate from the new 3.3 V stan­dard. For 3.3 V applications, it is essential that the op
amp be a “rail-to-rail” device and be biased very close to
midsupply; the biasing resistors can be further reduced
to a value of around 27 kΩ.

–2–

REV. 0

AN-581

π (

π

Note that current feedback op amps are typically
designed for high frequency use and a low-pass filter is
formed by R2 and stray circuit capacitance, which can
severely reduce the circuit’s 3 dB bandwidth. Therefore,
current feedback op amps normally need to use a
fairly low resistance value for R2. An op amp such as
the AD811, which was designed for video speed applica­tions, typically will have optimum performance using a
1kW resistor for R2. Therefore, these types of applications
need to use much smaller resistor values in the R

A/RB

voltage divider to minimize input bias current errors.

Instead of a bipolar device, the use of a modern FET
input op amp will greatly reduce any input bias current
errors unless the circuit is required to operate over a
very wide temperature range. In that case, balancing the
resistance in the op amp’s input terminals is still a wise
precaution.

Table I provides typical component values for the circuit
of Figure 2 for several different gains and 3 dB band­widths.

Table I. Typical Component Values for the Circuit of Figure 2
Where R

= RB = 100 k⍀, RIN = 100 k⍀, and R2 = 150 k⍀

A

Input Output
BW BW C

*R1 C1* C2 C

IN

OUTRLOAD

Gain (Hz) (Hz) (␮F) (k⍀)(␮F) (␮F) (␮F) (k⍀)

10 10 10 0.3 16.5 1.5 3 0.2 100
20 10 10 0.3 7.87 3 3 0.2 100
10 50 50 0.1 16.5 0.3 0.6 0.05 100
101 20 20 0.2 1.5 6.8 2 0.1 100

*Capacitance values rounded off to next highest common value. Since

the CIN/RIN pole and C1/R1 poles are at the same frequency, and both
affect the input BW, each capacitor is ÷2 larger than it would otherwise
be for a single pole RC-coupled input. C2 is selected to provide a corner
frequency of 1/10th that of the input BW.

+V

S

0.1␮F

R

A

100k⍀

R

2

2

2π R

R1 C1

B

100k⍀

V

IN

1

1/2 RA) C2

1

1

LOAD COUT

OUT

C2

*

BW1 =

BW2 =

BW3 =

FOR RA = RB AND XC2<<X

FOR AC SIGNALS, V
WHERE XC1<<R1

TO MINIMIZE INPUT BIAS CURRENT ERRORS,
R2

SHOULD EQUAL 1/2 R

*

VS/2

VS/2

R1

C1

= VIN (R2/R1)

.

A

C1

+V

S

1␮F

R2

*

50k⍀

*STAR GROUND

*

C

OUT

V

OUT

R

LOAD

Figure 3. A Decoupled Single Supply Inverting
Amplifier Circuit

Figure 3 shows a circuit similar to Figure 2, but for an
inverting amplifier.

Table II provides typical component values for several
different gains and 3 dB bandwidths.

Table II. Typical Component Values for the Circuit of Figure 3
Where R2 = 50 k⍀ and R

= RB = 100 k⍀

A

Input Output
BW BW R1 C1* C2* C

OUTRLOAD

Gain (Hz) (Hz) (k⍀)(␮F) (␮F) (␮F) (k⍀)

10 10 10 2 8.2 0.5 0.2 100
20 10 10 1 20 0.5 0.2 100
10 50 50 2 2 0.1 0.05 100
100 20 20 1 8.2 0.3 0.1 100

*Capacitance values rounded off to next highest common value. Since

the C1/R1 pole and C2/RA/RB poles are at the same frequency, and both
affect the input BW, each capacitor is ÷2 larger than it would otherwise
be for a single pole RC-coupled input.

REV. 0

–3–