Analog Devices AN-543 Application Notes
AN-543
a
APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106 • 781/329-4700 • World Wide Web Site: http://www.analog.com
High Quality, All-Digital RF Frequency Modulation Generation with the ADSP-2181
DSP and the AD9850 Direct Digital Synthesizer
by Dean R. Becker
The following describes the implementation of a high
quality all-digital FM RF generator for use with audio frequency input signals. The FM RF signal output is in the
broadcast FM band and can be monaural or stereo.
FM modulators have been with us since the time of
Major Edwin H. Armstrong (sometimes known as the
father of FM) and his classic 1936 paper on the subject.
He first put down on paper the fundamental concept of a
fixed center frequency that is varied per a constant deviation ratio that is independent of the frequency of the
modulating signal. FM became very popular because
much of the noise generated in nature exhibits AM characteristics. The signal-to-noise ratio of an FM signal will
be found to exceed that of an AM signal due to the
provement ratio
familiar with the wideband FM broadcast band and its
superior sound quality and noise immunity when compared with AM broadcast.
Analog FM modulators typically employ an oscillator
with a varactor diode in the tuned circuit. The voltage to
the varactor is varied by the modulating signal, which
changes its capacitance, therefore changing the resonant point of the oscillator’s tuned circuit, which shifts
the frequency. As noted above, constant center frequency and deviation ratio are essential to quality FM.
Much work has been done to embellish the basic oscillator circuit to provide the needed stability. Even though
complex circuitry can be added to automatically compensate for power supply and temperature variations,
these circuits still require periodic recalibration to deal
with component aging.
related to the deviation ratio. We are all
im-
Recent developments in digital signal processing (DSP)
devices have made it possible to create high quality FM
modulation using all-digital circuitry. This modulator
does not require periodic recalibration, it does not drift
with temperature or power supply variations, and it is
very easy to reproduce since there are no analog adjustments (other than the level of the input analog modulating signal). At the heart of this circuit is a Direct Digital
Synthesizer (DDS), such as the AD9850 Complete-DDS
(C-DDS) device. The AD9850 consists of a digital phase
accumulator, a phase/amplitude converter and a D/A
converter. It creates a linear ramp in the phase accumulator with a frequency that is dependent on the phase
accumulator’s input value. The ramp is mapped to a
sampled sinusoidal signal by the phase-to-amplitude
converter. The sampled digital signal is then D/A converted and filtered with a reconstruction filter to produce an analog waveform. All functions of the DDS
(except the analog reconstruction filter) are contained in
the AD9850 chip. The sampled signal is created at a
sample rate of 125 MHz, allowing high frequency RF output. Prior to the release of the AD9850, very fast, inexpensive C-DDS devices did not exist. For a more detailed
explanation of the operation and specifications of a
C-DDS device, please refer to the theory of operation in
the AD9850 data sheet.
HARDWARE IMPLEMENTATION
The implementation of the FM RF generator consists of
an Analog Devices EZ-KIT Lite 16-bit DSP development
board, some I/O decode circuitry, and an evaluation
board for the DDS—the AD9850-FSPCB as shown in
Figure 1.
AUDIO IN
L AND R
LINE IN
AD9850/FSPCB
DDS
AD9850
125MHz
XOSC
AD1847
STEREO
CODEC
EZ-KIT LITE
ADSP-2181
DSP mP
ADSP-2181
BUS
I/O DECODE
LOGIC
8-BIT
DATA
Figure 1. Block Diagram of FM RF Generator Implementation
DAC
OUT
FM RF
OUTPUT
AN-543
AD9850-FSPCB
EVAL BOARD
MODIFIED CONNECTIONS
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
11
CLK
1
OE
74AC574
CONNECT DIRECTLY
TO 74AC574 PINS
2
D1
3
D2
4
D3
5
D4
6
D5
7
D6
8
D7
9
D8
11
CLK
V
CC
1
OE
74AC574
CUT OE's FROM GND
THEN TIE TO V
EZ-KIT LITE
BOARD
19
Q1
Q2
Q3
Q4
U2
Q5
Q6
Q7
Q8
D7
18
D6
17
D5
16
D4
15
D3
14
D2
13
D1
12
D0
I/O INTERFACE BOARD
19
Q1
18
Q2
17
Q3
16
Q4
U3
15
Q5
FQ
14
Q6
Q7
Q8
CLK
W
13
RESET
12
CC
UD
12
6
2
U1A
74LS10
U1B
74LS10
U2A
74LS04
1
2
13
3
4
5
1
43
U2B
74LS04
65
U2C
74LS04
D15
D14
D13
D12
D11
D10
D9
D8
IOMS
A1
WR
A0
RESET
P2-30
P2-29
P2-28
P2-27
P2-26
P2-25
P2-24
P2-23
J2-41
J2-2
J2-39
J2-1
J3-37
Figure 2. Schematic of I/O Decode Logic and Interconnections
The EZ-KIT Lite contains an Analog Devices ADSP-2181
KS-133 16-bit DSP with 16K × 24 of program memory
RAM and 16K × 16 of data memory RAM.
Hardware documentation comes with the EZ-KIT Lite
development board and schematics for the AD9850
C-DDS are in the AD9850 data sheet. The I/O decode
logic and interconnections are shown in the schematic
in Figure 2.
The AD9850-FSPCB evaluation board is made to interface to the parallel port of a PC. It has a Centronics-type
connector on it and buffers to work with the parallel
port. A simple way to connect it to an external DSP is by
disabling the buffers as shown in the schematic, by disconnecting the output enables from the ground plane of
the PCB and wiring them to V
. With the buffers dis-
CC
abled, the ADSP-2181 on the EZ-KIT Lite can drive the
AD9850 data lines directly. The I/O interface in the schematic decodes I/O address 1 to create the W_CLK (write
clock) signal and I/O address 2 to create the FQ_UD (frequency update) signal. These are control signals used to
write the consecutive frequency bytes into the AD9850
and then strobe the entire 32-bit frequency word into the
operational register respectively. RESET is brought in to
initialize the AD9850. Please refer to the AD9850 data
sheet for more information on loading the C-DDS.
DSP FIRMWARE IMPLEMENTATION
Two programs are described here. The first is for a monaural FM modulator (fm_xmit.dsp) and the second is for
stereo (fmStereo.dsp). Both programs are stand-alone
single modules and can be loaded into the EZ-KIT Lite
via the serial port using the EZ-KIT Lite monitor. They
begin with codec variable initialization. The only difference here is that the codec sample rate for fm_xmit is
48 kHz while it is set to 44.1 kHz in FmStereo. (This will
be explained with the FmStereo program). This part, the
initialization code, interrupt vectors and DSP and codec
initialization, was copied from a sample program that
comes with the EZ-KIT Lite. The following partial listing
in Figure 3 describes what happens on every input
sample from the codec. First the left and right input
samples are divided by two to ensure that they do not
overflow as they are summed together. Next, a deviation value is multiplied by the previous sum and then
has a center frequency value added to the product. This
is all done in 32-bit double precision to preserve the accuracy of the C-DDS. Finally, the 32-bit frequency word
is broken into four bytes and sent to the AD9850 C-DDS.
–2–
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